Micro-led device and method for manufacture

Abstract

The invention concerns a micro-LED device configured to achieve improved efficiency of hole injection into the active region by implementation of lateral injection through inclined sidewalls of the active layer. The invention further concerns methods for manufacturing micro-LED devices featuring lateral hole injection into the active region.

Description

[0001] MICRO-LED DEVICE AND METHOD FOR MANUFACTURE

[0002] The present application claims priority from German patent application DE 10 2024 119 788 . 9 dated July 11 , 2024 , the disclosure of which is incorporated herein by reference in its entirety .

[0003] The present invention concerns an optoelectronic device , in particular, a pLED device configured to produce improved and more uniform performance . The invention further concerns a method for manufacturing said optoelectronic device .

[0004] BACKGROUND

[0005] Devices with small displays , such as artificial reality / virtual reality devices make use of pLEDs to achieve desired lighting requirements .

[0006] I TI-nitride based pLED devices are typically characterized by threading dislocations arising from differences in lattice parameters and thermal expansion characteristics between commonly used substrates such as sapphire and silicon and the nitride-based semiconductor material . The threading dislocations propagate through the crystal structure , forming v-shaped defects , also known as v-pits , extending vertically into the quantum well structure . The v-pits are characterized by an inverted pyramidal shape with six semipolar <10-l l> facets forming the sidewalls . Where the v-pits extend into the quantum well structure , regions of the quantum well layers adj acent to the v-pit sidewalls are characterized by reduced thickness of quantum well and barrier layers .

[0007] V-pits have been used in GaN-based LEDs , in particular, in blue and green LEDs to assist in hole inj ection into a multi-quantum-well (MQW ) active layer . Improved efficiency of hole inj ection into the active layer results in increased hole concentration in the quantum wells , leading to enhanced luminescence efficiency .

[0008] The efficiency of v-pit-assisted hole inj ection is significantly impacted by the size and density of the v-pits , which follows a random distribution in naturally formed v-pits , i . e . v-pits occurring during epitaxial growth of semiconductor layers . For very small pLEDs , a non- uniform distribution of v-pits results in performance challenges , in particular, inconsistencies in output performance . For instance , where a pLED comprises several or many v-pits corresponding to a higher V- pit density, the active area of the pLED is reduced . A pLED with no or almost no v-pits will have a larger active area, but worse hole inj ection . As a result , a large variation of brightness , voltage and other performance characteristics is observed in different pLEDs .

[0009] It is therefore an obj ect of the present application to achieve greater and more uniform output characteristics in pLEDs .

[0010] SUMMARY OF THE INVENTION

[0011] This and other obj ects are addressed by the subj ect matter of the independent claims . Features and further aspects of the proposed principles are outlined in the dependent claims . pLEDs are typically defined as small light emitting diodes comprising lateral dimensions less than 100pm, in particular, between 1 pm and 100 pm and more particularly between 1 pm and 20 pm .

[0012] V-shaped defects known as v-pits form naturally at the surface of nitride-based semiconductor materials epitaxially grown on foreign substrates , at terminal ends of threading dislocations arising from mismatched lattice constants and thermal expansion coefficients . Though the presence of v-pits reduces the available surface area for light generation, they provide lateral access to quantum well layers within a multi-quantum well structure located farther away from the surface of the semiconductor stack . Therefore , filling of v-pits with p-doped material allows for hole inj ection through the v-pit sidewalls into the active layer of an optoelectronic device .

[0013] Improvement of pLED performance by lateral inj ection of holes into the multi-quantum-well active layer through sidewalls of natively formed v-pits faces challenges arising from the random distribution of the v- pits , in particular with regards to density and dimensions . For very small pLEDs , particularly pLEDs characterized by dimensions smaller than 10 pm, variation in the distribution of v-pits results in non- uniform performance . Furthermore , use of v-pit sidewalls for hole inj ection requires a design trade-off between desired efficiency of hole inj ection and available active area of the pLED .

[0014] The inventors propose an approach that utilizes the benefits of v-pit inj ection on very small pLEDs where the use of v-pits is not practical . In particular, the proposed invention achieves lateral hole inj ection into the active layer of pLEDs through inclined sidewalls , said sidewalls being located at the periphery of the pLED device rather than within the bulk material of the semiconductor layers , as in the case of v-pit sidewalls . The use of the sidewalls for hole inj ection enables greater flexibility in design of active regions for small pLEDs , and enables achieving of more uniform output characteristics , such as brightness , as well as more uniform electrical parameters including but not limited to forward voltage , reverse breakdown voltage and electro-optical characteristics , etc . , due to uniform sidewall area of individual pLEDs .

[0015] Some aspects of the proposed invention relate to a method of manufacturing a pLED device . In a first step according to some aspects of the proposed method, a growth substrate comprising a suitable material , said material including but not limited to silicon or sapphire is provided . In some aspects , the growth substrate further comprises at least one layer of undoped semiconductor material . A first doped semiconductor layer , in particular, an n-doped semiconductor layer , is then deposited on the growth substrate . The n-doped semiconductor layer may comprise a Il l-nitride based semiconductor material , in particular, binary, ternary and / or quaternary nitrides , and, more particularly, comprising Ga and N .

[0016] In some aspects , the n-doped layer comprises uniform dopant concentration . In other aspects , the dopant concentration in the n- doped layer exhibits a varying concentration gradient . The n-doped layer may additionally or alternatively comprise a plurality of sublayers wherein a first sublayer of the plurality of sublayers is deposited in direct contact with the growth substrate , and at least one second sublayer is subsequently deposited on the first sublayer . The sublayers may comprise different material compositions , depending on desired functionality and performance characteristics .

[0017] Subsequently, the n-doped layer is patterned and etched to form pLED mesa structures , wherein the mesa structures comprise at least partially inclined sidewalls . In some aspects , the sidewalls comprise a first inclination angle in the range between 50 ° and 75 ° , in particular between 55 ° and 65 ° . An upper surface of the n-doped layer is aligned along the <0001> crystallographic plane ( c-plane ) . In some aspects , the sidewalls of the n-doped layer further comprise at least one second inclination angle greater than the first inclination angle and less than or substantially equal to 90 ° with respect to the upper surface of the n-doped layer . Surface treatment of the etched surfaces is performed in some aspects to mitigate etch-induced defects .

[0018] In a subsequent step , an active layer is deposited on an upper surface and the inclined sidewalls of the n-doped layer , at least partially encapsulating the n-doped layer . In particular , the active layer is deposited through a regrowth process to cover the upper surface of the n-doped layer , and substantially cover inclined portions of the sidewalls of the n-doped layer . Epitaxial growth of the active layer in a vertical direction perpendicular to the upper surface of the n- doped layer occurs at a greater rate than growth along the inclined surfaces of the mesa structure , with the rate of lateral growth to vertical growth forming inclined facets , which correspond to the sidewalls of the resultant mesa structures . The selected angle of inclination of the n-doped layer underneath the active layer allows epitaxial growth of the active layer to achieve inclined surfaces aligned along semipolar facets associated with the crystallographic planes of the semiconductor material . In some aspects the resultant angle of inclination of the active layer sidewalls is substantially equal to the angle of inclination of the underlying n-doped layer .

[0019] The variation in growth rates along the vertical and lateral directions results in a variation in the thickness of quantum well and quantum barrier layers constituting a multi-quantum well structure within the active layer . In particular , regions of the quantum well and quantum barrier layers formed along a growth direction substantially perpendicular to the top surface of the n-doped layer and aligned substantially parallel to the c-plane comprise a thickness greater than that of quantum well and quantum barrier layers in regions of the quantum well and quantum barrier layers aligned substantially parallel to the inclined sidewalls of the n-doped layer . In aspects comprising sidewalls having a first and at least one second region characterized respectively by a first and at least one second angle of inclination, some material of the active layer is deposited along sidewalls of the first region of the n-doped layer .

[0020] Due to an inverse correlation between the thickness of quantum well layers and emission bandgap , the reduced thickness of the multi-quantum well layers aligned parallel to the inclined sidewalls of the n-doped layer may result in an increased emission bandgap at emission surfaces corresponding to the inclined surfaces of the mesa structure . The resultant optoelectronic device could therefore also emit light of different wavelength . In other words , the device could be characterized by different emission characteristics with respect to a first emission surface parallel to an upper surface of the mesa structure and at least one second emission surface corresponding to the inclined sidewalls .

[0021] To mitigate undesired emission characteristics , the process of depositing the active layer is configured to minimize the thickness of the layer along the sidewalls such that any emissions originating from the sidewalls at the corresponding larger bandgap are at intensities substantially smaller than emissions originating from the upper surface of the optoelectronic device . This is partially achieved by the inclined sidewalls as such, i . e . the above-mentioned different growth rates , but may also be adj usted by setting the growth parameters accordingly .

[0022] A subsequent step in accordance with some aspects of the proposed principle involves deposition of a p-doped semiconductor layer on the active layer such that an upper surface of the active layer substantially parallel to the upper surface of the n-doped layer and at least part of the inclined sidewalls of the active layer are encapsulated within the p-doped layer . The p-doped layer arranged on the inclined sidewalls of the active layer allow lateral inj ection of charge carriers , in this case , hole inj ection, into the active layer through the inclined sidewalls . The reduced thickness of the quantum barrier layers along the inclined sidewalls improves hole mobility into the corresponding quantum wells , thus increasing efficiency of hole inj ection into the active layer . In some aspects , an electron blocking layer is deposited between the p-doped layer and the active layer to prevent electron leakage from the quantum wells into the p-doped layer . Some aspects comprise an electron blocking layer of uniform thickness . In alternative aspects , the electron blocking layer is characterized by a reduced thickness along the inclined sidewalls of the active layer to mitigate reduction of hole mobility by the electron blocking layer .

[0023] Further improvement of hole inj ection efficiency is achieved in some aspects of the proposed invention by a variation of dopant concentration in the p-doped layer . In particular , regions of the p- doped layer directly adj acent to the active layer may comprise a greater dopant concentration than regions farther away from the active layer with the increased charge carrier concentration resulting in higher hole inj ection efficiency .

[0024] Some aspects of the proposed invention relate to an alternative method of processing an optoelectronic device . A first step involves providing a growth substrate , typically comprising silicon, sapphire , or any other suitable substrate for growth of II I-V nitrides , in particular, binary, ternary or quaternary nitrides . In some aspects , the substrate comprises at least one layer of pre-grown undoped or doped semiconductor material . In particular , the substrate may comprise a layer of pre-grown n-doped GaN, which serves as a template for subsequent epitaxial growth .

[0025] A patterned mask is deposited on an upper surface of the growth substrate , said patterned mask comprising at least one opening, in particular, comprising a plurality of openings through which the upper surface of the growth substrate is exposed . Suitable material for the mas k include but are not limited to SiO2or SiN . In some aspects , each opening in the patterned mask is associated with an individual optoelectronic device . The openings in the patterned mas k may comprise substantially hexagonal shapes oriented such that the edges of the openings correspond to the crystallographic planes of the growth substrate . In other aspects , the openings in the mask may comprise rectangular , circular or other suitable polygonal shapes .

[0026] A subsequent step involves depositing a first semiconductor layer on the exposed upper surface of the growth substrate . The growth of the n-doped semiconductor material is anisotropic , with a higher growth rate in a vertical direction perpendicular to the c-plane of the semiconductor material in comparison to growth in lateral directions . The surface area of the c-plane gradually decreases , and the n-doped layer is bounded by inclined sidewalls oriented along a semipolar crystal facet , in particular , oriented along <1011> crystalline facets . In some aspects , the n-doped layer extends laterally to partially cover upper surfaces of the patterned mas k laterally adj acent to the at least one opening within the mask .

[0027] In a subsequent step in accordance with some aspects of the proposed principle , an active layer is deposited on the upper surface and the inclined sidewalls of the n-doped layer such that the n-doped layer is encapsulated within material forming the active layer . The active layer comprises a multi-quantum well structure , characterized by alternating quantum well and quantum barrier layers . The thickness of the active layer extending from the inclined sidewalls of the n-doped layer is smaller than the thickness of regions of the active layer extending vertically upwards in a direction substantially perpendicular to the upper surface of the n-doped layer . In some aspects , the active layer extends laterally to partially cover upper surfaces of the patterned mask laterally adj acent to the at least one opening within the mask .

[0028] A p-doped semiconductor layer is then deposited on the active layer, covering the upper surface of the active layer and at least partially covering the inclined sidewalls of the active layer , such that the active layer is at least partially encapsulated within the p-doped layer . In some aspects , the p-doped layer is deposited to fully encapsulate the underlying active layer . The sidewalls of the p-doped layer may comprise an inclination angle substantially equal to the inclination angle of the sidewalls of the underlying active layer . In other aspects , the sidewalls of the p-doped layer comprise a different inclination angle compared to the angle of the sidewalls of the active layer . In some aspects of the proposed optoelectronic device , the device comprises a p-doped layer with substantially vertical sidewalls .

[0029] Further processing steps related to the proposed optoelectronic device include but are not limited to provision of contact surfaces corresponding to the n-doped and p-doped semiconductor layers , deposition of protective layers , reflective layers and / or outcoupling structures , and so on .

[0030] Some additional aspects of the proposed invention relate to an optoelectronic device processed according to the proposed principle . The optoelectronic device comprises an n-doped semiconductor layer, an active layer and a p-doped semiconductor layer . In particular, the proposed optoelectronic device comprises materials based on nitride semiconductor material system . More particularly, the proposed optoelectronic device comprises binary, ternary and / or quaternary nitrides . These may include GaN, InGaN, AlGaN and InAlGaN with different contents of In and Al depending on the actual layer . For example sublayers of the active layer may comprise different In and / or Al content . In some aspects the In or Al concentration of barrier layers of the multi-quantum well structure of the active layer is higher than those of the quantum well layers . In some aspects of the proposed device , the doped semiconductor layers in particular comprise at least GaN .

[0031] The n-doped semiconductor layer comprises an upper surface , a lower surface and sidewalls connecting the upper surface to the lower surface of the optoelectronic device . The sidewalls of the optoelectronic device comprise at least partially inclined sidewalls having at least a first angle of inclination . The first angle of inclination of the sidewalls is in particular in the range 50 ° and 75 ° , more particular between 55 ° and 65 ° . In some aspects , the n-doped layer comprises sidewalls having at least one second angle of inclination, wherein the at least one second angle of inclination is greater than the first angle of inclination and less than or substantially equal to 90 ° , in particular, where the at least one second angle of inclination is 90 ° . The at least partially inclined sidewalls may comprise etching-induced defects . In some aspects , the sidewalls of the n-doped layer may comprise etching-induced defects limited to surfaces corresponding to a first region having the first angle of inclination .

[0032] In some aspects , the n-doped layer comprises a substantially uniform material composition . In other aspects , the n-doped layer may comprise a plurality of sublayers . At least some of the plurality of sublayers may comprise at least one of different material composition, and / or dopant concentration and / or different layer thickness . The configuration of the sublayer characteristics depends on desired functionality and / or output performance . The sublayers of the n-doped layer may further comprise features formed as a result of surface treatment processes including but not limited to passivation and / or healing of surface defects .

[0033] The active layer is arranged on the upper surface and the at least partially inclined sidewalls of the n-doped layer such that the upper surface and at least part of the inclined sidewalls of the n-doped layer , in particular, the first region of the inclined sidewalls of the n-doped layer, are encapsulated within the active layer . Some aspects of the proposed optoelectronic device feature an active layer comprising a multi quantum well (MQW ) structure , said MQW structure comprising alternating quantum well and quantum barrier sublayers . The sublayers are characterized by alternating materials with different bandgap , wherein quantum well sublayers are characterized by a lower bandgap than surrounding quantum barrier sublayers . In some aspects , the difference in bandgap is achieved by varying the proportion of Group III material composition in a ternary or quaternary I ll-nitride semiconductor material . In other aspects , the quantum well and quantum barrier sublayers comprise different materials , for example , comprising alternating sublayers of a binary and ternary nitride , or alternating sublayers of a ternary and a quaternary nitride . In some aspects , the active layer comprises quantum well and quantum barrier sublayers comprising In, in particular , wherein the quantum well and quantum barrier sublayers comprise ternary and / or quaternary nitrides with different percentage composition of In .

[0034] The thickness of the active layer, in particular, the thickness of the quantum well and quantum barrier sublayers is greater along a direction perpendicular to the upper surface of the n-doped layer in comparison to the thickness of the MQW sublayers in a direction perpendicular to the inclined sidewalls of the n-doped layer . The difference in the active layer thickness in different regions arises from anisotropic epitaxial growth of the deposited semiconductor material , whereby vertical growth in a direction perpendicular to c-plane facets of the semiconductor material occurs at a faster rate than lateral growth, in particular, in a direction parallel to the c-plane facets of the semiconductor material . As a result of the variation in thickness of the MQW structure , the optoelectronic device exhibits different emission characteristics with respect to the upper surface oriented substantially along the c-plane in comparison to the inclined sidewalls . The reduced thickness of the active layer along the sidewalls of the optoelectronic device is however configured to limit achievable emission intensity from the sidewalls .

[0035] The p-doped layer is arranged on the upper surface and at least partially on the surface of the inclined sidewalls of the active layer . The p-doped layer comprises a smaller thickness along the inclined sidewalls , resulting in a higher concentration of p-dopant closer to the active layer . In some aspects , the p-doped layer is arranged such that the active layer and the underlying n-doped layer are encapsulated within the p-doped layer .

[0036] Some aspects of the proposed optoelectronic device comprise a p-doped layer having inclined sidewalls , wherein the angle of inclination of the sidewalls of the p-doped layer is , in some aspects , identical to the angle of inclination of the sidewalls of the underlying active layer and / or the n-doped layer . In other aspects , the p-doped layer comprises sidewalls having an angle of inclination different from that of the active layer and / or the n-doped layer . The p-doped layer may comprise sidewalls having a first angle of inclination and at least one second angle of inclination, wherein the second angle of inclination is greater than the first angle of inclination, and is , in particular, less than or approximately equal to 90 ° . In some aspects , the p-doped layer comprises sidewalls of uniform thickness . In other aspects , the thickness of the p-doped layer is greater along surfaces corresponding to the inclined sidewalls of the underlying active layer in comparison with the thickness along a direction perpendicular to the upper surface of the n-doped layer . In such aspects the difference in thickness in the p-doped layer may allow for ease of processing and / or handling .

[0037] Some aspects of an optoelectronic device according to the proposed principle further comprise electrical contact surfaces arranged in contact with the n-doped and p-doped layers . Some aspects may comprise further layers including but not limited to protective layers , outcoupling structures and / or additional layers providing optical processing functions .

[0038] SHORT DESCRIPTION OF THE DRAWINGS Further aspects and embodiments in accordance with the proposed principle will become apparent in relation to the various embodiments and examples described in detail in connection with the accompanying drawings in which

[0039] Figure 1A shows a cross-sectional view of a v-pit ;

[0040] Figure IB shows a top view of a semiconductor material comprising v- pits ;

[0041] Figure 2 illustrates an aspect of an optoelectronic device in accordance with some aspects of the proposed principle ;

[0042] Figures 3A and 3B show some steps of a first method of manufacturing an optoelectronic device in accordance with some aspects of the proposed invention; Figures 4A and 4B illustrate some steps of a second method of manufacturing an optoelectronic device in accordance with some aspects of the proposed principle .

[0043] DETAILED DESCRIPTION

[0044] The following embodiments and examples disclose various aspects and their combinations according to the proposed principle . The embodiments and examples are not always to scale . Likewise , different elements can be displayed enlarged or reduced in size to emphasize individual aspects . It goes without saying that the individual aspects of the embodiments and examples shown in the figures can be combined with each other without further ado , without this contradicting the principle according to the invention . Some aspects show a regular structure or form . It should be noted that in practice slight differences and deviations from the ideal form may occur without , however, contradicting the inventive idea .

[0045] In addition, the individual figures and aspects are not necessarily shown in the correct size , nor do the proportions between individual elements have to be essentially correct . Some aspects are highlighted by showing them enlarged . However , terms such as "above" , "over" , "below" , "under" "larger" , "smaller" and the like are correctly represented with regard to the elements in the figures . So it is possible to deduce such relations between the elements based on the figures .

[0046] Figure 1A illustrates v-pit-assisted inj ection of holes into the active layer of an optoelectronic device . A cross-section of an optoelectronic device comprising a semiconductor stack is shown . The semiconductor stack comprises an n-doped layer ( 20 ) , an active layer ( 30 ) and a p- doped layer ( 40 ) . A v-pit ( 42 ) extends vertically at least through the active layer ( 30 ) and optionally, partially through the n-doped layer ( 20 ) . The active layer ( 30 ) in some aspects comprises alternating quantum well and quantum barrier sublayers , forming a multi-quantum well structure . The quantum well and quantum barrier sublayers are characterized by a reduced thickness in regions adj acent to the inclined sidewalls of the v-pit ( 42 ) . The reduced quantum well thickness contributes to an increased bandgap along regions of the active layer adj acent to the v-pit . Charge carriers are inj ected into the active layer from the doped layers , in particular , electrons arising from the n-doped layer ( 20 ) and holes from the p-doped layer ( 40 ) . Typically, inj ection of holes from the p-doped layer ( 40 ) occurs substantially parallel to the direction of epitaxial growth . However , the lower mobility of holes and, in some aspects , reduction of hole transportation efficiency by an optional electron blocking layer arranged between the p-doped layer and the active layer results in lower concentrations of holes in quantum well layers farther away from the interface between the p-doped layer and the active layer .

[0047] V-pit assisted hole inj ection takes advantage of naturally occurring v-shaped defects originating from threading dislocations in I ll-nitride materials epitaxially grown on foreign substrates , in particular, in semiconductor materials based on GaN material systems . The side walls of the v-pit ( 42 ) allow lateral inj ection of holes into adj acent quantum well layers . Efficiency of hole inj ection is further enhanced by the reduced thickness of quantum barrier layers adj acent to the inclined sidewalls of the v-pits . To facilitate v-pit-assisted hole inj ection, the v-pit cavities are filled with p-doped material during deposition of the p-doped layer ( 40 ) .

[0048] The distribution and size of v-pits is characterized by a random distribution, as shown in Figure IB . Given that the efficiency of hole inj ection is dependent on, among others , the depth and density of v- pits , implementation of v-pit-assisted hole inj ection in manufacture of optoelectronic devices faces challenges in achievement of uniform performance . For example , an optoelectronic device formed in a region Q of the material surface shown in Figure IB is characterized by a higher density of v-pits than an optoelectronic device formed in a different region P . Furthermore , the dimensions of the v-pits in terms of cross-sectional area and depth are different . As the overall device size reduces , the probability of a semiconductor mesa stack being located in a region with few or no v-pits correspondingly increases , thereby resulting in challenges in achieving the desired levels of hole in ection .

[0049] An optoelectronic device in accordance with the proposed principle is illustrated in Figure 2. The device comprises an n-doped semiconductor layer (20) , an active layer (30) arranged on an upper surface of and at least partially along the sidewalls of the n-doped layer, and a p- doped semiconductor layer (40) arranged on an upper surface and at least partially along the sidewalls of the active layer (30) .

[0050] The n-doped layer (20) comprises an upper surface (21) , at least partially inclined sidewalls (22) and a lower surface (23) . The at least partially inclined sidewalls extend from the upper surface (21) such that the surface area of the upper surface (22) is smaller than the surface area of the lower surface (23) . In some aspects, a first region of the sidewalls of the n-doped layer is characterized by a first angle of inclination a approximately equal to 60° . In some aspects, the n-doped layer (20) further comprises a second region of the sidewalls characterized by a second angle of inclination £, wherein the second angle of inclination £ is larger than the first angle of inclination a, in particular, wherein the second angle of inclination is substantially equal to 90° . The angles can be adjusted and are partially depending on the crystallographic planes.

[0051] In some aspects, the first region of the at least partially inclined sidewalls (22) extends vertically to a depth less than the depth of the n-doped layer, in particular, to a depth less than or substantially equal to half the depth of the n-doped layer. In other aspects, the first region of the at least partially inclined sidewalls (22) extends vertically along the entire depth of the n-doped layer, such that a cross-sectional view of the n-doped layer forms a trapezium, in particular, a substantially isosceles trapezium.

[0052] The active layer of the proposed optoelectronic device comprises a multi-quantum well structure, comprising alternating quantum well and quantum barrier sublayers. The active layer comprises inclined sidewalls with an inclination angle corresponding to semipolar crystalline facets of the semiconductor material, and approximately correspond to the first inclination angle (a) of the sidewalls of the n-doped layer. The active layer (30) comprises a first thickness ti along a direction perpendicular to the upper surface (21) of the n- doped layer, said first thickness being greater than a second thickness t2 along a direction substantially perpendicular to the inclined sidewalls (22) of the n-doped layer.

[0053] The p-doped layer (40) is arranged such that the underlying active layer (30) is at least partially encapsulated within the p-doped layer material. In particular, in some aspects, the sidewalls of the optoelectronic device comprise parts of the sidewalls of the p-doped layer and at least the active layer.

[0054] In the proposed optoelectronic device, lateral injection (h+) of holes from the p-doped layer (40) into the active layer (30) is achieved through the inclined sidewalls of the active layer (30) . The reduced thickness of the active layer along the inclined sidewalls, in particular, the reduced thickness of the barrier layers along the inclined sidewalls of the active layer allows improved hole mobility from the p-doped layer disposed thereupon, thereby allowing increased efficiency of hole injection into the active layer.

[0055] Figures 3A and 3B illustrate steps of a method for manufacturing an optoelectronic device in accordance with some aspects of the proposed principle. In an initial step, a growth substrate (10) is provided, said growth substrate comprising a suitable material such as silicon or sapphire, but not limited thereto. In a subsequent step, an n-doped semiconductor layer (20) is deposited on the growth substrate. The growth of the n-doped semiconductor layer (20) is stopped after a desired layer depth has been achieved. Thereafter a step of mesa etching is conducted to form an upper surface (21) and inclined sidewalls (22) . The etching process is configured such that the angle of inclination of the sidewalls (22) is approximately equal to 60° . In a subsequent step, shown in Figure 3B, an active layer (30) is deposited onto the top surface (21) and the inclined sidewalls (22) of the n-doped layer (20) . Thereafter a p-doped layer (40) is deposited on the active layer such that an upper surface and inclined sidewalls of the active layer ( 30 ) are encapsulated within the p-doped layer ( 40 ) . The depositing of the active layer is configured such that the active layer comprises a first thickness ti along the direction of epitaxial growth and a second thickness t2along a direction perpendicular to the inclined sidewalls of the n-doped layer ( 20 ) .

[0056] Figures 4A and 4B show an alternative method for manufacturing an optoelectronic device in accordance with some aspects of the proposed principle . In an initial step, a growth substrate ( 10 ) is provided . In some aspects the growth substrate comprises or consists of at least one undoped or n-doped semiconductor layer . In a subsequent step, a patterned mask ( 12 ) is deposited on an upper surface of the growth substrate . The mask comprises at least one opening through which at least part of the upper surface of the growth substrate is exposed . In a subsequent step, an n-doped layer ( 20 ) is deposited on the exposed upper surface of the growth substrate . In some aspects , the n-doped layer additionally extents laterally beyond the at least one opening in the patterned mask ( 12 ) to cover at least parts of the patterned mas k laterally adj acent to the at least one opening in the mask . The at least one opening in the patterned mask comprises a hexagonal , rectangular or circular shape , or may comprise any suitable polygonal shape .

[0057] Thereafter, an active layer ( 30 ) comprising alternating quantum well and quantum barrier sublayers is deposited on the upper surface and inclined sidewalls of the n-doped layer ( 20 ) . The active layer is deposited such that the n-doped layer ( 20 ) is encapsulated within the active layer material . In some aspects , the active layer ( 30 ) extends laterally to at least partially cover parts of the patterned mask ( 12 ) adj acent to the at least one opening within the mask . The active layer , that is , the quantum well and quantum barrier sublayers comprise a greater first thickness along a direction perpendicular to the upper surface of the n-doped material in comparison to a second thickness along a direction perpendicular to the inclined sidewalls of the n- doped layer . In a subsequent step, a p-doped layer is deposited to at least partially encapsulate the active layer . In particular, the p-doped layer is deposited to cover an upper surface of the active layer and at least partially cover the inclined sidewalls of the active layer . In some aspects the p-doped layer ( 40 ) is deposited such that the active layer ( 30 ) is fully encapsulated thereby . In such aspects , the p-doped layer may additionally extend laterally to cover at least part of the mas k layer .

[0058] LIST OF REFERENCES

[0059] 10 growth substrate

[0060] 12 patterned mas k

[0061] 20 n-doped layer

[0062] 21 upper surface of n-doped layer

[0063] 22 sidewalls of n-doped layer

[0064] 23 lower surface of n-doped layer

[0065] 30 active layer

[0066] 40 p-doped layer

[0067] 42 v-pit h+ hole inj ection ti first thickness of active layer t2 second thickness of active layer a, P sidewall inclination angles

Claims

CLAIMS1. Optoelectronic device comprising:An n-doped layer (20) comprising an upper surface (21) , a lower surface (23) and at least partially inclined sidewalls (22) ;An active layer (30) arranged on an upper surface (21) and along the inclined sidewalls (22) of the first doped semiconductor layer (20) ;A second doped semiconductor layer (40) arranged on an upper surface and at least partially along the inclined sidewalls of the active layer (30) .

2. Device according to claim 1, wherein the at least partially inclined sidewalls of the n-doped layer have a first inclination angle (a) in the range between 50° and 75°, in particular between 55° and65° .

3. Device according to any of the preceding claims, wherein a thickness ti in a direction substantially perpendicular to the upper surface of the n-doped semiconductor layer is greater than a thickness t2 in a direction substantially perpendicular to the inclined sidewalls of the n-doped semiconductor layer.

4. Device according to any of the preceding claims, wherein the n- doped semiconductor layer, the active layer, and the p-doped semiconductor layer are based on GaN material system.

5. Device according to any of the preceding claims, wherein the p- doped layer comprises a first sublayer arranged in direct contact with the active layer and at least a second sublayer on the first sublayer .

6. Device according to claim 5, wherein the first sublayer comprises a first dopant concentration and the second sublayer comprises a second dopant concentration.

7. Device according to any of claims 5 or 6, wherein the second sublayer comprises a different material system from the first sublayer.8 . Device according to any of the preceding claims , wherein the active layer comprises a plurality of alternating quantum well and quantum barrier layers , and wherein the plurality of quantum well layers comprise In .9 . Device according to claim 8 , wherein the quantum barrier layers comprise In and / or Al .10 . Device according to any of claims 7 to 8 , wherein the quantum well layers comprise a first concentration of In, and wherein the quantum barrier layers comprise a second concentration of In, wherein the first concentration of In is different from the second concentration of In . 11 . Device according to any of the preceding claims wherein the at least partially inclined sidewalls of the n-doped layer extend to a partial depth of the n-doped layer, in particular, to a depth less than or equal to half the depth of the n-doped layer . 12 . Device according to any of the preceding claims wherein the at least partially inclined sidewalls of the n-doped layer extend along the entire depth of the n-doped layer .13 . Method of processing an optoelectronic device , comprising the steps : Providing a growth substrate ;Depositing an n-doped semiconductor layer;Performing a mesa etch to form at least partially inclined sidewalls extending from an upper surface of the n-doped layer facing away from the growth substrate ; Depositing an active layer on the upper surface and along the inclined sidewalls of the n-doped semiconductor layer ;Depositing a p-doped semiconductor layer on an upper surface of the active layer facing away from the n-doped semiconductor layer, and along the inclined sidewalls of the active layer .14 . Method according to claim 13 wherein the step of performing a mesa etch to form at least partially inclined sidewalls extending from an upper surface of the n-doped layer is conducted to a partialdepth of the n-doped layer, in particular, to a depth less than or equal to half the depth of the n-doped layer .15 . Method according to claim 13 wherein the step of performing a mesa etch to form at least partially inclined sidewalls extending from an upper surface of the n-doped layer is conducted to a depth corresponding at least to an upper surface of the growth substrate .16 . Method according to claim 15 wherein the step of performing a mesa etch to form at least partially inclined sidewalls extending from an upper surface of the n-doped layer is configured such that the partially inclined sidewalls are characterized by a first angle of inclination and at least a second angle of inclination, wherein the at least one second angle of inclination is greater than the first angle of inclination and less than or substantially equal to 90 ° .17 . Method according to any of claims 13 to 16 further comprising a step of performing surface treatment on the etched surfaces of the n-doped semiconductor layer prior to the step of depositing an active layer on the upper surface and along the inclined sidewalls of the n-doped semiconductor layer .18 . Method according to any of claims 13 to 17 wherein the step of depositing an active layer on the upper surface and along the inclined sidewalls of the n-doped semiconductor layer is achieved through an epitaxial regrowth process .19 . Method of processing an optoelectronic device , comprising the steps :Providing a growth substrate ;Depositing a patterned mask layer on an upper surface of the growth substrate , wherein the patterned mas k layer comprises at least one opening exposing the upper surface of the growth substrate ;Depositing an n-doped semiconductor layer on the exposed upper surface of the growth substrate through the at least one opening within the patterned mas k layer, such that the n-doped semiconductor layer comprises inclined sidewalls ;Depositing an active layer on an upper surface and along the inclined sidewalls of the n-doped semiconductor layer, such that the n-doped semiconductor layer is encapsulated within the active layer ;Depositing a p-doped semiconductor layer on an upper surface and at least partially along the sidewalls of the active layer .20 . Method according to claim 19 wherein the step of depositing an n- doped layer on the exposed upper surface of the growth substrate additionally involves depositing at least part of the n-doped layer material on at least part of the upper surface of the patterned mas k layer adj acent to the at least one opening in the patterned mas k layer .21 . Method according to any of claims 19 to 20 wherein the patterned mas k layer comprises one of the following shapes when viewed from the top :- hexagonal-shaped openings ;- rectangular- circle .22 . Method according to any of claims 13 to 21 , wherein the step of providing a growth substrate further comprises a step of depositing a growth template , wherein the growth template comprises at least one n-doped semiconductor layer .23 . Method according to any of claims 13 to 22 wherein the step of depositing the active layer is such that a first thickness of the active layer along a direction substantially perpendicular to the upper surface of the growth substrate is larger than a second thickness of the active layer along a direction extending laterally outwards from the inclined sidewalls of the first doped semiconductor layer .24 . Method according to any of claims 13 to 23 wherein the first doped semiconductor layer, the active layer and the second doped semiconductor layer are based on GaN material system .25 . Method according to any of claims 13 to 24 wherein the step of depositing the active layer comprises depositing at least one first sublayer and at least one second sublayer , wherein the at least one first sublayer and at least one second sublayer comprise a ternary or quaternary material system having different compositions of In .

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