Optical assembly on-board apparatus, main gateway, and FTTR system
By setting multiple pins in the optical component on the board and meeting the direct-plug soldering conditions, a stable connection between the optical component and the board and burst reception of high-speed optical signals are achieved, solving the problem of transmission rate limitation in the prior art. It is suitable for the main gateway and sub-gateway of FTTR system.
Patent Information
- Application Number
- PCT/CN2025/080027
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2024-07-22
- Filing Date
- 2025-02-28
- Publication Date
- 2026-01-29
AI Technical Summary
In existing technologies, the optical signal transmission rate in the main gateway is limited, making it difficult to achieve burst reception of high-speed optical signals of 10G and above. Furthermore, the existing connection method between the receiving component and the single board is not conducive to the soldering and fixing of the device.
The optical component with multiple pins in the board device has a center distance between every two pins that meets the conditions for direct insertion soldering. This includes a reset pin. The receiving component is fixedly connected to the board through direct insertion soldering. A reset pin is also provided in the receiving component to enable rapid reset processing, which meets the requirements for burst reception of high-speed optical signals.
It achieves stable fixed connection of optical components on board and burst reception of high-speed optical signals, suitable for transmission rates of 10G and above, and also suitable for burst reception with low-speed requirements.
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Figure CN2025080027_29012026_PF_FP_ABST
Abstract
Description
Optical components on board, main gateway and FTTR system
[0001] This application claims priority to Chinese patent application filed on July 22, 2024, application number 202421743420.4, entitled "Optical Components on Board Device, Main Gateway and FTTR System", the entire contents of which are incorporated herein by reference. Technical Field
[0002] This application relates to the field of optical communication technology, and in particular to an optical component on-board device, a main gateway, and an FTTR system. Background Technology
[0003] With the development of fiber optic communication technology, Fiber to the Room (FTTR) technology emerged to meet users' better internet access needs. In FTTR, a home is equipped with a main gateway and multiple sub-gateways. The main gateway is connected to the incoming fiber optic cable, and each sub-gateway is connected via fiber optic cable, with each sub-gateway located in a separate room. The main gateway includes a first optical component on-board unit (OCU) and a second OCU. The first OCU is connected to the optical line terminal (OLT) via the incoming fiber optic cable and continuously receives signals. The second OCU is connected to each sub-gateway. During uplink communication, each sub-gateway sends optical signals to the second OCU in a time-division multiplexing manner. The second OCU receives the optical signals from each sub-gateway in bursts, converts them into electrical signals, and sends them back to the first OCU. The first OCU modulates the electrical signals back into optical signals and sends them to the OLT.
[0004] Currently, main gateways typically transmit signals with transmission rates below 10G, and the second optical component on-board device uses 5 pins. However, with the development of optical fiber communication technology, it may also transmit optical signals with transmission rates of 10G and above. Therefore, there is a need to provide an on-board device for optical components that can burst receive optical signals of 10G and above. Summary of the Invention
[0005] This application provides an optical component-on-board device, a main gateway, and an FTTR system, which can realize burst reception of high-speed optical signals. The technical solution adopted is as follows:
[0006] In a first aspect, this application provides an on-board optical component device, which includes a receiving component and a single board. The receiving component includes multiple pins, among which a reset pin is included. The center distance between any two pins satisfies the conditions for through-hole soldering. The receiving component is through-hole soldered to the single board through the multiple pins.
[0007] In the solution shown in this application, the center distance between every two pins in the receiving component meets the requirements for through-hole soldering, thus enabling a fixed connection between the receiving component and the board through through-hole soldering. Furthermore, the receiving component includes reset pins among its multiple pins, allowing for rapid reset processing and enabling burst reception of high-speed optical signals.
[0008] In one alternative approach, the through-hole soldering condition is that the minimum center distance between the pins is greater than 1.17 mm, so that the pins do not interfere with each other when multiple pins are through-hole soldered to the single board.
[0009] In one alternative embodiment, the plurality of pins is 6, and the plurality of pins further includes a power supply pin, a photodiode power supply pin, a pair of high-speed signal pins, and a ground pin; the pair of high-speed signal pins are symmetrical about the ground pin.
[0010] In one alternative configuration, the reset pin is adjacent to the positive pin of the pair of high-speed pins and to the power supply pin of the photodiode; the power supply pin is adjacent to the power supply pin of the photodiode and to the negative pin of the pair of high-speed pins. Alternatively, the reset pin is adjacent to the positive pin and to the power supply pin; the photodiode power supply pin is adjacent to the power supply pin and to the negative pin. This provides multiple possible pin distribution configurations.
[0011] In one alternative embodiment, the center-to-center distance between the ground pin and the positive pin is 1.46 mm, and the center-to-center distance between the reset pin and the positive pin is 1.40 mm. This provides possible distances between the pins.
[0012] In one alternative configuration, the reset pin is adjacent to the negative pin of the pair of high-speed pins and also to the power supply pin; the photodiode power supply pin is adjacent to the positive pin of the pair of high-speed pins and also to the power supply pin. Alternatively, the reset pin is adjacent to the negative pin and also to the photodiode power supply pin; the power supply pin is adjacent to the positive pin and also to the photodiode power supply pin. This provides multiple possible pin distribution configurations.
[0013] In one alternative configuration, the reset pin is adjacent to the power supply pin and also to the photodiode power supply pin. The photodiode power supply pin is adjacent to the positive pin of the pair of high-speed pins, and the power supply pin is adjacent to the negative pin of the pair of high-speed signal pins. Alternatively, the reset pin is adjacent to the power supply pin and also to the photodiode power supply pin. The power supply pin is adjacent to the positive pin, and the photodiode power supply pin is adjacent to the negative pin. This provides multiple possible pin distribution configurations.
[0014] In one alternative approach, a first distance is greater than a second distance and a third distance, wherein the first distance is the center-to-center distance between the grounding pin and the positive pin, the second distance is the center-to-center distance between the positive pin and the adjacent pins other than the grounding pin, and the third distance is the center-to-center distance between the negative pin and the adjacent pins other than the grounding pin.
[0015] In the scheme shown in this application, since the grounding pin dissipates heat relatively quickly, the center distance between the grounding pin and other pins should be set to be larger to prevent solder bridging.
[0016] In one alternative embodiment, the receiving component is a receiving component for receiving optical signals with a transmission rate of 10G or higher.
[0017] Secondly, this application provides a main gateway that includes the optical components on the board device described in the first aspect above, or any alternative method of the first aspect.
[0018] Thirdly, this application provides an FTTR system, which includes a main gateway and a sub-gateway. The main gateway includes the optical component on board device described in the first aspect above, or any of the optional methods of the first aspect. The main gateway is connected to the sub-gateway through the optical component on board device. The main gateway is used to connect to the drop fiber.
[0019] In the scheme shown in this application, in the optical component board device connecting the main gateway and the sub-gateway, the receiving component includes a reset pin among its multiple pins. The center distance between every two pins meets the conditions for direct insertion soldering. The receiving component can be directly soldered to the board through multiple pins. In this way, not only can the fixed connection between the receiving component and the board be achieved through direct insertion soldering, but the presence of the reset pin also enables rapid reset processing, thereby allowing the main gateway to receive high-speed optical signals in bursts. Attached Figure Description
[0020] Figure 1 is a schematic diagram of an optical communication system provided in an exemplary embodiment of this application;
[0021] Figure 2 is a schematic diagram of the structure of an optical component on a board device provided in an exemplary embodiment of this application;
[0022] Figure 3 is a schematic diagram of the structure of a receiving component provided in an exemplary embodiment of this application;
[0023] Figure 4 is a schematic diagram of the pin distribution provided in an exemplary embodiment of this application;
[0024] Figure 5 is a schematic diagram of the pin distribution provided in another exemplary embodiment of this application;
[0025] Figure 6 is a schematic diagram of the pin distribution provided in another exemplary embodiment of this application;
[0026] Figure 7 is a schematic diagram of the pin distribution provided in another exemplary embodiment of this application;
[0027] Figure 8 is a schematic diagram of the pin distribution provided in another exemplary embodiment of this application;
[0028] Figure 9 is a schematic diagram of the pin distribution provided in another exemplary embodiment of this application;
[0029] Figure 10 is a schematic diagram of the pin distribution provided in another exemplary embodiment of this application;
[0030] Figure 11 is a schematic diagram of the structure of an optical transceiver component provided in an exemplary embodiment of this application;
[0031] Figure 12 is a network diagram of FTTR provided in an exemplary embodiment of this application.
[0032] The diagram illustrates: 1. Receiving component; 2. Board; 3. Transmitting component; 4. Waveplate; 11. Base; 12. Transimpedance amplifier; 13. Detector. Detailed Implementation
[0033] To make the objectives, technical solutions, and advantages of this application clearer, the embodiments of this application will be described in further detail below with reference to the accompanying drawings.
[0034] In the field of optical communication, the optical network terminal (ONT) is an important terminal device on the customer side. FTTR is a new form of ONT application scenario. In this new form, optical fibers are deployed and covered in each user's room, meeting the user's better internet access needs. Specifically, as shown in Figure 1, in the FTTR scenario of a passive optical network (PON), the ONT side includes a main gateway and at least one sub-gateway. The main gateway is connected to the drop fiber, which is connected to the optical distribution network (ODN). The ODN includes at least one optical splitter and is connected to the optical line terminal (OLT). The main gateway is connected to each sub-gateway via optical fiber. The sub-gateways are deployed in different rooms, and different sub-gateways are deployed in different rooms. The terminal devices in the room determine the gateway with the best signal quality through quality detection and connect to this gateway wirelessly, or the user connects the terminal device to the gateway using a network cable. This gateway can be either a sub-gateway or the main gateway.
[0035] During downlink communication, the OLT broadcasts downlink optical signals to the ONT side. The main gateway receives the downlink optical signal, converts it into an electrical signal, determines the sub-gateway to which the electrical signal belongs, converts the electrical signal back into an optical signal, and sends it to the sub-gateway. The sub-gateway then converts the received optical signal back into an electrical signal and sends it to its corresponding terminal device.
[0036] During uplink communication, the terminal device sends uplink data to the connected gateway. If the gateway is a sub-gateway, it modulates the uplink data onto an optical signal and sends the optical signal to the main gateway. The main gateway converts the optical signal into an electrical signal, then back into an optical signal, and sends the optical signal to the OLT via the drop fiber. If the gateway is the main gateway, it modulates the uplink data onto an optical signal and sends the optical signal to the OLT via the drop fiber.
[0037] Thus, during downlink communication, if the terminal device to which the downlink data belongs is connected to a sub-gateway, an optoelectronic conversion and then an electro-optical conversion are performed at the main gateway. During uplink communication, if the terminal device to which the uplink data belongs is connected to a sub-gateway, an optoelectronic conversion and then an electro-optical conversion are performed at the main gateway. The main gateway includes two on-board optical components: a first on-board optical component and a second on-board optical component. The first on-board optical component is connected to the drop fiber, and the second on-board optical component is connected to each sub-gateway. For the first on-board optical component, since it is continuously connected to the drop fiber, it receives data continuously. However, for the second on-board optical component, when it is connected to multiple sub-gateways, these sub-gateways use time-division multiplexing to transmit uplink data. Therefore, the second on-board optical component receives uplink data transmitted by each sub-gateway in bursts. Thus, the second on-board optical component needs to have burst reception capability. For high-speed burst reception, a reset pin needs to be set in the second on-board optical component to achieve high-speed burst reception. For example, for burst reception at speeds of 10G and above, a reset pin needs to be set in the second optical component on the board. The reset pin is used to help the trans-impedance amplifier (TIA) of burst reception quickly adjust its gain so that it can receive signals.
[0038] In current optical modules with reset pins, the receiving component and the single board are connected by a flexible circuit board. The flexible circuit board connection is not conducive to the soldering of components, and there is no fixed connection between the receiving component and the single board.
[0039] Based on this, embodiments of this application provide an on-board optical component device, in which the receiving component and the single board are directly soldered by pin insertion, which not only facilitates device soldering, but also enables the receiving component to be fixedly connected to the single board.
[0040] The on-board optical component device provided in this application embodiment can be used not only for burst reception with high-speed requirements, but also for burst reception with low-speed requirements.
[0041] Figure 2 provides a schematic diagram of the optical component on-board assembly. Referring to Figure 2, the optical component on-board assembly includes a receiving component 1 and a single board 2. The receiving component 1 includes multiple pins, including a reset pin. The center-to-center distance between any two pins satisfies the direct-insertion soldering condition. The direct-insertion soldering condition is the condition that the center-to-center distance between pins must meet for direct-insertion soldering. For example, if the cross-section of a pin is circular, the center-to-center distance between pins is the distance between the centers of the circular cross-sections of the pins. The single board 2 has insertion holes that match the positions of the multiple pins, allowing the pins to be inserted. The receiving component 1 is directly soldered to the single board 2 through these multiple pins, achieving not only an electrical connection between the receiving component 1 and the single board 2, but also a fixed connection between them.
[0042] In addition, board 2 also includes a laser driver for driving the laser.
[0043] In one alternative approach, the through-hole soldering condition is that the minimum center-to-center distance between the pins is greater than 1.17 mm, meaning the center-to-center distance between any two pins is greater than 1.17 mm. For example, the minimum center-to-center distance between multiple pins is 1.40 mm.
[0044] In one alternative configuration, the number of pins is six, including a reset pin, a power supply pin, a voltage photodiode (VPD) power supply pin, a pair of high-speed signal pins, and a ground pin. The power supply pin is also called the voltage current condenser (VCC) pin, the pair of high-speed signal pins includes a positive and a negative pin, and the ground pin is also called ground (GND) pin. The power supply pin is used to supply power, the photodiode power supply pin is used to power the photodiode (PD), and the pair of high-speed signal pins are used to receive a pair of high-speed differential signals.
[0045] When multiple pins are arranged, a pair of high-speed signal pins are symmetrical about the ground pin.
[0046] In an alternative embodiment, Figure 3 provides a schematic diagram of the receiving component 1. Referring to Figure 3, the receiving component 1 includes a base 11, a transimpedance amplifier 12, and a detector 13. Multiple pins are disposed on the base 11, and a pair of high-speed signal pins are connected to the transimpedance amplifier 12. This pair of high-speed signal pins includes a TIA+ pin and a TIA- pin, where TIA+ is the positive pin and TIA- is the negative pin. The transimpedance amplifier 12 is connected to the detector 13, which is a photodiode-type detector. When the receiving component 1 receives an optical signal, the detector 13 converts the optical signal into an electrical signal and sends it to the transimpedance amplifier 12. The transimpedance amplifier 12 amplifies the electrical signal and sends it to the board 2 via the pair of high-speed signal pins.
[0047] Alternatively, the base 11 can be made of an alloy or the like.
[0048] In an alternative embodiment, Figures 4 through 9 provide a schematic diagram of the distribution of multiple pins on the base 11. In Figures 4 through 9, the base 11 is cylindrical. Referring to Figure 4, the reset pin is adjacent to the TIA+ pin, and the reset pin is also adjacent to the photodiode power supply pin. The power supply pin is adjacent to the photodiode power supply pin, and the power supply pin is also adjacent to the TIA- pin. The TIA+ pin and the TIA- pin are located on opposite sides of the ground pin and are symmetrical about the ground pin.
[0049] Referring to Figure 5, the reset pin is adjacent to the TIA+ pin, the reset pin is also adjacent to the power supply pin, the power supply pin is adjacent to the photodiode power supply pin, the photodiode power supply pin is also adjacent to the TIA- pin, and the TIA+ pin and TIA- pin are located on both sides of the ground pin and are symmetrical about the ground pin.
[0050] Referring to Figure 6, the reset pin is adjacent to the power supply pin, and the reset pin is adjacent to the TIA- pin. The photodiode power supply pin is adjacent to the power supply pin, and the photodiode power supply pin is adjacent to the TIA+ pin. The TIA+ pin and the TIA- pin are located on opposite sides of the ground pin and are symmetrical about the ground pin.
[0051] Referring to Figure 7, the reset pin is adjacent to the power supply pin of the photodiode, and the reset pin is adjacent to the TIA- pin. The power supply pin of the photodiode is adjacent to the power supply pin, and the power supply pin is adjacent to the TIA+ pin. The TIA+ pin and the TIA- pin are located on both sides of the ground pin and are symmetrical about the ground pin.
[0052] Referring to Figure 8, the reset pin is adjacent to the power supply pin and the photodiode power supply pin. The photodiode power supply pin is adjacent to the TIA+ pin, and the power supply pin is adjacent to the TIA- pin. The TIA+ pin and the TIA- pin are located on both sides of the ground pin and are symmetrical about the ground pin.
[0053] Referring to Figure 9, the reset pin is adjacent to the power supply pin, and the reset pin is adjacent to the power supply pin of the photodiode. The power supply pin is adjacent to the TIA+ pin, and the power supply pin of the photodiode is adjacent to the TIA- pin. The TIA+ pin and the TIA- pin are located on both sides of the ground pin and are symmetrical about the ground pin.
[0054] In the embodiments of this application, among the several distribution methods shown in Figures 4 to 9, as long as the center distance between the pins is greater than 1.17mm, the specific value can be set according to actual needs, and this application does not limit it.
[0055] Optionally, in the arrangement shown in Figure 4, this embodiment of the application also provides possible center distances between the pins. Referring to Figure 10, the center distance between the ground pin and the TIA+ pin is 1.46mm, the center distance between the ground pin and the TIA- pin is 1.46mm, the center distance between the TIA+ pin and the reset pin is 1.40mm, and the center distance between the photodiode power supply pin and the reset pin is 1.40mm.
[0056] In one alternative approach, to prevent solder bridging during soldering, a first distance is set greater than a second distance and a third distance. The first distance is the center-to-center distance between the ground pin and the TIA+ pin; the second distance is the center-to-center distance between the TIA+ pin and all adjacent pins except the ground pin; and the third distance is the center-to-center distance between the TIA- pin and all adjacent pins except the ground pin. This is because the ground pin dissipates heat relatively quickly. If the center-to-center distance between the ground pin and adjacent pins is too close, the solder on the ground pin is more likely to melt during soldering, causing solder bridging.
[0057] In one alternative approach, the optical sub-assembly on board (BOB) is a transceiver integrated device, specifically a bidirectional optical sub-assembly on board (BOB) device. In this BOB device, the optical transceiver assembly further includes a transmitting component 3 and a waveplate 4. The transmitting component 3 can be connected to the single board 2 via a flexible printed circuit board (FPCB), or it can be connected to the single board 2 via through-hole soldering. Referring to Figure 11, the receiving component 1 is located on the reflected optical path of the waveplate 4, and the wavelength of the optical signal received by the receiving component 1 is wavelength a. The transmitting component 3 is located on the transmitted optical path of the waveplate 4, and the wavelength of the optical signal transmitted by the transmitting component 3 is wavelength b. Wavelength a and wavelength b are not the same. Assuming the optical signal transmitted by the BOB device is called the first optical signal, and the received optical signal is called the second optical signal, when the BOB device transmits the first optical signal, the first optical signal is transmitted through the waveplate 4 and coupled into the optical fiber connected to the BOB device for output. When the optical component receives the second optical signal, the second optical signal is reflected by the waveplate 4 and then incident on the receiving component 1, and the receiving component 1 receives the second optical signal.
[0058] In addition, the receiving component 1 may also include a structure such as a tube cap, which has an optical window for optical signal input.
[0059] In this embodiment of the application, a gateway is also provided, which includes the optical component on-board device described above. This gateway can be the main gateway in an FTTR, or other gateways used for burst reception.
[0060] This application embodiment also provides an FTTR system, which includes a main gateway and sub-gateways (see Figure 12). The main gateway is connected to the drop fiber, which in turn is connected to the optical module in the OLT. The main gateway includes a first optical component on board (OCB) and the aforementioned OCB (referred to as a second OCB). The main gateway is connected to each sub-gateway through the second OCB. When the second OCB is connected to multiple sub-gateways, it receives optical signals from multiple sub-gateways in a time-division multiplexing manner. For example, the second OCB is connected to two sub-gateways, including a first sub-gateway and a second sub-gateway. The second OCB receives the optical signal sent by the first sub-gateway and then receives the optical signal sent by the second sub-gateway. At this time, the reset pin helps the TIA in the second OCB to quickly adjust the gain to receive the optical signal sent by the second sub-gateway.
[0061] The first optical component on-board device can be the optical component on-board device provided in the embodiments of this application, or it can be a 5-pin optical component on-board device. The embodiments of this application do not limit it. The 5-pin optical component on-board device includes a power supply pin, a photodiode power supply pin, a pair of high-speed signal pins and a ground pin, but does not include a reset pin.
[0062] Each sub-gateway includes an on-board optical component. Since each sub-gateway receives continuously, the on-board optical component can be the on-board optical component provided in the embodiments of this application, or it can be a 5-pin on-board optical component. The embodiments of this application do not impose any limitations.
[0063] The pins mentioned in the embodiments of this application can be referred to as pins or pins. Furthermore, the main gateway and sub-gateway mentioned in the embodiments of this application can also be referred to as optical modems.
[0064] In the embodiments of this application, ONT can also be considered as an optical network unit (ONU).
[0065] All of the above-mentioned optional technical solutions can be combined in any way to form the optional embodiments of this application, and will not be described in detail here.
[0066] In this application, the terms "first" and "second," etc., are used to distinguish identical or similar items that have substantially the same function and purpose. It should be understood that there is no logical or temporal dependency between "first" and "second," nor does it limit the quantity or order of execution. It should also be understood that although the following description uses the terms "first" and "second," etc., to describe various elements, these elements should not be limited by the terms. These terms are merely used to distinguish one element from another. For example, without departing from the scope of various examples, a first distance can be referred to as a second distance, and similarly, a second distance can be referred to as a first distance. Both first and second distances can be distances, and in some cases, they can be separate and distinct distances.
[0067] In this application, the term "at least one" means one or more, and the term "multiple" means two or more.
[0068] The above description is merely an exemplary embodiment of this application, but the scope of protection of this application is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in this application, and such modifications or substitutions should all be covered within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.
Claims
1. A light assembly-on-board device, characterized by, The optical assembly on board device comprises a receiving assembly (1) and a single board (2); The receiving assembly (1) comprises a plurality of pins, the plurality of pins comprises a reset pin, and the center distance of each two pins in the plurality of pins satisfies a straight insertion welding condition; The receiving assembly (1) is straight insertion welded with the single board (2) through the plurality of pins.
2. The light assembly in plate device according to claim 1, characterized in that, The straight insertion welding condition is that the minimum center distance between pins is greater than 1.17 mm.
3. The light assembly in board device of claim 1, wherein, The number of the plurality of pins is 6, and the plurality of pins further comprises a power supply pin, a photodiode power supply pin, a pair of high-speed signal pins and a ground pin; The pair of high-speed signal pins are symmetrical about the ground pin.
4. The light assembly in plate device according to claim 3, characterized in that The reset pin is adjacent to the positive pin in the pair of high-speed pins and adjacent to the photodiode power supply pin, the power supply pin is adjacent to the photodiode power supply pin and adjacent to the negative pin in the pair of high-speed pins; or, the reset pin is adjacent to the positive pin and adjacent to the power supply pin, the photodiode power supply pin is adjacent to the power supply pin and adjacent to the negative pin.
5. The light assembly in board device of claim 4, wherein, The center distance between the ground pin and the positive pin is 1.46 mm, and the center distance between the reset pin and the positive pin is 1.40 mm.
6. The light assembly in board device of claim 3, wherein, The reset pin is adjacent to the negative pin in the pair of high-speed pins and adjacent to the power supply pin, and the photodiode power supply pin is adjacent to the positive pin in the pair of high-speed pins and adjacent to the power supply pin; or, the reset pin is adjacent to the negative pin and adjacent to the photodiode power supply pin, the power supply pin is adjacent to the positive pin and adjacent to the photodiode power supply pin.
7. The light assembly in board device of claim 3, wherein, The reset pin is adjacent to the power supply pin and adjacent to the photodiode power supply pin, the photodiode power supply pin is adjacent to the positive pin in the pair of high-speed pins, and the power supply pin is adjacent to the negative pin in the pair of high-speed signal pins; or, the reset pin is adjacent to the power supply pin and adjacent to the photodiode power supply pin, the power supply pin is adjacent to the positive pin, and the photodiode power supply pin is adjacent to the negative pin.
8. A light assembly according to any one of claims 4 to 7 in a panel arrangement, characterised in that, The first distance is greater than the second distance and greater than the third distance, the first distance is the center distance between the ground pin and the positive pin, the second distance is the center distance between the positive pin and the pin adjacent to the positive pin except the ground pin, and the third distance is the center distance between the negative pin and the pin adjacent to the negative pin except the ground pin.
9. A light assembly according to any one of claims 1 to 8 in a panel arrangement, characterized by The receiving assembly (1) is a receiving assembly for receiving optical signals with a transmission rate of 10G and above.
10. A master gateway, characterized by The main gateway comprises the optical assembly on board device according to any one of claims 1 to 9.
11. A fiber-to-the-room (FTTR) system, comprising: The main gateway comprises the optical assembly on board device according to any one of claims 1 to 9. The main gateway is used for connecting a home optical fiber.
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