Hot backup lossless control method, computing processing device, and computer program product

Abstract

The present application relates to the technical field of power supplies, and provides a hot backup lossless control method and a discharge circuit. On the basis of a power supply state of a main power supply unit, a working state of a boost module and an output state of a discharge circuit of a first backup power supply unit are controlled; or on the basis of respective power supply states of the main power supply unit and a second backup power supply unit, an output state of a discharge circuit of the second backup power supply unit is controlled, and a voltage output by the discharge circuit of the second backup power supply unit is controlled to be lower than a voltage provided by the main power supply unit during normal power supply by the main power supply unit. In the present application, a high voltage from the boost module is used to supply power to a buck module, eliminating the need for the buck module to consume power generated by a BBU, thereby avoiding sacrifice of the service life of the BBU. The power generated by the BBU would not be supplied to a post-stage circuit during normal power supply by the main power supply unit, thereby avoiding sacrifice of the service life of the BBU. The problem of voltage dip during power supply switching is solved, thereby improving the stability and reliability of power supply by the BBU, and also reducing the voltage drop loss in a BBU link.

Description

Hot backup lossless control method, computing processing device and computer program product

[0001] Cross-reference to related applications

[0002] The present application claims priority to the Chinese patent application No. 202411026438.7, filed on July 29, 2024, and entitled "Hot backup lossless control method, computing processing device and computer program product", the content of which is incorporated herein by reference in its entirety. TECHNICAL FIELD

[0003] The present application relates to the technical field of power supply, in particular to a hot backup lossless control method, a computing processing device and a computer program product. BACKGROUND

[0004] In the unified storage system technology, data backup technology is a key technology. For example, BBU (Backup Battery Unit, backup battery unit) powered data backup, NVDIMM (non-volatile dual in-line memory module, non-volatile dual in-line memory module) data backup, CBU (central control unit, central control unit) powered data backup, etc. These are some commonly used data backup schemes. Considering the cost performance, data backup power density and other factors, BBU powered backup is the most widely used data backup technology. The BBU control scheme includes discharge control, charge control, BBU state monitoring and other schemes.

[0005] The currently commonly used BBU powered backup control scheme includes a cold backup power supply control scheme and a lossy hot backup power supply control scheme. Among them, the cold backup power supply control scheme cannot achieve seamless switching when the PSU (Power Supply Unit, power supply unit) power supply link is short-circuited, and other scenarios require the PSU bus capacitor to have enough power supply capacity when the input power supply is abnormal. The power density has requirements for the power supply bottleneck, affecting the stability and reliability of the storage system. The lossy hot backup power supply control scheme sacrifices the service life of the BBU, indirectly increasing the after-sales service cost. SUMMARY

[0006] In view of the above problems, the present application provides a hot backup lossless control method, a computing processing device and a computer program product.

[0007] The present application provides a hot backup lossless control method, which comprises:

[0008] According to the power supply state of the main power supply unit, the working state of the boost module and the output state of the discharging circuit of the first backup power supply unit are controlled, and the power consumed by the step-down module during normal power supply of the main power supply unit is provided by the boost module; or,

[0009] According to the power supply state of the main power supply unit and the second backup power supply unit, the output state of the discharging circuit of the second backup power supply unit is controlled, and the voltage output by the discharging circuit of the second backup power supply unit is lower than the voltage provided by the main power supply unit during normal power supply of the main power supply unit.

[0010] In some embodiments of the present application, according to the power supply state of the main power supply unit, the working state of the boost module and the output state of the discharging circuit of the first backup power supply unit are controlled, including:

[0011] If the power supply state of the main power supply unit is normal power supply, the boost module is controlled to work normally, and the boost module outputs voltage to the step-down module;

[0012] If the power supply state of the main power supply unit is abnormal power supply, the boost module is controlled to stop working, and the discharging circuit of the first backup power supply unit is controlled to output voltage to the step-down module.

[0013] In some embodiments of the present application, before the power consumed by the step-down module during normal power supply of the main power supply unit is provided by the boost module, it further includes:

[0014] According to the voltage provided by the first backup power supply unit, the output voltage of the boost module is determined;

[0015] Wherein, the output voltage of the boost module is higher than the voltage provided by the first backup power supply unit.

[0016] In some embodiments of the present application, the power consumed by the step-down module during normal power supply of the main power supply unit is provided by the boost module, including:

[0017] During normal power supply of the main power supply unit, the boost module is controlled to work normally, then the output voltage of the boost module is higher than the voltage provided by the first backup power supply unit, and the output voltage of the boost module is transmitted to the step-down module, so that the power consumed by the step-down module is provided by the boost module.

[0018] In some embodiments of the present application, during the power supply link detection, the boost module is controlled to stop working.

[0019] In some embodiments of the present application, the voltage provided by the first backup power supply unit is 16.4 volts;

[0020] The output voltage of the boost module is 18 volts.

[0021] In some embodiments of the present application, the discharging circuit of the second backup power supply unit is controlled to output a voltage according to the power supply state of the main power supply unit and the power supply state of the second backup power supply unit, including:

[0022] If the power supply state of the main power supply unit is normal power supply and the power supply state of the second backup power supply unit is that the provided voltage is higher than the first threshold voltage, the discharging circuit of the second backup power supply unit is controlled to not output a voltage to the subsequent circuit;

[0023] If the power supply state of the main power supply unit is abnormal power supply or the power supply state of the second backup power supply unit is that the provided voltage is lower than the second threshold voltage, the discharging circuit of the second backup power supply unit is controlled to output a voltage to the subsequent circuit.

[0024] In some embodiments of the present application, the voltage output by the discharging circuit of the second backup power supply unit is controlled to be lower than the voltage provided by the main power supply unit during normal power supply of the main power supply unit, including:

[0025] During normal power supply of the main power supply unit, the switch tube in the discharging circuit of the second backup power supply unit is controlled to be turned off, and the voltage output by the discharging circuit of the second backup power supply unit is the voltage obtained after the voltage is stepped down by the body diode of the switch tube, which is lower than the voltage provided by the main power supply unit, so that the output voltage of the discharging circuit of the second backup power supply unit cannot be transmitted to the subsequent circuit.

[0026] In some embodiments of the present application, the main power supply unit includes a first main power supply unit and a second main power supply unit, and the power supply state of the main power supply unit being normal power supply includes:

[0027] Both the first main power supply unit and the second main power supply unit are normally powered; or,

[0028] The first main power supply unit is normally powered, and the second main power supply unit is abnormally powered; or,

[0029] The first main power supply unit is abnormally powered, and the second main power supply unit is normally powered.

[0030] In some embodiments of the present application, the main power supply unit includes a first main power supply unit and a second main power supply unit, and the power supply state of the main power supply unit being abnormal power supply includes:

[0031] Both the first main power supply unit and the second main power supply unit are abnormally powered.

[0032] In some embodiments of the present application, the first threshold voltage is 11.5 volts;

[0033] The second threshold voltage is 11.3 volts.

[0034] In some embodiments of the present application, the discharging circuit of the first backup power supply unit comprises: a boost module, and a first line or logic controller and a second line or logic controller;

[0035] One end of the boost module receives the output voltage of the main power supply unit, and the other end is connected with the input end of the first line or logic controller;

[0036] The output end of the first line or logic controller is connected with the step-down module;

[0037] The input end of the second line or logic controller receives the output voltage of the first backup power supply unit, and the output end is connected with the step-down module.

[0038] In some embodiments of the present application, the discharging circuit of the second backup power supply unit comprises: a plurality of switching tubes, a driving circuit;

[0039] The first end of the first switching tube in the plurality of switching tubes receives the output voltage of the second backup power supply unit, the second end is connected with the output end of the driving circuit, and the third end is connected with the first end of the second switching tube in the plurality of switching tubes;

[0040] The second end of the second switching tube receives the control signal sent by the line or logic controller, and the third end is connected with the subsequent circuit;

[0041] The anode of the body diode of the first switching tube receives the output voltage of the second backup power supply unit, and the cathode is connected with the first end of the second switching tube;

[0042] The anode of the body diode of the second switching tube is connected with the third end of the first switching tube, and the cathode is connected with the subsequent circuit.

[0043] In some embodiments of the present application, the first switching tube comprises: at least one NMOS tube;

[0044] The source of the at least one NMOS tube receives the output voltage of the second backup power supply unit, the gate is connected with the output end of the driving circuit, and the drain is connected with the first end of the second switching tube;

[0045] The anode of the body diode of the at least one NMOS tube receives the output voltage of the second backup power supply unit, and the cathode is connected with the first end of the second switching tube;

[0046] When there are a plurality of NMOS tubes, the plurality of NMOS tubes are connected in parallel, the sources of all the NMOS tubes are short-circuited, and the drains are short-circuited.

[0047] In some embodiments of the present application, the second switching tube comprises: at least one NMOS tube;

[0048] The source of the at least one NMOS tube is connected with the third end of the first switch tube, the gate receives a control signal sent by a line or a logic controller, and the drain is connected with a subsequent circuit;

[0049] The anode of the body diode of the at least one NMOS tube is connected with the third end of the first switch tube, and the cathode is connected with the subsequent circuit;

[0050] When there are multiple NMOS tubes, the multiple NMOS tubes are connected in parallel, the sources of all the NMOS tubes are short-circuited, and the drains are short-circuited.

[0051] In some embodiments of the present application, the discharge circuit further comprises an enhancement circuit;

[0052] The enhancement circuit is arranged between the control signal end of the line or the logic controller and the gate of the NMOS tube included in the second switch tube, and is used for enhancing the control signal sent by the control signal end of the line or the logic controller to the gate, so as to control the NMOS tube to be quickly opened or closed;

[0053] The control signal end of the line or the logic controller is used for sending the control signal.

[0054] In some embodiments of the present application, the enhancement circuit comprises a diode, a triode, a first resistor, a second resistor and a first capacitor;

[0055] The anode of the diode is connected with the first end of the second resistor and receives the control signal;

[0056] The cathode of the diode is connected with the first end of the first resistor and the first end of the first capacitor respectively;

[0057] The second end of the second resistor is connected with the base of the triode;

[0058] The second end of the first resistor is connected with the emitter of the triode;

[0059] The second end of the first capacitor is connected with the collector of the triode and grounded.

[0060] In some embodiments of the present application, the driving circuit comprises a first driving switch tube and a second driving switch tube;

[0061] The first end of the first driving switch tube is grounded, the second end is grounded through a resistor and receives a control signal from a controller of a second backup power supply unit, and the third end is connected with the second end of the second driving switch tube through a first target resistor;

[0062] The third end of the first driving switch tube also receives a high voltage through the first target resistor and a resistor connected in series with the first target resistor;

[0063] The third terminal of the second driving switch tube is connected with the third terminal of the first switch tube through the second target resistance and another resistance connected with the second target resistance in series;

[0064] The third terminal of the second driving switch tube is connected with the second terminal of the first switch tube through the second target resistance and another resistance connected with the second target resistance in series.

[0065] The embodiment of the present application provides a computing processing device, and a computer program / instruction is stored in the computing processing device, and the computer program / instruction is characterized in that when the computer program / instruction is executed by a processor, the hot backup lossless control method of any one of the above is realized.

[0066] The embodiment of the present application provides a computer program product, and the computer program product comprises a computer program / instruction, and the computer program / instruction is characterized in that when the computer program / instruction is executed by a processor, the hot backup lossless control method of any one of the above is realized.

[0067] The hot backup lossless control method provided by the present application controls the working state of the boost module and the output state of the discharging circuit of the first backup power supply unit according to the power supply state of the main power supply unit, and controls the electric energy consumed by the step-down module during normal power supply of the main power supply unit to be provided by the boost module. Alternatively, the output state of the discharging circuit of the second backup power supply unit is controlled, and the voltage output by the discharging circuit of the second backup power supply unit is controlled to be lower than the voltage provided by the main power supply unit during normal power supply of the main power supply unit.

[0068] The hot backup lossless control method provided by the present application avoids the problems existing in the cold backup power supply control scheme by adopting the hot backup power supply control scheme for the traditional BBU power supply backup control scheme. For the hot backup power supply control scheme adopting the step-down module architecture, the boost module is creatively proposed, the boost module is used to supply power to the step-down module with a higher voltage, and the consumption of the step-down module during normal power supply of the main power supply unit is provided, and the electric energy generated by the BBU is not used to provide the consumption of the step-down module, so that the service life of the BBU is not sacrificed.

[0069] For the hot backup power supply control scheme not adopting the step-down module architecture, the voltage output by the discharging circuit of the backup power supply unit (namely, the BBU) is creatively controlled to be lower than the voltage provided by the main power supply unit during normal power supply of the main power supply unit, so that the problem that the BBU provides the electric energy for the subsequent circuit instead of the main power supply unit during normal power supply of the main power supply unit due to the voltage provided by the BBU being higher than the voltage provided by the main power supply unit is avoided. Therefore, the electric energy generated by the BBU is not provided to the subsequent circuit during normal power supply of the main power supply unit, so that the service life of the BBU is not sacrificed. The hot backup lossless control method and the discharging circuit provided by the present application have high practicability. BRIEF DESCRIPTION OF DRAWINGS

[0070] Various other advantages and benefits will become apparent to those of ordinary skill in the art upon reading the following detailed description of the preferred embodiments with reference made to the accompanying drawings. The drawings are for purposes of illustration only and are not intended to be limiting in

[0071] Fig. 1 is a topology diagram of a hot backup power supply of a 4SXP BBU architecture in embodiments of the present application;

[0072] Fig. 2 is a schematic diagram of a control algorithm of the 4SXP BBU architecture in embodiments of the present application;

[0073] Fig. 3 is a topology diagram of a hot backup power supply of a 3SXP BBU architecture in embodiments of the present application;

[0074] Fig. 4 is a schematic diagram of a control algorithm of the 3SXP BBU architecture in embodiments of the present application;

[0075] Fig. 5 is a circuit diagram of a discharge circuit applied to the 4SXP BBU architecture in embodiments of the present application;

[0076] Fig. 6 is a circuit diagram of a discharge circuit applied to the 3SXP BBU architecture in embodiments of the present application;

[0077] Fig. 7 is a block diagram of a computing processing device in embodiments of the present application;

[0078] Fig. 8 is a storage unit for holding or carrying a computer program product in embodiments of the present application. DETAILED DESCRIPTION

[0079] In order to make the above objectives, features and advantages of the present application more apparent, further specific embodiments of the present application will be described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application, and only represent a part of the embodiments of the present application, but not all the embodiments of the present application, and are not used to limit the present application.

[0080] The inventor found that the currently commonly used BBU power backup control schemes include a cold backup power supply control scheme and a lossy hot backup power supply control scheme. Among them, the cold backup power supply control scheme cannot achieve seamless switching when the PSU power supply link is short-circuited, and other scenarios require the PSU bus capacitor to have sufficient power supply capacity when the input power supply is abnormal, which has requirements for power density, and there is a bottleneck in the power supply, which affects the stability and reliability of the storage system. Therefore, it is gradually eliminated.

[0081] For the lossy hot backup power supply control scheme, the current power supply architecture usually selects 4SXP or 3SXP BBU for data backup. The so-called 4SXP refers to a 4-string multi-parallel architecture, and the 3SXP refers to a 3-string multi-parallel architecture.

[0082] The inventor further studies and finds that for the 4SXP BBU architecture, since the voltage generated by the BBU is higher than the voltage required by the subsequent circuit, for example, the voltage required by the subsequent circuit is 12V (volts), and the voltage generated by the BBU is generally 16.4V, a voltage reduction module needs to be arranged between the BBU output voltage end and the subsequent circuit power supply input end. However, during normal operation of the PSU (i.e., the main power supply unit), the voltage generated by the BBU does not need to be provided to the subsequent circuit. However, as a hot backup, the voltage reduction module needs to be in working condition to ensure that when the PSU abnormally works, the electrical energy generated by the BBU can be immediately provided to the subsequent circuit, so the voltage reduction module consumes the electrical energy generated by the BBU during normal operation of the PSU. Over time, it undoubtedly causes damage to the service life of the BBU, indirectly increasing the after-sales cost.

[0083] The inventor further studies and finds that for the 3SXP BBU architecture, due to the influence of circuit characteristics and various factors, the voltage generated by the BBU during normal operation of the PSU may be higher than the voltage provided by the PSU, for example, the voltage required by the subsequent circuit is 12V (volts), and the voltage provided by the PSU is 12V. During this period, the voltage generated by the BBU may be about 12V, so when the voltage generated by the BBU is 12V or more, the electrical energy generated by the BBU is provided to the subsequent circuit, and when the voltage is 12V or less, the electrical energy generated by the PSU is provided to the subsequent circuit. Therefore, the electrical energy generated by the BBU may be consumed during normal operation of the PSU. Over time, it undoubtedly causes damage to the service life of the BBU, indirectly increasing the after-sales cost.

[0084] In addition, for the 3SXP BBU architecture, there may also be a problem of power supply switching off, which is caused by factors such as the performance of the switching tube, resulting in poor stability and reliability of the BBU power supply, and increasing the voltage drop loss of the BBU link.

[0085] In view of the above problems, the inventor creatively proposes a hot backup lossless control method after a large amount of research and testing. The technical solutions proposed in the present application are explained and described in detail as follows.

[0086] The hot backup lossless control method proposed in the present application includes:

[0087] According to the power supply state of the main power supply unit, the working state of the boost module and the output state of the discharging circuit of the first backup power supply unit are controlled, and the power consumed by the step-down module during normal power supply of the main power supply unit is provided by the boost module; or, according to the power supply state of the main power supply unit and the second backup power supply unit respectively, the output state of the discharging circuit of the second backup power supply unit is controlled, and the voltage output by the discharging circuit of the second backup power supply unit is lower than the voltage provided by the main power supply unit during normal power supply of the main power supply unit.

[0088] Based on the current 4SXP BBU architecture and 3SXP BBU architecture, the hot backup lossless control method can be implemented by using a processor, for example: in the 4SXP BBU architecture and the 3SXP BBU architecture, there is generally an MCU (Micro Control Unit), which can be used to execute the hot backup lossless control method.

[0089] For the 4SXP BBU architecture, the main power supply unit adopts 1+1 redundant power supply. Referring to the 4SXP BBU architecture hot backup power supply topology diagram shown in FIG. 1, it includes: main power supply units 1 and 2, and a storage array representing a later stage circuit. The two main power supply units 1 and 2 are redundant to each other, and each main power supply unit can provide a voltage required by the storage array, for example, 12V.

[0090] The main power supply unit branch is designed as a circuit composed of an EFUSE (one-time programmable memory) + ORING (Logical Or line) circuit. The one-time programmable memory is used for hot plug protection to suppress the inrush current impact when the device is powered on. The ORING circuit cuts off the PSU power supply branch when the main power supply unit power supply link is abnormal, ensuring that the main power supply unit power supply link abnormality does not affect the data backup of the storage system. In addition to the 4SXP BBU unit (i.e., the unit that generates power), the step-down module, and the ORING circuit, the 4SXP BBU power supply branch also increases a boost module.

[0091] The MCU can control the working state of the boost module and the output state of the discharging circuit of the first backup power supply unit (4SXP BBU unit in FIG. 1) according to the power supply state of the main power supply unit (the power supply state of the main power supply units 1 and 2 in FIG. 1), and control the power consumed by the step-down module during normal power supply of the main power supply unit to be provided by the boost module, thereby avoiding the loss of the first backup power supply unit by the step-down module.

[0092] In some embodiments of the present application, the method of controlling the working state of the boost module and the output state of the discharge circuit of the first backup power supply unit according to the power supply state of the main power supply unit comprises: if the power supply state of the main power supply unit is normal power supply, controlling the boost module to normally work, and the boost module outputs voltage to the step-down module; if the power supply state of the main power supply unit is abnormal power supply, controlling the boost module to stop working, and controlling the discharge circuit of the first backup power supply unit to output voltage to the step-down module.

[0093] The reason for outputting voltage from the boost module to the step-down module when the power supply state of the main power supply unit is normal power supply is that the output voltage of the boost module is higher than the voltage provided by the first backup power supply unit. Therefore, the output voltage of the boost module needs to be determined according to the voltage provided by the first backup power supply unit. For example: generally, the voltage provided by the first backup power supply unit is 16.4 volts; then the output voltage of the boost module can be defined as 18 volts. Thus:

[0094] During normal power supply of the main power supply unit, the boost module is controlled to normally work, so the output voltage of the boost module is higher than the voltage provided by the first backup power supply unit. Even if the first backup power supply unit always works to provide voltage, because its voltage is lower than the output voltage of the boost module, the voltage provided by the first backup power supply unit cannot be transmitted to the step-down module, while the output voltage of the boost module can be transmitted to the step-down module, so that the electrical energy consumed by the step-down module is provided by the boost module, instead of the first backup power supply unit, i.e. the 4SXP BBU unit in FIG. 1.

[0095] In addition, considering that during power supply link detection, it is necessary to test whether the hot backup function is normal, so the boost module cannot supply power to the step-down module, therefore, during power supply link detection, the boost module needs to be controlled to stop working, so as to complete the detection.

[0096] The hot backup lossless control method for the 4SXP BBU architecture described above can be formed into a control algorithm and set in the MCU. Referring to the schematic diagram of the 4SXP BBU architecture control algorithm shown in FIG. 2, if the main power supply state is normal, the boost module is enabled (i.e. the boost module is controlled to normally work); if the hot backup state or the power supply link detection state, the boost module is disabled (i.e. the boost module is controlled to stop working).

[0097] The boost module can be implemented by any component or integrated circuit structure that can realize the function of voltage boosting, as long as it can raise the voltage generated by the main power supply unit to be higher than the voltage generated by the first backup power supply unit.

[0098] As can be seen from the above description, although the 4SXP BBU unit and the step-down module are always working, the non-4SXP BBU unit consumes the electrical energy generated, so as to ensure that the service life of the 4SXP BBU unit is not reduced, and seamless switching of power supply is realized.

[0099] For the 3SXP BBU architecture, the main power supply unit also adopts 1+1 redundant power supply. Referring to the 3SXP BBU architecture hot backup power supply topology diagram shown in FIG. 3, it includes: main power supply units 1, 2 (hereinafter referred to as PSU, PSU1 represents the main power supply unit 1, and PSU2 represents the main power supply unit 2), and a storage array representing a subsequent circuit. The two main power supply units 1, 2 are redundant to each other, and each main power supply unit can provide a voltage required by the storage array, for example, 12V.

[0100] The main power supply unit branch is also designed as a circuit composed of a one-time programmable memory + a line or a logic circuit. The one-time programmable memory is used for hot plug protection to suppress the inrush current impact when the device is powered on. The line or logic circuit cuts off the main power supply unit power supply branch when the main power supply unit power supply link is abnormal, so as to ensure that the main power supply unit power supply link abnormality does not affect the data backup of the storage system. The 3SXP BBU power supply branch is different from the 4SXP BBU power supply branch architecture, which does not have a step-down module, but a 3SXP BBU unit (i.e. a second backup power supply unit) plus a 3SXP BBU control module and a line or a logic circuit, and the 3SXP BBU control module is equivalent to a discharge circuit.

[0101] The MCU can control the output state of the discharge circuit of the second backup power supply unit according to the power supply state of the main power supply unit (the power supply state of the main power supply units 1, 2 in FIG. 3), the power supply state of the second backup power supply unit (the 3SXP BBU unit in FIG. 3), so as to avoid the loss of the second backup power supply unit.

[0102] In some embodiments of the present application, the method for controlling the output state of the discharge circuit of the second backup power supply unit according to the power supply state of the main power supply unit and the power supply state of each of the second backup power supply units includes:

[0103] If the power supply state of the main power supply unit is normal power supply, and the power supply state of the second backup power supply unit is that the provided voltage is higher than the first threshold voltage, the discharge circuit of the second backup power supply unit is controlled to not output voltage to the subsequent circuit; if the power supply state of the main power supply unit is abnormal power supply, or the power supply state of the second backup power supply unit is that the provided voltage is lower than the second threshold voltage, the discharge circuit of the second backup power supply unit is controlled to output voltage to the subsequent circuit.

[0104] The method comprises the following steps: controlling the voltage output by the discharging circuit of the second backup power supply unit to be lower than the voltage provided by the main power supply unit during normal power supply of the main power supply unit, comprising: during normal power supply of the main power supply unit, controlling the switch tube in the discharging circuit of the second backup power supply unit to be turned off, the voltage output by the discharging circuit of the second backup power supply unit after being stepped down by the body diode of the switch tube is lower than the voltage provided by the main power supply unit, so that only the voltage provided by the main power supply unit can be transmitted to the subsequent circuit, thereby preventing the output voltage of the discharging circuit of the second backup power supply unit from being transmitted to the subsequent circuit.

[0105] The main power supply unit comprises a first main power supply unit and a second main power supply unit, and the normal power supply state of the main power supply unit comprises the following conditions: the first main power supply unit and the second main power supply unit are normally powered; the first main power supply unit is normally powered and the second main power supply unit is abnormally powered; or the first main power supply unit is abnormally powered and the second main power supply unit is normally powered. That is, as long as one of the PSU1 and the PSU2 is normally powered, the main power supply unit is considered to be in a normal power supply state.

[0106] The main power supply unit comprises a first main power supply unit and a second main power supply unit, and the normal power supply state of the main power supply unit comprises the following conditions: the first main power supply unit and the second main power supply unit are normally powered; the first main power supply unit and the second main power supply unit are normally powered; the first main power supply unit is normally powered and the second main power supply unit is abnormally powered; or the first main power supply unit is abnormally powered and the second main power supply unit is normally powered. That is, as long as one of the PSU1 and the PSU2 is normally powered, the main power supply unit is considered to be in a normal power supply state.

[0107] In some embodiments of the present application, the first threshold voltage is 11.5 volts, and the second threshold voltage is 11.3 volts.

[0108] Similar to the hot backup lossless control method of the 4SXP BBU architecture, the hot backup lossless control method for the 3SXP BBU architecture can also be formed into a control algorithm and set in the MCU, as shown in the schematic diagram of the 3SXP BBU architecture control algorithm in FIG. 4. When the BBU unit voltage is higher than 11.5V and the PSU power supply state is normal (all PSU1 / 2 power supply states are normal, or the PSU1 power supply state is abnormal, or the PSU2 power supply state is abnormal), the 3SXP discharging circuit is closed (that is, the discharging circuit of the second backup power supply unit does not output voltage to the subsequent circuit); when the BBU unit voltage is lower than 11.3V or all PSU1 / 2 power supply states are abnormal, the 3SXP discharging circuit is enabled (that is, the discharging circuit of the second backup power supply unit outputs voltage to the subsequent circuit).

[0109] From the above description, it can be seen that although the 3SXP BBU unit is always working, since the voltage output by the 3SXP BBU unit is always lower than the voltage provided by the PSU during normal power supply of the PSU, the power generated by the 3SXP BBU unit will not be consumed, thus ensuring that the service life of the 3SXP BBU unit will not be reduced, and seamless power supply switching is realized.

[0110] Based on the above hot backup lossless control method, the embodiment of the application further provides a discharge circuit, which is a discharge circuit of the first backup power supply unit, and includes a voltage boosting module, a first line or logic controller, and a second line or logic controller. One end of the voltage boosting module receives an output voltage of the main power supply unit, and the other end is connected to an input end of the first line or logic controller; an output end of the first line or logic controller is connected to a voltage reducing module; and an input end of the second line or logic controller receives an output voltage of the first backup power supply unit, and an output end thereof is connected to the voltage reducing module. Herein, the line or logic controller can be any component or integrated circuit structure that can realize the function of a line or logic.

[0111] In order to better understand the discharge circuit applied to the 4SXP BBU architecture, referring to the circuit diagram of the discharge circuit applied to the 4SXP BBU architecture shown in FIG. 5, wherein PSU_12V represents the output voltage of the main power supply unit, and VBAT16V4 represents the output voltage of the first backup power supply unit. The output voltage of the power supply unit is 12V, which is boosted to 18V by the voltage boosting module, and the 18V is transmitted to the first line or logic controller; the output voltage of the first backup power supply unit is 16.4V, which is transmitted to the second line or logic controller. Both are connected to the voltage reducing module by the line or logic controller connected thereto.

[0112] It can be known from the discharge circuit of FIG. 5 that when the voltage boosting module is working normally, since the 18V voltage generated thereby is higher than the voltage 16.4V provided by the 4SXP BBU unit, the 18V voltage is transmitted to the voltage reducing module. When the voltage boosting module stops working, no 18V voltage is generated, and the voltage 16.4V provided by the 4SXP BBU unit is naturally transmitted to the voltage reducing module. Herein, the two line or logic controllers select the voltage output by the voltage boosting module to the voltage reducing module when the power supply of the PSU is normal, and select the voltage provided by the 4SXP BBU unit to the voltage reducing module when the power supply of the PSU is abnormal, according to the control signal sent by the MCU.

[0113] Based on the foregoing lossless control method of hot backup, another discharge circuit is further provided in the embodiments of the present application, which is a discharge circuit of the second backup power supply unit, and comprises a plurality of switching tubes and a driving circuit. The first end of a first switching tube in the plurality of switching tubes receives an output voltage of the second backup power supply unit, the second end is connected with the output end of the driving circuit, and the third end is connected with the first end of a second switching tube in the plurality of switching tubes. The second end of the second switching tube receives a control signal sent by the line or logic controller, and the third end is connected with a subsequent circuit (i.e., the third end of the second switching tube serves as an output voltage end, and the output voltage is sent to the subsequent circuit). The anode of the body diode of the first switching tube receives the output voltage of the second backup power supply unit, and the cathode is connected with the first end of the second switching tube. The anode of the body diode of the second switching tube is connected with the third end of the first switching tube, and the cathode is connected with the subsequent circuit.

[0114] In some embodiments of the present application, the first switching tube comprises at least one NMOS tube. The source of the at least one NMOS tube receives the output voltage of the second backup power supply unit, the gate is connected with the output end of the driving circuit, and the drain is connected with the first end of the second switching tube. The anode of the body diode of the at least one NMOS tube receives the output voltage of the second backup power supply unit, and the cathode is connected with the first end of the second switching tube. When there are a plurality of NMOS tubes, the plurality of NMOS tubes are connected in parallel, the sources of all the NMOS tubes are short-circuited, and the drains are short-circuited.

[0115] In some embodiments of the present application, the second switching tube comprises at least one NMOS tube. The source of the at least one NMOS tube is connected with the third end of the first switching tube, the gate receives a control signal sent by the line or logic controller, and the drain is connected with the subsequent circuit. The anode of the body diode of the at least one NMOS tube is connected with the third end of the first switching tube, and the cathode is connected with the subsequent circuit. When there are a plurality of NMOS tubes, the plurality of NMOS tubes are connected in parallel, the sources of all the NMOS tubes are short-circuited, and the drains are short-circuited.

[0116] It has been stated that, for the 3SXP BBU architecture, there may also exist the problem of power supply switching off ditch, which is caused by factors such as the performance of the switching tube, resulting in poor BBU power supply stability and reliability, and also increasing the pressure drop loss of the BBU link. In order to solve this problem, in some embodiments of the present application, the discharge circuit further comprises an enhancement circuit. The enhancement circuit is arranged between the control signal end of the line or logic controller (the control signal end of the line or logic controller is used for sending a control signal) and the gate of the NMOS tube included in the second switching tube, and is used for enhancing the control signal sent from the control signal end of the line or logic controller to the gate, so as to control the NMOS tube to be quickly opened or closed. In this way, the problem of power supply switching off ditch is eliminated, the BBU power supply stability and reliability are improved, and the pressure drop loss of the BBU link is also reduced.

[0117] In some embodiments of the present application, the enhancement circuit comprises: a diode, a triode, a first resistor, a second resistor, a first capacitor; the anode of the diode is connected with the first end of the second resistor and receives a control signal; the cathode of the diode is connected with the first end of the first resistor and the first end of the first capacitor respectively; the second end of the second resistor is connected with the base of the triode; the second end of the first resistor is connected with the emitter of the triode; the second end of the first capacitor is connected with the collector of the triode and grounded.

[0118] In addition, if the MCU needs to use the output voltage of the discharge circuit when operating, that is, the voltage output to the subsequent circuit, the discharge circuit can further comprise: an analog-to-digital conversion circuit. The analog-to-digital conversion circuit is connected with the third end of the second switch tube, and the analog-to-digital conversion circuit is used for analog-to-digital conversion of the output voltage of the discharge circuit, and sends the digital quantity after analog-to-digital conversion to the controller of the second backup power supply unit. The analog-to-digital conversion circuit can be realized by any circuit that can realize the conversion of analog voltage quantity to corresponding digital voltage quantity. Naturally, it can be understood that if the MCU does not need to use the output voltage of the discharge circuit when operating, then there is no need to have an analog-to-digital conversion circuit.

[0119] For the drive circuit, which is a circuit for driving and controlling the first switch tube, in some embodiments of the present application, the drive circuit comprises: a first drive switch tube and a second drive switch tube; the first end of the first drive switch tube is grounded, the second end is grounded through a resistor and receives a control signal from the controller of the second backup power supply unit, and the third end is connected with the second end of the second drive switch tube through a first target resistor; the third end of the first drive switch tube also receives a high voltage through the first target resistor and a resistor connected in series with the first target resistor. The third end of the second drive switch tube is connected with the third end of the first switch tube through a second target resistor and a resistor connected in series with the second target resistor; the third end of the second drive switch tube is connected with the second end of the first switch tube through the second target resistor and another resistor connected in series with the second target resistor.

[0120] In order to better understand the above-mentioned discharge circuit applied to the 3SXP BBU architecture, refer to the circuit diagram of the discharge circuit applied to the 3SXP BBU architecture shown in FIG. 6, in which three NMOS tubes Q7, 8, 9 represent the first switch tube, three NMOS tubes Q2, 3, 4 represent the second switch tube, NMOS tube Q5 represents the first drive switch tube, PMOS tube Q6 represents the second drive switch tube, MCU 100 represents the control signal sent by the MCU (not shown in FIG. 6), BBU_ORING_GATE represents the control signal sent by the line or logic controller (not shown in FIG. 6), BAT12V3 represents the voltage generated by the 3SXP BBU, and BBU_OUT represents the output of the discharge circuit, the output voltage of which is output to the subsequent circuit (not shown in FIG. 6).

[0121] As shown in the discharge circuit of FIG. 6, when the main power supply unit supplies power normally, the MCU sends a control signal to the NMOS tube Q5 to make Q5 open, so that the high voltage (P20V_BOOT in FIG. 6) cannot be grounded through the resistors R5 and R4, and a high voltage is provided to the gate of the PMOS tube Q6, so that Q6 is open, and the high voltage cannot pass through the PMOS tube Q6. Therefore, a low voltage (i.e. no voltage) is transmitted to the gates of the NMOS tubes Q9, Q7 and Q8 through the second target resistor R7 and the resistors R10, R9 and R8 connected thereto, so that the NMOS tubes Q9, Q7 and Q8 are open. The voltage 12.3V generated by the 3SXP BBU is reduced to 12V through the body diode of the NMOS tubes Q9, Q7 and Q8, and is transmitted to the sources of the NMOS tubes Q2, Q3 and Q4. At the same time, the main power supply unit supplies power normally, and the line or logic controller sends a signal to the signal control end to make the NMOS tubes Q2, Q3 and Q4 conductive according to the control signal sent by the MCU, so that the 12V voltage transmitted to the sources of the NMOS tubes Q2, Q3 and Q4 is reduced to 11.7V through the body diode thereof, and is provided to the subsequent circuit (i.e. BBU_OUT outputs 11.7V), but it cannot be transmitted to the subsequent circuit because it is lower than the voltage 12V provided by the PSU. At the same time, due to the effect of the enhancement circuit, the signal sent by the signal control end of the line or logic controller to the respective gates of the NMOS tubes Q2, Q3 and Q4 is enhanced, so that the NMOS tubes Q2, Q3 and Q4 can be quickly turned on or off.

[0122] The enhancement circuit comprises a diode D1, a first resistor R1, a second resistor R2, a triode Q1 and a first capacitor C1. The anode of the diode D1 is connected to the first end of the second resistor R2, and receives a control signal BBU_ORING_GATE. The cathode of the diode D1 is connected to the first end of the first resistor R1 and the first end of the first capacitor C1, respectively. The second end of the second resistor R2 is connected to the base of the triode Q1. The second end of the first resistor R1 is connected to the emitter of the triode Q1. The second end of the first capacitor C1 is connected to the collector of the triode Q1 and grounded.

[0123] When the main power supply unit supplies abnormal power, the MCU sends a control signal to the NMOS tube Q5 to make Q5 close, then the high voltage (P20V_BOOT in Fig. 6) is grounded through the first target resistor R4 and the resistor R5 connected with R4, and a low voltage is provided for the gate of the PMOS tube Q6 to make the PMOS tube Q6 close, and the high voltage is transmitted to the gates of the NMOS tubes Q9, Q7 and Q8 through the PMOS tube Q6 and the second target resistor R7 and the resistors R10, R9 and R8 connected therewith, so that the NMOS tubes Q9, Q7 and Q8 are turned on. The voltage 12.3V generated by the 3SXP BBU is reduced to 12V through the NMOS tubes Q9, Q7 and Q8 and their body diodes, and is transmitted to the sources of the NMOS tubes Q3, Q2 and Q4. At the same time, the main power supply unit supplies abnormal power, and the line or logic controller sends a signal to make the NMOS tubes Q3, Q2 and Q4 turn on according to the control signal sent by the MCU, so that the 12V signal at the sources of the NMOS tubes Q3, Q2 and Q4 is reduced to 11.7V through their body diodes and provided to the subsequent circuit, and since the voltage supplied by the PSU is abnormal at this time, the voltage 11.7V is transmitted to the subsequent circuit (the voltage 11.7V also meets the working requirement of the subsequent circuit). At the same time, due to the effect of the enhancement circuit, the signal sent by the signal control end of the line or logic controller to the gates of the NMOS tubes Q3, Q2 and Q4 is enhanced, so that the NMOS tubes Q3, Q2 and Q4 can be quickly turned on or turned off.

[0124] Those skilled in the art will appreciate that a microprocessor or a digital signal processor (DSP) can be used in practice to implement some or all of the functions of some or all of the components in the computing processing device according to the embodiments of the present application. The present application can also be implemented as a device or apparatus program (for example, a computer program and a computer program product) for executing part or all of the methods described herein. Such a program implementing the present application can be stored on a computer readable medium or can have the form of one or more signals. Such a signal can be downloaded from an Internet website, or provided on a carrier signal, or provided in any other form.

[0125] For example, Fig. 7 shows a block diagram of a computing processing device that can implement the hot backup lossless control method according to the present application. The computing processing device comprises a processor 1010 and a computer program or computer readable medium in the form of a memory 1020. The memory 1020 can be an electronic memory such as a flash memory, an EEPROM (Electrically Erasable Programmable Read-Only Memory), an EPROM, a hard disk or a ROM. The memory 1020 has a storage space 1030 for program codes 1031 for performing any of the method steps of the hot backup lossless control method described above. For example, the storage space 1030 for program codes can comprise individual program codes 1031 for implementing the various steps of the hot backup lossless control method described above, respectively. These program codes can be read from or written to one or more computer program products. These computer program products comprise program code carriers such as hard disks, compact disks (CDs), memory cards or floppy disks. Such computer program products are typically portable or stationary memory units as referred to in Fig. 8. The memory unit can have a storage section, a storage space or the like arranged similarly to the memory 1020 in the computing processing device of Fig. 7. The program codes can be compressed, for example, in a suitable form. Typically, the memory unit comprises computer readable codes 1031', i.e. codes that can be read by a processor such as 1010, which, when run by the computing processing device, cause the computing processing device to perform the various steps of the hot backup lossless control method described above.

[0126] In summary, the hot backup lossless control method according to the present application controls the working state of the boost module and the output state of the discharge circuit of the first backup power supply unit according to the power supply state of the main power supply unit, and controls the power consumed by the step-down module during normal power supply of the main power supply unit to be provided by the boost module. Alternatively, the hot backup lossless control method according to the present application controls the output state of the discharge circuit of the second backup power supply unit and the voltage output by the discharge circuit of the second backup power supply unit to be lower than the voltage provided by the main power supply unit during normal power supply of the main power supply unit according to the power supply state of the main power supply unit and the second backup power supply unit, respectively.

[0127] The hot backup lossless control method according to the present application uses a hot backup power supply control scheme for the conventional control scheme of BBU power supply backup, thereby avoiding the problems existing in the cold backup power supply control scheme. For the hot backup power supply control scheme using a step-down module architecture, the boost module is creatively proposed, which uses the higher voltage of the boost module to supply power to the step-down module, thereby providing the power consumed by the step-down module during normal power supply of the main power supply unit, instead of using the power generated by the BBU to provide the power consumed by the step-down module, thereby not sacrificing the service life of the BBU.

[0128] For the hot backup power supply control scheme without using the voltage reduction module architecture, the voltage outputted by the discharging circuit of the backup power supply unit (BBU) is creatively controlled to be lower than the voltage provided by the main power supply unit during normal power supply of the main power supply unit, so that the problem that the BBU provides power for the subsequent circuit instead of the main power supply unit during normal power supply of the main power supply unit due to the voltage provided by the BBU being higher than the voltage provided by the main power supply unit does not occur. Therefore, the power generated by the BBU is not provided to the subsequent circuit during normal power supply of the main power supply unit, so that the service life of the BBU is not sacrificed. The problem of power supply switching off is also solved, the stability and reliability of the BBU power supply are improved, and the voltage drop loss of the BBU link is reduced. The hot backup lossless control method and the discharging circuit provided in the application have high practicability.

[0129] Although the preferred embodiments of the embodiments of the application have been described, those skilled in the art can make additional changes and modifications to the embodiments once they know the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications falling within the scope of the embodiments of the application.

[0130] Finally, it should also be noted that, in this document, relational terms such as first and second, and the like, are used solely to distinguish one entity or action from another entity or action, without necessarily requiring or implying any such actual relationship or order between such entities or actions. Moreover, the terms "comprises", "comprising", or any other variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but can include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element preceded by "comprises... a" does not, without more constraints, foreclose the existence of additional identical elements in the process, method, article, or apparatus that comprises the element.

[0131] The embodiments of the application are described above in conjunction with the drawings, but the application is not limited to the specific implementation described above, and the specific implementation described above is only illustrative rather than limiting, and those of ordinary skill in the art can make many forms under the inspiration of the application without departing from the purpose of the application and the scope protected by the claims, and these all belong to the protection of the application.

Claims

1. A method of hot backup lossless control, the method comprising: The hot backup lossless control method comprises: According to the power supply state of the main power supply unit, the working state of the boost module and the output state of the discharge circuit of the first backup power supply unit are controlled, and the power consumed by the step-down module during normal power supply of the main power supply unit is provided by the boost module; or, According to the power supply state of the main power supply unit and the second backup power supply unit, the output state of the discharge circuit of the second backup power supply unit is controlled, and the voltage output by the discharge circuit of the second backup power supply unit is lower than the voltage provided by the main power supply unit during normal power supply of the main power supply unit.

2. The method of claim 1, wherein, According to the power supply state of the main power supply unit, the working state of the boost module and the output state of the discharge circuit of the first backup power supply unit are controlled, which comprises: If the power supply state of the main power supply unit is normal power supply, the boost module is controlled to work normally, and the boost module outputs voltage to the step-down module; If the power supply state of the main power supply unit is abnormal power supply, the boost module is controlled to stop working, and the discharge circuit of the first backup power supply unit outputs voltage to the step-down module.

3. The method of claim 1, wherein, Before the power consumed by the step-down module during normal power supply of the main power supply unit is provided by the boost module, it further comprises: According to the voltage provided by the first backup power supply unit, the output voltage of the boost module is determined; Wherein, the output voltage of the boost module is higher than the voltage provided by the first backup power supply unit.

4. The method of claim 3, wherein, The power consumed by the step-down module during normal power supply of the main power supply unit is provided by the boost module, which comprises: During normal power supply of the main power supply unit, the boost module is controlled to work normally, and the output voltage of the boost module is higher than the voltage provided by the first backup power supply unit, and the output voltage of the boost module is transmitted to the step-down module, so that the power consumed by the step-down module is provided by the boost module.

5. The method of claim 1, wherein, During power supply link detection, the boost module is controlled to stop working.

6. The method of claim 3, wherein, The voltage provided by the first backup power supply unit is 16.4 volts; The output voltage of the boost module is 18 volts.

7. The method of claim 1, wherein, According to the power supply state of the main power supply unit and the second backup power supply unit, the output state of the discharge circuit of the second backup power supply unit is controlled, which comprises: If the power supply state of the main power supply unit is normal power supply, and the power supply state of the second backup power supply unit is that the provided voltage is higher than the first threshold voltage, the discharge circuit of the second backup power supply unit is controlled not to output voltage to the subsequent circuit; If the power supply state of the main power supply unit is abnormal power supply, or the power supply state of the second backup power supply unit is that the provided voltage is lower than the second threshold voltage, the discharge circuit of the second backup power supply unit is controlled to output voltage to the subsequent circuit.

8. The method of claim 7, wherein, The voltage output by the discharge circuit of the second backup power supply unit is lower than the voltage provided by the main power supply unit during normal power supply of the main power supply unit, which comprises: During normal power supply of the main power supply unit, the switch tube in the discharging circuit of the second backup power supply unit is controlled to be turned off, and the voltage output by the discharging circuit of the second backup power supply unit is reduced through the body diode of the switch tube, so that the output voltage of the discharging circuit of the second backup power supply unit is lower than the voltage provided by the main power supply unit, so that the output voltage of the discharging circuit of the second backup power supply unit cannot be transmitted to the subsequent circuit.

9. The method of claim 7, wherein, The main power supply unit comprises a first main power supply unit and a second main power supply unit, and the power supply state of the main power supply unit comprises: The first main power supply unit and the second main power supply unit are both normally powered; or, The first main power supply unit is normally powered, and the second main power supply unit is abnormally powered; or, The first main power supply unit is abnormally powered, and the second main power supply unit is normally powered.

10. The method of claim 7, wherein, The main power supply unit comprises a first main power supply unit and a second main power supply unit, and the power supply state of the main power supply unit comprises: The first main power supply unit and the second main power supply unit are both abnormally powered.

11. The method of claim 7, wherein, The first threshold voltage is 11.5 volts; The second threshold voltage is 11.3 volts.

12. The hot backup lossless control method according to any one of claims 1-6, wherein, The discharging circuit of the first backup power supply unit comprises a boost module, a first line or logic controller and a second line or logic controller; One end of the boost module receives the output voltage of the main power supply unit, and the other end is connected with the input end of the first line or logic controller; The output end of the first line or logic controller is connected with a step-down module; The input end of the second line or logic controller receives the output voltage of the first backup power supply unit, and the output end is connected with the step-down module.

13. The method of claim 1, 7-11, wherein, The discharging circuit of the second backup power supply unit comprises a plurality of switch tubes and a driving circuit; The first end of a first switch tube in the plurality of switch tubes receives the output voltage of the second backup power supply unit, the second end is connected with the output end of the driving circuit, and the third end is connected with the first end of a second switch tube in the plurality of switch tubes; The second end of the second switch tube receives a control signal sent by a line or logic controller, and the third end is connected with a subsequent circuit; The anode of the body diode of the first switch tube receives the output voltage of the second backup power supply unit, and the cathode is connected with the first end of the second switch tube; The anode of the body diode of the second switch tube is connected with the third end of the first switch tube, and the cathode is connected with the subsequent circuit.

14. The method of claim 13, wherein, The first switch tube comprises at least one NMOS tube; The source of at least one NMOS tube receives the output voltage of the second backup power supply unit, the gate is connected with the output end of the driving circuit, and the drain is connected with the first end of the second switch tube; The anode of the body diode of at least one NMOS tube receives the output voltage of the second backup power supply unit, and the cathode is connected with the first end of the second switch tube; When there are a plurality of NMOS tubes, the plurality of NMOS tubes are connected in parallel, the sources of all the NMOS tubes are short-circuited, and the drains are short-circuited.

15. The method of claim 13, wherein, The second switch tube comprises at least one NMOS tube; The source of the at least one NMOS tube is connected to the third terminal of the first switch tube, the gate receives a control signal sent by the line or logic controller, and the drain is connected to the subsequent circuit; The anode of the body diode of the at least one NMOS tube is connected to the third terminal of the first switch tube, and the cathode is connected to the subsequent circuit; When there are multiple NMOS tubes, the multiple NMOS tubes are connected in parallel, the sources of all the NMOS tubes are short-circuited, and the drains are short-circuited.

16. The method of hot backup lossless control of claim 15, wherein, The discharge circuit further comprises an enhancement circuit; The enhancement circuit is arranged between the control signal end of the line or logic controller and the gate of the NMOS tube included in the second switch tube, and is configured to enhance the control signal sent by the control signal end of the line or logic controller to the gate to control the NMOS tube to be quickly opened or closed; The control signal end of the line or logic controller is configured to send the control signal.

17. The method of hot backup lossless control of claim 16, wherein, The enhancement circuit comprises a diode, a triode, a first resistor, a second resistor, and a first capacitor; The anode of the diode is connected to the first end of the second resistor and receives the control signal; The cathode of the diode is connected to the first end of the first resistor and the first end of the first capacitor, respectively; The second end of the second resistor is connected to the base of the triode; The second end of the first resistor is connected to the emitter of the triode; The second end of the first capacitor is connected to the collector of the triode and grounded.

18. The method of hot backup lossless control of claim 13, wherein, The drive circuit comprises a first drive switch tube and a second drive switch tube; The first end of the first drive switch tube is grounded, the second end is grounded through a resistor and receives a control signal from the controller of the second backup power supply unit, and the third end is connected to the second end of the second drive switch tube through a first target resistor; The third end of the first drive switch tube also receives a high voltage through the first target resistor and a resistor connected in series with the first target resistor; The third end of the second drive switch tube is connected to the third terminal of the first switch tube through a second target resistor and a resistor connected in series with the second target resistor; The third end of the second drive switch tube is connected to the second terminal of the first switch tube through the second target resistor and another resistor connected in series with the second target resistor.

19. A computing processing device, comprising: Comprise: a memory in which a computer program is stored; one or more processors, when the computer program is executed by the one or more processors, the computing device executes the hot backup lossless control method as claimed in any one of claims 1-11.

20. A computer program product comprising computer programs / instructions, characterized in that, The computer program / instructions are executed by the processor to implement the hot backup lossless control method as claimed in any one of claims 1-11.

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