Cyclic gapfill with selective etch

A cyclic process for gapfill in semiconductor manufacturing addresses non-uniform film growth issues by depositing and selectively etching materials to ensure uniform bottom-up film growth, reducing seam and void formation, and simplifying process control.

WO2026050554A1PCT designated stage Publication Date: 2026-03-05LAM RES CORP
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Patent Information

Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Filing Date
2025-08-28
Publication Date
2026-03-05

AI Technical Summary

Technical Problem

Challenges in filling high aspect ratio features in semiconductor manufacturing include void formation, pinch-off, and seam formation due to non-uniform film growth and complex plasma management, especially in features with reentrant profiles.

Method used

A cyclic process involving deposition of a gapfill material on sidewalls and bottom surfaces, followed by an etch stop layer, selective etching of sidewalls, and removal of the etch stop layer, repeated in cycles to ensure uniform bottom-up film growth, reducing seam formation and voids.

Benefits of technology

This method achieves uniform gapfill with reduced sensitivity to feature dimensions, avoiding seam formation and voids, and simplifies process control, while minimizing hardmask damage.

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Abstract

Examples are disclosed that relate to cyclic processes for bottom-up gapfill that includes selective deposition and selective etching. one example provides a method of filling a feature on a substrate, the method comprising depositing a layer of a material on a sidewall of the feature, a bottom surface of the feature, and a field region outside the feature. the method further comprises depositing an etch stop layer over the layer of the material on the bottom surface of the feature. the method further comprises selectively etching the layer of the material from the sidewall of the feature. the method further comprises removing the etch stop layer from the bottom surface of the feature, thereby leaving the layer of the material on the bottom surface of the feature and the field region outside the feature.
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Description

Docket No. LRC24312PPCTCYCLIC GAPFILL WITH SELECTIVE ETCHBACKGROUND

[0001] Semiconductor device fabrication processes involve many steps of material deposition, patterning and removal to form integrated circuits on substrates. Example deposition processes include chemical vapor deposition (CVD) and atomic layer deposition (ALD). CVD involves exposing a substrate in a processing chamber to a flow of one or more precursor compounds under conditions configured to convert the precursor compounds into a film on the substrate. ALD involves depositing a film in a layer-by-layer manner by cyclically adsorbing a film precursor to the substrate, and then chemically converting the adsorbed substrate to a layer of the film. ALD can be used to form highly conformal films on complex substrate topologies.

[0002] Etching processes are used to remove material from substrates. Example etching processes include dry etching processes and wet etching processes. Dry etching methods utilize gas-phase etchants to react with substrate materials to form volatile products. Dry etching methods can be performed directionally by using a plasma to form reactive ions that are accelerated toward a substrate, or can be isotropic (not directional), such as by using a thermally driven etching process. Wet etching processes utilize liquid-phase etchant solutions, and are generally used for isotropic etching.SUMMARY

[0003] This Summary is provided to introduce a selection of concepts in a simplified form that are further described below in the Detailed Description. This Summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used to limit the scope of the claimed subject matter. Furthermore, the claimed subject matter is not limited to implementations that solve any or all disadvantages noted in any part of this disclosure.

[0004] One disclosed example provides a method of filling a feature on a substrate. The method comprises (a) depositing a layer of a material on a sidewall of the feature and a bottom surface of the feature. The method further comprises (b) depositing an etch stop layer over the layer of the material on the bottom surface of the feature. The method further comprises (c) selectively etching the layer of the material from the sidewall of the feature at a greater etch rate than the etch stop layer. TheDocket No. LRC24312PPCT method further comprises (d) removing the etch stop layer from the bottom surface of the feature, thereby leaving the layer of the material on the bottom surface of the feature.

[0005] In some such examples, the method further comprises cyclically repeating (a), (b), (c) and (d) for a plurality of process cycles to at least partially fill the feature.

[0006] Additionally or alternatively, in some such examples, the method further comprises, after performing the plurality of process cycles, depositing the material into the feature using a chemical vapor deposition (CVD) or atomic layer deposition (ALD) process to completely fill the feature, wherein depositing the material into the feature comprises exposing the substrate to an inhibitor.

[0007] Additionally or alternatively, in some such examples, depositing the layer of the material comprises depositing silicon oxide.

[0008] Additionally or alternatively, in some such examples, depositing the layer of the material comprises depositing the layer of material using ALD.

[0009] Additionally or alternatively, in some such examples, depositing the layer of the material comprises depositing the layer of the material using a CVD process that includes one or more deposition precursors and an inhibitor.

[0010] Additionally or alternatively, in some such examples, depositing the etch stop layer comprises depositing amorphous carbon.

[0011] Additionally or alternatively, in some such examples, depositing the etch stop layer comprises depositing amorphous silicon.

[0012] Additionally or alternatively, in some such examples, the layer of the material comprises silicon oxide, and selectively etching the silicon oxide from the sidewalls comprises exposing the substrate to hydrogen fluoride (HF) and an alcohol.

[0013] Additionally or alternatively, in some such examples, the method is used in manufacturing a FinFET device.

[0014] Additionally or alternatively, in some such examples, the method is used in manufacturing a 3D memory structure.

[0015] Another example provides a method of filling a feature on a substrate, the method comprising performing a plurality of process cycles. Each process cycle comprises depositing a layer of material on vertical surfaces of the feature and horizontal surfaces of the feature, the vertical surfaces of the feature comprising one or more sidewalls. Each process cycle further comprises depositing an etch stop layer over the layer of material on the horizontal surfaces of the feature. Each process cycle furtherDocket No. LRC24312PPCT comprises selectively etching the layer of material from the vertical surfaces of the feature at a greater etch rate than the etch stop layer. Each process cycle further comprises removing the etch stop layer from the horizontal surfaces of the feature, thereby leaving the layer of material on the horizontal surfaces of the feature.

[0016] In some such examples, depositing the etch stop layer comprises depositing amorphous carbon, and removing the etch stop layer comprises exposing the amorphous carbon to a plasma formed using one or more of oxygen-containing species or hydrogen-containing species.

[0017] Additionally or alternatively, in some such examples, the method further comprises, after performing the plurality of process cycles, depositing the material into the feature using a CVD or ALD process comprising exposing the substrate to an inhibitor.

[0018] Additionally or alternatively, in some such examples, the plurality of process cycles are performed in a same processing chamber.

[0019] Another example provides a processing tool. The processing tool comprises a processing chamber. The processing tool further comprises a substrate support disposed in the processing chamber. The processing tool further comprises a substrate heater configured to heat a substrate positioned on the substrate support. The processing tool further comprises a power source configured to form a plasma in the processing chamber. The processing tool further comprises a showerhead configured to introduce processing chemicals into the processing chamber. The processing tool further comprises flow control hardware configured to deliver processing chemicals to the showerhead. The processing tool further comprises a controller configured to control the processing tool to perform one or more process cycles and thereby cause deposition of a material to at least partially fill a feature of a substrate positioned on the substrate support. The controller is configured to cause the processing tool to deposit a layer of the material on sidewalls of the feature and a bottom surface of the feature. The controller is further configured to cause the processing tool to deposit an etch stop layer over the layer of the material on the bottom surface of the feature. The controller is further configured to cause the processing tool to flow at least an etchant into the processing chamber to selectively etch the layer of the material from the sidewalls of the feature. The controller is further configured to cause the processing tool to remove the etch stop layer from the bottom surface of the feature, thereby leaving the layer of the material on the bottom surface of the feature.Docket No. LRC24312PPCT

[0020] In some such examples, the controller is further configured to, after controlling the processing tool to perform the plurality of process cycles, control the processing tool to cause deposition of the material into the feature by a CVD or ALD process comprising exposing the substrate to an inhibitor.

[0021] Additionally or alternatively, in some such examples, the controller is configured to control the flow control hardware to cause flow of one or more precursors to deposit an oxide material on the sidewalls of the feature and the bottom surface of the feature, and control the flow control hardware to cause flow of at least hydrogen fluoride (HF) and an alcohol to selectively etch the oxide material from the sidewalls of the feature.

[0022] Additionally or alternatively, in some such examples, the controller is configured to control the flow control hardware to cause flow of a carbon-containing precursor to deposit amorphous carbon over the layer of material on the bottom surface of the feature.

[0023] Additionally or alternatively, in some such examples, the controller is configured to control the flow control hardware to cause flow of a silicon-containing precursor to deposit amorphous silicon over the layer of material on the bottom surface of the feature.BRIEF DESCRIPTION OF THE DRAWINGS

[0024] FIGS. 1A-1C schematically show structures formed in a gapfill process that results in hardmask damage and seam formation.

[0025] FIG. 2 shows a flow diagram of an example process cycle for performing gapfill by cyclically repeating a first deposition step, a second deposition step, a first etch step, and a second etch step.

[0026] FIGS. 3A-3H schematically show example structures formed using the gapfill process of FIG. 2.

[0027] FIG. 4 shows a graph representing example etch rates of different materials using a fluorine-based dry etching chemistry.

[0028] FIG. 5 schematically shows an example processing tool that can be used to perform a gapfill process.

[0029] FIG. 6 schematically shows an example computing system.Docket No. LRC24312PPCTDETAILED DESCRIPTION

[0030] The term “aspect ratio” generally represents a ratio between a depth of a substrate feature such as a hole and an average width of the feature.

[0031] The term “atomic layer deposition” (ALD) generally represents a process in which a film is formed on a substrate in one or more individual layers by sequentially adsorbing a precursor to the substrate and reacting the adsorbed precursor to form a film layer in self-limiting steps. Plasma-enhanced ALD (PEALD) utilizes a plasma of a reactive gas to facilitate a chemical conversion of a precursor adsorbed to a substrate to a film on the substrate. Thermal ALD (TALD) utilizes thermal energy to facilitate film formation. The terms “growth”, “deposition”, and variants thereof, also can be used to refer to film formation.

[0032] The term “carbon-containing precursors” generally represents any material that can be introduced into a processing chamber in a gas phase to form a carbon-containing film, such as anamorphous carbon film, on a substrate. Examples of carbon-containing precursors include carbon monoxide (CO), alkanes, alkenes, alkynes, cyclic hydrocarbons, aromatics, alcohols, diols, aldehydes, esters, ethers, ketones, alkyl amines, alkyl diamines, and organosilicon compounds. Examples of suitable alkanes (CnH2n+2 in which n = 1 to 10) may include methane, ethane, propane, and butane. Examples of suitable alkenes (CnELn in which n = 2 to 10, for an alkene with a single carbon-carbon double bond) may include ethene, propene, and butene. Examples of suitable alkynes (CnH2n-2 in which n = 2 to 10, for an alkyne with a single carbon-carbon triple bond) may include acetylene, propyne, and butyne. Examples of suitable cyclic hydrocarbons may include cyclobutane, cyclopentane, and cyclohexane. Examples of suitable aromatics may include benzene, toluene, pyridine, and pyrimidine. Examples of suitable alcohols may include methanol, ethanol, and propanol. Examples of suitable diols may include ethylene glycol, propylene glycol, and hydroquinone. Examples of suitable aldehydes may include formaldehyde and acetaldehyde. Examples of suitable esters may include ethyl formate, methyl acetate, and ethyl acetate. Example of suitable ethers may include diethyl ether, methyl phenyl ether, and aromatic ethers such as furan. Examples of suitable ketones may include acetone and methyl ethyl ketone. Examples of suitable alkyl halides may include ethyl fluoride, isopropyl bromide, and t-butyl chloride. Examples of suitable alkyl amines may include methylamine, dimethylamine, trimethylamine, and piperidine. Examples of suitable alkyl diamines may include ethylenediamine and 1,3-diaminopropane.Docket No. LRC24312PPCT

[0033] The term “chemical vapor deposition” (CVD) generally represents a process in which a solid phase film is formed on a substrate by directing a continuous flow of one or more precursor gases over the substrate surface under conditions configured to cause the chemical conversion of the precursor gases to the film. The term “plasma-enhanced chemical-vapor deposition” (PECVD) generally represents a CVD process in which a plasma is used to facilitate the chemical conversion of one or more precursor gases to a solid phase film on a substrate. Thermal CVD (TCVD) processes utilize thermal energy to facilitate film formation.

[0034] The term “critical dimension” generally represents a width of a feature of a substrate, such as a diameter of a hole formed in a substrate.

[0035] The term “etch” and variants thereof generally represent a process in which material is removed from a substrate. The term “selective etch” generally represents a process in which a first material exposed to an etching chemistry is removed from the substrate at a higher rate than a second material exposed to the etching chemistry. An etch using gas phase etchants is referred to as a "dry etch". An etch utilizing liquid phase etchants is referred to as a "wet etch".

[0036] The term “etch rate” generally represents a depth of an etch as a function of time.

[0037] The term “etchant” generally represents a chemical used in an etching process to chemically remove and / or facilitate chemical removal of material from a substrate. The term “etchant gas mixture” generally represents a mixture of one or more gases comprising at least one etchant. Examples of etchants include halogen-containing etchants, such as fluorine-containing etchants and chlorine-containing etchants. Examples of fluorine-containing etchants include fluorine (F2), hydrogen fluoride (HF), sulfur tetrafluoride (SF4), sulfur hexafluoride (SFe), nitrogen trifluoride (NF3), boron trifluoride (BF3), silicon tetrafluoride (SiF4), phosphorus trifluoride (PF3), phosphorus pentafluoride (PFs), tungsten hexafluoride (WFe), molybdenum hexafluoride (MoFe), fluorocarbons (CxFy), and hydrofluorocarbons ((CxHyFz). Examples of chlorine- containing etchants include chlorine (Ch) and hydrogen chloride (HC1).

[0038] The term “feature” generally represents substrate topology. For example, a feature can be a recess that extends into a substrate.

[0039] The term “field regions” generally represents surfaces of a substrate oriented generally parallel to a surface plane of a substrate.Docket No. LRC24312PPCT

[0040] The term “flow control hardware” generally represents components configured to place one or more chemical sources in fluid connection with a processing chamber. Flow control hardware can comprise one or more mass flow controllers and / or valves, for example.

[0041] The term “inhibition” and variants thereof generally represent a process by which a compound can disrupt one or more chemical processes for film growth on a substrate surface, thereby slowing growth of the film.

[0042] The term “inhibitor” generally represents a compound that can be introduced into a processing chamber to adsorb to a substrate surface to inhibit film growth on the substrate surface. The term “inhibitor” is used herein to represent an inhibitor compound introduced into a processing chamber, reactive inhibitor species formed in a plasma, and adsorbed inhibitor on a substrate surface. Example inhibitors include hydrogen (EE), nitrogen-containing inhibitors, fluorine-containing inhibitors, and carbon-containing inhibitors. Examples of nitrogen-containing inhibitors can include nitrogen (N2), ammonia (NEE), amines, diamines, and aminoalcohols. Examples of fluorine-containing inhibitors can include fluorine (F2), nitrogen trifluoride (NF3), sulfur hexafluoride (SFe), hydrogen fluoride (HF), xenon difluoride (XeF2), fluorocarbons (CxFy) such as tetrafluoromethane (CF4) or hexafluoroethane (C2F6), and hydrofluorocarbons (CxHyFz). Examples of carbon-containing inhibitors can include alkanes, alkenes, alkynes, cyclic hydrocarbons, aromatics, alcohols, aldehydes, esters, ethers, ketones, aldehydes, alkyl halides, alkyl amines, and alkyl diamines. In some examples, an inhibitor gas mixture further can include an oxidant, such as N2O.

[0043] The term “passivation agent” generally represents a material that can remove at least some inhibitor from a substrate surface and / or from surfaces within a feature. Examples of passivation agents include NH3 and H2.

[0044] The term “plasma” generally represents a gas comprising cations and free electrons.

[0045] The term “precursor” generally represents a substance that can be reacted on a substrate to form a film. Examples include silicon-containing precursors, carbon-containing precursors, nitrogen-containing precursors, and oxygen-containing precursors.

[0046] The term “silicon-containing precursor” generally represents any material that can be introduced into a processing chamber in a gas phase to form aDocket No. LRC24312PPCT silicon-containing film, such as a silicon oxide film, on the substrate. Example silicon- containing precursors for forming silicon oxide films can comprise materials having the general structure:where Ri, R2 and R3 can be the same or different substituents, and can include silanes, siloxy groups, amines, halides, hydrogen, or organic groups, such as alkylamines, alkoxy, alkyl, alkenyl, alkynyl and aromatic groups.

[0047] Example silicon-containing precursors include silanes (SinH2n+2 where n >1), such as silane, disilane, trisilane, and tetrasilane.

[0048] In some examples, a halogen-containing silane (halosilane) can be used such that the silane includes at least one hydrogen atom. Such a silane may have a chemical formula of SiXaHy where y = 1-3 and a+y = 4. For example, di chlorosilane (EhSiCh) may be used in some examples.

[0049] In some examples, the silicon-containing precursor is an alkoxysilane. Alkoxysilanes that may be used include the following:Hx-Si-(OR)y, where x = 1-3, x+y = 4 and each R is a substituted or unsubstituted alkyl, alkenyl, alkynyl or aromatic group; andHx(RO)y,-Si-Si-(OR)yHx, where each R is a substituted or unsubstituted alkyl, alkenyl, alkynyl or aromatic group.

[0050] In some examples, the silicon-containing precursor may be a siloxane. Example siloxanes include octamethylcyclotetrasiloxane (OMCTS), octamethoxydodecasiloxane (OMODDS), tetramethylcyclotetrasiloxane (TMCTS), triethoxysiloxane (TRIES), and tetraoxymethylcyclotetrasiloxane (TOMCTS).

[0051] In some examples, the silicon-containing precursor can be an aminosilane, such as bis(diethylamino)silane, di(isopropylamino)silane (DIPAS), bis(t- butylamino) silane (BTBAS), (di-sec-butylamino)silane, andtris(dimethylamino)silane (3DMAS). Aminosilane precursors include the following: Hx-Si-(NR)y, where x = 1-3, x+y = 4, and R is a substituted or unsubstituted alkyl, alkenyl, alkynyl or aromatic group or hydride group.Docket No. LRC24312PPCT

[0052] In some examples, the silicon-containing precursor can be an organosilicon compound. Examples of suitable organosilicon compounds include methyl silane, dimethyl silane, trimethyl silane, and siloxanes such as dimethyldiethoxysilane.

[0053] More particular examples of silicon-containing precursors include tetraethyl orthosilicate (TEOS), tetramethoxysilane (TMOS), methylsilane, trimethylsilane (3MS), ethylsilane, butasilanes, pentasilanes, octasilanes, heptasilane, hexasilane, cyclobutasilane, cycloheptasilane, cyclohexasilane, cyclooctasilane, cyclopentasilane, l,4-dioxa-2,3,5,6-tetrasilacyclohexane, diethoxymethylsilane (DEMS), di ethoxy silane (DES), dimethoxymethylsilane, dimethoxysilane (DMOS), methyl-diethoxysilane (MDES), methyl-dimethoxysilane (MDMS), t-butoxydisilane, triethoxysilane (TES), and trimethoxysilane (TMS or TriMOS).

[0054] An example nitrogen-containing precursor for providing nitrogen for formation of a silicon oxynitride film is N2O.

[0055] The term “process cycle” generally represents a multi-step process that can be repeated to form a film. A process cycle can comprise one or more deposition steps and one or more etch steps.

[0056] The term “processing chamber” generally represents an enclosure in which chemical and / or physical processes are performed on substrates.

[0057] The term “processing tool” generally represents a machine including a processing chamber and other hardware configured to enable substrate processing to be carried out in the processing chamber.

[0058] The term “plasma” generally represents a gas comprising ions and free electrons.

[0059] The term “radio frequency power” generally represents oscillating electric energy in a radio frequency regime (approximately 20 kHz to 300 GHz).

[0060] The term “showerhead” generally represents a processing chemical outlet comprising a plurality of holes distributed across an area.

[0061] The term “substrate” generally represents any object that can be processed in a processing chamber of a processing tool. Deposition and etching are example processes that can be performed on a substrate in a processing chamber.

[0062] The term “substrate support” generally represents any structure for supporting a substrate in a processing chamber.Docket No. LRC24312PPCT

[0063] As introduced above, semiconductor manufacturing includes many steps of material deposition and removal to form integrated circuits on a substrate. Example deposition processes include atomic layer deposition (ALD) and chemical vapor deposition (CVD). Example etching processes include dry etching and wet etching processes.

[0064] In some device fabrication processes, features are etched into one or more previously deposited material layers. After etching, the features are filled with another material in a deposition process sometimes referred to as “gapfill.” A gapfill process can be used to form dielectric layers between circuits, for example.

[0065] However, gapfill processes can pose various challenges. For example, it can be challenging to fill a high aspect ratio (HAR) feature, such as a feature having an aspect ratio of 5 or greater. Due to the relatively narrow width of an HAR feature compared to the depth of the HAR feature, film precursors may react and form film layers on sidewalls of a HAR feature prior to reaching the bottom of a HAR feature. As such, film growth rates tend to be greater near the opening of a feature than toward the bottom of the feature. This can result in void formation when the growth fronts of the film meet at a location near the opening of the feature and pinch off the feature before deeper regions of the film are fully filled. Pinch-off issues can be particularly challenging in gapfill applications where a feature comprises a reentrant profile. A reentrant profile (also referred to as “reentrancy”) comprises a feature that is narrower at a location closer to an opening compared to a wider location deeper within the feature. Due to the narrower width near the feature opening, reentrancies can lead to pinch-off and void formation.

[0066] Various techniques can be employed to enhance film growth near the bottom of a feature compared to the top of the feature to avoid such pinch off. One strategy is to use ALD to conformally grow a film by sequentially adsorbing film precursor to surfaces in the feature and reacting the adsorbed precursor to form film layers. However, ALD film growth rates can be relatively slow. Additionally, ALD gapfill processes can form seams in a HAR feature where film growth fronts meet in the middle of a feature. Such seams can be less dense than surrounding gapfill film regions, and thus can be etched at a higher rate in a wet etching process. This can lead to difficulties in downstream wet etching processes. ALD also can result in pinching off of a gap when a gap is narrower at a location closer to an opening compared to a wider location deeper within the gap resulting in void formation.Docket No. LRC24312PPCT

[0067] To avoid such problems with conformal film deposition, techniques can be used to encourage bottom-up gapfill, in which a film fills a gap from the bottom progressively toward the top as the gapfill process progresses. As one approach, plasma-enhanced CVD (PECVD) gapfill can be performed at low pressure, and include plasma conditions that favor ion-based film formation rather than radical-based film formation. In such examples, the radiofrequency energy can be tuned to help drive reactive ions in the plasma toward the bottom of the feature, e.g., by using a multifrequency plasma with lower-frequency component of radiofrequency power (e.g. below 3MHz) and / or a biasing voltage.

[0068] Another technique to promote bottom-up film growth is to use an inhibitor in a deposition process. An inhibitor is a substance that can adsorb to a substrate to reduce a film growth rate on the substrate. For example, an inhibitor can be configured to adsorb to a surface to block film nucleation sites. During processing, a substrate can be exposed to an inhibitor under conditions to cause a greater concentration of inhibitor to adsorb to sidewall surfaces near the opening of a feature than near the bottom of the feature. The concentration gradient of inhibitor as a function of depth in a feature can be controlled by controlling plasma conditions, inhibitor concentration, and / or inhibitor exposure time. The concentration gradient of inhibitor as a function of feature depth helps to slow film growth on sidewall surfaces near the top of the feature compared to film growth toward the bottom of the feature. As buildup of an inhibitor on sidewalls can slow overall growth, in some examples, a passivation step is performed to remove adsorbed inhibitor, potentially before re-application of the inhibitor and additional deposition. Both ALD and CVD processes can include inhibition steps to promote bottom-up growth and passivation steps to control the level of inhibition.

[0069] However, gapfill processes that include inhibition and passivation can involve complex process management. For example, a high-quality gapfill can depend on properly tuning many parameters. Example parameters that are tuned for a gapfill process can include pressure, temperature, processing chemical selection, processing chemical flow rates, plasma conditions, and temporal conditions (e.g. process step duration and / or frequency) for each of the deposition step, inhibition step, and passivation step. Further, optimized tuning parameters can vary between gapfill applications.Docket No. LRC24312PPCT

[0070] Additional challenges encountered when designing a gapfill process include uneven gapfill across different features, seam formation, and damage to substrate structures due to the complexity of plasma management. For example, an inhibitor may diffuse more easily into a relatively wider feature than a relatively narrower feature. This can lead to higher film growth rates within the relatively narrower feature compared to the relatively wider feature. The uneven growth rates can lead to problems such as bending of substrate features and uneven seam formation.

[0071] FIGS. 1 A-1C schematically show example structures formed in a gapfill process to fill features of a substrate 100, and illustrate some of the issues described above. Referring first to FIG. 1 A, substrate 100 comprises features 102, 104 that have been formed in substrate 100. Features 102, 104 can be formed using a patterned hardmask 106 and a directional etching process, such as reactive ion etching (RIE) or directional atomic layer etching (ALE). In some examples, substrate 100 can comprise silicon or silicon-germanium in some examples. In other examples, substrate 100 can comprise another suitable material or materials. Hardmask 106 can comprise silicon nitride, as an example. Features 102, 104 can define a fin 107 in a FinFET (Fin Field Effect Transistor) logic structure, for example. Each feature 102, 104 includes sidewalls 110 and a bottom surface 112. An upper surface of hardmask 106 defines field regions 114 of the substrate 100. In other examples, a substrate can have a different field region composition than a surface of a hard mask.

[0072] As can be seen in FIG. 1A, feature 104 comprises a larger width, or critical dimension, than feature 102, but a same depth as feature 102. Consequently, feature 102 comprises a greater aspect ratio than feature 104.

[0073] FIG. IB shows substrate 100 following partial completion of an inhibited PEALD gapfill process to fill features 102, 104 with a film 120. An inhibited PEALD gapfill process can be performed by exposing the features 102, 104 to an inhibitor prior to performing ALD, and / or by including one or more inhibition steps intermixed with ALD process steps. The inhibitor and conditions for performing the gapfill can be selected such that the inhibitor adsorbs to the substate in higher concentrations closer to a gap opening than deeper within the gap.

[0074] Film 120 can comprise any suitable material. Examples of gapfill materials for film 120 include silicon oxide, silicon oxynitride, and silicon oxycarbide. The use of an inhibitor, as described above, can cause a higher film growth rate deeper with features 102, 104 than closer to an opening of features 102, 104. However,Docket No. LRC24312PPCT variations in CDs across different features can lead to variations in gapfill performance. For example, due to the smaller width and greater aspect ratio of feature 102, inhibitor can diffuse more slowly into feature 102 than into feature 104. As such, feature 102 is filled faster than feature 104. Non-uniform gapfill rates can lead to complications in substrate processing. For example, fin 107 between feature 102 and feature 104 can be bent toward feature 102, as illustrated in dashed lines, due to imbalanced stresses. FIG. IB also shows damage to hardmask 106 due to the plasma conditions used to control bottom-up gapfill. Further, as shown in FIG. IB, the inhibited deposition of film 120 causes the film to develop a V-shaped film profile. Due to the V-shaped film profile, there is less ion bombardment on the film at the cusp of the V-shaped film profile than farther from the cusp. As a result, a seam 124 can develop in the center of feature 102 where there is less plasma-driven densification of the film material. This seam can have a higher wet etch rate than surrounding regions of the gapfill film. This can cause issues in later processing steps.

[0075] FIG. 1C shows substrate 100 following further film deposition. FIG. 1C omits the dashed-line depiction of the bending of fin 107 shown in FIG. IB. Due to the above-described lack of densifying plasma at the V-shaped cusp of film 120, seams 124 and 126 are formed in features 102 and 104, respectively. Further, due to the above- mentioned deposition rate differences between feature 102 and feature 104 due to different rates of inhibitor diffusion into the different features, seam 124 is longer than seam 126. Seam formation can be difficult to avoid or control due to complex tuning of gapfill processing parameters, and the sensitivity of inhibited gapfill performance to feature width / aspect ratio.

[0076] Accordingly, examples are disclosed that relate to a cyclic process for filling a gap that can avoid issues such as those described above. Briefly, a layer of a gapfill material is deposited relatively conformally over sidewalls (vertical surfaces) in a feature and at the bottom of the feature (horizontal surfaces). After depositing the layer of gapfill material, an etch stop layer is deposited onto the gapifll material on the bottom surface of the feature using a directional deposition process. Then, a selective etch is performed to etch the layer of material from the sidewalls of the feature. Due to selectivity of the etching process to the layer of gapfill material compared to the etch stop layer, the etch stop layer protects underlying gapfill material from the selective etch. Then, the etch stop layer is removed. As a result, the layer of gapfill material deposited at the bottom of the feature remains. Repeated process cycles can depositDocket No. LRC24312PPCT additional layers of gapfill material at the bottom of the feature, where each selective etch step removes material from sidewalls. As a result, the disclosed process cycles can help maintain a relatively flat gapfill film surface at the bottom of the feature throughout deposition. This helps fill the feature in a bottom-up manner and avoids narrowing of the feature during gapfill. By avoiding narrowing, the disclosed examples also can help avoid a V-shaped film profile and avoid seam formation in features. This reduces the risk of seam deterioration described above. In addition, the bottom-up gapfill approach allows for void-free gapfill for features comprising reentrancies within the feature. This can effectively avoid issues associated with pinch-off and void formation. Examples of process cycles are described in more detail below with regard to FIG. 2.

[0077] The disclosed example process cycles can be used to deposit material into features with varying critical dimensions (and varying aspect ratios) at relatively uniform film growth rates. This helps provide relatively uniform gapfill for different features. Additionally, the disclosed examples can provide for a relatively simplified gapfill process from a user perspective. For example, as described above, PECVD gapfill of HAR features can be a complicated process where gapfill quality is sensitive to many processing parameters, including feature aspect ratio and feature width. On the other hand, the disclosed example process cycles can be used to fill a feature with fewer tuning parameters, and where gapfill quality is less sensitive to feature dimensions. As such, the process cycle can be more easily adapted to new gapfill applications compared to other methods. The process cycles also can avoid damage to a hardmask layer due to less complex plasma management and deposition of film (e.g., gapfill material or etch stop layer) onto the hardmask layer during steps of the process cycle.

[0078] In some examples, repeated process cycles can be used to partially fill a feature to reduce the aspect ratio of the feature. Then, CVD (e.g., PECVD) or ALD (e.g., PEALD) can be used to fill the remaining portion of the gap. By reducing the aspect ratio using one or more process cycles according to the disclosed examples, a CVD or ALD gapfill process can be performed that avoids the formation of a V-shaped cusp, and thereby avoids forming a lower density seam. In other examples, the disclosed example process cycles can be iterated to completely fill a feature.

[0079] FIG. 2 shows a flow diagram of an example method 200 for filling a feature on a substrate. Method 200 is described with reference to FIGS. 3 A-3H. Method 200 comprises performing one or more process cycles 201. Each process cycle 201 includes, at 202, depositing a layer of a material on a sidewall of the feature, a bottomDocket No. LRC24312PPCT surface of the feature, and a field region outside the feature. The field region can be a hard mask surface in some examples. Any suitable method can be used to deposit the layer of material. In some examples, as indicated at 204, process cycle 201 can comprise depositing the layer of material using ALD. As discussed above, ALD involves cyclically adsorbing a precursor to the substrate and reacting the adsorbed precursor to form a film layer. More particularly, an ALD cycle can include a dose step to adsorb precursor to the substrate, a purge step to remove excess precursor, a reaction step to convert the precursor to form a film layer, and an optional purge step to remove excess reactant chemicals. In various examples, the reaction step can utilize a plasma of a reactive gas (PEALD) or thermal energy (TALD) to facilitate chemical conversion of the precursor to a film on the substrate. Step 204 can comprise any suitable number of ALD cycles to deposit the layer of material. ALD can help deposit a relatively conformal layer of material on a substrate and in a feature. In other examples, process cycle 201 comprises depositing the layer of the material using CVD (e.g., PECVD).

[0080] In some examples, the deposition of the layer of material includes one or more inhibition steps comprising exposing the substrate to an inhibitor. In some such examples, the deposition of the layer of material includes one or more passivation steps comprising exposing the substrate to a passivation agent to remove adsorbed inhibitor, potentially before again applying additional inhibitor. For example, a PECVD process that includes inhibition can be used to deposit a relatively conformal layer of material. Additionally, an ALD process that includes inhibition can help deposit a layer of material that is relatively thicker toward the bottom of a feature compared to the opening of the feature.

[0081] Any suitable film precursor(s) can be used to deposit the layer of material at step 202. Examples of materials that can be deposited at step 202 include silicon oxide, silicon oxynitride, and silicon oxycarbide. Example film precursors include silicon-containing precursors, carbon-containing precursors, nitrogencontaining precursors, and oxygen-containing precursors. More specific examples of precursors are listed above.

[0082] FIGS. 3A-3B schematically illustrate an example substrate structure formed by the material deposition at step 202. First, FIG. 3A shows a substrate 300 comprising a feature 302 and a feature 304 that is wider than feature 302. Feature 302 comprises a greater aspect ratio than feature 304. Substrate 300 further comprises a hardmask 306. Features 302, 304 can define a fin 307 in a FinFET logic structure, forDocket No. LRC24312PPCT example. The features 302, 304 comprise vertical surfaces including sidewalls 308. The features further comprise horizontal surfaces including a bottom surface 310 at the bottom of each feature and field regions 312 outside the features. Substrate 300 can comprise any suitable material(s), such as silicon (e.g., polysilicon) or silicon / germanium. In various examples, substrate 300 comprises a material with a lower etch rate than the selected gapfill material. Further, hardmask 306 can comprise any suitable material, such as silicon nitride.

[0083] FIG. 3B shows substrate 300 following step 202 to deposit a layer of material 314 on substrate 300 and within features 302, 304. Layer of material 314 is a first layer of gapfill material. As can be seen, the layer of material 314 is deposited relatively conformally on sidewalls 308, bottom surface 310, and field regions 312. The layer of material 314 can comprise any suitable gapfill material, such as silicon oxide, silicon oxynitride, or silicon oxycarbide. In general, selecting an etch stop layer with a faster etch rate compared to substrate 300 can help achieve the benefits of the invention independent of a particular structure of features 302, 304 (e.g., a slit, trench, and / or hole) or the combination of selected materials.

[0084] Returning to FIG. 2, process cycle 201 further comprises, at 206, depositing an etch stop layer on horizontal surfaces of the substrate, including a bottom surface of the feature. In some examples, the etch stop layer also can be deposited on a field region outside the feature. In further examples, the etch stop layer can be selectively deposited on a field region, and not on bottom surfaces. The etch stop layer can comprise any suitable material. In examples where the layer of material 314 is a silicon oxide (e.g. silicon oxide, silicon oxycarbide, silicon oxynitride), the etch stop layer can comprise amorphous carbon. Examples of carbon-containing precursors that can be used to deposit amorphous carbon include CEL and C2H2. Other example carbon- containing precursors are listed above. In some examples, O2 is used to help avoid carbon deposition on sidewalls of a features. H2 also can be used in a gas mixture during carbon deposition. The etch stop layer can be deposited using any suitable method with topological selectivity. For example, as mentioned above, plasma conditions during a PECVD process can be controlled to help promote vertical bombardment of precursor species on horizontal surfaces of the substrate such that the precursor species impact and form the etch stop layer in an ion-driven deposition process on the horizontal surfaces of the substrate. In some examples, step 206 can be performed using aDocket No. LRC24312PPCT relatively low pressure (e.g. pressures below 3 torr) to avoid collisions and scattering of ions to non-vertical trajectories.

[0085] FIG. 3C shows substrate 300 following step 206 to deposit an etch stop layer 320 onto horizontal surfaces of substrate 300. As shown, a portion of the etch stop layer 320 is deposited on the field regions 312 outside the features 302, 304. Further, a portion of etch stop layer 320A is deposited at the bottom surface of feature 302, and a portion of etch stop layer 320B is deposited at the bottom surface of feature 304.

[0086] Next, referring briefly to FIG. 2, process cycle 201 comprises, at 208, selectively etching the layer of the material from the vertical surfaces of the feature, including the sidewalls of the feature. The selective etch is schematically shown in FIGS. 3C-3D. As shown in FIG. 3D, the layer of material 314 is selectively etched from sidewalls 308 of features 302, 304. The selective etch utilizes an etchant that etches the layer of material 314 faster than the etch stop layer 320. Due to the etch selectivity, the etch stop layer 320 can protect the layer of material on horizontal surfaces. As shown in FIG. 3D, a portion of the layer of material 314A, 314B remains at the bottom of respective features 302, 304. Further, a portion of the layer of material 314C remains on field region 312.

[0087] The selective etch at 208 can be performed using any etchant or combination of etchants with suitable etch selectivity between the layer of material and the etch stop layer. Examples of etchants include halogen-containing etchants, such as fluorine-containing etchants and chlorine-containing etchants, that etch silicon oxide at a faster rate than amorphous carbon. Examples of fluorine-containing etchants include fluorine (F2) and hydrogen fluoride (HF). Other examples of fluorine-containing etchants are listed above. Examples of chlorine-containing etchants include chlorine (Ch) and hydrogen chloride (HC1).

[0088] In some more particular examples, at 210, the selective etch comprises a plasma-less etch using an etchant gas mixture comprising HF and an alcohol (e.g. methanol, ethanol, n-propanol, isopropyl alcohol, etc.). Such conditions can cause a less directional etch than a plasma etch. Additionally, omitting a plasma during etching can help avoid damage to substrate structures, such as a hardmask. An HF / alcohol etch process can be used to etch a silicon oxide film faster than an amorphous carbon etch stop layer. In such examples, adsorbed alcohol can react with adsorbed HF to form HF2 . The ionized HF can react with silicon oxide to form volatile SiF4 and H2O which can then be removed from the substrate processing environment.Docket No. LRC24312PPCT

[0089] FIG. 4 shows a graph that shows etch rates for different materials compared to an etch rate of amorphous carbon. The experiments were performed using an HF / alcohol mixture at approximately 100 °C and without a plasma. The etch rate of silicon is approximately twice the etch rate of carbon. The etch rate of silicon nitride is approximately nine times that of carbon. However, the etch rate of silicon oxide is at least 41 times greater than the etch rate of carbon. As such, an amorphous carbon etch stop layer will not be significantly etched during a selective etch of a silicon oxide layer. Additionally, etching can be at least partially avoided for a silicon substrate and / or a silicon nitride hardmask.

[0090] As shown in FIG. 4, the etch rate of silicon oxide is approximately 20X the etch rate of silicon. This means that the example HF / alcohol etch process also exhibits etch selectivity between silicon and silicon oxide. Thus, in some examples, a relatively thin (< 10 A) protective layer of amorphous silicon can be deposited within a feature prior to performing process cycles to fill the feature. As one example of such a process, in three-dimensional memory fabrication processes, high aspect ratio features are formed in stacks of alternating silicon oxide / silicon nitride or silicon oxide / polysilicon layers. Such high aspect ratio features can potentially be filled by first depositing a protective amorphous silicon layer in the features, and then performing a cyclic gapfill process as disclosed.

[0091] Additionally, the data in FIG. 4 indicates etch rate differences based on a quality of a silicon oxide material. For example, silicon oxide deposited closer to the opening of a feature can be exposed to stronger plasma which helps form a higher- quality, denser film compared to silicon oxide deposited closer to the bottom of the feature. As shown in FIG. 4, the etch rate of a higher-density silicon oxide (comprising a wet etch rate (WERR) = 1.8) is 41X greater than the etch rate of carbon. Further, the etch rate of a lower-density silicon oxide (WERR = 6.6) is 336X greater than carbon. As a result, in some examples, etch rates can be slower for denser films closer to the opening of a feature, and faster for less dense films closer to the bottom of the feature.

[0092] In some examples, an etchant may comprise a relatively lesser degree of selectivity between a layer of material and a etch stop layer, in comparison to other chemical systems. In such examples, a relatively thicker etch stop layer can be used such that at least some etch stop layer remains at the bottom of a feature when the layer of material is selectively etched from the sidewalls of the feature. Conversely, aDocket No. LRC24312PPCT relatively thinner etch stop layer can be used in examples where the etchant provides a relatively greater degree of selectivity.

[0093] Selective etching at 208 can be performed under any suitable processing conditions. In some examples, step 208 is performed at a relatively lower temperature (e.g., 150 °C or lower) than other processing steps. Use of a relatively lower temperature can facilitate adsorption of etchants onto substrate surfaces. In other examples, step 208 can be performed at a temperature of 150 °C or greater. In some examples, use of a relatively higher temperature can reduce the sensitivity of the etch rate on material density. This means that performing an etch at a relatively higher temperature can help reduce etch rate differences between a high-density silicon oxide film formed near the opening of a feature and a low-density silicon oxide film formed near a bottom of the feature. In some examples, using relatively higher flow rates for the etchant gas mixture also can help reduce etch selectivity based on material density compared to relatively lower flow rates.

[0094] In some examples, a same temperature can be used for the etching steps and the deposition steps. Using a same temperature in this manner allows a same processing station to be used for all steps of a process cycle 201.

[0095] Continuing with method 200, at 212, process cycle 201 comprises removing the etch stop layer from the bottom surface of the feature and the substrate surface outside the feature, thereby leaving the layer of the material on the bottom surface of the feature. Any suitable method can be used to remove the etch stop layer. For example, where the etch stop layer comprises amorphous carbon, the etch stop layer can be removed using an oxidant such as oxygen (O2) or ozone (O3) to form one or more volatile carbon oxides, or a reducing agent such as hydrogen (H2) to form one or more volatile hydrocarbons. The etch stop removal can utilize a plasma in some examples. The plasma used in step 212 does not significantly etch the layer of material or the sidewalls of the feature.

[0096] FIG. 3E schematically shows substrate 300 following a step 212 to remove the etch stop layer 320A, 320B from the bottom of features 302, 304. Step 212 also removes the etch stop layer 320 from field regions. As a result, the layer of material 314A, 314B remains at the bottom of features 302, 304. Further, a portion of the layer of material 314C remains on field region 312. As oxygen-based plasmas and / or hydrogen-based plasmas do not significantly etch silicon oxide (or silicon oxynitride or silicon oxycarbide), step 212 can selectively remove the etch stop layer 320.Docket No. LRC24312PPCT

[0097] By comparing FIGS. 3A and 3E, the net effect of a process cycle 201 can be seen - the formation of a layer of material 314 A, 314B on bottom surfaces 310 of features 302, 304 and layer of material 314C on field regions 312. Process cycle 201 can be iterated to form additional layer of material 314 on bottom surfaces 310 (and optionally on field regions 312). As such, the method can be used to fill features 302, 304 in a bottom -up manner that avoids seam formation.

[0098] Continuing with FIG. 2, at 214, the method 200 determines whether to perform an additional process cycle 201. If it is determined to perform an additional process cycle, method 200 returns to 202 and deposits another layer of material on the substrate. As such, the subsequent process cycle 201 deposits a layer of material on the layer of material deposited at the previous process cycle 201.

[0099] FIG. 3F shows substrate 300 after nine process cycles have been performed to deposit additional layers of material 314 within features 302, 304. As can be seen, the layers of material 314 fill the features 302, 304 in a bottom -up manner that avoids seam formation. Further, feature 302, having a relatively greater aspect ratio, is filled at a similar rate as feature 304, having a relatively lesser aspect ratio. Due to the features filling at a similar rate, fin 307 does not bend. As such, process cycle 201 can be used to fill features comprising different shapes, structures, and / or aspect ratios in a consistent manner that avoids seams, voids, and fin-bending.

[0100] Any suitable number of process cycles 201 can be performed. In some examples, method 200 comprises repeating process cycles 201 to completely fill the feature with the material. Filling a feature using process cycles 201 can help maintain a relatively flat film profile at the bottom of the feature during gapfill. A flat film profile can help provide better manufacturing consistency than other film profiles. In other examples, method 200 comprises performing a plurality of process cycles 201 to fill a feature to a desired depth and / or to achieve a suitably small aspect ratio. For example, FIG. 3F shows that the remaining unfilled portion of features 302, 304 comprises a lower aspect ratio compared to the unfilled gaps of FIG. 3 A. Thus, iterating process cycle 201 can help reduce the aspect ratio of the features.

[0101] Referring again to FIG. 2, if instead it is determined at 214 not to perform additional process cycles, method 200 can terminate. For example, method 200 can terminate after the feature has been filled with the material.

[0102] Alternatively, method 200 can proceed to optional step 216 where a CVD or ALD process is performed to complete the gapfill. For example, if the one orDocket No. LRC24312PPCT more process cycles partially fills the feature, step 216 can be performed to complete the gapfill process. As discussed above, gapfill of a lower aspect ratio feature can avoid the problems described above, such as seam formation, associated with gapfill of relatively higher aspect ratio features. Thus, iterating process cycles 201 to reduce the aspect ratio of features can help avoid seam formation during a subsequent gapfill using CVD or ALD. Step 216 can comprise any suitable process, such as PECVD, thermal CVD, PEALD, or TALD. In some examples, the deposition process at 216 comprises exposing the substrate to an inhibitor. Examples of inhibitors include those listed above, such as hydrogen (Eb), nitrogen-containing inhibitors, fluorine-containing inhibitors, and carbon-containing inhibitors. In some examples, an inhibitor gas mixture can include an oxidant, such as N2O. As discussed above, the use of an inhibitor can help avoid an unsuitably steep V-shaped film profile. This can help fill the remaining portion of the feature in a bottom-up manner without formation of a lower density seam. In some examples, filling a feature using a combination of iterative process cycles 201 followed by CVD or ALD at 216 can be faster than filling a gap using process cycles 201 and omitting step 216. On the other hand, in some examples, filling a gap using iterative process cycles 201 and omitting step 216 can help provide better manufacturing consistency compared to examples that use step 216.

[0103] FIGS. 3G-3H show substrate 300 after performing step 216 to fill the features 302, 304 with additional material 314. FIG. 3G shows substrate 300 partway through a PEALD gapfill of the remaining portions of features 302, 304. Due to the use of an inhibitor during the PEALD gapfill process, the material 314 does not contain a sharp V-shaped cusp. Rather, FIG. 3G shows a U-shaped cusp 324 in features 302, 304. The curvature of U-shaped cusp 324 allows densifying plasma to impinge on the material 314 near the U-shaped cusp 324. By densifying this material near the center of features 302, 304, seam quality can be improved and / or seams can be avoided altogether. This reduces the risk of seam deterioration associated with sharp V-shaped cusps.

[0104] Referring to FIG. 3H, the PEALD gapfill process deposits material 314 to completely fill features 302, 304 and form an overburden (deposited material above hardmask 306). In contrast to FIG. 1C, the gapfill process using method 200 avoids seams in features 302, 304. Additionally, the gapfill process can avoid damage to hardmask 306.Docket No. LRC24312PPCT

[0105] Method 200 can be used in various integrated circuit manufacturing applications. In some examples, method 200 can be used in manufacturing a FinFET device. Additionally or alternatively, in some examples, method 200 can be used in manufacturing a 3D memory device. Particularly, the examples disclosed herein can be applicable to gapfill processes in 3D memory structures. In 3D memory, features such as slits and holes exhibit a significantly higher aspect ratio compared to features of logic devices. Additionally, reentrancies of such features extend not only along the top sidewall but also throughout a wide depth range down to the bottom. Filling such structures using conventional ALD or inhibited ALD methods to achieve void-free and seam-free results is challenging. However, utilizing the bottom-up gapfill approach described in the present disclosure allows for effective gapfill independent of the depth or size of the reentrancies, resulting in a void-free and seam-free outcome. Further, incoming structures typically have critical dimension (CD) variations. The bottom-up fill method demonstrates low sensitivity to these structure-to- structure CD variations, thus enabling a robust gapfill solution.

[0106] While the above example method 200 is described in the context of a system comprising a silicon or silicon / germanium substrate, a silicon oxide gapfill, a silicon nitride hardmask, and a carbon etch stop layer, method 200 also can be used with other systems in which an etching agent is selective to the gapfill material compared to a hardmask and substrate material.

[0107] FIG. 5 schematically shows a processing tool that can be used to perform the substrate processing methods described above, including method 200. The processing tool 500 can be configured for film deposition, etching, and / or other substrate processes. As mentioned above, in some examples, a substrate can be transferred between different processing tools and / or different processing stations of a same processing tool during a process cycle. In some more particular examples, each processing tool / station can be configured to perform one or more steps of a process cycle 201.

[0108] The processing tool 500 comprises a processing chamber 502 and a substrate support 504 disposed in the processing chamber. During operation, a substrate 506 is positioned on the substrate support 504. The substrate support 504 comprises a substrate heater 512. In other examples, a heater can be omitted, or can be located elsewhere within processing chamber 502.Docket No. LRC24312PPCT

[0109] The processing tool 500 further comprises flow control hardware 514. The flow control hardware 514 connects processing chemical source(s) to the processing chamber. In the depicted example, the flow control hardware 514 connects one or more film precursor sources 516, one or more etch stop layer precursor sources 518, one or more etchant chemical sources 520, optionally one or more inhibitor sources 522, and one or more inert gas sources 524 to the processing chamber. The flow control hardware 514 can include any suitable components. Examples include mass flow controllers, valves, and conduits. For example, the flow control hardware 514 can comprise one or more valves controllable to place a selected gas source or selected gas sources in fluid connection with showerhead 510. The flow control hardware 514 also can comprise one or more mass flow controllers or other controllers for controlling a mass flow rate of gas.

[0110] Film precursor source(s) 516 can include any suitable precursor or combination of precursors that can be reacted to form a layer of material on a substrate. Examples of materials that can be deposited include silicon oxide, silicon oxynitride, and silicon oxycarbide. Example precursors for depositing such films include silicon- containing precursors, nitrogen-containing precursors, carbon-containing precursors, and oxygen-containing precursors, such as those listed above.

[0111] Etch stop layer precursor source(s) 518 can comprise any suitable precursor(s) that can be reacted to form an etch stop layer. Examples include carbon- containing precursors for depositing amorphous carbon etch stop layer, and silicon- containing precursors for depositing amorphous silicon etch stop layer. Examples of carbon-containing precursors include CEE and C2H2. Further examples of carbon- containing precursors are listed above. Examples of silicon-containing precursors include silane and TEOS. Further examples of silicon-containing precursors are listed above.

[0112] Etchant chemical source(s) 520 can comprise any suitable etchant(s), including a fluorine-containing etchant 520A for selectively etching the material formed from film precursor source 516. As discussed above, a fluorine-containing etchant 520A can be used to etch silicon oxide at a faster rate than amorphous carbon, silicon nitride, or silicon (or silicon / germanium). Examples of fluorine-containing etchants include fluorine (F2) and hydrogen fluoride (HF). Further examples of fluorine-containing etchants are listed above. In some examples, etchant chemical source 520 can comprise a chlorine-containing etchant. Examples of chlorine-Docket No. LRC24312PPCT containing etchants include chlorine (Ch) and hydrogen chloride (HC1). Further examples of etchants include alcohols (e.g., methanol, ethanol, isopropyl alcohol). In some more particular examples, the etchant chemical source 520 comprises a mixture of a fluorine-containing etchant and one or more alcohols. Further examples of etchants include hydrocarbons (CxHy) and fluorocarbons (CxFy) that can be used to etch silicon oxide faster than an amorphous silicon etch stop layer.

[0113] Etchant chemical source(s) 520 further can comprise an etchant for removing the etch stop layer formed by the etch stop layer precursors. For example, suitable etchants for removing amorphous carbon include O2, O3, and EE.

[0114] Optional inhibitor source(s) 522 can comprise any suitable inhibitor that can adsorb to a substrate surface to inhibit film growth on the substrate surface. Example inhibitors include hydrogen (EE), nitrogen-containing inhibitors, fluorine- containing inhibitors, and carbon-containing inhibitors. More specific examples of inhibitors are listed above.

[0115] The inert gas source(s) 524 can comprise any suitable inert gas. Example inert gases include helium (He), neon (Ne), argon (Ar), krypton (Kr), xenon (Xe), and in some processes, nitrogen (N2).

[0116] The processing tool 500 further comprises an exhaust system 530. The exhaust system 530 is configured to exhaust gases from the processing chamber 502. The exhaust system 530 can comprise any suitable hardware, including one or more low vacuum pumps, one or more high vacuum pumps, and one or more valves for controlling an exhaust flow. Together, flow control hardware 514 and exhaust system 530 can be operated to achieve a selected pressure in processing chamber 502 during substrate processing. Further, exhaust system 530 can be operated to purge processing chamber 502.

[0117] The processing tool 500 further comprises a radiofrequency power source 534 that is electrically connected to substrate support 504. Radiofrequency power source 534 is configured to form a plasma using a gas mixture. For example, during a PECVD or PEALD process, radiofrequency power source 534 can be operated to form a plasma using a gas mixture comprising one or more of film precursors to deposit a film. Additionally, during an etching step, radiofrequency power source 534 can be operated to form a plasma using a gas mixture comprising one or more etchants to etch and / or selectively etch a film.Docket No. LRC24312PPCT

[0118] Radiofrequency power can be supplied to the showerhead electrode or substrate holder electrode in various examples. As shown in FIG. 5, the radiofrequency energy is provided to substrate support 504, and showerhead 510 is configured as a grounded opposing electrode. In other examples, the radiofrequency power source 534 can supply radiofrequency power to showerhead 510, and substrate support 504 can be grounded. In the depicted example, a capacitively coupled plasma can be formed in processing chamber 502 between showerhead 510 and substrate support 504. In other examples, an inductively coupled plasma can be used.

[0119] The processing tool 500 further includes a matching network 536 for impedance matching of the radiofrequency power source 534. The radiofrequency power source 534 can be configured to provide radiofrequency energy of any suitable frequency and power. Examples frequencies include 400 kHz, 13.56 MHz, 27 MHz, 60 MHz, and 100 MHz. In some examples, the radiofrequency power source 534 is configured to operate at a plurality of different frequencies and / or powers. For example, as described above, a plasma can comprise an LF component and an HF component. Examples of frequencies for the LF radiofrequency energy component can include frequencies within a range of 3 MHz and below. The LF radiofrequency energy component can comprise a power within a range of 0 to 5000 W, in some examples. Further, the HF radiofrequency energy component can comprise frequencies within a range of 3 MHz to 300 MHz. The HF radiofrequency energy component can comprise a power within a range of 50 W to 6500 W, in some examples. Unless otherwise stated, values for radiofrequency power refers to power per substrate processing station. Radiofrequency power for a multi-station processing chamber can be scaled accordingly.

[0120] The processing tool 500 further comprises a controller 550 configured to control operation of the processing tool. Controller 550 is operatively coupled to substrate heater 512, flow control hardware 514, exhaust system 530, and radiofrequency power source 534. Controller 550 further may be operatively coupled to any other suitable component of processing tool 500. Controller 550 is configured to control various functions of processing tool 500 to deposit layers of material, deposit etch stop layers, selectively etch a material, and remove an etch stop layer.

[0121] For example, controller 550 is configured to operate substrate heater 512 to heat a substrate. Controller 550 is also configured to operate flow control hardware 514 to flow one or more precursors at selected flow rate(s) to showerhead 510.Docket No. LRC24312PPCTController 550 is also configured to operate flow control hardware 514 to flow one or more etchants at selected flow rate(s) to showerhead 510. Controller 550 is also configured to operate flow control hardware 514 to flow one or more inert gases at selected flow rate(s) to showerhead 510. Controller 550 is also configured to operate radiofrequency power source 534 to form a plasma in processing chamber 502 to facilitate film formation or etching. Controller 550 is also configured to operate exhaust system 530 to remove process gases and / or byproducts from processing chamber 502. Controller 550 is further configured to operate flow control hardware 514 and exhaust system 530 to maintain a selected pressure within processing chamber 502.

[0122] The controller 550 further is configured to control the processing tool to perform one or more process cycles 201 and thereby cause deposition of a material to at least partially fill a feature of a substrate positioned on the substrate support 504. The controller 550 further is configured to cause the processing tool 500 to deposit a layer of the material on sidewalls of a feature of a substrate and a bottom surface of the feature. The controller 550 further is configured to cause the processing tool 500 to deposit an etch stop layer over the layer of the material on the bottom surface of the feature. The controller 550 further is configured to cause the processing tool 500 to flow at least an etchant into the processing chamber to selectively etch the layer of the material from the sidewalls of the feature. The controller 550 further is configured to cause the processing tool 500 to remove the etch stop layer from the bottom surface of the feature, thereby leaving the layer of the material on the bottom surface of the feature. Controller 550 further is configured to control any other functions of processing tool 500 to implement any of the example methods disclosed herein.

[0123] Controller 550 may comprise any suitable computing system. FIG. 6 schematically shows a non-limiting embodiment of a computing system 600 that can enact one or more of the methods and processes described above. Computing system 600 is shown in simplified form. Computing system 600 may take the form of one or more personal computers, workstations, computers integrated with substrate processing tools, and / or network accessible server computers.

[0124] Computing system 600 includes a logic subsystem 602 and a storage subsystem 604. Computing system 600 may optionally include a display subsystem 606, input subsystem 608, communication subsystem 610, and / or other components not shown in FIG. 6. Controller 550 is an example of computing system 600.Docket No. LRC24312PPCT

[0125] Logic subsystem 602 includes one or more physical devices configured to execute instructions. For example, the logic subsystem may be configured to execute instructions that are part of one or more applications, services, programs, routines, libraries, objects, components, data structures, or other logical constructs. Such instructions may be implemented to perform a task, implement a data type, transform the state of one or more components, achieve a technical effect, or otherwise arrive at a desired result.

[0126] The logic subsystem may include one or more processors configured to execute software instructions. Additionally or alternatively, the logic subsystem may include one or more hardware or firmware logic subsystems configured to execute hardware or firmware instructions. Processors of the logic subsystem may be singlecore or multi-core, and the instructions executed thereon may be configured for sequential, parallel, and / or distributed processing. Individual components of the logic subsystem optionally may be distributed among two or more separate devices, which may be remotely located and / or configured for coordinated processing. Aspects of the logic subsystem may be virtualized and executed by remotely accessible, networked computing devices configured in a cloud-computing configuration.

[0127] Storage subsystem 604 includes one or more physical devices configured to hold instructions 612 executable by the logic subsystem to implement the methods and processes described herein. When such methods and processes are implemented, the state of storage subsystem 604 may be transformed — e.g., to hold different data.

[0128] Storage subsystem 604 may include removable and / or built-in devices. Storage subsystem 604 may include optical memory (e.g., CD, DVD, HD-DVD, Blu- Ray Disc, etc.), semiconductor memory (e.g., RAM, EPROM, EEPROM, etc.), and / or magnetic memory (e.g., hard-disk drive, floppy-disk drive, tape drive, MRAM, etc.), among others. Storage subsystem 604 may include volatile, nonvolatile, dynamic, static, read / write, read-only, random-access, sequential-access, location-addressable, file-addressable, and / or content-addressable devices.

[0129] It will be appreciated that storage subsystem 604 includes one or more physical devices. However, aspects of the instructions described herein alternatively may be propagated by a communication medium (e.g., an electromagnetic signal, an optical signal, etc.) that is not held by a physical device for a finite duration.Docket No. LRC24312PPCT

[0130] Aspects of logic subsystem 602 and storage subsystem 604 may be integrated together into one or more hardware-logic components. Such hardware-logic components may include field-programmable gate arrays (FPGAs), program- and application-specific integrated circuits (PASIC / ASICs), program- and applicationspecific standard products (PSSP / ASSPs), system-on-a-chip (SOC), and complex programmable logic devices (CPLDs), for example.

[0131] When included, display subsystem 606 may be used to present a visual representation of data held by storage subsystem 604. This visual representation may take the form of a graphical user interface (GUI). As the herein described methods and processes change the data held by the storage subsystem, and thus transform the state of the storage subsystem, the state of display subsystem 606 may likewise be transformed to visually represent changes in the underlying data. Display subsystem 606 may include one or more display devices utilizing virtually any type of technology. Such display devices may be combined with logic subsystem 602 and / or storage subsystem 604 in a shared enclosure, or such display devices may be peripheral display devices.

[0132] When included, input subsystem 608 may comprise or interface with one or more user-input devices such as a keyboard, mouse, or touch screen. In some examples, the input subsystem may comprise or interface with selected natural user input (NUI) componentry. Such componentry may be integrated or peripheral, and the transduction and / or processing of input actions may be handled on- or off-board. Example NUI componentry may include a microphone for speech and / or voice recognition, and an infrared, color, stereoscopic, and / or depth camera for machine vision and / or gesture recognition.

[0133] When included, communication subsystem 610 may be configured to communicatively couple computing system 600 with one or more other computing devices. Communication subsystem 610 may include wired and / or wireless communication devices compatible with one or more different communication protocols. As non-limiting examples, the communication subsystem may be configured for communication via a wireless telephone network, or a wired or wireless local- or wide-area network. In some examples, the communication subsystem may allow computing system 600 to send and / or receive messages to and / or from other devices via a network such as the Internet.Docket No. LRC24312PPCT

[0134] It will be understood that the configurations and / or approaches described herein are exemplary in nature, and that these specific examples or examples are not to be considered in a limiting sense, because numerous variations are possible. The specific routines or methods described herein may represent one or more of any number of processing strategies. As such, various acts illustrated and / or described may be performed in the sequence illustrated and / or described, in other sequences, in parallel, or omitted. Likewise, the order of the above-described processes may be changed.

[0135] The subject matter of the present disclosure includes all novel and non- obvious combinations and sub-combinations of the various processes, systems and configurations, and other features, functions, acts, and / or properties disclosed herein, as well as any and all equivalents thereof.

Claims

Docket No. LRC24312PPCTCLAIMS:

1. A method of filling a feature on a substrate, the method comprising:(a) depositing a layer of a material on a sidewall of the feature and a bottom surface of the feature;(b) depositing an etch stop layer over the layer of the material on the bottom surface of the feature;(c) selectively etching the layer of the material from the sidewall of the feature at a greater etch rate than the etch stop layer; and(d) removing the etch stop layer from the bottom surface of the feature, thereby leaving the layer of the material on the bottom surface of the feature.

2. The method of claim 1, further comprising cyclically repeating (a), (b), (c) and (d) for a plurality of process cycles to at least partially fill the feature.

3. The method of claim 2, further comprising, after performing the plurality of process cycles, depositing the material into the feature using a chemical vapor deposition (CVD) or atomic layer deposition (ALD) process to completely fill the feature, wherein depositing the material into the feature comprises exposing the substrate to an inhibitor.

4. The method of claim 1, wherein depositing the layer of the material comprises depositing silicon oxide.

5. The method of claim 1, wherein depositing the layer of the material comprises depositing the layer of material using ALD.

6. The method of claim 1, wherein depositing the layer of the material comprises depositing the layer of the material using a CVD process that includes one or more deposition precursors and an inhibitor.

7. The method of claim 1, wherein depositing the etch stop layer comprises depositing amorphous carbon.Docket No. LRC24312PPCT8. The method of claim 1, wherein depositing the etch stop layer comprises depositing amorphous silicon.

9. The method of claim 1, wherein the layer of the material comprises silicon oxide, and wherein selectively etching the silicon oxide from the sidewalls comprises exposing the substrate to hydrogen fluoride (HF) and an alcohol.

10. The method of claim 1, wherein the method is used in manufacturing a FinFET device.

11. The method of claim 1, wherein the method is used in manufacturing a 3D memory structure.

12. A method of filling a feature on a substrate, the method comprising: performing a plurality of process cycles, each process cycle comprising depositing a layer of material on vertical surfaces of the feature and horizontal surfaces of the feature, the vertical surfaces of the feature comprising one or more sidewalls, depositing an etch stop layer over the layer of material on the horizontal surfaces of the feature, selectively etching the layer of material from the vertical surfaces of the feature at a greater etch rate than the etch stop layer, and removing the etch stop layer from the horizontal surfaces of the feature, thereby leaving the layer of material on the horizontal surfaces of the feature.

13. The method of claim 12, wherein depositing the etch stop layer comprises depositing amorphous carbon, and wherein removing the etch stop layer comprises exposing the amorphous carbon to a plasma formed using one or more of oxygencontaining species or hydrogen-containing species.

14. The method of claim 12, further comprising, after performing the plurality of process cycles, depositing the material into the feature using a chemical vapor deposition (CVD) or atomic layer deposition (ALD) process comprising exposing the substrate to an inhibitor.Docket No. LRC24312PPCT15. The method of claim 12, wherein the plurality of process cycles are performed in a same processing chamber.

16. A processing tool, comprising: a processing chamber; a substrate support disposed in the processing chamber; a substrate heater configured to heat a substrate positioned on the substrate support; a power source configured to form a plasma in the processing chamber; a showerhead configured to introduce processing chemicals into the processing chamber; flow control hardware configured to deliver processing chemicals to the showerhead; and a controller configured to control the processing tool to perform one or more process cycles and thereby cause deposition of a material to at least partially fill a feature of a substrate positioned on the substrate support, the controller configured to cause the processing tool to deposit a layer of the material on sidewalls of the feature and a bottom surface of the feature, cause the processing tool to deposit an etch stop layer over the layer of the material on the bottom surface of the feature, cause the processing tool to flow at least an etchant into the processing chamber to selectively etch the layer of the material from the sidewalls of the feature, and cause the processing tool to remove the etch stop layer from the bottom surface of the feature, thereby leaving the layer of the material on the bottom surface of the feature.

17. The processing tool of claim 16, wherein the controller is further configured to, after controlling the processing tool to perform the plurality of process cycles, control the processing tool to cause deposition of the material into the feature by a chemical vapor deposition (CVD) or atomic layer deposition (ALD) process comprising exposing the substrate to an inhibitor.Docket No. LRC24312PPCT18. The processing tool of claim 16, wherein the controller is configured to, control the flow control hardware to cause flow of one or more precursors to deposit an oxide material on the sidewalls of the feature and the bottom surface of the feature, and control the flow control hardware to cause flow of at least hydrogen fluoride (HF) and an alcohol to selectively etch the oxide material from the sidewalls of the feature.

19. The processing tool of claim 16, wherein the controller is configured to control the flow control hardware to cause flow of a carbon-containing precursor to deposit amorphous carbon over the layer of material on the bottom surface of the feature.

20. The processing tool of claim 16, wherein the controller is configured to control the flow control hardware to cause flow of a silicon-containing precursor to deposit amorphous silicon over the layer of material on the bottom surface of the feature.

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