Pulse generation with adjustable pulse width using current and voltage control

Abstract

A pulse generator (100), for generating a periodic square wave signal in response to a periodic input signal, includes a first inverter (106), a negative-feedback circuit (108), an adjustable current source (110), and a second inverter (112). The first inverter is configured to invert the periodic input signal, thereby generating a periodic wave. The negative-feedback circuit is configured to couple an output of the first inverter to an input of the first inverter, thereby setting the first inverter in a linear mode. The adjustable current source is coupled to the negative-feedback circuit and is configured to load the first inverter, thereby modifying a duty cycle of the periodic wave produced by the first inverter. The second inverter is configured to invert the output of the first inverter, thereby generating the periodic square wave.

Description

[0001] PULSE GENERATION WITH ADJUSTABLE PULSE WIDTH USING CURRENT AND VOLTAGE CONTROL

[0002] CROSS-REFERENCE TO RELATED APPLICATIONS

[0003] This application claims the benefit of U.S. Provisional Patent Application 63 / 706,754, filed October 14, 2024, whose disclosure is incorporated herein by reference.

[0004] FIELD OF THE INVENTION

[0005] The present disclosure relates to pulse generation circuits, and more particularly to a pulse generator that uses current control and variable supply voltages to generate variablewidth pulses from a periodic input signal.

[0006] BACKGROUND OF THE INVENTION

[0007] Pulse generation circuits are widely used in electronic systems for various applications including clock generation, signal conditioning, power management, and others. These circuits typically convert periodic input signals, such as sinusoidal waveforms, into square wave pulses with controllable characteristics. The ability to generate pulses with variable width or duty cycle is particularly valuable in applications such as pulse width modulation (PWM) for motor control, switching power supplies, and digital signal processing.

[0008] Conventional pulse generators often rely on digital logic to achieve pulse width control. This approach, however, may be limited at high frequencies and / or consume substantial power. Another approach used in conventional pulse generators is comparatorbased circuits; such circuits, however, also consume substantial power due to their continuous operation and current requirements.

[0009] SUMMARY OF THE INVENTION

[0010] An embodiment of the present invention provides a pulse generator for generating a periodic square wave signal in response to a periodic input signal. The pulse generator includes a first inverter, a negative-feedback circuit, an adjustable current source, and a second inverter. The first inverter is configured to invert the periodic input signal, thereby generating a periodic wave. The negative-feedback circuit is configured to couple an output of the first inverter to an input of the first inverter, thereby setting the first inverter in a linear mode. The adjustable current source is coupled to the negative-feedback circuit and is configured to load the first inverter, thereby modifying a duty cycle of the periodic wave produced by the first inverter. The second inverter is configured to invert the output of the first inverter, thereby generating the periodic square wave. In some embodiments, the adjustable current source is configured to inject into the negative-feedback circuit, or to sink from the negative-feedback circuit, an amount of electrical current that determines the duty cycle. In an embodiment, the negative-feedback circuit includes two serially connected resistors. In a disclosed embodiment, the adjustable current source includes a positive current source and a negative current source. In some embodiments, the pulse generator further includes a variable supply rail inverter, which is coupled to the first inverter and is configured to further control the duty cycle.

[0011] There is additionally provided, in accordance with an embodiment that is described herein, a method for generating a periodic square wave signal in response to a periodic input signal. The method includes inverting the periodic input signal using a first inverter, thereby generating a periodic wave. An output of the first inverter is coupled to an input of the first inverter using a negative-feedback circuit, thereby setting the first inverter in a linear mode. The first inverter is loaded using an adjustable current source coupled to the negative-feedback circuit, thereby modifying a duty cycle of the periodic wave produced by the first inverter. The output of the first inverter is inverted by a second inverter, thereby generating the periodic square wave.

[0012] The present invention will be more fully understood from the following detailed description of the embodiments thereof, taken together with the drawings in which:

[0013] BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Fig. 1 is a block diagram that schematically illustrates an adjustable-width pulse generator (A WPG), in accordance with an embodiment of the present invention;

[0015] Fig. 2 is a block diagram that schematically illustrates a detailed view of an AWPG, in accordance with an embodiment of the present invention;

[0016] Fig. 3 is a graph that schematically illustrates waveform regions in an AWPG, in accordance with an embodiment of the present invention;

[0017] Fig. 4 is a graph that schematically illustrates current control effect on the pulse width of pulses generated by the AWPG illustrated in Fig. 2, in accordance with an embodiment of the present invention;

[0018] Fig. 5 is a graph that schematically illustrates normalized amplitude curves, in accordance with an embodiment of the present invention;

[0019] Fig. 6 is a graphic representation of the AWPG pulse duty-cycle as a function of the bias current, in accordance with an embodiment of the present invention; and Fig. 7 is a flowchart that schematically illustrates a method for pulse width control, in accordance with an embodiment of the present invention.

[0020] DETAILED DESCRIPTION OF EMBODIMENTS

[0021] OVERVIEW

[0022] Traditional pulse generators typically utilize digital logic to achieve pulse width control, or, alternatively, use comparators. Both approaches consume substantial power; the digital logic approach, in addition, covers a limited frequency range.

[0023] Embodiments of the present invention that are disclosed herein provide for adjustable width pulse generators (AWPGs) that facilitate wide-range control over pulse characteristics through innovative dual control mechanisms. These circuits address the need for pulse generation with wide-range duty cycle adjustment capabilities while maintaining low power consumption.

[0024] In an embodiment, an AWPG comprises a first inverter configured to operate in linear mode through a feedback network, with programmable current sources connected to the feedback path to control switching thresholds and pulse width characteristics. By the injection of current (positive or negative), the equilibrium of the circuit may change, shifting the inverter trip-point up or down, and, as a result, changing the output pulse width.

[0025] In another embodiment, further pulse width control is achieved. In this embodiment the AWPG further incorporates cascaded inverter stages operating at different supply voltages to provide varying inverter trip-points and, hence, additional pulse width control.

[0026] In a graph disclosed herein, example simulation results are shown to demonstrate how current parameters and supply voltage levels affect the timing and duty cycle of generated pulses.

[0027] SYSTEM DESCRIPTION

[0028] The following detailed description presents embodiments of an adjustable-width pulse generator (AWPG) that employs dual control mechanisms for precise pulse width modulation. The disclosure describes circuit configurations that utilize current control through programmable current sources in feedback networks around linear-mode inverters to adjust switching thresholds and duty cycles, and circuit configurations that incorporate supply voltage variation across cascaded inverter stages to provide further pulse width control capabilities. CURRENT-BASED AND VDD-BASED PULSE WIDTH CONTROL

[0029] Two pulse-width control techniques are described hereinbelow - current-based and Vdd-based. In some embodiments, only the current-based technique is used; in other embodiments, both the current-based and Vdd-based techniques are employed.

[0030] The current mode technique involves injecting or sinking a programmable current into / from the output of an inverter, which comprises negative-feedback circuitry; the injection or sinking of current changes the threshold of the inverter, thereby changing the duty cycle.

[0031] The Vdd-based mode technique involves using two chained inverters having different supply voltages. The trip point of the inverters is different (higher Vdd inverters have higher trip-points) and, hence, allow widening or narrowing of the output pulse.

[0032] PULSE WIDTH AND DUTY CYCLE

[0033] In periodic signals, the term pulse width refers to the time in which the signal is at logic high in each period, whereas the term duty cycle refers to the ratio between the pulse width and the period time. In the descriptions below, controlling the pulse width and controlling the duty cycle often refer to the same operation.

[0034] Fig. 1 is a block diagram that schematically illustrates an adjustable-width pulse generator (A WPG) 100, in accordance with an embodiment of the present invention. The A WPG is configured to generate variable-width pulses from a periodic input signal 102. The periodic input signal, which may comprise a sinusoidal waveform or other suitable periodic signal, is processed to produce controlled pulse outputs.

[0035] The periodic input signal is connected through a coupling capacitor 104 to a first inverter 106, having a Vddl power supply. The coupling capacitor 104 provides DC decoupling, allowing the AC components of the periodic input signal to be processed while blocking any DC offset.

[0036] A feedback circuit 108 is connected between the input and output of the first inverter. The feedback circuit may include resistive elements that establish a negative feedback path around first inverter 106, thereby configuring the first inverter to a linear-mode operation. A current source 110 is connected to the feedback circuit and provides a controllable current injection into the feedback path. Current source 110 may be programmed to source or sink variable current, thereby adjusting the switching threshold of the first inverter and controlling the duty cycle of the generated pulses.

[0037] According to the example embodiment illustrated in Fig. 1, the sine wave output from first inverter 106 is transformed to a square wave by a second inverter 112, which, in turn, connects to a variable supply-rail inverter 114. The variable supply rail inverter may operate at a different supply voltage (designated Vdd2) than the second inverter to enable further pulse width control. The cascaded arrangement of inverters allows for both current-based and voltage-based pulse width control, providing flexibility in achieving the desired pulse characteristics.

[0038] The configuration of AWPG 100 illustrated in Fig. 1 and described hereinabove is set by way of example. Other configurations may be used in alternative embodiments. For example, in some embodiments, more inverters may be cascaded after or before the second inverter, having the same or other power supplies. In an embodiment, there is no input signal 102 and / or coupling capacitor 104; rather, first inverter 106 is configured to spontaneously oscillate, e.g., according to a resonance frequency of a crystal oscillator that is connected thereto.

[0039] Fig. 2 is a block diagram that schematically illustrates a detailed view of an AWPG 200, in accordance with an embodiment of the present invention. AWPG 200 uses both current control and supply voltage variation to generate the variable-width pulses.

[0040] The AWPG receives a periodic input signal 202 (for example, a sine wave), which is connected through a coupling capacitor 204 to provide DC decoupling of the input signal.

[0041] AWPG 200 comprises a current-based pulse-width control circuit 206, that is followed by a Vdd-based pulse-width control circuit 208. Within the power pulse width control circuit 206, the coupled input signal is processed by an inverter 210 that operates in a linear mode. The output of inverter 210 is connected to an inverter 212 for further signal conditioning. Three power rails may be used by AWPG 200: Vddl, providing power to inverters 210 and 212, Vdd2, providing power to current source 218, and Vdd3, providing power to of Vdd- based pulse-width control circuit 208.

[0042] A negative feedback network is established around first inverter 210 using a control resistor (Rctrl) 214, that is connected in series with a feedback resistor (Rfb) 216. First inverter 210, thus, receives negative feedback and operates at the linear range. An lup current source 218 and an Idown current source 220 are connected to the junction between the control resistor 214 and feedback resistor 216. These current sources provide controllable current injection or current sink into the feedback path, allowing adjustment of the switching threshold and, hence, the duty cycle of the pulses generated by the first inverter 210.

[0043] Vdd-based pulse-width control circuit 208 comprises an inverter 222 that is chained to an inverter 224. Inverter 208 receives the output from current-based pulse-width control circuit 206 and provides additional pulse width control through variable supply voltage operation. The combination of current-based and Vdd-based pulse-width controls, applied, respectively by current-based pulse-width control circuit 206 and Vdd-based pulse-width control circuit 208, enable a wide-range control over the width and characteristics of the generated pulses.

[0044] The configuration of AWPG 200 illustrated in Fig. 2 demonstrates the dual control approach where the current control (the setting of lup and Idown) provides initial pulse width adjustment through current sourcing and sinking, while the difference in the supply voltage between the inverter stages enable further duty cycle control.

[0045] The configuration of AWPG 200 illustrated in Fig. 2 and described hereinabove is cited by way of example. Other configurations may be used in alternative embodiments. For example, in some embodiments, more inverter stages with different supply voltages may be used, for further pulse width control. In other embodiments, inverter 224 is not used, and the variable width pulse is output from inverter 222.

[0046] Fig. 3 is a graph that schematically illustrates waveform regions 300 of an AWPG, in accordance with an embodiment of the present invention. The graph depicts signal voltage (Vsig) of the input signal, plotted against time, showing how threshold voltage levels affect the pulse generation characteristics.

[0047] The graph shows a curved waveform that represents the signal voltage as it varies over time. Two threshold voltage levels are indicated by dashed horizontal lines that define critical switching points in the pulse generation process. The upper threshold line, labeled Vth invl, indicates that the threshold voltage of inverter 210 (Fig. 2), is a function of lup and Idown (current sources 218 and 220, respectively). This threshold voltage is controlled by the current sources that are connected to the inverter 210 through the feedback circuit.

[0048] The lower threshold line, labeled Vth_inv3, indicates that the threshold voltage of inverter 222 (Fig. 2), depends on the supply voltage Vdd3 of inverter 222.

[0049] The graph includes annotations that demonstrate the relationship between control parameters and threshold voltages. An annotation indicates an increase in Vth with increased lup, while another shows an increase in Vth with increased Vdd3. These annotations illustrate how the switching thresholds can be adjusted through both current control and supply voltage variations.

[0050] The waveform intersects with the threshold voltage levels at specific time intervals, and the graph indicates the ON time for the PMOS transistor of inverter 222 in the region where the signal crosses these threshold levels. The location of this intersection determines the pulse width characteristics and demonstrates how the dual control mechanism enables precise pulse width modulation in the AWPG.

[0051] Fig. 4 is a graph that schematically illustrates current control effect on the pulse width of the AWPG illustrated in Fig. 2, in accordance with an embodiment of the present invention. Normalized amplitude waveforms 400 display multiple overlapping waveform traces representing the AWPG output and demonstrating how the pulse width characteristics change with varying current parameters.

[0052] The normalized amplitude waveforms 400 show signal behavior over time, spanning over approximately 1.5 input waveform cycles, with normalized amplitude values ranging from 0 to 0.9. The waveforms include two distinct groups of traces that illustrate the effects of adjusting the current sources connected to the output of inverter 210 through the feedback circuit.

[0053] Arrows in the graph indicate the direction of "Increasing lup" and "Increasing Idown" parameters, showing how these current adjustments affect the pulse timing and width. As lup increases, the falling edge of the output signal shifts to the right, while the rising edge shifts to the left, both shifts decreasing the low time of the output pulse. Conversely, as Idown increases, the falling edge of the output signal shifts to the left, while the rising edge shifts to the right, both shifts decreasing the high time of the output pulse.

[0054] The multiple overlapping traces in the normalized amplitude graph clearly demonstrate that by systematically adjusting the lup and Idown current sources, the pulse width can be precisely controlled, thereby achieving variable pulse width generation.

[0055] Fig. 5 is a graph that schematically illustrates normalized amplitude curves 500, in accordance with an embodiment of the present invention. The normalized amplitude curves show how Vdd3 supply voltage variations affect the pulse generation characteristics of AWPG 200 (Fig. 2). A reference curve 502 shows the input signal 202.

[0056] The normalized amplitude curves display multiple overlapping waveform traces that demonstrate signal behavior under different Vdd3 voltage conditions.

[0057] The time axis spans approximately 1.5 input signal cycles, while the normalized amplitude values range from 0 to 0.82. The group of output traces 500 shows how the pulse characteristics change as the supply voltage is varied. An annotation indicating "Increase in VDD3" demonstrates the direction of voltage increase and its corresponding effect on the pulse width - higher Vdd values correspond to narrower pulse widths.

[0058] Normalized amplitude curves 500 illustrate that by adjusting the supply voltage of the inverter stages, control over pulse width can be achieved. In some embodiments, this voltage- based control mechanism works in conjunction with the current-based control to provide comprehensive pulse width modulation capabilities, enabling wide-range adjustment of the generated pulse characteristics across a wide range of operating conditions.

[0059] Fig. 6 is a graphic representation of the AWPG 200 (Fig. 2) pulse duty-cycle as a function of the bias current, in accordance with an embodiment of the present invention. Constant AWPG 200 Vdd voltages assumed, with Vddl=Vdd2=0.65V and Vdd3=0.9V.

[0060] The figure includes two separate graphs that illustrate how duty cycle varies with normalized bias current parameters at different stages of AWPG 200.

[0061] A graph 600 shows the duty cycle behavior at the second inverter stage (inverter 212, Fig. 2) plotted against normalized Ibias. The graph displays duty cycle values ranging from approximately 35 to 70 percent on the y-axis, with normalized Ibias values from 0 to 1 on the x-axis. The dotted arrows indicate the trends for "Increasing lup" and "Increasing Idown" parameters, showing how these current adjustments affect the duty cycle characteristics at this stage.

[0062] A graph 602 shows the duty cycle behavior at the fourth inverter stage (inverter 224, Fig. 2) plotted against normalized Ibias. This graph displays duty cycle values ranging from 0 to approximately 80 percent on the y-axis, with the same normalized Ibias range from 0 to 1 on the x-axis. Similar dotted arrows indicate the "Increasing lup" and "Increasing Idown" trends, demonstrating how the current parameters influence the duty cycle at this second stage. The wider duty cycle range in graph 602 compared to graph 600 illustrates the cumulative effect of the cascaded inverter stages with varying Vdd on pulse width control.

[0063] Fig. 7 is a flowchart 700 that schematically illustrates a method for pulse width control, in accordance with an embodiment of the present invention. The flowchart shows a systematic approach for implementing an AWPG using both current control and supply voltage variation techniques.

[0064] The flowchart begins at a connect-AC -input operation 702, which involves connecting an AC input through a capacitor to the input of a first inverter. This operation establishes the input signal conditioning and DC decoupling necessary for proper circuit operation.

[0065] Next, the flowchart enters a connect-feedback operation 704, wherein a feedback circuit is connected between the input and output of the first inverter, thereby configuring the first inverter to linear-mode operation.

[0066] Now, at a connect-current-source operation 706, a current source is connected to the feedback circuit (e.g., at a point between an Rctrl resistor 214 and an Rfb resistor 216 Fig. 2). In embodiments, the current source may comprise a positive current source configured to inject current at inverter 210 output, and / or a negative current source configured to sink current from the inverter output. In embodiments, the current source may be adjusted to control the duty cycle of the adjustable width pulse generator.

[0067] Lastly, at a connect-variable-Vdd operation 708, the output of the inverter may be connected to a series of one or more inverters, wherein some of the inverters may be connected to a variable-voltage power source, for further pulse width control. This final operation adds the supply voltage-based control capability, enabling comprehensive pulse width adjustments through the combination of current control and voltage variation techniques.

[0068] The configurations, waveforms and methods described hereinabove, with reference to Figs 1 through 7, including all units and subunits thereof, are example configurations, waveforms and methods that are shown purely for the sake of conceptual clarity. Any other suitable methods, waveforms and configurations may be used in alternative embodiments.

[0069] In various embodiments, AWPG 200, including subunits thereof, may be implemented using suitable hardware, such as one or more Application-Specific Integrated Circuits (ASIC) or Field-Programmable Gate Arrays (FPGA), or a combination of ASIC and FPGA.

[0070] Although the embodiments described herein mainly address adjustable pulse generators, the methods and systems described herein can also be used in any other suitable application.

[0071] It will thus be appreciated that the embodiments described above are cited by way of example, and that the present invention is not limited to what has been particularly shown and described hereinabove. Rather, the scope of the present invention includes both combinations and sub-combinations of the various features described hereinabove, as well as variations and modifications thereof which would occur to persons skilled in the art upon reading the foregoing description and which are not disclosed in the prior art. Documents incorporated by reference in the present patent application are to be considered an integral part of the application except that to the extent any terms are defined in these incorporated documents in a manner that conflicts with the definitions made explicitly or implicitly in the present specification, only the definitions in the present specification should be considered.

Claims

CLAIMS1. A pulse generator, to generate a periodic square wave signal in response to a periodic input signal, the pulse generator comprising: a first inverter, configured to invert the periodic input signal, thereby generating a periodic wave; a negative-feedback circuit, configured to couple an output of the first inverter to an input of the first inverter, thereby setting the first inverter in a linear mode; an adjustable current source, which is coupled to the negative-feedback circuit and is configured to load the first inverter, thereby modifying a duty cycle of the periodic wave produced by the first inverter; and a second inverter, configured to invert the output of the first inverter, thereby generating the periodic square wave.

2. The pulse generator according to claim 1, wherein the adjustable current source is configured to inject into the negative-feedback circuit, or to sink from the negative-feedback circuit, an amount of electrical current that determines the duty cycle.

3. The pulse generator according to claim 1 or 2, wherein the negative-feedback circuit comprises two serially connected resistors.

4. The pulse generator according to claim 1 or 2, wherein the adjustable current source comprises a positive current source and a negative current source.

5. The pulse generator according to claim 1 or 2, further comprising a variable supply rail inverter, which is coupled to the first inverter and is configured to further control the duty cycle.

6. A method for generating a periodic square wave signal in response to a periodic input signal, the method comprising: inverting the periodic input signal using a first inverter, thereby generating a periodic wave; using a negative-feedback circuit, coupling an output of the first inverter to an input of the first inverter, thereby setting the first inverter in a linear mode; loading the first inverter using an adjustable current source coupled to the negativefeedback circuit, thereby modifying a duty cycle of the periodic wave produced by the first inverter; andinverting the output of the first inverter by a second inverter, thereby generating the periodic square wave.

7. The method according to claim 6, wherein loading the first inverter using the adjustable current source comprises injecting into the negative-feedback circuit, or sinking from the negative-feedback circuit, an amount of electrical current that determines the duty cycle.

8. The method according to claim 6 or 7, wherein the negative-feedback circuit comprises two serially connected resistors.

9. The method according to claim 6 or 7, wherein the adjustable current source comprises a positive current source and a negative current source.

10. The method according to claim 6 or 7, and comprising further controlling the duty cycle by a variable supply rail inverter coupled to the first inverter.

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