Solid-State Devices TRIZ Cases

Passive components define unique electrical signatures on light source circuit boards, eliminating manual tracking errors during manufacturing.

Dual-damascene segmentation isolates leg portions to minimize bit line coupling while maintaining electrical connectivity.

An etched seed layer creates a thickness gradient on substrate feature sidewalls to prevent premature opening closure during filling.

Graded refractive index layers in a semiconductor light-emitting device reduce heat generation by lowering operating current requirements.

In-plane current flow applies spin-orbit torque to write data, avoiding non-magnetic layer damage from vertical currents.

Refractive index differences in a scattering layer redirect trapped evanescent light, bypassing mechanical etching that damages electrode layers.

A hybrid barrier layer deposited via chemical vapor deposition combines polymeric and non-polymeric materials to protect organic electronic devices.

Segmenting luminescent layers with specific hosts reduces energy loss in organic EL elements, enabling balanced white-light emission at low voltage.

Segmented auxiliary electrode structure enables direct cathode contact in organic light emitting displays.

Segmenting the back gate reduces parasitic capacitance while maintaining threshold voltage control in scaled CMOS devices.

Segmented insulating sub-layers with silicon nitride improve adhesion force at slope positions, reducing wire breakage during etching.

Side edge touch electrodes replace physical hardware buttons with capacitive sensing, reducing device volume and component count.

A photonic waveguide structure directs photons to alter semiconductor device characteristics and carrier density.

High hardness resin prevents light degradation while integrated design improves light extraction efficiency.

Segmented light source substrates with controlled pitch ratios reduce moiré effects while maintaining brightness uniformity in the display apparatus.

A substrate for organic electronic elements uses a scattering layer to reduce surface resistance and improve light extraction efficiency.

Displacing semiconductive material into a pre-deformed compressible substrate creates insulative features without etching or additional processing steps.

An embedded bonding pad nests inside passivation layers to reduce step height, enabling precise color filter and micro-lens formation on image sensors.

A semiconductor structure uses interlaced conductive and dielectric layers with vertical memory structures separated by isolation trenches.

Segmenting channel structures with isolation walls resolves alignment precision issues while increasing bit density in 3D-NAND memory devices.

A hybrid poly(amide-imide) copolymer composition incorporates polyhedral oligomeric silsesquioxane nanoparticles to enhance mechanical strength and transparency.

A non-planar scattering layer composed of aromatic derivatives scatters incident light within an OLED device.

High reflectivity cavity materials and optimized depth ratios enable thinner LED packages that maintain brightness while reducing energy consumption.

Curving the sensor substrate creates a recessed portion that compensates for gap variations, preventing light axis shifts and field curvature aberration.

A trench MOSFET with a top side drain formed in a wide termination area.

A bearing device uses a light reflection compensating block to equalize reflectivity ratios across the lifting passage.

Segmenting the common electrode into two parts reduces drive voltage and increases light transmission in IPS displays.

A patterned doped layer integrates contact electrodes and gate structures to enhance electrical conductivity in semiconductor devices.

Integrating a Schottky-gated HEMT between source and gate electrodes limits short circuit current without increasing on-state resistance or device area.

Epitaxial germanium layer controls p-type atom diffusion to match emitter depths and reduce 1/f noise.

Segmenting the protective coating resolves light blockage while maintaining waterproofness.

Segmenting the p-type layer at the bank lower end prevents side leakage current, enabling precise subpixel control and accurate color display.

A dual-link wiring structure places first and second link wirings on separate layers to minimize bezel width in display devices.

Offsetting the liquid-philic layer prevents organic semiconductor ink from blending between adjacent apertures, maintaining transistor performance.

Placing an insulating layer on light emitting elements before separating cell areas prevents static electricity damage and improves light emission efficiency.

Recessed GaN HEMTs isolate from silicon MOSFETs, resolving fabrication complexity while maintaining electrical integrity.

Adjusting connector pitch values reduces routing area expansion in the non-display region while maintaining signal line reliability.

Varying buried string heights and lengths in a 3D memory device increases data storage capacity per unit area while maintaining compactness.

A conductive adhesive layer joins substrate and light-emitting diodes using low-melting-point metals.

Forming the pixel electrode first through insulating layer holes prevents copper electrode oxidation during transparent conductive film patterning.

Concave substrate features trap gas bubbles in the non-display region via surface tension, preventing image warping from refractive-index mismatches.

Reflective structures around micro light emitting chips redirect lateral emission into forward flux, resolving absorption losses between adjacent devices.

A static random access memory unit uses a trench capacitor in the substrate to reduce area occupation.

A semiconductor memory pillar uses a fluorine concentration gradient in its charge storage layer to optimize trap characteristics.

A microminiature power converter uses a solenoid coil extending through a ferrite substrate to increase inductance.