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FPGA configuration file updating method and device

A configuration file and file technology, applied in the direction of program control device, program loading/starting, etc., can solve the problems of low reliability, laborious, time-consuming FPGA configuration file update, etc., and achieve the effect of reducing labor intensity and saving update time

Inactive Publication Date: 2017-01-04
TBEA SUNOASIS +2
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] Aiming at the above-mentioned deficiencies in the prior art, the present invention provides a method and device for updating FPGA

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  • FPGA configuration file updating method and device
  • FPGA configuration file updating method and device
  • FPGA configuration file updating method and device

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Embodiment Construction

[0032] The technical solutions in the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the present invention. Apparently, the described embodiments are part of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0033] see figure 1 , is a schematic diagram of the network architecture of the present invention. As shown in the figure, the network architecture includes: a main controller 10 and a plurality of power units 20, and the main controller 10 is a main controller of flexible direct current transmission. Such as figure 1 As shown, there are n power units, including power unit 1, power unit 2, . . . , power unit n. The main controller 10 communicates with each power unit 20 through an optica...

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Abstract

The invention provides an FPGA configuration file updating method and device. A nonvolatile memory of a power unit is divided into two loading areas; one loading area stores an FPGA ex-factory configuration file, and the other loading area stores a currently running FPGA configuration file of an FPGA chip; and when a version number of a to-be-updated FPGA configuration file sent by a main controller is different from that of the currently running FPGA configuration file, the to-be-updated FPGA configuration file is stored in the second loading area of the nonvolatile memory. Each power unit can automatically update the FPGA configuration file, so that the labor intensity of workers is reduced, the FPGA configuration file updating time is shortened, more time and labor are saved, and more time can be reserved for subsequent device debugging.

Description

technical field [0001] The invention relates to the technical field of high-power electric electronic flexible direct current transmission, in particular to a method and device for updating an FPGA configuration file. Background technique [0002] With the continuous development of high-power power electronics technology, flexible DC transmission equipment based on high-power power electronics has been widely used. As the voltage level of flexible direct current transmission equipment is getting higher and higher, the number of power units in a set of flexible direct current transmission equipment is also increasing. [0003] There is an FPGA (Field-Programmable Gate Array) chip on the control board of each power unit, and the FLASH (FlashEEPROM Memory, flash memory) of the power unit has only one partition, and the FLASH is initially written into the factory program. When the FPGA configuration file of the power unit needs to be updated on site, workers usually need to cli...

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Application Information

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IPC IPC(8): G06F9/445
Inventor 秦健刘伟增黎小林许树楷陈名
Owner TBEA SUNOASIS