Bad block detection method, device, equipment and storage medium based on coulomb meter

Abstract

The present invention discloses a bad block detection method, device and storage medium based on a coulomb counter, the method comprising: in the process of detecting a non-volatile memory, recording the electric energy consumed by each operation through the coulomb counter chip; judging whether the electric energy consumed by each operation is within a preset range; marking blocks whose electric energy consumed by one or more operations is not within the preset range as bad blocks. Thus, by recording the electric energy consumed by each operation through the coulomb counter chip, marking bad blocks with abnormal electric energy as bad blocks, the bad blocks of the non-volatile memory can be accurately discovered early, avoiding operations on risky areas, and greatly improving the service life of the non-volatile memory.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor memory technology, and in particular to a bad block detection method, device, equipment and storage medium based on a coulomb counter. Background Art

[0002] With the development of informatization, people have higher and higher requirements for data storage devices. Nand flash (non-volatile memory) is a widely used memory with fast read and write speed, high capacity and low cost. Due to the inherent structure and manufacturing technology of Nand flash, this Nand flash will produce some bad blocks during the production and use process, which will affect the storage of data. If the bad blocks are not identified before storage, it is easy to cause data storage abnormalities. Currently, bad blocks are generally detected by scanning, but the scanning method is difficult to identify bad blocks that are hidden deeper, and the accuracy of bad block identification is not high enough. There may be undetected bad blocks in Nand flash. Summary of the invention

[0003] The present invention provides a bad block detection method, device, equipment, apparatus and storage medium based on a coulomb counter, aiming to improve the accuracy of bad block identification and increase the service life of a non-volatile memory.

[0004] To achieve the above object, the present invention provides a coulomb counter chip connected to the pin of the non-volatile memory, and the method comprises:

[0005] In the process of testing the non-volatile memory, the electric energy consumed by each operation is recorded by the coulomb counter chip;

[0006] Determine whether the power consumed by each operation is within the preset range;

[0007] A block whose power consumption by one or more operations is not within a preset range is marked as a bad block.

[0008] Optionally, in the process of detecting the non-volatile memory, the step of recording the electric energy consumed by each operation by the coulomb counter chip includes:

[0009] During the erasing operation, the coulomb counter chip records the erasing power consumed by each block on the non-volatile memory;

[0010] During a write operation, the coulomb counter chip records the write power consumed by each block on the non-volatile memory;

[0011] During a read operation, the coulomb counter chip records the read power consumed by each block on the nonvolatile memory.

[0012] Optionally, before the step of determining whether the power consumed by each operation is within a preset range, the step further includes:

[0013] The power consumption statistical curve of each operation is determined based on the verification experiment, wherein the power consumption statistical curve of each operation satisfies the normal distribution law.

[0014] Optionally, the step of determining the power consumption statistical curve of each operation based on the verification experiment includes:

[0015] Testing a large number of standard non-volatile memories, and recording the test power consumed by each operation through the coulomb counter chip;

[0016] The test electric energy consumed by each operation is counted respectively to obtain an erase electric energy consumption statistical curve, a write electric energy consumption statistical curve and a read electric energy consumption statistical curve.

[0017] Optionally, before the step of determining whether the power consumed by each operation is within a preset range, the step further includes:

[0018] The preset range corresponding to each operation is determined based on the 2σ criterion.

[0019] Optionally, the step of determining whether the power consumed by each operation is within a preset range includes:

[0020] Determine whether the erasing power is within a preset erasing power range in the erasing power consumption statistical curve; and / or

[0021] Determine whether the write power is within a preset write power range in the write power consumption statistical curve; and / or

[0022] It is determined whether the read power is within a preset read power range in the read power consumption statistical curve.

[0023] Optionally, after the step of marking a block whose power consumed by one or more operations is not within a preset range as a bad block, the step further includes:

[0024] comparing the power consumed by the bad blocks whose power consumption is not within the preset range with the benchmark power consumption;

[0025] Based on the difference between the reference power consumption and the consumed power, a damage level of the corresponding bad block is determined, so as to determine a management method of the corresponding bad block based on the damage level.

[0026] In addition, to achieve the above-mentioned purpose, the present invention also provides a bad block detection device based on a coulomb counter, comprising:

[0027] A recording module, used for recording the electric energy consumed by each operation through the coulomb counter chip during the detection of the non-volatile memory;

[0028] A judgment module, used to judge whether the power consumed by each operation is within a preset range;

[0029] The marking module is used to mark a block whose power consumption by one or more operations is not within a preset range as a bad block.

[0030] In addition, to achieve the above-mentioned purpose, the present invention also provides a bad block detection device based on a coulomb counter, comprising a memory, a processor, and a bad block detection program based on a coulomb counter stored in the memory, wherein the bad block detection program based on a coulomb counter is executed by the processor to implement the steps of the method described above:

[0031] In addition, to achieve the above purpose, the present invention also provides a computer-readable storage medium, wherein a bad block detection program based on a coulomb counter is stored on the computer-readable storage medium, and the bad block detection program based on a coulomb counter is executed by a processor to implement the steps of the method described above.

[0032] Compared with the prior art, the present invention proposes a bad block detection method, device, equipment and storage medium based on a coulomb counter. In the process of detecting a non-volatile memory, the coulomb counter chip records the power consumed by each operation; determines whether the power consumed by each operation is within a preset range; and marks blocks whose power consumed by one or more operations is not within the preset range as bad blocks. Thus, by recording the power consumed by each operation through the coulomb counter chip and marking bad blocks with abnormal power as bad blocks, the bad blocks of the non-volatile memory can be accurately discovered early, and operations in risky areas can be avoided, which can greatly improve the service life of the non-volatile memory. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figure 1 Schematic diagram of the hardware structure of the device involved in each embodiment of the present invention

[0034] Figure 2 It is a flow chart of a first embodiment of a bad block detection method based on a coulomb counter of the present invention;

[0035] Figure 3 It is a schematic structural diagram of a Nand flash involved in a first embodiment of a bad block detection method based on a coulomb counter of the present invention;

[0036] Figure 4 It is a schematic diagram of a statistical curve of power consumption involved in the first embodiment of the bad block detection method based on a coulomb counter of the present invention.

[0037] Figure 5It is a functional module diagram of the first embodiment of the bad block detection device based on coulomb counter of the present invention.

[0038] The realization of the purpose, functional features and advantages of the present invention will be further explained in conjunction with embodiments and with reference to the accompanying drawings. DETAILED DESCRIPTION

[0039] It should be understood that the specific embodiments described herein are only used to explain the present invention, and are not used to limit the present invention.

[0040] The bad block detection device based on a coulomb counter mainly involved in the embodiments of the present invention refers to a network connection device capable of achieving network connection. The bad block detection device based on a coulomb counter may be a server, a cloud platform, etc.

[0041] Reference Figure 1 , Figure 1 1 is a schematic diagram of the hardware structure of the bad block detection device based on the coulomb counter involved in each embodiment of the present invention. In the embodiment of the present invention, the bad block detection device based on the coulomb counter may include a processor 1001 (such as a central processing unit, CPU), a communication bus 1002, an input port 1003, an output port 1004, and a memory 1005. Among them, the communication bus 1002 is used to realize the connection and communication between these components; the input port 1003 is used for data input; the output port 1004 is used for data output, and the memory 1005 can be a high-speed RAM memory or a stable memory (non-volatile memory), such as a disk memory. The memory 1005 can optionally be a storage device independent of the aforementioned processor 1001. Those skilled in the art can understand that Figure 1 The hardware structure shown in the figure does not constitute a limitation of the present invention, and may include more or less components than those shown in the figure, or combine certain components, or arrange the components differently.

[0042] Continue to refer to Figure 1 , Figure 1 The memory 1005 as a readable storage medium may include an operating system, a network communication module, an application module, and a bad block detection program based on a coulomb counter. Figure 1 In the example, the network communication module is mainly used to connect to the server and perform data communication with the server; and the processor 1001 is used to call the bad block detection program based on the coulomb counter stored in the memory 1005 and perform the following operations:

[0043] In the process of testing the non-volatile memory, the electric energy consumed by each operation is recorded by the coulomb counter chip;

[0044] Determine whether the power consumed by each operation is within the preset range;

[0045] A block whose power consumption by one or more operations is not within a preset range is marked as a bad block.

[0046] The non-volatile memory involved in this embodiment mainly refers to Nand flash memory. Nand flash memory is a kind of flash memory, which adopts nonlinear macro unit mode inside, and provides a cheap and effective solution for the realization of solid-state large-capacity memory. Nand flash memory has the advantages of large capacity and fast rewriting speed, and is suitable for storing large amounts of data. Therefore, it has been more and more widely used in the industry, such as embedded products including digital cameras, MP3 player memory cards, and compact USB flash drives.

[0047] Based on the above-mentioned bad block detection device based on coulomb counter, the first embodiment of the bad block detection method based on coulomb counter is proposed. Figure 2 , Figure 2 It is a flow chart of the first embodiment of the bad block detection method based on coulomb counter of the present invention.

[0048] like Figure 1 As shown, the first embodiment of the present invention proposes a bad block detection method based on a coulomb counter, the method is applied to a bad block detection device based on a coulomb counter, and the method includes:

[0049] Step S101, in the process of detecting the non-volatile memory, the power consumed by each operation is recorded by the coulomb counter chip;

[0050] Some bad blocks of non-volatile memory are generated during the manufacturing process, resulting in pre-production bad blocks (factory masked bad blocks, initial bad / invalid blocks). Therefore, they need to be tested before leaving the factory. Before leaving the factory, the non-volatile memory to be tested is placed in the testing equipment to trigger the bad block detection command. Some bad blocks are generated during use, resulting in use bad blocks (worn-out bad blocks). In order to ensure the normal use of non-volatile memory, bad block detection is also required during maintenance of non-volatile memory. In this case, the bad block detection command is generally triggered by a technician or by an automatic detection program stored in the non-volatile memory.

[0051] refer to Figure 3 , Figure 3 FIG. 1 is a schematic diagram of the structure of a Nand flash involved in the first embodiment of the bad block detection method based on a coulomb counter of the present invention. Figure 3As shown in the figure, a memory size of 2112Mbits (i.e. 256MB = 2Gb) has 2048 blocks, each block has 64 pages, and a total of 128K pages. Since some blocks are damaged before leaving the factory, it is necessary to perform bad block detection before leaving the factory and mark the bad blocks to ensure the normal use of Nand flash memory.

[0052] It should be noted that a coulomb meter chip is connected to the pins of the non-volatile memory involved in this embodiment. Nand flash has multiple pins, and its pin functions include command latch, address latch, chip enable, read enable, write enable, write protection, ready / busy output signal, power supply, ground, disconnected, data transmission, etc. In addition, other chips can be externally connected to the pins to achieve complex functions. In this embodiment, a coulomb meter chip is physically connected to the pins of the Nand flash. A coulomb meter is a device used to measure the amount of electricity, which is the same as the device of an electrolytic cell. When in use, the current intensity is kept constant, and the power-on time and the mass of the precipitate are measured to calculate the current intensity, and then the consumed electrical energy can be obtained. Coulomb counter chips can monitor the power consumption of electrical equipment in real time. They have the characteristics of high accuracy, fast response speed, and little impact on the tested circuit. For example, a coulomb counter chip produced by a certain company has a resolution of 15 bits, and the external current sensing sampling resistor only needs a resistance of 10 milliohms. The impact on the Nand flash power supply is only at the millivolt level. The normal current consumption of Nand flash is below 0.1A, so the coulomb counter chip can be used to monitor the power consumed by each operation without affecting the normal operation of Nand flash.

[0053] Based on the structure of Nand flash, the entire space of Nand flash, including each block and page, is erased, written, and read once. Nand flash is erased in blocks, written / programmed in pages, and read in pages.

[0054] After the coulomb counter chip is connected, during the process of detecting the non-volatile memory, the electric energy consumed by each operation is recorded by the coulomb counter chip.

[0055] Specifically, during the erasing operation, the coulomb counter chip records the erasing power consumed by each block on the non-volatile memory;

[0056] Nand flash memory is defined as a triple-well structure, usually each plane has its own triple-well. The source end is shared by all blocks: in this way, the matrix is ​​more compact and the structure can be more diverse, and the bias to the iP-well is greatly reduced. This electronic erasure is performed by biasing the iP-well with a high voltage and keeping the word line grounded.

[0057] The erasing of Nand flash memory must be done by aligning the address in 1KB units and specifying which block to erase, or erasing all blocks. That is to say, block is the smallest unit of erasing Nand flash memory.

[0058] The steps to perform a 1KB page erase are as follows:

[0059] Writing the page address into the FMC (Flexible Memory Controller) of the Nand flash memory;

[0060] Write the Nand flash write key into the FMC register and set the ERASE bit to be erased;

[0061] The FMC register is queried until the ERASE bit is cleared, indicating that the erase operation is completed. In this embodiment, the erase power is recorded as We.

[0062] During a write operation, the coulomb counter chip records the write power consumed by each block on the non-volatile memory;

[0063] Generally, the write operation is performed through NAND Flash Program. The function of NAND Flash Program is to program the page for write operation. The command code is generally: first write 00h (A area) / 01h (B area) / 05h (C area), indicating which area to write; then write 80h to start programming mode (write mode), then write address and data; finally write 10h to indicate the end of programming.

[0064] The write operation of NAND Flash is performed by using the quantum effect of electron tunneling, which occurs due to a strong electric field. In particular, writing and erasing rely on the polarity of the electric field. During the writing process, the number of electrons that pass through the oxide layer is a function of the electric field: in fact, the greater the electric field, the more electrons pass through the oxide layer. Therefore, in order to improve the writing ability, an available high electric field (corresponding to high voltage) is essential. The main advantage of this writing method is that the current of each storage unit can be very low. Therefore, the writing process generates electrical energy, which is recorded as Ww;

[0065] During a read operation, the coulomb counter chip records the read power consumed by each block on the nonvolatile memory.

[0066] When reading data from a memory cell, a gate voltage Vread (0V) is applied to the gate terminal, while the gate terminal of the memory cell that is not being read is biased to Vpass.r (usually 4-5v), so that it can pass through the transistor regardless of the threshold voltage. In fact, an erased Flash memory cell has a Vth value lower than 0V, while a written memory cell generally has a positive Vth value, and this value is generally lower than 4V. When 0V is used to bias the gate terminal of a selected memory cell, all the memory cells connected in series will conduct current, and only the addressed memory cell will be erased. Therefore, the erase operation will generate electrical energy, and the read electrical energy is recorded as Wr.

[0067] Nand flash memory reads data in units of pages. When reading data, first write the read data command 00H, then enter the address of the page to be read, then read the data from the data register, and finally perform ECC check. Parameter description: block, block number; page, page number; buffer, points to the starting position to be read in the memory; return value 1, read success, return value 0: read failure.

[0068] After recording the electric energy of each operation, the coulomb counter chip sends each electric energy to the bad block detection device of the non-volatile memory, so that the bad block detection device of the non-volatile memory can perform the next operation based on the electric energy of each operation.

[0069] Step S102, determining whether the power consumed by each operation is within a preset range.

[0070] In this embodiment, in order to provide a relatively accurate and objective comparison range for the power consumed by each operation, a statistical curve of power consumption for each operation is determined based on a verification experiment, wherein the statistical curve of power consumption for each operation satisfies the normal distribution law.

[0071] Specifically, a large number of standard non-volatile memories are tested, and the test power consumed by each operation is recorded by the coulomb counter chip; the test power consumed by each operation is counted respectively to obtain an erase power consumption statistical curve, a write power consumption statistical curve, and a read power consumption statistical curve.

[0072] The pins of the standard non-volatile memory are pre-connected with the coulomb counter chip, and the coulomb counter chip is used to record the test power consumed by each operation. After obtaining a large amount of test power consumed by each operation, the various powers are classified into erase power consumption, write power consumption and read power consumption. Since a large number of standard non-volatile memories have been tested, and each standard non-volatile memory is produced by the same process, theoretically, the power consumption of each corresponding operation is concentrated in a range. It can be understood that a specific power consumption value of multiple standard non-volatile memories will be the same. For example, there may be 90 standard non-volatile memories whose erase power consumption is We1.

[0073] Based on this, the power consumption of each step is used as the horizontal coordinate, and the number of operations corresponding to the power consumption is used as the vertical coordinate for statistics to obtain the corresponding consumption statistics curve. That is, the erase power consumption is used as the horizontal coordinate, and the number of erase power consumption is used as the vertical coordinate. After the statistics are completed, the erase consumption statistics curve is obtained; the write power consumption is used as the horizontal coordinate, and the number of write power consumption is used as the vertical coordinate. After the statistics are completed, the write consumption statistics curve is obtained; the read power consumption is used as the horizontal coordinate, and the number of read power consumption is used as the vertical coordinate. After the statistics are completed, the read consumption statistics curve is obtained.

[0074] In this embodiment, the obtained erase consumption statistical curve, write consumption statistical curve and read consumption statistical curve all meet the normal distribution law. Figure 4 , Figure 4 The figure is a schematic diagram of the power consumption statistical curve involved in the first embodiment of the bad block detection method based on the coulomb counter of the present invention. The consumption statistical curves of each operation are obtained, and it can be seen that 68.26% of the power consumption is within the range of 1σ, 95% of the power consumption is within the range of 2σ, and 99% of the power consumption is within the range of 3σ.

[0075] In this embodiment, based on experience and the accuracy requirements of the non-volatile memory, the preset range corresponding to each operation is determined based on the 2σ criterion, that is, ±2σ corresponding to each operation is used as the preset range that meets the requirements: blocks with power consumption within the 2σ range are identified as good blocks, and blocks with power consumption outside the 2σ range are identified as bad blocks.

[0076] In this embodiment, it is necessary to determine each electric energy in each operation separately. Specifically,

[0077] Determine whether the erasing power is within a preset erasing power range in the erasing power consumption statistical curve; and / or

[0078] Determine whether the write power is within a preset write power range in the write power consumption statistical curve; and / or

[0079] It is determined whether the read power is within a preset read power range in the read power consumption statistical curve.

[0080] It can be understood that in actual operation, the electric energy consumed by each operation can be compared with the corresponding consumption statistical curve in a preset order. When it is determined that the electric energy consumed by an operation is not within the preset range, the comparison operation of the block is stopped; or if the electric energy consumed by the three operations are indeed within the preset range, the comparison operation of the block is stopped.

[0081] Step S103: Mark the blocks whose power consumption by one or more operations is not within a preset range as bad blocks.

[0082] When a bad block is determined, the address information of the bad block is recorded and stored so as to execute a corresponding storage strategy for the bad block. The storage strategy includes mapping good blocks in a reserved area, skipping bad blocks, and the like.

[0083] Furthermore, after the bad blocks are determined, the power consumed by the bad blocks whose power consumption is not within the preset range can be compared with the reference power consumption; in this embodiment, the reference power consumption can be the power consumption corresponding to the highest point corresponding to the consumption statistics curve. The reference power consumption is generally the average power consumption of the corresponding operation.

[0084] Based on the difference between the reference power consumption and the consumed power, the damage level of the corresponding bad block is determined, so as to determine the management method of the corresponding bad block based on the damage level. It can be understood that the larger the difference, the larger the deviation, that is, the most serious damage to the bad block, and vice versa, the smaller the difference, the smaller the deviation, that is, the least damage to the bad block. How to consume power abnormally is due to internal leakage, and it will soon transition to a short circuit breakdown state; if the internal damage is close to the open circuit state, with the occurrence of electronic migration, it will soon develop into an open circuit state, and the storage function of this area will completely fail; generally, the consequences of the open circuit state area are relatively minor, only the function itself is damaged and can no longer be used to store data, but it will not affect other areas; if a short circuit or a short circuit breakdown area is encountered, it is not only the loss of storage function, but also the continued operation of the area, resulting in a large current and a large amount of heat will also burn the adjacent area, and with the burning of the adjacent area, it will further expand the damaged area in a chain reaction method. Therefore, bad blocks with different damage states need to be managed in a hierarchical manner. For example, for a bad block that is slightly damaged, the corresponding non-volatile memory can continue to be used; for a bad block that is severely damaged, the corresponding non-volatile memory may need to be scrapped.

[0085] Through the above scheme, in the process of detecting the non-volatile memory, the coulomb counter chip records the power consumed by each operation; determines whether the power consumed by each operation is within a preset range; and marks the blocks whose power consumed by one or more operations is not within the preset range as bad blocks. Thus, by recording the power consumed by each operation through the coulomb counter chip and marking the bad blocks with abnormal power as bad blocks, the bad blocks of the non-volatile memory can be accurately discovered early, and the operation of the risk area can be avoided, which can greatly improve the service life of the non-volatile memory.

[0086] Furthermore, to achieve the above-mentioned purpose, the present invention also provides a bad block detection device based on a coulomb counter, specifically, see 5, Figure 5 1 is a functional module diagram of a first embodiment of a bad block detection device based on a coulomb counter according to the present invention, wherein the device comprises:

[0087] A recording module 10, used for recording the electric energy consumed by each operation through the coulomb counter chip during the detection of the non-volatile memory;

[0088] The judging module 20 is used to judge whether the power consumed by each operation is within a preset range;

[0089] The marking module 30 is used to mark the blocks whose power consumption of one or more operations is not within the preset range as bad blocks.

[0090] Furthermore, the recording module includes:

[0091] A first recording unit, used to record the erase power consumed by each block on the non-volatile memory through the coulomb counter chip during the erase operation;

[0092] a second recording unit, used to record the write power consumed by each block on the non-volatile memory through the coulomb counter chip during a write operation;

[0093] The third recording unit is used to record the read power consumed by each block on the non-volatile memory through the coulomb counter chip during the read operation.

[0094] Furthermore, the recording module also includes:

[0095] The verification unit is used to determine the power consumption statistical curve of each operation based on the verification experiment, wherein the power consumption statistical curve of each operation satisfies the normal distribution law.

[0096] Furthermore, the verification unit includes:

[0097] A detection subunit, used to detect a large number of standard non-volatile memories, and record the test power consumed by each operation through the coulomb counter chip;

[0098] The statistical subunit is used to respectively count the test electric energy consumed by each operation, and obtain an erase electric energy consumption statistical curve, a write electric energy consumption statistical curve, and a read electric energy consumption statistical curve.

[0099] Furthermore, the judging module includes:

[0100] The preset range corresponding to each operation is determined based on the 2σ criterion.

[0101] Furthermore, the judging module includes:

[0102] A first judging unit is used to judge whether the erasing power is within a preset erasing power range in the erasing power consumption statistical curve; and / or

[0103] A second judgment unit is used to judge whether the writing power is within a preset writing power range in the writing power consumption statistical curve; and / or

[0104] The third judgment unit is used to judge whether the read power is within a preset read power range in the read power consumption statistical curve.

[0105] Furthermore, the marking module includes:

[0106] A comparing unit, used for comparing the power consumed by the bad blocks whose power consumption is not within the preset range with the reference power consumption;

[0107] The determination unit is used to determine the damage level of the corresponding bad block based on the difference between the reference power consumption and the consumed power, so as to determine the management method of the corresponding bad block based on the damage level.

[0108] In addition, the present invention also proposes a computer-readable storage medium, on which a bad block detection program based on a coulomb counter is stored. When the bad block detection program based on a coulomb counter is executed by a processor, the steps of the bad block detection method based on a coulomb counter as described above are implemented, which will not be repeated here.

[0109] Compared with the prior art, the present invention discloses a bad block detection method, device, equipment and storage medium based on a coulomb counter, the method comprising: in the process of detecting a non-volatile memory, recording the power consumed by each operation through the coulomb counter chip; judging whether the power consumed by each operation is within a preset range; marking blocks whose power consumed by one or more operations is not within the preset range as bad blocks. Thus, by recording the power consumed by each operation through the coulomb counter chip, marking bad blocks with abnormal power as bad blocks, the bad blocks of the non-volatile memory can be accurately discovered early, avoiding operations on risky areas, and greatly improving the service life of the non-volatile memory.

[0110] The above description is only a preferred embodiment of the present invention, and does not limit the patent scope of the present invention. Any equivalent structure or process transformation made by using the contents of the present invention specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present invention.

Claims

1. A bad block detection method based on a coulomb counter, characterized in that: The method is applied to a bad block detection device of a non-volatile memory, wherein a coulomb counter chip is connected to the pins of the non-volatile memory, and the method comprises: In the process of testing the non-volatile memory, the electric energy consumed by each operation is recorded by the coulomb counter chip; Determine whether the power consumed by each operation is within the preset range; Marking blocks whose power consumption for one or more operations is not within a preset range as bad blocks; The step of recording the electric energy consumed by each operation by the coulomb counter chip during the detection of the non-volatile memory comprises: During the erasing operation, the coulomb counter chip records the erasing power consumed by each block on the non-volatile memory; During a write operation, the coulomb counter chip records the write power consumed by each block on the non-volatile memory; During a read operation, the coulomb counter chip records the read power consumed by each block on the nonvolatile memory.

2. The method according to claim 1, characterized in that: Before the step of determining whether the power consumed by each operation is within a preset range, the following step is further included: The power consumption statistical curve of each operation is determined based on the verification experiment, wherein the power consumption statistical curve of each operation satisfies the normal distribution law.

3. The method according to claim 2, characterized in that: The step of determining the statistical curve of power consumption of each operation based on the verification experiment includes: Testing a large number of standard non-volatile memories, and recording the test power consumed by each operation through the coulomb counter chip; The test electric energy consumed by each operation is counted respectively to obtain an erase electric energy consumption statistical curve, a write electric energy consumption statistical curve and a read electric energy consumption statistical curve.

4. The method according to claim 2, characterized in that: Before the step of determining whether the power consumed by each operation is within a preset range, the following step is further included: The preset range corresponding to each operation is determined based on the 2σ criterion.

5. The method according to claim 2, characterized in that: The step of determining whether the power consumed by each operation is within a preset range includes: Determine whether the erasing power is within a preset erasing power range in the erasing power consumption statistical curve; and / or Determine whether the write power is within a preset write power range in the write power consumption statistical curve; and / or It is determined whether the read power is within a preset read power range in the read power consumption statistical curve.

6. The method according to any one of claims 1 to 5, characterized in that After the step of marking the block whose power consumption by one or more operations is not within the preset range as a bad block, the following step further comprises: comparing the power consumed by the bad blocks whose power consumption is not within the preset range with the benchmark power consumption; Based on the difference between the reference power consumption and the consumed power, a damage level of the corresponding bad block is determined, so as to determine a management method of the corresponding bad block based on the damage level.

7. A bad block detection device based on a coulomb counter, characterized in that: include: A recording module, used for recording the electric energy consumed by each operation through a coulomb counter chip during the detection of the non-volatile memory; A judgment module, used to judge whether the power consumed by each operation is within a preset range; A marking module, used to mark a block whose power consumption by one or more operations is not within a preset range as a bad block; The step of recording the electric energy consumed by each operation by the coulomb counter chip during the detection of the non-volatile memory comprises: During the erasing operation, the coulomb counter chip records the erasing power consumed by each block on the non-volatile memory; During a write operation, the coulomb counter chip records the write power consumed by each block on the non-volatile memory; In a read operation, the coulomb counter chip records the read power consumed by each block on the non-volatile memory; The pins of the non-volatile memory are connected with a coulomb counter chip.

8. A bad block detection device based on a coulomb counter, characterized in that: The invention comprises a memory, a processor and a bad block detection program based on a coulomb counter stored in the memory, wherein the bad block detection program based on a coulomb counter is executed by the processor to implement the steps of the method according to any one of claims 1 to 6.

9. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a bad block detection program based on a coulomb counter, and the bad block detection program based on a coulomb counter is executed by a processor to implement the steps of the method according to any one of claims 1 to 6.

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