Fan-out electronic package and fan-out chip packaging method

Abstract

A fan-out electronic package and packaging method thereof include a wire redistribution unit, an isolation structure, at least one functional chip, a mask, a first pattern structure, a sealing structure, and a second pattern structure. The isolation structure is disposed within the wire redistribution unit, the functional chip is disposed within the isolation structure, the mask is disposed within the isolation structure and covers the functional chip, the first pattern structure is formed within the isolation structure, the sealing structure cooperates with the wire redistribution unit to encapsulate the isolation structure, the at least one functional chip, the mask, and the first pattern structure, and the second pattern structure is formed within the sealing structure and, together with the first pattern structure, forms an antenna. The isolation structure and mask provide shielding, while the application of the first pattern structure simplifies the manufacturing process. The wire redistribution unit serves as an electrical connection interface with external circuits, achieving circuit packaging and fan-out integrated layout.

Description

Technical Field

[0001] The present invention relates to a semiconductor packaging structure and method, and in particular to a fan-out electronic package with reduced process complexity, and a packaging method for a fan-out chip. Background Art

[0002] With the technological evolution of fifth-generation mobile communications, the development trend of related communications electronic products is primarily focused on the operational performance of circuits performing signal processing. Furthermore, considering that the required communication frequency bands are 28GHz and 60GHz, which are significantly different from existing communication bands, the related circuit chip design architecture will become more complex. Furthermore, considering the requirements for integration and extension with antennas and other electronic circuit architectures, the overall circuit design complexity in the semiconductor packaging process will also increase.

[0003] Furthermore, because fifth-generation mobile communications process millimeter-wave signals, they are more susceptible to interference from environmental noise and electromagnetic radiation. The current practice is to package the entire circuit and then install shielding elements outside the package. However, this approach makes it difficult to meet the miniaturization requirements after integration with other circuits and also makes the manufacturing process more complicated. Therefore, the development of related circuit packaging process technology is currently one of the hot research topics in fifth-generation mobile communications. Summary of the Invention

[0004] An object of the present invention is to provide a fan-out electronic package.

[0005] The fan-out electronic package described in the present invention includes a wire redistribution unit, an isolation structure, at least one functional chip, a mask, a first pattern structure, a sealing structure and a second pattern structure. The wire redistribution unit is used for external electrical connection, the isolation structure is arranged on the wire redistribution unit, the at least one functional chip is electrically connected to the wire redistribution unit, the mask is arranged on the isolation structure and covers the functional chip together with the wire redistribution unit, the first pattern structure is selected from a conductive material and formed on the isolation structure, the sealing structure cooperates with the wire redistribution unit to cover the isolation structure, the at least one functional chip, the mask and the first pattern structure, the second pattern structure is selected from a conductive material and formed on the sealing structure, and together with the first pattern structure forms an antenna.

[0006] In the fan-out electronic package of the present invention, the wire redistribution unit includes a unit body and a redistribution line located in the unit body and used for electrically connecting to the functional chip and the outside.

[0007] The fan-out electronic package described in the present invention, wherein the isolation structure is made of a photosensitive insulating material, includes a structural body formed upward from the unit body and covering the functional chip, and a plurality of through holes penetrating the structural body to expose part of the structure of the redistribution circuit.

[0008] In the fan-out electronic package described in the present invention, the mask is made of a conductive material, including a ring wall surrounding the functional chip and a cover attached to the top surface of the isolation structure, and the ring wall is arranged on the structural body of the isolation structure, and the cover is connected to the top edge of the ring wall.

[0009] In the fan-out electronic package described in the present invention, the first pattern structure includes an antenna pattern formed on the top surface of the structural body of the isolation structure and coupled with the second pattern structure to form an antenna, and a filling pattern extending from the end of the antenna pattern into the through hole and connected to the partial structure of the redistribution line.

[0010] The fan-out electronic package described in the present invention comprises a sealing structure including a base layer covering the isolation structure, the mask, and the first pattern structure, and a surface layer formed from the base layer in the opposite direction to the wire redistribution unit, wherein the second pattern structure is formed on the base layer and covered by the surface layer.

[0011] Another object of the present invention is to provide a packaging method for a fan-out chip.

[0012] The packaging method of the fan-out chip of the present invention comprises:

[0013] (a) disposing at least one functional chip on a wire redistribution unit, and electrically connecting the at least one functional chip to a redistribution circuit of the wire redistribution unit;

[0014] (b) after disposing a photosensitive insulating material covering the surface of the at least one functional chip on the wire redistribution unit, removing specific areas of the photosensitive insulating material to form an isolation structure, wherein the isolation structure includes a structural body in which the at least one functional chip is embedded, an annular hole formed in the structural body surrounding the at least one functional chip, and a plurality of through holes penetrating the structural body to expose a portion of the redistribution circuit structure;

[0015] (c) selecting a conductive material to form a conductive pattern structure on the isolation structure, wherein the conductive pattern structure includes a ring wall formed by filling the annular hole to surround the at least one functional chip, a cover abutting the top surface of the isolation structure and connected to the top edge of the ring wall, an antenna pattern formed on the top surface of the structural body of the isolation structure, and a filling pattern extending from an end of the antenna pattern into the through hole and connected to a portion of the redistribution circuit structure;

[0016] (d) selecting a polymer material to form a base layer covering the conductive pattern structure from the isolation structure;

[0017] (e) selecting a conductive material to form a second pattern structure on the base layer that can be coupled with the antenna pattern to form an antenna; and

[0018] (f) Selecting a polymer material to form a surface layer covering the second pattern structure from the base layer.

[0019] In the fan-out chip packaging method of the present invention, the thickness of the base layer is related to the antenna operating frequency.

[0020] In the packaging method of the fan-out chip described in the present invention, in the step (a), the wire redistribution unit also includes a unit body arranged on a carrier board and for setting the redistribution circuit, and the redistribution circuit is selected from dielectric materials, metal materials and the combination of the foregoing, and is electrically connected to the at least one functional chip in a flip-chip manner.

[0021] In the fan-out chip packaging method of the present invention, in step (b), the photosensitive insulating material is a photosensitive sealing material.

[0022] In the fan-out chip packaging method described in the present invention, in step (d), the polymer material forming the base layer is selected from epoxy resin molding compound, ABF and the combination thereof, and the base layer is formed by film pasting or molding.

[0023] In the fan-out chip packaging method described in the present invention, in step (f), the polymer material forming the surface layer is selected from epoxy resin molding compound, ABF and the combination thereof, and the base layer is formed by at least one of lamination, coating and printing.

[0024] The beneficial effects of the present invention are: an isolation structure is set in coordination with the functional chip electrically connected to the wire redistribution unit, and then a corresponding mask is set to provide a shielding effect for at least one functional chip, and at the same time, a first pattern structure with a conductive material that can be electrically connected to the functional chip is applied to simplify the process, and is coupled with the second pattern structure formed in the sealing structure to serve as an antenna that can transmit signals. At the same time, the wire redistribution unit is used as an electrical connection interface to integrate the functional chip with the external circuit, so as to achieve the purpose of circuit packaging and fan-out (Fan-out) integrated layout. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 is a flow chart illustrating an embodiment of a fan-out chip packaging method of the present invention;

[0026] Figure 2is a cross-sectional view illustrating a fan-out electronic package manufactured using an embodiment of the fan-out chip packaging method of the present invention;

[0027] Figure 3-1 It is a flow chart, which helps Figure 1 An embodiment of the fan-out chip packaging method of the present invention is described;

[0028] Figure 3-2 It is a flow chart, which helps Figure 1 An embodiment of the fan-out chip packaging method of the present invention is described; and

[0029] Figure 4 It is a top view to assist in explaining this embodiment. DETAILED DESCRIPTION

[0030] The present invention will be described in detail below with reference to the accompanying drawings and embodiments.

[0031] See Figure 1 、 Figure 2 An embodiment of the fan-out chip packaging method of the present invention is used to make Figure 2 The fan-out electronic package shown.

[0032] See first Figure 2 The fan-out electronic package fabricated using the fan-out chip packaging method according to an embodiment of the present invention includes a conductor redistribution unit 2, an isolation structure 3, at least one functional chip 4, a mask 5, a first pattern structure 6, a sealing structure 7, and a second pattern structure 8. It should be noted that the functional chip 4 shown in the diagram of this embodiment is illustrated as a single one, but this is not limiting. In other embodiments, multiple functional chips 4 may be included.

[0033] The wire redistribution unit 2 is used for external electrical connection and includes a unit body 21 and a redistribution line 22 provided on the unit body 21 and used for electrically connecting to the functional chip 4 and the external circuit. The unit body 21 and the redistribution line 22 form a redistribution line layer (RDL). layer), and the material constituting the unit body 21 is a dielectric material, such as polyimide (PI: POLYIMIDE), and the material constituting the redistribution circuit 22 is a conductive material, which is partially arranged on the unit body 21 and electrically connected to the functional chip 4 from one side, and connected to multiple solder balls on the other side, so as to serve as an interface for electrically connecting the functional chip 4 with the external circuit, thereby achieving the function of circuit fan-out layout (Fan-out) integration. It should be further explained that the redistribution circuit 22 is composed of a flip-chip bonding pad 221 protruding from the surface of the unit body 21 and connected to the functional chip 4, and a redistribution unit 222 embedded in the unit body 21 and connected to the flip-chip bonding pad 221. The flip-chip bonding pad 221 can be formed by, for example, photolithography, deposition and electroplating, and is also pre-formed and used for subsequent flip-chip (flip In addition, due to process characteristics, the flip chip bonding pad 221 can also be applied simultaneously with the first pattern structure 6, and the redistribution unit 222 is made of metal conductive material.

[0034] The isolation structure 3 is arranged in the wire redistribution unit 2, including a structural body 31 formed upward from the unit body 21, and a plurality of through holes 32 passing through the structural body 31. The functional chip 4 is arranged in the structural body 31, and the through hole 32 is used for providing a filling pattern 62 for the first pattern structure 6. This part of the technical content will be described in detail later.

[0035] The functional chip 4 is electrically connected to the wire redistribution unit 2 .

[0036] The shield 5 is disposed on the isolation structure 3 and together with the wire redistribution unit 2 covers the functional chip 4. The shield 5 is made of a conductive material and includes a ring wall 51 surrounding the functional chip 4 and a cover 52 abutting the top surface of the isolation structure 3. The ring wall 51 is embedded in the structural body 31 of the isolation structure 3, and the cover 52 is connected to the top edge of the ring wall 51. It should be noted that since the functional chip 4 can be used for millimeter wave signal processing in fifth-generation mobile communications, the fan-out electronic package as a whole must take into account functional requirements such as anti-noise interference and other electromagnetic radiation. Therefore, the coordinated arrangement of the ring wall 51 and the cover 52 can completely cover the functional chip 4, thereby providing the functional chip 4 with anti-noise interference and shielding against external electromagnetic waves.

[0037] The first pattern structure 6 is selected from conductive materials and formed on the isolation structure 3, including an antenna pattern 61 formed on the top surface of the structural body 31, and a filling pattern 62 extending from one end of the antenna pattern 61 into the through hole 32. The antenna pattern 61 is coupled with the second pattern structure 8 to form an antenna. The filling pattern 62 is formed in the through hole 32 so that the antenna pattern 61 is electrically connected to the redistribution line 22. In more detail, the first pattern structure 6 is formed by a series of wet processes such as photolithography, electroplating, and etching. Therefore, the filling pattern 62 is formed in the through hole 32 into a conformal shape structure. In this way, the traditional method of forming a solid copper column in the through hole for conducting circuits located in different layers can be avoided, which has the problem of high cost and difficult process control. In addition, in terms of the manufacturing process, since the mask 5 is set on the functional chip 4 and provides a shielding effect thereon, and then subsequent related processes such as sealing are carried out, it not only reduces the overall volume of the package, but also increases the design space of the first pattern structure 6, thereby allowing the first pattern structure 6 to be designed more flexibly according to actual needs, or improving the circuit complexity of the first pattern structure 6.

[0038] The sealing structure 7 cooperates with the wire redistribution unit 2 to cover the isolation structure 3, the functional chip 4, the mask 5 and the first pattern structure 6. The sealing structure 7 includes a base layer 71 and a surface layer 72. The base layer 71 covers the isolation structure 3, the mask 5 and the first pattern structure 6. The surface layer 72 extends upward from the base layer 71 in the opposite direction of the wire redistribution unit 2. The second pattern structure 8 is formed on the base layer 71 and is covered by the surface layer 72 to prevent scratches. In addition, the surface layer 72 can be formed of black material to facilitate character recognition after the marking process.

[0039] The second pattern structure 8 is selected from a conductive material and formed on the sealing structure 7, and together with the first pattern structure 6 forms an antenna. Similar to the above description, since the functional chip 4 is shielded by the mask 5 before the sealing structure 7 is formed, the design space of the second pattern structure 8 can be increased. Therefore, when coupled with the first pattern structure 6 to form an antenna, it is easier to meet the overall circuit operating bandwidth requirements.

[0040] The above-mentioned fan-out electronic package is configured such that the functional chip 4 is arranged in the wire redistribution unit 2 having the circuit fan-out layout function, and then the isolation structure 3 is formed to bury the functional chip 4 and on which the first pattern structure 6 can be arranged. Then, according to the position of the functional chip 4, the mask 5 is arranged on the isolation structure 3 to provide a shielding function for the functional chip 4, and at the same time, the first pattern structure 6 electrically connected to the exposed part of the wire redistribution unit 2 is formed through the isolation structure 3. Finally, the second pattern structure 8 arranged above the sealing structure 7 cooperates with the first pattern structure 6 as an antenna. When the functional chip 4 is turned on for operation, the first pattern structure 6 and the second pattern structure 8 form an antenna that can transmit signals, thereby enabling the fan-out electronic package to perform communication functions and operate together with external circuits.

[0041] See Figure 1 、 Figure 3-1 、 Figure 3-2 When the fan-out electronic package is manufactured by the embodiment of the fan-out chip packaging method of the present invention, step 11, step 12, step 13, step 14, step 15 and step 16 are performed in sequence.

[0042] The step 11 is to set the functional chip 4 on the wire redistribution unit 2 and electrically connect the functional chip 4 to the redistribution line 22 of the wire redistribution unit 2. In detail, the step 11 is to first prepare a carrier board 102 with a release layer 101 (Release Layer), and then form the unit body 21 and the redistribution line 22 of the wire redistribution unit 2 on the carrier board 102, wherein the wire redistribution unit 2 is composed of the unit body 21 (which is a dielectric material) and the redistribution line 22 (which is a conductive material), and finally the redistribution line 22 is flip-chip connected to the functional chip 4. In addition, the gap between the functional chip 4 and the redistribution line 22 can be filled with a bottom filling material (underfill) to stabilize the functional chip 4 on the wire redistribution unit 2.

[0043] For reference Figure 4 In step 12, a photosensitive insulating material 3' is provided on the wire redistribution unit 2 to cover the surface of the functional chip 4, and then a specific block structure of the photosensitive insulating material is removed to form the isolation structure 3, wherein the photosensitive insulating material can be a photosensitive encapsulator, and part of the block is removed and formed by yellow light lithography to form the isolation structure 3. Specifically, the isolation structure 3 is formed by photolithography and includes a structural body 31 for embedding the functional chip 4 therein, a plurality of through holes 32 that penetrate the structural body 31 to expose part of the redistribution line 22, and an annular hole 33 in the form of an annular groove surrounding the functional chip 4 and formed on the structural body 31.

[0044] The step 13 is to select a conductive material to form a conductive pattern structure 9 on the isolation structure 3. Specifically, the conductive pattern structure 9 includes the ring wall 51, the cover 52, the antenna pattern 61, and the filling pattern 62. The ring wall 51 is filled in the annular hole 33 and surrounds the functional chip 4. As mentioned above, the cover 52 is attached to the top surface of the isolation structure 3 and is connected to the top edge of the ring wall 51, and the ring wall 51 and the cover 52 together form the mask 5. The antenna pattern 61 is formed on the top surface of the structural body 31 of the isolation structure 3. The filling pattern 62 extends from one end of the antenna pattern 61 into the through hole 32 and is connected to part of the structure of the redistribution line 22, so that the antenna pattern 61 and the filling pattern 62 together form the first pattern structure 6. It should be noted that step 13 can use at least one of electroplating, printing, etc. to set the conductive pattern structure 9 on the isolation structure 3, thereby simultaneously forming the mask 5 and the first pattern structure 6. In this way, the process steps can be reduced and the production cost can be greatly reduced.

[0045] Step 14 involves selecting a polymer material to form a base layer 71 from the isolation structure 3, covering the mask 5 and the first pattern structure 6. Specifically, the polymer material used to form the base layer 71 must have insulating properties, such as an epoxy molding compound or ABF (Ajinomoto Build-up Film), which is a dry film type insulator. The base layer 71 can be formed by at least one of lamination and molding. It should be noted that the thickness of the base layer 71 can be designed based on the relevant physical parameters of the first pattern structure 6 and the second pattern structure 8 to optimize the antenna operating frequency of the final fan-out electronic package.

[0046] Step 15 involves selecting a conductive material and employing at least one of electroplating and copper paste printing methods to form a second pattern structure 8 on the base layer 71, which couples with the first pattern structure 6 to form an antenna. Since the second pattern structure 8 is formed directly on the base layer 71 and no other components are present, the shape and size of the second pattern structure 8 can be easily planned and adjusted within the plane of the base layer 71 according to the actual operating specifications of the fan-out electronic package, thereby ensuring that the antenna's operating bandwidth is more in line with actual product requirements.

[0047] Step 16 is to select a polymer material to form a surface layer 72 covering the second pattern structure 8 from the base layer 71. Specifically, the polymer material used to form the surface layer 72 is selected from epoxy resin molding compound or ABF (Ajinomoto Build-up Film), which is a dry film type insulator, and is formed by at least one of lamination, coating, and printing. It is used to cooperate with the base layer 71 to form the sealing structure 7 to provide protection for the second pattern structure 8 as a whole, and the peeling layer 101 and the carrier 102 are removed. In addition, the polymer material used to form the surface layer 72 can also be selected from, for example, black material to facilitate character recognition after the marking process.

[0048] In summary, the fan-out chip packaging method of the present invention is first to electrically connect the functional chip 4 to the wire redistribution unit 2, and then to cover the functional chip 4 with the isolation structure 3 to form the wire redistribution unit 2, and then to form a through hole 32 of the isolation structure 3, and a first pattern structure 6 electrically connected to the functional chip 4 through the through hole 32, and then to form a base layer 71 with a specific thickness, and to form a second pattern structure 8 coupled to the first pattern structure 6 to form an antenna on the base layer 71, and to form the surface layer 72 on the base layer 71, and finally to remove the peeling layer 101 and the carrier 102, and to perform cutting, appearance molding and other procedures to obtain a fan-out chip package with complete circuit functions that can be further integrated with other circuits.

[0049] To summarize, the present invention mainly proposes a new overall structure of a fan-out electronic package and a related packaging method. The overall structure of the fan-out electronic package is designed based on the millimeter-wave signal processing requirements for fifth-generation mobile communications, and various process steps are actually considered to be introduced into the design of the overall structure of the fan-out electronic package. This is used to design and produce fan-out electronic packages that can be based on the actual antenna operating bandwidth requirements of the product, thereby truly achieving the purpose of the present invention.

Claims

1. A fan-out electronic package, characterized in that: The fan-out electronic package includes a wire redistribution unit, an isolation structure, at least one functional chip, a mask, a first pattern structure, a sealing structure and a second pattern structure. The wire redistribution unit is used for external electrical connection. The isolation structure is arranged on the wire redistribution unit, including a structural body covering the functional chip, and a plurality of through holes penetrating the structural body. The at least one functional chip is electrically connected to the wire redistribution unit. The mask is arranged on the isolation structure and covers the functional chip together with the wire redistribution unit. The first pattern structure is selected from a conductive material and formed on the isolation structure, including an antenna pattern formed on the top surface of the structural body, and a filling pattern extending from one end of the antenna pattern into the through hole so that the antenna pattern is electrically connected to the redistribution line of the wire redistribution unit. The filling pattern forms a conformal shape structure when formed on the through hole. The sealing structure cooperates with the wire redistribution unit to cover the isolation structure, the at least one functional chip, the mask and the first pattern structure. The second pattern structure is selected from a conductive material and formed on the sealing structure, and together with the first pattern structure forms an antenna.

2. The fan-out electronic package according to claim 1, wherein: The wire redistribution unit includes a unit body and the redistribution line, and the redistribution line is located in the unit body and is used for electrically connecting with the functional chip and the outside.

3. The fan-out electronic package according to claim 2, wherein: The isolation structure is made of a photosensitive insulating material.

4. The fan-out electronic package according to claim 3, wherein: The mask is made of a conductive material and includes a ring wall surrounding the functional chip and a cover attached to the top surface of the isolation structure. The ring wall is arranged on the structural body of the isolation structure, and the cover is connected to the top edge of the ring wall.

5. The fan-out electronic package according to claim 1, wherein: The sealing structure includes a base layer covering the isolation structure, the mask and the first pattern structure, and a surface layer formed from the base layer in the opposite direction to the wire redistribution unit, and the second pattern structure is formed on the base layer and covered by the surface layer.

6. A method for packaging a fan-out chip, characterized in that: (a) disposing at least one functional chip on a wire redistribution unit, and electrically connecting the at least one functional chip to a redistribution circuit of the wire redistribution unit; (b) after disposing a photosensitive insulating material covering the surface of the at least one functional chip on the wire redistribution unit, removing specific areas of the photosensitive insulating material to form an isolation structure, wherein the isolation structure includes a structural body in which the at least one functional chip is embedded, an annular hole formed in the structural body surrounding the at least one functional chip, and a plurality of through holes penetrating the structural body to expose a portion of the redistribution circuit structure; (c) selecting a conductive material to form a conductive pattern structure on the isolation structure, wherein the conductive pattern structure includes a ring wall formed by filling the annular hole to surround the at least one functional chip, a cover abutting the top surface of the isolation structure and connected to the top edge of the ring wall, an antenna pattern formed on the top surface of the structural body of the isolation structure, and a filling pattern extending from an end of the antenna pattern into the through hole and connected to a portion of the redistribution circuit structure, wherein the filling pattern forms a conformal structure when formed in the through hole; (d) selecting a polymer material to form a base layer covering the conductive pattern structure from the isolation structure; (e) selecting a conductive material to form a second pattern structure on the base layer that can be coupled with the antenna pattern to form an antenna; and (f) Selecting a polymer material to form a surface layer covering the second pattern structure from the base layer.

7. The fan-out chip packaging method according to claim 6, wherein: The thickness of the base layer is related to the operating frequency of the antenna.

8. The fan-out chip packaging method according to claim 6, wherein: In step (a), the wire redistribution unit further comprises a unit body disposed on a carrier board and for disposing the redistribution circuit. The redistribution circuit is selected from dielectric materials, metal materials and combinations thereof, and is electrically connected to the at least one functional chip in a flip-chip manner.

9. The fan-out chip packaging method according to claim 6, wherein: In the step (b), the photosensitive insulating material is a photosensitive sealing material.

10. The fan-out chip packaging method according to claim 6, wherein: In the step (d), the polymer material forming the base layer is selected from epoxy resin molding compound, ABF and a combination thereof, and the base layer is formed by film lamination or molding.

11. The fan-out chip packaging method according to claim 6, wherein: In the step (f), the polymer material forming the surface layer is selected from epoxy resin molding compound, ABF and a combination thereof, and the base layer is formed by at least one of lamination, coating and printing.

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