Low-power temperature sensor for MEMS clocks

Abstract

The present invention discloses a low-power temperature sensor for MEMS clocks, which uses bipolar transistors and MOS tubes as temperature sensing elements and converts the temperature-related analog voltage output by the temperature front-end circuit into a digital output through a Sigma-Delta ADC. D OUT The temperature front-end circuit is designed based on the subthreshold temperature characteristics of MOSFET, avoiding the use of resistor components and effectively reducing the static power consumption of the circuit. In addition, the TDC uses a dynamic bias comparator and a complementary structure T-type switch to further improve energy efficiency. This sensor is used in the MEMS clock temperature compensation module, providing it with high-precision and high-resolution temperature information. The structure is optimized for the power consumption of the temperature sensor, and its small size and low power consumption make it suitable for MEMS clock applications.

Description

Technical Field

[0001] The present invention relates to the technical field of MEMS clocks and temperature sensors, and more particularly to a low-power temperature sensor for use in MEMS clocks. More particularly, it relates to a hybrid low-power temperature sensor circuit based on bipolar transistors and subthreshold MOSFETs. Background Art

[0002] Frequency references, the "heart" of electronic systems, are widely used in wireless communications and wearable devices. MEMS (Micro-electro-mechanical Systems) oscillators have become a key development direction for frequency references due to their advantages in quality, short-term and long-term stability, and extended frequency range.

[0003] However, the temperature stability of MEMS oscillators is poor, which limits the stability of their output reference frequency. In order for the MEMS oscillator to provide a stable reference frequency within the desired temperature range, a high-resolution and high-conversion-rate temperature sensor is required to measure the on-chip temperature.

[0004] FBAR oscillators have many advantages over quartz crystal oscillators, but their temperature stability is not as good as that of quartz crystals. Therefore, to achieve high temperature stability, a temperature sensor must be introduced for temperature compensation. Summary of the Invention

[0005] In view of the defects and shortcomings of the existing technology, the present invention proposes a low-power temperature sensor for MEMS clocks, which improves the temperature measurement accuracy and resolution while meeting the requirements of low power consumption and small size, and is suitable for MEMS clock applications.

[0006] The present invention provides a precision CMOS temperature-to-digital converter (TDC) for MEMS clock temperature compensation and its implementation scheme. The circuit uses bipolar transistors and MOS tubes as temperature sensing elements, and converts the temperature-related analog voltage output by the temperature front-end circuit into a digital output D through a Sigma-Delta ADC. OUT The temperature front-end circuit is designed based on the subthreshold temperature characteristics of MOSFET, which avoids the use of resistor components and effectively reduces the static power consumption of the circuit. BE Negative temperature coefficient voltage is a positive temperature coefficient (PTAT) voltage with the same temperature coefficient but opposite polarity. In ADC, the positive temperature coefficient voltage V PTAT With negative temperature coefficient voltage V BEThe sampling capacitor directly uses unit sampling capacitors, effectively reducing chip area. Furthermore, the TDC utilizes a dynamic bias comparator and a complementary T-type switch to further improve energy efficiency. The temperature sensor circuit consists of three modules: a temperature front-end circuit, a 15-bit second-order Sigma-Delta ADC, and a timing generation circuit. This sensor is used in MEMS clock temperature compensation modules, providing high-precision, high-resolution temperature information. The structure is optimized for power consumption, and its small size and low power consumption make it suitable for MEMS clock applications.

[0007] To achieve the above object, the present invention specifically adopts the following technical solutions:

[0008] A low-power temperature sensor for MEMS clocks, comprising: a temperature front-end circuit, a 15-bit second-order Sigma-Delta ADC, and a timing generation circuit;

[0009] The temperature front-end circuit is used to provide analog voltage quantities that are positively correlated and negatively correlated with temperature respectively;

[0010] The 15-bit second-order Sigma-Delta ADC is used to process the temperature-related voltage signal generated by the temperature front-end circuit and output a pulse width modulation signal containing temperature information;

[0011] The timing generation circuit provides a non-overlapping clock for controlling a sampling and holding circuit in a Sigma-Delta ADC.

[0012] Furthermore, the temperature front-end circuit includes: a startup circuit, a nanoampere subthreshold current bias circuit, a CTAT voltage generating circuit and a PTAT voltage generating circuit;

[0013] The startup circuit is used to eliminate the situation where the current in each branch is zero, and ensure that the circuit can quickly enter a normal working state after power is turned on.

[0014] The subthreshold current bias circuit is used to provide a precise bias current to the CTAT voltage generating circuit and the PTAT voltage generating circuit, and the output is a current positively correlated with the temperature;

[0015] The CTAT voltage generating circuit is used to generate a voltage V that is negatively correlated with temperature. BE ;

[0016] The PTAT voltage generating circuit is used to provide a voltage that is positively correlated with temperature.

[0017] Furthermore, the subthreshold current bias circuit utilizes the MOS tube working in the subthreshold region to generate a bias current that is positively correlated with temperature, and provides a bias current for the bipolar transistor and the PTAT voltage to generate a current, so as to reduce V BE Temperature nonlinearity.

[0018] Furthermore, the CTAT voltage generating circuit utilizes the temperature characteristics of the diode-connected bipolar transistor to generate a voltage V that is negatively correlated with temperature. BE .

[0019] Furthermore, the PTAT voltage generating circuit utilizes the current characteristics of the MOS tube operating in the subthreshold region to generate a voltage that is positively correlated with temperature;

[0020] And through the parallel connection of multiple differential PTAT voltage generating circuits, a voltage with the same voltage as V is obtained. BE The positive temperature-related voltage is offset by the negative temperature characteristic of the ADC to avoid the use of capacitors to amplify the positive temperature coefficient voltage in the ADC.

[0021] Furthermore, the buffer stage circuit utilizes two operational amplifiers connected as a unity gain buffer stage, so that the output impedance of the temperature front-end circuit is low, thereby enhancing its load driving capability.

[0022] Specifically, the PTAT voltage generation circuit in the temperature front-end circuit uses the subthreshold characteristics of the MOSFET to generate a positive temperature coefficient voltage to effectively reduce system power consumption. According to the subthreshold current expression, the gate-source voltage of the MOSFET in the subthreshold operating state can be obtained as:

[0023]

[0024] Where V TH is the threshold voltage, η is the subthreshold slope factor, V T is the thermal voltage, and K is the width-to-length ratio of the MOS tube.

[0025] The above formula can be used to obtain the gate-source voltage difference of the input pair in the differential pair structure:

[0026]

[0027] where K D1 , K D2 is the width-to-length ratio of the differential pair, K M1 , K M2 is the current mirror width-to-length ratio. By setting:

[0028]

[0029] A positive temperature coefficient voltage can be obtained, and its temperature coefficient can be adjusted by controlling the width-to-length ratio.

[0030] By cascading the single-stage differential structure, the temperature coefficient and V BE Positive temperature coefficient voltages of equal magnitude and opposite polarity.

[0031] Furthermore, the 15-bit second-order Sigma-Delta ADC includes: a voltage multiplexer, a sample-and-hold circuit, a two-stage integrator, and a dynamic bias comparator, and converts the analog voltage with temperature information into a digital output through the charge balance principle.

[0032] Furthermore, the switches in the sample-and-hold circuit all use complementary T-type switches for sampling and integration to reduce leakage current.

[0033] Furthermore, the dynamic bias comparator utilizes dynamic bias technology to improve the energy utilization efficiency of the dynamic comparator.

[0034] Specifically, the temperature sensor uses a second-order Sigma-Delta ADC to achieve the conversion from the voltage domain to the digital domain by charge balancing, and converts the analog voltage V output by the temperature front end containing temperature information into BE and V REF Convert to digital output.

[0035] The front-end circuit output is the reference voltage V REF With negative temperature voltage V BE , which is converted into V by the voltage multiplexer BE With V PTAT , which can be combined to produce an exact function proportional to temperature:

[0036]

[0037] In this ratio, the V generated by the temperature front-end circuit PTAT With V BE Temperature coefficients of the same magnitude and opposite polarity no longer need to be scaled, so both are sampled using a unit sampling capacitor.

[0038] Since V PTAT is proportional to the absolute temperature, and the reference voltage V PTAT It is independent of temperature, so the ratio μ will be a linear function proportional to the absolute temperature, and this ratio can be linearly scaled to obtain the Celsius temperature reading D OUT :

[0039] D OUT =A·μ+B (5)

[0040] The coefficients A and B are both constants. According to V BETemperature characteristics are calculated. When T=0K, V PTAT =0, μ=0, and T=600K, V PTAT =V REF ≈1.2V, μ=1, from which the coefficient A≈600 can be deduced. Through the conversion relationship between thermodynamic temperature and Celsius temperature, it can be obtained that B≈-273.

[0041] Compared with the prior art, the present invention and its preferred solution use bipolar transistors and MOS tubes as temperature sensing elements, and convert the temperature-related analog voltage output by the temperature front-end circuit into a digital output D through Sigma-Delta ADC. OUT The temperature front-end circuit is designed based on the subthreshold temperature characteristics of MOSFET, which avoids the use of resistor components and effectively reduces the static power consumption of the circuit. BE Negative temperature coefficient voltage is a positive temperature coefficient (PTAT) voltage with the same temperature coefficient but opposite polarity. In ADC, the positive temperature coefficient voltage V PTAT With negative temperature coefficient voltage V BE The sampling capacitor directly uses unit sampling capacitors, effectively reducing chip area. Furthermore, the TDC utilizes a dynamic bias comparator and a complementary T-type switch to further improve energy efficiency. The temperature sensor circuit consists of three modules: a temperature front-end circuit, a 15-bit second-order Sigma-Delta ADC, and a timing generation circuit. This sensor is used in MEMS clock temperature compensation modules, providing high-precision, high-resolution temperature information. The structure is optimized for power consumption, and its small size and low power consumption make it suitable for MEMS clock applications. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] Figure 1 1 is an overall structural diagram of the temperature front-end circuit according to an embodiment of the present invention.

[0043] Figure 2 This is a circuit diagram of a differential structure PTAT voltage generation circuit according to an embodiment of the present invention.

[0044] Figure 3 1 is a circuit diagram of a PTAT voltage generation circuit according to an embodiment of the present invention.

[0045] Figure 4 This is a subthreshold current bias circuit diagram of an embodiment of the present invention.

[0046] Figure 5 This is the overall circuit diagram of the second-order Sigma-Delta ADC according to an embodiment of the present invention.

[0047] Figure 6 Schematic diagram of a dynamic bias comparator according to an embodiment of the present invention.

[0048] Figure 7 It is a schematic diagram of the overall circuit and working principle of an embodiment of the present invention. DETAILED DESCRIPTION

[0049] To make the features and advantages of this patent more clearly understood, the following embodiments are specifically described in detail as follows:

[0050] It should be noted that the following detailed description is illustrative and is intended to provide further explanation of the present application. Unless otherwise specified, all technical and scientific terms used in this specification have the same meaning as commonly understood by those skilled in the art to which this application belongs.

[0051] like Figure 7 As shown, the temperature sensor circuit provided in this embodiment is divided into three modules: temperature front-end circuit, 15-bit second-order Sigma-Delta ADC, and timing generation circuit. Specifically,

[0052] like Figure 1 The figure shows the overall circuit of the temperature front end circuit, which generates a negative temperature coefficient voltage V through the bipolar transistor diode connection. BE , the positive temperature coefficient is obtained by connecting multiple PTAT voltage generating circuits in parallel with V BE Positive temperature coefficient voltages with the same temperature coefficient and opposite polarity are superimposed to obtain a reference voltage V REF The output voltage of the temperature front end is V BE With V REF , output to the ADC through the buffer stage.

[0053] The PTAT voltage generating circuit of the single-stage differential structure is as follows: Figure 2 As shown, by controlling the current mirror size and the input pair tube size, the voltage V GG The temperature coefficient is adjusted, and to reduce the mismatch, the current mirror adopts a common source and common gate structure.

[0054] Figure 3 This is the overall PTAT voltage generation circuit. In order to generate V BE For voltages with the same temperature coefficient and opposite polarity, the PTAT voltage generation circuit uses a multi-stage quasi-differential structure cascade to reduce chip area. Through the cascade form, the PTAT voltage temperature coefficient increases exponentially:

[0055]

[0056] Figure 4 It is a subthreshold current bias circuit, which mainly includes a current source circuit, a PTAT voltage generation circuit and a bias voltage circuit. R Except for M, the rest work in the subthreshold region.B and M R The gate length and gate width of the M are the same and they are biased at the same current. B Add a voltage to the gate-supply voltage to increase M R The gate-source voltage difference forces the MOS resistor to operate in the strong inversion region and deep triode region. The current flowing through the MOS resistor is defined by the following formula:

[0057] I R =μC ox K(V GS,MR -V TH )V DS,MR (7)

[0058] I B =μC ox K(V GS,MB -V TH ) 2 (8)

[0059] Flowing through transistor M B Current and M R The current is equal, by adjusting M R The required positive temperature coefficient current can be obtained by combining the size and PTAT voltage generator. B and M R The sizes of the subthreshold current bias circuits are the same and their threshold voltages are similar, so the current generated by the subthreshold current bias circuit is robust to process variations.

[0060] Figure 5 The following is a block diagram of a second-order, single-loop Sigma-Delta ADC. This circuit, consisting of a voltage multiplexer, a sample-and-hold circuit, a two-stage switched-capacitor integrator, and a dynamically biased comparator, converts the analog voltage output by the temperature front-end circuit into a digital output. Because the PTAT voltage temperature coefficient directly obtained by the front-end circuit has the same magnitude as the VBE temperature coefficient but opposite polarity, the ADC module can use unit sampling capacitors.

[0061] Figure 6 It is a dynamic bias comparator structure. As a preferred embodiment, the circuit is composed of a prevention stage, a comparison stage and a latch stage, wherein the prevention stage adopts dynamic bias technology to improve energy efficiency. This technology is achieved by adding a tail transistor M in the pre-amplifier part. b2 With the tail capacitor C TALL , preventing the integration capacitor C X In the dynamic bias preamplifier, due to the tail capacitor C TAIL, the source potential of M1 and M2 rises, reducing the overdrive voltage of the input pair and increasing the g of the input pair m / I D , thereby reducing the effects of noise and offset.

[0062] It is worth noting that in this embodiment, the integrator, comparator, and sampling switch can be replaced by different structures under the premise of low power consumption.

[0063] The above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention in any other manner. Any person skilled in the art may utilize the above-disclosed technical content to modify or modify the present invention into equivalent embodiments. However, any simple modifications, equivalent variations, and modifications to the above embodiments that do not depart from the technical content of the present invention and are based on the technical essence of the present invention remain within the scope of protection of the present invention.

[0064] This patent is not limited to the above-mentioned optimal implementation mode. Anyone can derive various other forms of low-power temperature sensors for MEMS clocks based on the inspiration of this patent. All equivalent changes and modifications made within the scope of the patent application of this invention shall be covered by this patent.

Claims

1. A low-power temperature sensor for a MEMS clock, characterized in that: include: Temperature front-end circuit, 15-bit second-order Sigma-Delta ADC and timing generation circuit; The temperature front-end circuit is used to provide analog voltage quantities that are positively correlated and negatively correlated with temperature respectively; The 15-bit second-order Sigma-Delta ADC is used to process the temperature-related voltage signal generated by the temperature front-end circuit and output a pulse width modulation signal containing temperature information; The timing generation circuit provides a non-overlapping clock for controlling the sample-and-hold circuit in the Sigma-Delta ADC; The temperature front-end circuit includes: a startup circuit, a subthreshold current bias circuit, a CTAT voltage generating circuit and a PTAT voltage generating circuit; The starting circuit is used to eliminate the situation where the current in each branch is zero; The subthreshold current bias circuit is used to provide a precise bias current to the CTAT voltage generating circuit and the PTAT voltage generating circuit, and the output is a current positively correlated with temperature; The CTAT voltage generating circuit is used to generate a voltage that is negatively correlated with temperature. V BE ; The PTAT voltage generating circuit is used to provide a voltage that is positively correlated with temperature; The subthreshold current bias circuit uses the MOS tube working in the subthreshold region to generate a bias current that is positively correlated with temperature, and provides a bias current for the bipolar transistor and the PTAT voltage to generate current, so as to reduce V BE Temperature nonlinearity; The PTAT voltage generating circuit utilizes the current characteristics of the MOS tube operating in the subthreshold region to generate a voltage that is positively correlated with temperature; And through the parallel connection of multiple differential PTAT voltage generating circuits, a V BE The positive temperature-related voltage is offset by the negative temperature characteristic of the ADC to avoid the use of capacitors to amplify the positive temperature coefficient voltage in the ADC.

2. The low-power temperature sensor for MEMS clock according to claim 1, characterized in that: The CTAT voltage generating circuit utilizes the temperature characteristics of a diode-connected bipolar transistor to generate a voltage that is negatively correlated with temperature. V BE .

3. The low-power temperature sensor for MEMS clock according to claim 1, wherein: The 15-bit second-order Sigma-Delta ADC includes a voltage multiplexer, a sample-and-hold circuit, a two-stage integrator, and a dynamic bias comparator. It converts analog voltages containing temperature information into digital output using the charge balance principle.

4. The low-power temperature sensor for MEMS clock according to claim 3, characterized in that: The switches in the sample-and-hold circuit all use complementary structure T-type switches for sampling and integration to reduce leakage current.

5. The low-power temperature sensor for MEMS clock according to claim 3, characterized in that: The dynamic bias comparator utilizes dynamic bias technology to improve the energy utilization efficiency of the dynamic comparator.

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