A signal peak position detection device, method and input signal extraction apparatus

By constructing a lookup table to store the correspondence between the sign bit of the input signal and the product result of the local signal, and by using a sign extractor and a multiplexer to replace the multiplier and adder, the problem of excessive area and power consumption in the cross-correlation synchronous detection circuit is solved, and the circuit is optimized efficiently.

CN116488963BActive Publication Date: 2026-08-25BEIJING ESWIN COMPUTING TECH CO LTD +1
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Patent Information

Application Number
CN202310127284.X
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-02-02
Publication Date
2026-08-25
Estimated Expiration
2043-02-02

AI Technical Summary

Technical Problem

In existing cross-correlation synchronous detection circuits, the complex signal product calculations of multiple multipliers and adders are required, resulting in excessive circuit area and overall power consumption.

Method used

By constructing a lookup table to store the correspondence between the sign bit of the input signal and the product result of the local signal, a sign extractor and a multiplexer are used to replace multipliers and adders for product operations. The product result is directly retrieved from the lookup table, eliminating the need for actual multiplication operations.

Benefits of technology

It significantly reduces the circuit area and overall power consumption, and optimizes the circuit design.

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Abstract

The application provides a signal peak position detection device and method and an input signal extraction equipment. A lookup table memory comprises: a lookup table, the lookup table comprising: bit values of sign bits of an input signal, and a corresponding relationship of a multiplication result of the input signal and a local signal; a sign extractor is used for extracting a target bit value of a sign bit of the input signal corresponding to each sampling; a multiplexer is used for, for each sampling, looking up a target multiplication result matched with the target bit value from the lookup table of the lookup table memory according to the target bit value; and a calculation unit is used for calculating a modulus value corresponding to each sampling according to the target multiplication result obtained for each sampling, and determining a peak position of the input signal in a time period of multiple samplings according to a sampling corresponding to a maximum modulus value in all modulus values. The application can omit a multiplier and an adder required for implementing the multiplication operation in a circuit, and greatly reduces the area and overall power consumption of the circuit.
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Description

Technical Field

[0001] This invention relates to the field of computer technology, and in particular to a signal peak position detection device, method, input signal extraction device, electronic device, and computer-readable storage medium. Background Technology

[0002] When receiving a signal, the receiving device needs to detect the boundary position of the target signal in order to extract the target signal from the received signal based on the boundary position.

[0003] Currently, cross-correlation synchronous detection circuits can be used to detect the boundary position of the target signal. Specifically, multipliers and adders are used to perform complex signal product calculations on the input signal sampled each time and a fixed local signal. The signal position corresponding to the sample with the largest modulus value is determined as the boundary position of the target signal by accumulating the product results and calculating the modulus of the accumulated results.

[0004] However, current cross-correlation synchronous detection circuits require multiple complex signal product calculations based on multipliers and adders, resulting in a large number of multipliers and adders in the circuit, leading to excessive circuit area and overall power consumption. Summary of the Invention

[0005] This invention provides a signal peak position detection device, method, input signal extraction device, electronic device, and computer-readable storage medium, aiming to reduce the area of ​​the cross-correlation synchronization detection circuit and reduce the overall power consumption of the cross-correlation synchronization detection circuit.

[0006] In a first aspect, embodiments of the present invention provide a signal peak position detection device, the device comprising:

[0007] Symbol extractor, multiplexer, lookup table memory, and computation unit;

[0008] The lookup table memory includes: a lookup table, which includes: the bit value of the sign bit of the input signal and the correspondence between the product of the input signal and the local signal;

[0009] The symbol extractor is used to: extract the target bit value of the symbol bit of the input signal corresponding to each sample;

[0010] The multiplexer is used to: for each sample, based on the target bit value, search the lookup table in the lookup table memory for a target product result that matches the target bit value;

[0011] The calculation unit is used to: calculate the modulus value corresponding to each sample based on the target product result obtained in each sample; and determine the peak position of the input signal within the time period of multiple samples based on the sample corresponding to the largest modulus value among all modulus values.

[0012] Secondly, embodiments of the present invention provide a method for detecting the position of a signal peak, the method comprising:

[0013] Acquire the input signal corresponding to each sampling, and extract the target bit value of the sign bit of the input signal;

[0014] For each sample, based on the target bit value, a target product result matching the target bit value is found from the correspondence between the bit value of the sign bit of the input signal and the product result of the input signal and the local signal;

[0015] Based on the target product obtained from each sampling, the modulus value corresponding to each sampling is calculated; and based on the sampling corresponding to the largest modulus value among all modulus values, the peak position of the input signal is determined.

[0016] Thirdly, embodiments of the present invention provide an input signal extraction device, comprising:

[0017] A signal peak position detection device and a signal extraction device are provided. The signal peak position detection device is used to determine the peak position of an input signal within a time period corresponding to multiple samplings. The input signal includes a target signal, and the starting position of the target signal is concatenated with an identifier signal sequence. The identifier signal sequence is used to characterize the peak position of the target signal. The target signal has a corresponding number of sequences.

[0018] The signal extraction device is used to determine the identifier signal sequence of the input signal based on the peak position, and to extract the target signal from the input signal based on the identifier signal sequence and the number of sequences of the target signal.

[0019] Fourthly, embodiments of the present invention also provide an electronic device, including a processor;

[0020] Memory used to store the processor's executable instructions;

[0021] The processor is configured to execute the instructions to implement the method.

[0022] Fifthly, embodiments of the present invention also provide a computer-readable storage medium that, when instructions in the computer-readable storage medium are executed by a processor of an electronic device, enables the electronic device to perform the method described thereon.

[0023] In each sampling, this invention extracts the target bit value of the sign bit of the input signal corresponding to each sample using a sign extractor; and for each sample, a multiplexer searches for the target product result matching the target bit value in a lookup table memory based on the target bit value; then, based on the target product result obtained for each sample, the modulus value corresponding to each sample is calculated; and the peak position of the input signal is determined based on the sample corresponding to the maximum modulus value. This invention leverages the characteristic that the product result of the input signal and the local signal has a one-to-one correspondence with the sign bit of the input signal. This correspondence is constructed as a lookup table stored in the circuit. During specific sampling, the product result corresponding to each sample can be obtained by looking up the table, thus eliminating the need for multiplication operations between the input signal and the local signal for each sample. This also eliminates the need for multipliers and adders required to implement the product operation in the circuit, greatly reducing the circuit area and overall power consumption.

[0024] The above description is merely an overview of the technical solution of the present invention. In order to better understand the technical means of the present invention and to implement it in accordance with the contents of the specification, and in order to make the above and other objects, features and advantages of the present invention more apparent and understandable, specific embodiments of the present invention are described below. Attached Figure Description

[0025] Figure 1 This is a structural block diagram of a signal peak position detection device provided in an embodiment of the present invention;

[0026] Figure 2 This is a circuit diagram of an attenuation processing module provided in an embodiment of the present invention;

[0027] Figure 3 This is a flowchart of the steps of a signal peak position detection method provided in an embodiment of the present invention;

[0028] Figure 4 This is a block diagram of an input signal extraction device provided in an embodiment of the present invention;

[0029] Figure 5 This is a logic block diagram of an electronic device provided in an embodiment of the present invention;

[0030] Figure 6 This is a logic block diagram of another electronic device provided in an embodiment of the present invention. Detailed Implementation

[0031] Exemplary embodiments of the invention will now be described in more detail with reference to the accompanying drawings. While exemplary embodiments of the invention are shown in the drawings, it should be understood that the invention may be implemented in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this invention will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art.

[0032] In the field of communications, the transmission of a target signal from the transmitter to the receiver is often affected by the environment, resulting in interference signals in the received signal. Therefore, before transmitting the target signal, the transmitter can append a marker signal sequence to the beginning of the target signal. This marker signal sequence is used to characterize the peak position of the target signal, acting as a boundary indicator. To accurately extract the target signal from the received signal, the receiver first needs to accurately identify the boundary position of the target signal, i.e., identify the peak position. Once the peak position is identified, the signal can be truncated from that position to extract the target signal.

[0033] The signal peak position detection device of this invention aims to determine the peak position of the input signal within a time period by using cross-correlation operation. Cross-correlation operation is essentially a convolution operation. The meaning of cross-correlation between two functions is: to perform complex conjugate and reverse translation on the two functions respectively and then multiply them by an infinite integral. From a physical point of view, the result of cross-correlation operation reflects the measure of similarity between two signals.

[0034] Reference Figure 1 The diagram illustrates a cross-correlation operation. Assuming the input signal (a complex signal with real and imaginary parts) has 5 sequentially arranged samples within a time period (reflecting the 5 signal positions of the input signal), and the local signal (also a complex signal) has 3 sequences, the cross-correlation operation can perform 5 samplings on each of the 5 samples (each sample corresponds to one of the samples). For each sampling, the sample corresponding to that sample is multiplied by the 3 sequences of the local signal, and the 3 product results are accumulated and moduloed to obtain the modulus value corresponding to that sampling. For example, in the first sampling, sample 1 is multiplied by sequences 1, 2, and 3 respectively, resulting in 3 product results. The modulus value of the first sampling is obtained by accumulating these 3 product results. After sample 1 is sampled, one sample is moved to the second sampling for sample 2, and sample 2 is multiplied by sequences 1, 2, and 3 respectively, resulting in 3 product results. The modulus value of the second sampling is obtained by accumulating these 3 product results. Subsequent sampling follows the same principle and will not be elaborated further. Finally, the signal position corresponding to the sample with the largest modulus is determined as the peak position of the input signal, which is also the boundary position (starting position) of the target signal in the input signal.

[0035] In related technologies, each sampling involves the multiplication of two complex signals, and the multiplication of complex signals also involves addition. This results in a large number of multipliers and adders needing to be arranged in the cross-correlation circuit, leading to excessive circuit area and overall power consumption.

[0036] To address the aforementioned problems, this invention, based on the study of the characteristics of multiplication operations between input signals (complex signal form) and local signals (complex signal form), discovers that the combination of the real and imaginary parts of the product of the input signal and the local signal has a one-to-one correspondence with the sign bit of the input signal. Therefore, embodiments of this invention can statistically analyze the sign bit of the input signal and all combinations of the real and imaginary parts of the corresponding product of the input signal and the local signal to construct a lookup table. The lookup table stores the bit value of the sign bit of the input signal and the correspondence between it and the product of the input signal and the local signal. The lookup table is stored in a lookup table memory within the circuit. A sign extractor and a multiplexer are introduced, while the multipliers and adders used to implement the product operation of the input signal and the local signal are removed from the circuit.

[0037] In this embodiment of the invention, during each sampling, a symbol extractor extracts the target bit value of the sign bit of the input signal corresponding to each sampling; and a multiplexer, based on the target bit value, searches for the target product result matching the target bit value in a lookup table memory for each sampling; then, based on the target product result obtained for each sampling, the modulus value corresponding to each sampling is calculated; and the peak position of the input signal is determined based on the sampling corresponding to the maximum modulus value. This embodiment of the invention leverages the characteristic that the product result of the input signal and the local signal has a one-to-one correspondence with the sign bit of the input signal. This correspondence is constructed as a lookup table stored in the circuit. During specific sampling, the product result corresponding to each sampling can be obtained by looking up the table, thereby eliminating the need for multiplication operations between the input signal and the local signal for each sampling. This also eliminates the need for multipliers and adders required in the circuit to implement the product operation, greatly reducing the circuit area and overall power consumption.

[0038] Figure 2 This is a structural block diagram of a signal peak position detection device provided in an embodiment of the present invention, as shown below. Figure 2As shown, the device may include: a symbol extractor, a multiplexer, a lookup table memory, and a calculation unit. The lookup table memory includes: a lookup table containing: the bit value of the sign bit of the input signal, and the correspondence between the bit value and the product of the input signal and the local signal. The symbol extractor is used to: extract the target bit value of the sign bit of the input signal corresponding to each sample. The multiplexer is used to: for each sample, based on the target bit value, search the lookup table in the lookup table memory for the target product result that matches the target bit value. The calculation unit is used to: calculate the modulus value corresponding to each sample based on the target product result obtained for each sample; and determine the peak position of the input signal within the time period of multiple samples based on the sample corresponding to the largest modulus value among all moduli. 。

[0039] In this embodiment of the invention, the characteristics of the multiplication operation between the input signal and the local signal are first analyzed. Since both the input signal and the local signal are complex signals of the form I + jQ, the cross-correlation operation is implemented as follows: Let the input signal be rxZC(n) and the local signal be LocalZC(n). Slide rxZC(n) by m samples, multiply it by the conjugate of LocalZC(n), and sum the results to obtain the value of the input signal at time m. Therefore, the cross-correlation function between rxZC(n) and LocalZC(n) is:

[0040]

[0041] Specifically, let rxZC(n) = A + jB, and LocalZC(n) = C + jD.

[0042] Then rxZC(n)×LocalZC(n)=(A+jB)(C+jD)=(AC-BD)+j(AD+BC);

[0043] That is, the real part of the product is: CMultOutI=real(rxZC(n)LocalZC(n))=AC-BD.

[0044] The imaginary part of the product is: CMultOutQ=imag(rxZC(n)LocalZC(n))=AD+BC.

[0045] Next, extract the sign bit of the input signal rxZC(n), sign(rxZC(n)) = sign(A+jB) = {sign(A), sign(B)}. Let 0 represent a positive number and 1 represent a negative number. Then {sign(A), , sign(B)} have four possible combinations:

[0046] {sign(A), sign(B)}={0,0}or{0,1}or{1,0}or{1,1}.

[0047] Therefore, we can deduce that the real part of the product can also be combined in four ways: AC-BD={CD}or{C+D}or{-CD}or{-C+D};

[0048] The imaginary part of the product can also be combined in four ways: AD + BC = {C + D} or {-C + D} or {CD} or {-CD;

[0049] There are four possible combinations of the real and imaginary parts of the product: {CD}or{C+D}or{-CD}or{-C+D}.

[0050] In summary, it is evident that there is a one-to-one correspondence between the combination of the real and imaginary parts of the product result and the sign bit of the input signal participating in the product operation. This embodiment of the invention can pre-record the bit value of the sign bit of the input signal and its correspondence with the product result of the input signal and the local signal, constructing a lookup table. Subsequently, for each sample, the sign bits {sign(A), sign(B)} of the sampled input signal are extracted and used as the bit enable selection signal for the lookup table. The matching target product result is then searched from the lookup table and used as the product result of the sampled input signal and the local signal. This eliminates the need for the actual multiplication operation between the sampled input signal and the local signal, transforming the actual multiplication operation into a lookup table to obtain the product result. This also eliminates the need for multipliers and adders required to implement the product operation in the circuit, greatly reducing the circuit area and overall power consumption.

[0051] For example, when the bit value of the sign bit ({sign(A),sign(B)}) of the input signal is (0, 0) (representing A+B), the real part of the corresponding product result is I=CD, and the imaginary part is Q=C+D;

[0052] When the bit value of the sign bit ({sign(A),sign(B)}) of the input signal is (0, 1) (representing AB), the real part of the corresponding product result is I = C + D, and the imaginary part is Q = -C + D.

[0053] When the bit value of the sign bit ({sign(A),sign(B)}) of the input signal is (1, 0) (representing -A+B), the real part of the corresponding product result is I = -CD, and the imaginary part is Q = CD.

[0054] When the bit value of the sign bit ({sign(A),sign(B)}) of the input signal is (1, 1) (representing -AB), the real part of the corresponding product result is I = -C + D, and the imaginary part is Q = -CD.

[0055] The above correspondence can be recorded in a lookup table. In a certain actual sampling, assuming that the sign bit of the input signal extracted from the sample point is AB, the bit value corresponding to the sign bit is (0, 1). From the above lookup table, we can find that the real part of the target product result of the input signal and the local signal is C+D and the imaginary part is -C+D.

[0056] For example, refer to Figure 1 Since the lookup table stores the correspondence between the sign bits of the input signal at different sample points and the product results of the input signal and each sequence of the local signal, for the first sample of sample point 1, the target product result of the input signal of sample point 1 and sequence 1, the target product result of the input signal of sample point 1 and sequence 2, and the target product result of the input signal of sample point 3 and sequence 1 can be obtained by looking up the table, thus obtaining three target product results. Finally, the calculation unit can use the built-in adder to accumulate the three target product results obtained from the first sample to obtain the accumulated value, and then use the built-in modulus calculator to calculate the modulus value corresponding to the first sample based on the accumulated value; and after the modulus values ​​of all samples are calculated, the maximum modulus value is selected by the built-in maximum value calculator, and the peak position of the input signal can be determined based on the sample corresponding to the maximum modulus value.

[0057] It should be noted that in the cross-correlation operation process, the present invention uses a lookup table circuit to replace the multipliers and adders that implement the product operation, which effectively reduces the circuit area and power consumption. The larger the length N of the local signal, the more significant the reduction in circuit area and power consumption, and the greater the benefit.

[0058] For example, if the length of the local signal LocalZC(n) is N = 128 and the bit width is 5 bits, then the solution of this embodiment of the invention only needs to use a lookup table with a table width of 24 bits and a table depth of 128 bits to realize N-point complex multiplication operations. The number of multipliers and adders that can be saved is 128 × 3 (multipliers) + 128 × 3 (adders). The optimization effect on circuit area and power consumption is obvious.

[0059] Optionally, the input signal and the local signal are complex signals; the bit value of the sign bit of the input signal includes: the bit value corresponding to the combination of the sign bit of the real part and the sign bit of the imaginary part of the input signal; different combinations correspond to different bit values; the product of the input signal and the local signal includes the real part and the imaginary part.

[0060] In this embodiment of the invention, both the input signal and the local signal are in the form of complex signals: I+jQ, where I is the real part and Q is the imaginary part. That is, the complex signal is composed of a real signal and an imaginary signal. The complex signal expresses the signal through complex numbers, making the complex signal a vector signal that simultaneously has amplitude and phase. The product of the input signal in the form of complex signals and the local signal in the form of complex signals also includes real and imaginary parts.

[0061] Furthermore, the sign bit of the input signal, which includes the sign bit I of the real part and the sign bit Q of the imaginary part, can be represented by a combination of the sign bits I and Q. Specifically, the combination of sign bits mentioned in this embodiment refers to the combination of the positive / negative sign of the sign bit I and the positive / negative sign of the sign bit Q. For example, in the case of an input signal of -I+jQ, the combination of sign bits is (-I, +Q). If we assume that 0 represents a positive number and 1 represents a negative number, then the bit value of the sign bit is (1, 0). In the case of an input signal of -I-jQ, the combination of sign bits is (-I, -Q), and the bit value of the sign bit is (1, 1). It is evident that different combinations correspond to different bit values.

[0062] Optionally, in a preferred implementation, the lookup table includes: the bit value of the sign bit of the input signal, and the sum of the real and imaginary parts of the product result; the multiplexer is specifically used to: search for the target sum that matches the target bit value from the lookup table in the lookup table memory, based on the target bit value, as the target product result.

[0063] In this embodiment of the invention, reference is made to Figure 2 When an input signal sampled at a single point arrives, the symbol extractor first extracts the sign bit of the input signal, determines the target bit value of that sign bit (the bit value corresponding to the positive / negative sign combination of the real and imaginary parts), and then the multiplexer searches the lookup table memory for the target sum that matches the target bit value as the target product result. Since the product of the input signal and the local signal is also a complex signal, the product result is represented as the sum of the real and imaginary parts.

[0064] For example, referring to one case of the above example, when the target bit value of the sign bit ({sign(A),sign(B)}) of the input signal is (0, 1) (representing AB), the real part I = C + D and the imaginary part Q = -C + D of the corresponding product result are obtained by looking up a table. The product result is represented by the sum of the real part I and the imaginary part Q.

[0065] As can be seen, since the lookup table stores the correspondence between the sign bits of the input signal at different sample points and the product results of the input signal and each sequence of the local signal, the present invention uses a lookup table circuit to replace the multiplier that implements the product operation.

[0066] Optionally, in the preferred implementation described above, the summation result is a binary calculation result.

[0067] Preferably, the product of the input signal and the local signal is formed by summing the real and imaginary parts. Without this improvement, obtaining the final product still requires an adder to perform the summation of the real and imaginary parts. This embodiment of the invention can pre-calculate the summation result and directly store the binary calculation result in a lookup table, thus further eliminating the need for an adder to perform the product operation. It should be noted that the summation result can also be in decimal, hexadecimal, or other formats; there is no specific limitation on this.

[0068] For example, based on the above example, the conclusion is that there are four possible combinations of the real and imaginary parts of the product of the input signal and the local signal: P0{CD}orP1{C+D}orP2{-CD}orP3{-C+D}.

[0069] Assume that the bit width of P0, P1, P2, and P3 is 6 bits.

[0070] Then P0 can be represented in binary form: [23:18];

[0071] P1 can be represented in binary form: [17:12];

[0072] P2 can be represented in binary form: [11:6];

[0073] P3 can be represented in binary form: [5:0].

[0074] When the bit value of the sign bit ({sign(A),sign(B)}) of the input signal is (0, 0) (representing A+B), the real part of the corresponding product result is I = [17:12] and the imaginary part is Q = [23:18].

[0075] When the bit value of the sign bit ({sign(A),sign(B)}) of the input signal is (0, 1) (representing AB), the real part of the corresponding product result is I = [23:18], and the imaginary part is Q = [11:6].

[0076] When the bit value of the sign bit ({sign(A),sign(B)}) of the input signal is (1, 0) (representing -A+B), the real part of the corresponding product result is I = [5:0] and the imaginary part is Q = [17:12].

[0077] When the bit value of the sign bit ({sign(A),sign(B)}) of the input signal is (1, 1) (representing -AB), the real part of the corresponding product result is I = [11:6] and the imaginary part is Q = [5:0].

[0078] Optionally, in another suboptimal implementation, the multiplexer is specifically used to: search for the real and imaginary parts of the target product result that match the target bit value from the lookup table in the lookup table memory, based on the target bit value; the computing unit is further used to: perform an addition operation on the real and imaginary parts of the target product result through a first adder to obtain the target product result.

[0079] Since the product of the input signal and the local signal is also a complex signal, the product result is represented as the sum of the real and imaginary parts. The lookup table can include: the bit value of the sign bit of the input signal, and the combination of the real and imaginary parts of the product result. The multiplexer can search the lookup table for the real and imaginary parts of the target product result that match the target bit value. The calculation unit is then further used to: perform an addition operation on the real and imaginary parts of the target product result using a first adder to obtain the target product result.

[0080] Optional, refer to Figure 2 The calculation unit includes an adder, a modulus calculator, and a maximum value calculator. The calculation unit is used to: accumulate the target product results obtained from each sample using the adder to obtain an accumulated value; calculate the modulus value corresponding to each sample using the modulus calculator based on the accumulated value; select the maximum modulus value among all modulus values ​​using the maximum value calculator, and determine the peak position of the input signal based on the sample corresponding to the maximum modulus value.

[0081] The adder is used to accumulate the product of the input signal and each local signal sequence at each sampling time. The modulus calculator calculates the modulus based on the accumulated value. The modulus can be obtained by taking the square root of the sum of the squares of the real part and the squares of the imaginary part of the accumulated value.

[0082] In each sampling, this invention extracts the target bit value of the sign bit of the input signal corresponding to each sample using a sign extractor; and for each sample, a multiplexer searches for the target product result matching the target bit value in a lookup table memory based on the target bit value; then, based on the target product result obtained for each sample, the modulus value corresponding to each sample is calculated; and the peak position of the input signal is determined based on the sample corresponding to the maximum modulus value. This invention leverages the characteristic that the product result of the input signal and the local signal has a one-to-one correspondence with the sign bit of the input signal. This correspondence is constructed as a lookup table stored in the circuit. During specific sampling, the product result corresponding to each sample can be obtained by looking up the table, thus eliminating the need for multiplication operations between the input signal and the local signal for each sample. This also eliminates the need for multipliers and adders required to implement the product operation in the circuit, greatly reducing the circuit area and overall power consumption.

[0083] Figure 3 This is a flowchart illustrating the steps of a signal peak position detection method provided in an embodiment of the present invention, applied to the aforementioned signal peak position detection device. The method includes:

[0084] Step 201: Obtain the input signal corresponding to each sampling, and extract the target bit value of the sign bit of the input signal.

[0085] Step 202: For each sample, based on the target bit value, find the target product result that matches the target bit value from the correspondence between the bit value of the sign bit of the input signal and the product result of the input signal and the local signal.

[0086] Step 203: Calculate the modulus value corresponding to each sample based on the target product result obtained from each sampling; and determine the peak position of the input signal based on the sample corresponding to the largest modulus value among all moduli. 。

[0087] Steps 201-203 of this embodiment of the invention can be specifically referred to the above. Figure 2 The corresponding descriptions of the embodiments are not repeated here.

[0088] Reference Figure 4 This invention also provides an input signal extraction device, comprising: a signal peak position detection device and a signal extraction device.

[0089] The signal peak position detection device is used to determine the peak position of the input signal within the time period corresponding to multiple samplings; the input signal contains a target signal, and the starting position of the target signal is spliced ​​with an identifier signal sequence; the identifier signal sequence is used to characterize the peak position of the target signal; the target signal has a corresponding sequence number; the signal extraction device is used to determine the identifier signal sequence of the input signal based on the peak position, and extract the target signal from the input signal based on the identifier signal sequence and the sequence number of the target signal.

[0090] In the field of communications, the transmission of a target signal from the transmitter to the receiver is often affected by the environment, resulting in interference signals in the received signal. Therefore, before transmitting the target signal, the transmitter can append a marker signal sequence to the beginning of the target signal. This marker signal sequence characterizes the peak position of the target signal, acting as a boundary indicator. To accurately extract the target signal from the received signal, the receiver first needs to accurately identify the boundary position of the target signal within the received signal using a signal peak position detection device, i.e., identify the peak position of the received signal. After identifying the peak position, a signal extraction device can determine the peak position as the marker signal sequence of the input signal. Based on the number of marker signal sequences and the target signal sequence, the target signal is extracted from the input signal.

[0091] In summary, in each sampling, the embodiments of the present invention extract the target bit value of the sign bit of the input signal corresponding to each sample using a sign extractor; and for each sample, a multiplexer searches for the target product result matching the target bit value in a lookup table memory based on the target bit value; then, based on the target product result obtained for each sample, the modulus value corresponding to each sample is calculated; and the peak position of the input signal is determined based on the sample corresponding to the maximum modulus value. Based on the characteristic that the product result of the input signal and the local signal has a one-to-one correspondence with the sign bit of the input signal, the embodiments of the present invention construct this correspondence into a lookup table stored in the circuit. During specific sampling, the product result corresponding to each sample can be obtained by looking up the table, thereby eliminating the need for multiplication operations between the input signal and the local signal for each sample, and thus eliminating the need for multipliers and adders required to implement this product operation in the circuit, greatly reducing the circuit area and overall power consumption.

[0092] Figure 5 This is a block diagram illustrating an electronic device 600 according to an exemplary embodiment. For example, the electronic device 600 may be a mobile phone, computer, digital broadcasting terminal, messaging device, game console, tablet device, medical device, fitness equipment, personal digital assistant, etc.

[0093] Reference Figure 5The electronic device 600 may include one or more of the following components: a processing component 602, a memory 604, a power supply component 606, a multimedia component 608, an audio component 610, an input / output (I / O) interface 612, a sensor component 614, and a communication component 616.

[0094] Processing component 602 typically controls the overall operation of electronic device 600, such as operations associated with display, telephone calls, data communication, camera operation, and recording operations. Processing component 602 may include one or more processors 620 to execute instructions to perform all or part of the steps of the methods described above. Furthermore, processing component 602 may include one or more modules to facilitate interaction between processing component 602 and other components. For example, processing component 602 may include a multimedia module to facilitate interaction between multimedia component 608 and processing component 602.

[0095] Memory 604 is used to store various types of data to support the operation of electronic device 600. Examples of such data include instructions for any application or method operating on electronic device 600, contact data, phonebook data, messages, pictures, multimedia, etc. Memory 604 can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic storage, flash memory, magnetic disk, or optical disk.

[0096] Power supply component 606 provides power to various components of electronic device 600. Power supply component 606 may include a power management system, one or more power supplies, and other components associated with generating, managing, and distributing power to electronic device 600.

[0097] Multimedia component 608 includes a screen that provides an output interface between the electronic device 600 and the user. In some embodiments, the screen may include a liquid crystal display (LCD) and a touch panel (TP). If the screen includes a touch panel, the screen may be implemented as a touchscreen to receive input signals from the user. The touch panel includes one or more touch sensors to sense touches, swipes, and gestures on the touch panel. The touch sensors may sense not only the boundaries of touch or swipe actions but also the duration and pressure associated with the touch or swipe operation. In some embodiments, multimedia component 608 includes a front-facing camera and / or a rear-facing camera. When the electronic device 600 is in an operating mode, such as a shooting mode or a multimedia mode, the front-facing camera and / or the rear-facing camera may receive external multimedia data. Each front-facing camera and rear-facing camera may be a fixed optical lens system or have focal length and optical zoom capabilities.

[0098] Audio component 610 is used to output and / or input audio signals. For example, audio component 610 includes a microphone (MIC) used to receive external audio signals when electronic device 600 is in an operating mode, such as call mode, recording mode, and voice recognition mode. The received audio signals may be further stored in memory 604 or transmitted via communication component 616. In some embodiments, audio component 610 also includes a speaker for outputting audio signals.

[0099] I / O interface 612 provides an interface between processing component 602 and peripheral interface modules, such as keyboards, click wheels, buttons, etc. These buttons may include, but are not limited to, home buttons, volume buttons, power buttons, and lock buttons.

[0100] Sensor assembly 614 includes one or more sensors for providing state assessments of various aspects of electronic device 600. For example, sensor assembly 614 can detect the on / off state of electronic device 600, the relative positioning of components such as the display and keypad of electronic device 600, changes in position of electronic device 600 or a component of electronic device 600, the presence or absence of user contact with electronic device 600, orientation or acceleration / deceleration of electronic device 600, and temperature changes of electronic device 600. Sensor assembly 614 may include a proximity sensor configured to detect the presence of nearby objects without any physical contact. Sensor assembly 614 may also include a light sensor, such as a CMOS or CCD image sensor, for use in imaging applications. In some embodiments, sensor assembly 614 may also include an accelerometer, gyroscope, magnetometer, pressure sensor, or temperature sensor.

[0101] Communication component 616 facilitates wired or wireless communication between electronic device 600 and other devices. Electronic device 600 can access wireless networks based on communication standards, such as WiFi, carrier networks (such as 2G, 3G, 4G, or 5G), or combinations thereof. In one exemplary embodiment, communication component 616 receives broadcast signals or broadcast-related information from an external broadcast management system via a broadcast channel. In one exemplary embodiment, communication component 616 also includes a near-field communication (NFC) module to facilitate short-range communication. For example, the NFC module may be implemented based on radio frequency identification (RFID) technology, Infrared Data Association (IrDA) technology, ultra-wideband (UWB) technology, Bluetooth (BT) technology, and other technologies.

[0102] In an exemplary embodiment, the electronic device 600 may be implemented by one or more application-specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field-programmable gate arrays (FPGAs), controllers, microcontrollers, microprocessors, or other electronic components to implement a signal peak position detection method provided in this embodiment of the invention.

[0103] In an exemplary embodiment, a non-transitory computer-readable storage medium including instructions is also provided, such as a memory 604 including instructions, which can be executed by a processor 620 of an electronic device 600 to perform the above-described method. For example, the non-transitory storage medium may be a ROM, random access memory (RAM), CD-ROM, magnetic tape, floppy disk, and optical data storage device, etc.

[0104] Figure 6 This is a block diagram illustrating an electronic device 700 according to an exemplary embodiment. For example, the electronic device 700 may be provided as a server. (Refer to...) Figure 6 The electronic device 700 includes a processing component 722, which further includes one or more processors, and memory resources represented by a memory 732 for storing instructions, such as application programs, that can be executed by the processing component 722. The application programs stored in the memory 732 may include one or more modules, each corresponding to a set of instructions. Furthermore, the processing component 722 is configured to execute instructions to perform a signal peak position detection method provided in embodiments of the present invention.

[0105] Electronic device 700 may also include a power supply component 726 configured to perform power management of electronic device 700, a wired or wireless network interface 750 configured to connect electronic device 700 to a network, and an input / output (I / O) interface 758. Electronic device 700 may operate on an operating system stored in memory 732, such as Windows Server™, Mac OS X™, Unix™, Linux™, FreeBSD™, or similar.

[0106] This invention also provides a computer-readable storage medium that, when the instructions in the computer-readable storage medium are executed by a processor of an electronic device, enables the electronic device to perform the signal peak position detection method.

[0107] This invention also provides a computer program product, including a computer program that, when executed by a processor, implements the signal peak position detection method.

[0108] Other embodiments of the invention will readily occur to those skilled in the art upon consideration of the specification and practice of the invention disclosed herein. This invention is intended to cover any variations, uses, or adaptations of the invention that follow the general principles of the invention and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of the invention are indicated by the following claims.

[0109] It should be understood that the present invention is not limited to the precise structure described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of the invention is limited only by the appended claims.

Claims

1. A signal peak position detection device, characterized in that, The device includes: Symbol extractor, multiplexer, lookup table memory, and computation unit; The lookup table memory includes: a lookup table, which includes: the bit value of the sign bit of the input signal and the correspondence between the input signal and the product of the local signal; The symbol extractor is used to: extract the target bit value of the symbol bit of the input signal corresponding to each sample; The multiplexer is used to: for each sample, based on the target bit value, search the lookup table in the lookup table memory for a target product result that matches the target bit value; The calculation unit is used to: calculate the modulus value corresponding to each sample based on the target product result obtained in each sample; and determine the peak position of the input signal within the time period of multiple samples based on the sample corresponding to the largest modulus value among all modulus values. Wherein, the input signal and the local signal are complex signals; The sign bit value of the input signal includes: a bit value corresponding to the combination of the sign bits of the real part and the sign bits of the imaginary part of the input signal; different combinations correspond to different bit values; the product of the input signal and the local signal includes a real part and an imaginary part; The lookup table includes: the bit value of the sign bit of the input signal, and the sum of the real and imaginary parts of the product result; The multiplexer is specifically used to: based on the target bit value, search the lookup table in the lookup table memory for a target summation result that matches the target bit value as the target product result.

2. The signal peak position detection device according to claim 1, characterized in that, The summation result is a binary calculation result.

3. The signal peak position detection device according to claim 1, characterized in that, The multiplexer is specifically used to: search, according to the target bit value, from the lookup table of the lookup table memory for the real and imaginary parts of the target product result that match the target bit value; The computing unit is further configured to: perform addition operations on the real and imaginary parts of the target product result through a first adder to obtain the target product result.

4. The signal peak position detection device according to claim 1, characterized in that, The computing unit includes: Adder, modulus calculator, and maximum value calculator; The calculation unit is used to: accumulate the target product results obtained from each sample using the adder to obtain an accumulated value; calculate the modulus value corresponding to each sample using the modulus calculator based on the accumulated value; select the maximum modulus value among all modulus values ​​using the maximum value calculator, and determine the peak position of the input signal based on the sample corresponding to the maximum modulus value.

5. A method for detecting the position of a signal peak, applied to the signal peak position detection device as described in any one of claims 1-4, characterized in that, The method includes: Acquire the input signal corresponding to each sampling, and extract the target bit value of the sign bit of the input signal; For each sample, based on the target bit value, a target product result matching the target bit value is found from the correspondence between the bit value of the sign bit of the input signal and the product result of the input signal and the local signal; Based on the target product obtained from each sampling, the modulus value corresponding to each sampling is calculated; and based on the sampling corresponding to the largest modulus value among all modulus values, the peak position of the input signal is determined.

6. An input signal extraction device, characterized in that, include: The signal peak position detection device and signal extraction device as described in any one of claims 1-4, wherein the signal peak position detection device is used to determine the peak position of the input signal within a time period corresponding to multiple samplings; the input signal includes a target signal, and the starting position of the target signal is concatenated with an identifier signal sequence; the identifier signal sequence is used to characterize the peak position of the target signal; and the target signal has a corresponding number of sequences. The signal extraction device is used to determine the identifier signal sequence of the input signal based on the peak position, and to extract the target signal from the input signal based on the identifier signal sequence and the number of sequences of the target signal.

7. An electronic device, characterized in that, include: processor; Memory used to store the processor's executable instructions; The processor is configured to execute the instructions to implement the method as described in claim 5.

8. A computer-readable storage medium, characterized in that, When the instructions in the computer-readable storage medium are executed by the processor of the electronic device, the electronic device is able to perform the method as described in claim 5.

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