An LVDT displacement sensor excitation generation and demodulation circuit

Abstract

The present invention belongs to the technical field of control circuits, and discloses an LVDT displacement sensor excitation generation and demodulation circuit, including a DSP control circuit, an excitation generation circuit, a frequency calibration circuit, a signal demodulation circuit, and a power supply circuit. The DSP control circuit outputs a driving signal to the excitation generation circuit, and the excitation generation circuit filters an AC signal for driving the LVDT sensor. At the same time, the AC signal is introduced into the calibration circuit to realize real-time monitoring and dynamic adjustment of the excitation signal. Finally, the electrical signal output by the LVDT displacement sensor is solved by the DSP control circuit to obtain the actual displacement value of the sensor. The present invention can flexibly and in real time change the output excitation frequency through the DSP control circuit, can adapt to the driving requirements of different LVDT displacement sensors, and can overcome the shortcomings of low precision of dedicated integrated chips by selecting high-precision configuration devices; in addition, compared with similar driving circuits, the present invention has the characteristics of strong noise suppression ability, good stability, wide application range, strong environmental adaptability, etc.

Description

Technical Field

[0001] The invention relates to the technical field of control circuits, and in particular to an LVDT displacement sensor excitation generation and demodulation circuit. Background Art

[0002] Linear Variable Differential Transformer (LVDT) is a common displacement sensor, which is mainly composed of an iron core, a primary coil and a secondary coil. When the iron core moves from the middle to both sides, the difference in the output voltage of the two secondary coils is linearly related to the tiny displacement of the iron core. LVDT is widely used in industrial control, aerospace, electric power, petrochemical and other fields. It is mainly used to measure displacement, size, vibration, thickness, etc. It can be used in conjunction with instruments or alone. Its main features are simple principle and structure, high reliability, high sensitivity, and strong adaptability and practicality.

[0003] There are many factors that affect the measurement accuracy of LVDT displacement sensors. In addition to the manufacturing process and materials of the product itself, it is also related to the installation accuracy, excitation signal accuracy and demodulation accuracy. Usually, choosing a suitable sensor and ensuring the installation accuracy of the sensor can overcome the errors caused by the process, materials and installation accuracy factors, and improve the excitation signal accuracy and demodulation accuracy. There are two commonly used solutions. The first is to use a dedicated integrated chip. This solution is relatively mature and has the characteristics of high integration and simple peripheral circuits. However, the integrated chip has inherent defects, mainly poor heat dissipation, difficult maintenance, high cost, low accuracy, and narrow scope of application. To improve these defects, analog circuit construction solutions are currently commonly used. However, the analog circuit construction solutions in the prior art often have problems such as low accuracy, unstable excitation signal, high circuit complexity, weak anti-interference ability and poor reliability. They are not applicable in some occasions with high precision requirements and complex use environments. Summary of the invention

[0004] The purpose of the present invention is to provide an LVDT displacement sensor excitation generation and demodulation circuit to solve the problems of low precision, unstable excitation signal, high circuit complexity, weak anti-interference ability and narrow application range in the analog circuit construction scheme in the prior art.

[0005] Technical solution to the purpose of the present invention: In order to achieve the above-mentioned purpose of the present invention, an LVDT displacement sensor excitation generation and demodulation circuit is proposed, including a DSP control circuit, an excitation generation circuit, a frequency calibration circuit, a signal demodulation circuit, and a power supply circuit; the input end of the LVDT displacement sensor is connected to the excitation generation circuit, and the output end of the LVDT displacement sensor is connected to the signal demodulation circuit;

[0006] The excitation generation circuit is used to output an excitation signal to the LVDT displacement sensor; the signal demodulation circuit is used to convert the AC signal output by the LVDT displacement sensor into a DC signal and output it;

[0007] The excitation generation circuit is also connected to a frequency calibration circuit, which is used to retrieve the actual excitation signal output by the excitation generation circuit in real time and extract the frequency of the actual excitation signal; the frequency calibration circuit is connected to the DSP control circuit and outputs the frequency of the actual excitation signal extracted to the DSP control circuit;

[0008] The DSP control circuit is connected to an excitation generation circuit, and the DSP control circuit controls the excitation generation circuit in real time according to the frequency of the actual excitation signal collected by the frequency calibration circuit to output the excitation signal required for normal operation to the LVDT displacement sensor;

[0009] The signal demodulation circuit is connected to the DSP control circuit, and the DSP control circuit performs displacement data calculation according to the DC signal output by the signal demodulation circuit;

[0010] The power supply circuit is used to provide working power for other circuits and the LVDT displacement sensor.

[0011] Furthermore, the core processor model of the DSP control circuit adopts TMS320 series DSP, and the EPWM interface on the core processor is used for receiving the frequency of PWM output and excitation signal.

[0012] Furthermore, the excitation generating circuit includes a PWM output unit, a bandpass filtering unit, an amplifying unit, and a feedback unit connected in sequence, one end of which is connected to the input end of the excitation generating circuit and the other end of which is connected to the output end of the excitation generating circuit; wherein the PWM output unit is connected to the DSP control circuit, and the frequency of the PWM output unit is set to be consistent with the working frequency of the LVDT displacement sensor through the DSP control circuit; the center frequency of the bandpass filtering unit is set to the working frequency of the LVDT displacement sensor, and the AC signal component output by the PWM output unit is filtered out; the amplifying unit adjusts the amplitude of the AC signal; the feedback unit feeds back the AC signal to the input end for fusion and superposition with the digital signal, and can timely correct and smooth the fluctuation when the digital signal is interfered with and fluctuates, so as to enhance the anti-interference ability.

[0013] Furthermore, the PWM output unit adopts a digital isolation chip for isolating digital signals from analog signals, which can effectively improve the anti-interference ability of the output signal of the PWM output unit, thereby improving the output stability and accuracy of the excitation generating circuit.

[0014] Furthermore, the frequency calibration circuit converts the frequency of the actual excitation signal that has been output into a digital signal and then sends it to the DSP control circuit. The DSP control circuit obtains the frequency of the actual excitation signal after sampling the digital signal, and compares the frequency with the operating frequency of the LVDT displacement sensor. If it exceeds the range of ±1% of the operating frequency, the DSP control circuit will dynamically adjust the frequency of the PWM output unit of the excitation generating circuit to the operating frequency of the normal operation of the LVDT displacement sensor, thereby maintaining the high accuracy of the output frequency.

[0015] Furthermore, the frequency calibration circuit uses a threshold comparison method to extract the frequency of the excitation signal, and sets the threshold to 5% to 10% of the peak value of the excitation signal. When the excitation signal exceeds the threshold, a high potential of the frequency amplitude is output, and when it is lower than the threshold, a low potential of the frequency amplitude is output.

[0016] Furthermore, the signal demodulation circuit includes a full-wave rectifier circuit and a mean demodulation circuit connected in sequence to extract a DC signal from an AC signal, wherein the mean demodulation circuit uses a third-order low-pass filter circuit, which can meet the requirements of fast conversion while ensuring the accuracy of demodulation.

[0017] Furthermore, the core processing chips of the full-wave rectification unit and the mean demodulation unit both use operational amplifiers, and the mean demodulation of different excitation signals can be achieved through the combination and matching of peripheral resistors and capacitors of the operational amplifier.

[0018] Furthermore, the cutoff frequency of the signal demodulation circuit is set to one tenth of the operating frequency of the LVDT displacement sensor.

[0019] Furthermore, the power supply circuit is used to convert the external interface 28V voltage into ±15V voltage, +15V voltage into 5V voltage, and 5V voltage into 3.3V voltage.

[0020] Furthermore, the power supply circuit adopts an isolated power supply module, which can achieve complete isolation of input power and output power, avoid interference and ripples in power supply voltage and current, and protect the circuit from power supply failure and electromagnetic interference. The input voltage range of the isolated power supply module is 9~60VDC, and the output power is not less than 15W. The wide input voltage and high output power can ensure the high stability and wide applicability of the entire circuit.

[0021] Beneficial technical effects of the present invention: Compared with the prior art, the present invention has the following significant advantages: 1. It adopts an analog circuit construction scheme, each device is independent and dispersed, the layout is simple, the device heat dissipation is good, and the device's own performance is less affected by environmental factors, so the excitation output and demodulation accuracy of the entire circuit are very high; 2. It has a calibration circuit, which can monitor the accuracy of the excitation signal in real time and has strong anti-interference ability; 3. Excitation signals of different frequencies can be generated by software configuration, reducing cumbersome hardware changes, so it can be applied to different LVDT displacement sensors, with high adjustability and a wide range of applications; 4. The proportion of discrete devices used in the analog circuit construction is high, and the structure is relatively simple. If a fault occurs, detection and maintenance are easy, so the production and maintenance costs are low. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 A schematic diagram of the structure of an LVDT displacement sensor excitation generation and demodulation circuit of the present invention;

[0023] Figure 2 An excitation generation circuit diagram in one embodiment of the present invention;

[0024] Figure 3 A frequency calibration circuit diagram in one embodiment of the present invention;

[0025] Figure 4 A signal demodulation circuit diagram in one embodiment of the present invention;

[0026] Figure 5 FIG. 1 is a power supply circuit diagram in one embodiment of the present invention. DETAILED DESCRIPTION

[0027] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0028] Combination Figure 1 The present invention provides an LVDT displacement sensor excitation generation and demodulation circuit, including a DSP control circuit, an excitation generation circuit, a frequency calibration circuit, a signal demodulation circuit, and a power supply circuit; the input end of the LVDT displacement sensor is connected to the excitation generation circuit, and the output end of the LVDT displacement sensor is connected to the signal demodulation circuit;

[0029] The excitation generation circuit is used to output an excitation signal to the LVDT displacement sensor; the signal demodulation circuit is used to convert the AC signal output by the LVDT displacement sensor into a DC signal and output it;

[0030] The excitation generation circuit is also connected to a frequency calibration circuit, which is used to retrieve the actual excitation signal output by the excitation generation circuit in real time and extract the frequency of the actual excitation signal; the frequency calibration circuit is connected to the DSP control circuit and outputs the frequency of the actual excitation signal extracted to the DSP control circuit;

[0031] The DSP control circuit is connected to an excitation generation circuit, and the DSP control circuit controls the excitation generation circuit in real time according to the frequency of the actual excitation signal collected by the frequency calibration circuit to output the excitation signal required for normal operation to the LVDT displacement sensor;

[0032] The signal demodulation circuit is connected to the DSP control circuit, and the DSP control circuit performs displacement data calculation according to the DC signal output by the signal demodulation circuit;

[0033] The power supply circuit is used to provide working power for other circuits and the LVDT displacement sensor.

[0034] In one embodiment, in combination Figure 2The excitation generating circuit includes an ISO7710 chip D2, an OPA4197 chip D1, an NPN transistor VT1, a first diode VD1, a second diode VD2, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, an eighth resistor R8, a ninth resistor R9, an eleventh resistor R11, a twelfth resistor R12, a thirteenth resistor R13, a fourteenth resistor R14, a fifteenth resistor R15, a sixteenth resistor R16, a seventeenth resistor R17, an eighteenth resistor R18, a nineteenth resistor R19, a first capacitor C1, a second capacitor C2, a third capacitor C3, a fourth capacitor C4, a fifth capacitor C5, a sixth resistor R6, an eighth resistor R8, a ninth resistor R9, an eleventh resistor R11, a twelfth resistor R12, a thirteenth resistor R13, a fourteenth resistor R14, a fifteenth resistor R15, a sixteenth resistor R16, a seventeenth resistor R17, an eighteenth resistor R18, a nineteenth resistor R19, a first capacitor C1, a second capacitor C2, a third capacitor C3, a fourth capacitor C4, a fifth capacitor C5, a sixth resistor R6 capacitor C6; wherein the OPA4197 chip D1 also includes an A-area OPA4197 chip D1A, a B-area OPA4197 chip D1B, a C-area OPA4197 chip D1C, and a D-area OPA4197 chip D1D; pins 1 and 3 of the ISO7710 chip D2 are connected to the DVCC_3.3V voltage, pin 2 of the ISO7710 chip D2 is connected to the PWM pin in the DSP control circuit, pin 4 of the ISO7710 chip D2 is connected to DGND, pins 7 and 8 of the ISO7710 chip D2 are connected to the AVCC_5V voltage, pin 6 of the ISO7710 chip D2 is connected to one end of the sixth capacitor C6, and the sixth capacitor C6 The other end is connected to one end of the nineteenth resistor R19, the other end of the nineteenth resistor R19 is connected to pin 1 of the NPN transistor VT1, the pin 3 of the NPN transistor VT1 is connected to one end of the eighth resistor R8 and one end of the thirteenth resistor R13, the other end of the thirteenth resistor R13 is connected to one end of the sixteenth resistor R16, one end of the third capacitor C3, and one end of the fourth capacitor C4, the pin 6 of the OPA4197 chip D1B in area B is connected to the other end of the fourth capacitor C4 and one end of the eleventh resistor R11, the pin 5 of the OPA4197 chip D1B in area B is connected to one end of the seventeenth resistor R17, and the pin 7 of the OPA4197 chip D1B in area B is connected to the other end of the eleventh resistor R11 , the other end of the third capacitor C3 is connected to one end of the fifth capacitor C5, the other end of the fifth capacitor C5 is connected to one end of the fourteenth resistor R14, the pin 9 of the OPA4197 chip D1C in area C is connected to the other end of the fourteenth resistor R14 and one end of the ninth resistor R9, the pin 10 of the OPA4197 chip D1C in area C is connected to one end of the eighteenth resistor R18, the OPA4197 chip D1C in area C is connected to the other end of the ninth resistor R9, one end of the fifteenth resistor R15, and one end of the second capacitor C2, the other end of the second capacitor C2 is connected to one end of the sixth resistor R6 and one end of the third resistor R3, and the other end of the fifteenth resistor R15 is connected to the EXC end of the LVDT displacement sensor,Pin 13 of the OPA4197 chip D1D in area D is connected to the other end of the third resistor R3, one end of the second resistor R2, and the cathode of the first diode VD1. Pin 12 of the OPA4197 chip D1D in area D is connected to one end of the fourth resistor R4. Pin 14 of the OPA4197 chip D1D in area D is connected to the anode of the first diode VD1 and the cathode of the second diode VD2. The anode of the second diode VD2 is connected to the other end of the second resistor R2 and one end of the first resistor R1. Pin 3 of the OPA4197 chip D1A in area A is connected to one end of the fifth resistor R5, the other end of the sixth resistor R6, the other end of the first resistor R1, and one end of the first capacitor C1. Pin 2 of the 97 chip D1 is connected to one end of the twelfth resistor R12, pin 1 of the A-area OPA4197 chip D1A is connected to the other end of the first capacitor C1 and the other end of the eighth resistor R8, pin 4 of the A-area OPA4197 chip D1A is connected to AVCC_+15V, pin 11 of the A-area OPA4197 chip D1A is connected to AVCC_-15V, pin 5 of the ISO7710 chip D2, pin 2 of the NPN transistor VT1, the other end of the fourth resistor R4, the other end of the sixteenth resistor R16, the other end of the seventeenth resistor R17, the other end of the eighteenth resistor R18, and the EXCLO end of the LVDT displacement sensor are all connected to AGND. Using the solution of this embodiment, the operator can set PWM signals of different frequencies through the DSP control circuit, and then generate excitation signals of any frequency and amplitude by adjusting the hardware parameters of the bandpass filter circuit and the amplifier circuit. In this embodiment, the PWM frequency is 2KHz, the center frequency of the bandpass filter is 2KHz, the Q value is 10, the amplification factor of the amplifier circuit is set to 1.5 times, and the final output excitation signal is a 2KHz, 7Vrms sinusoidal AC signal.

[0035] In one embodiment, in combination Figure 3The frequency calibration circuit includes an LM193 chip D9, an eighth diode VD8, a ninth diode VD9, a seventh resistor R7, a tenth resistor R10, a forty-ninth resistor R49, a fiftieth resistor R50, a fifty-first resistor R51, a seventh capacitor C7, and a twelfth capacitor C12; a pin 3 of the LM193 chip D9 is connected to one end of the seventh resistor R7, one end of the forty-ninth resistor R49, one end of the twelfth capacitor C12, the positive electrode of the eighth diode VD8, and the negative electrode of the ninth diode VD9, a pin 2 of the LM193 chip D9 is connected to one end of the fiftieth resistor R50 and one end of the fifty-first resistor R51, and a pin 1 of the LM193 chip D9 is connected to one end of the fiftieth resistor R50 and one end of the fifty-first resistor R51. One end of the tenth resistor R10, the other end of the seventh resistor R7, one end of the seventh capacitor C7, and the FREQ_CHECK pin in the DSP control circuit are connected, the pin 8 of the LM193 chip D9, the cathode of the eighth diode VD8, and the other end of the fiftieth resistor R50 are all connected to AVCC_5V, the pin 4 of the LM193 chip D9, the anode of the ninth diode VD9, the other end of the fifty-first resistor R51, the other end of the twelfth capacitor C12, and the other end of the seventh capacitor C7 are all connected to AGND, and the other end of the forty-ninth resistor R49 is connected to the EXC end of the LVDT displacement sensor. In this embodiment, the LM193 chip is used, which is a comparator. By configuring the resistance values ​​of the fiftieth resistor R50 and the fifty-first resistor R51, different comparison threshold voltages can be set. In this embodiment, the comparison threshold is set to 0.25V.

[0036] In one embodiment, in combination Figure 4 The signal demodulation circuit includes a first OPA4197 chip D3, a second OPA4197 chip D4, a third diode VD3, a fourth diode VD4, a fifth diode VD5, a sixth diode VD6, a twenty-third resistor R23, a twenty-second resistor R22, a twentieth resistor R20, a twenty-ninth resistor R29, a twenty-fourth resistor R24, a thirtieth resistor R30, a twenty-first resistor R21, a thirty-first resistor R31, a twenty-fifth resistor R25, a twenty-sixth resistor R26, and a twenty-seventh resistor R2 7. the twenty-eighth resistor R28, the thirty-fifth resistor R35, the thirty-fourth resistor R34, the thirty-second resistor R32, the forty-first resistor R41, the thirty-sixth resistor R36, the forty-second resistor R42, the thirty-third resistor R33, the forty-third resistor R43, the thirty-seventh resistor R37, the thirty-eighth resistor R38, the thirty-ninth resistor R39, the fortieth resistor R40, the ninth capacitor C9, the tenth capacitor C10, the eleventh capacitor C11, the thirteenth capacitor C13, the fifteenth capacitor C15, and the sixteenth capacitor C16;

[0037] The first OPA4197 chip D3 includes a first OPA4197 chip A area D3A, a first OPA4197 chip B area D3B, a first OPA4197 chip C area D3C, and a first OPA4197 chip D area D3D; pin 3 of the first OPA4197 chip A area D3A is connected to one end of the twenty-third resistor R23, and pin 1 of the first OPA4197 chip A area D3A is connected to pin 2 of the first OPA4197 chip A area D3A, one end of the twenty-second resistor R22, and one end of the thirtieth resistor R30, and the first Pin 6 of OPA4197 chip B area D3B is connected to the other end of the 22nd resistor R22, the cathode of the third diode VD3, and one end of the 20th resistor R20, pin 5 of the first OPA4197 chip B area D3B is connected to one end of the 29th resistor R29, pin 7 of the first OPA4197 chip B area D3B is connected to the anode of the third diode VD3 and the cathode of the fourth diode VD4, the other end of the 20th resistor R20 is connected to one end of the 24th resistor R24, pin 9 of the first OPA4197 chip C area D3C is connected to the 20th resistor R29, and pin 10 of the first OPA4197 chip B area D3B is connected to the anode of the third diode VD3 and the cathode of the fourth diode VD4. The other end of the fourth resistor R24, the other end of the 30th resistor R30, and one end of the 21st resistor R21 are connected, the pin 10 of the first OPA4197 chip C area D3C is connected to one end of the 31st resistor R31, the pin 8 of the first OPA4197 chip C area D3C is connected to the other end of the 21st resistor R21 and one end of the 25th resistor R25, the other end of the 25th resistor R25 is connected to one end of the 26th resistor R26 and one end of the tenth capacitor C10, the other end of the 26th resistor R26 is connected to one end of the 27th resistor R27, One end of the ninth capacitor C9 is connected, the other end of the twenty-seventh resistor R27 is connected to one end of the eleventh capacitor C11 and one end of the twenty-eighth resistor R28, the pin 12 of the D area D3D of the first OPA4197 chip is connected to the other end of the twenty-eighth resistor R28, the pin 14 of the D area D3D of the first OPA4197 chip is connected to the pin 13 of the D area D3D of the first OPA4197 chip, the other end of the ninth capacitor C9, and the VA_DC pin in the DSP control circuit, and the other end of the twenty-third resistor R23 is connected to the VA end of the LVDT displacement sensor;

[0038] The second OPA4197 chip D4 includes a second OPA4197 chip A area D4A, a second OPA4197 chip B area D4B, a second OPA4197 chip C area D4C, and a second OPA4197 chip D area D4D; pin 3 of the second OPA4197 chip A area D4A is connected to one end of the thirty-fifth resistor R35, and pin 1 of the second OPA4197 chip A area D4A is connected to pin 2 of the second OPA4197 chip A area D4A, one end of the thirty-fourth resistor R34, and one end of the forty-second resistor R42, and the second OPA4197 chip D4 includes a second OPA4197 chip A area D4A, a second OPA4197 chip B area D4B, a second OPA4197 chip C area D4C, and a second OPA4197 chip D area D4D; pin 3 of the second OPA4197 chip A area D4A is connected to one end of the thirty-fifth resistor R35, and pin 1 of the second OPA4197 chip A area D4A is connected to pin 2 of the second OPA4197 chip A area D4A, one end of the thirty-fourth resistor R34, and one end of the forty-second resistor R42, Pin 6 of the A4197 chip B area D4B is connected to the other end of the thirty-fourth resistor R34, the cathode of the fifth diode VD5, and one end of the thirty-second resistor R32. Pin 5 of the second OPA4197 chip B area D4B is connected to one end of the forty-first resistor R41. Pin 7 of the second OPA4197 chip B area D4B is connected to the anode of the fifth diode VD5 and the cathode of the sixth diode VD6. The other end of the thirty-second resistor R32 is connected to one end of the thirty-sixth resistor R36. Pin 9 of the second OPA4197 chip C area D4C is connected to the thirty-sixth resistor R37. The other end of the resistor R36, the other end of the forty-second resistor R42, and one end of the thirty-third resistor R33 are connected, the pin 10 of the second OPA4197 chip C area D4C is connected to one end of the forty-third resistor R43, the pin 8 of the second OPA4197 chip C area D4C is connected to the other end of the thirty-third resistor R33 and one end of the thirty-seventh resistor R37, the other end of the thirty-seventh resistor R37 is connected to one end of the thirty-eighth resistor R38 and one end of the fifteenth capacitor C15, the other end of the thirty-eighth resistor R38 is connected to one end of the thirty-ninth resistor R39, One end of the thirteenth capacitor C13 is connected, the other end of the thirty-ninth resistor R39 is connected to one end of the sixteenth capacitor C16 and one end of the fortieth resistor R40, the pin 12 of the second OPA4197 chip D area D4D is connected to the other end of the fortieth resistor R40, the pin 14 of the second OPA4197 chip D area D4D is connected to the pin 13 of the second OPA4197 chip D area D4D, the other end of the thirteenth capacitor C13, and the VB_DC pin in the DSP control circuit, and the other end of the thirty-fifth resistor R35 is connected to the VB end of the LVDT displacement sensor;

[0039] Pin 4 of the first OPA4197 chip A area D3A and pin 4 of the second OPA4197 chip A area D4A are both connected to AVCC_+15V, pin 11 of the first OPA4197 chip A area D3A and pin 11 of the second OPA4197 chip A area D4A are both connected to AVCC_-15V, the other end of the twenty-ninth resistor R29, the other end of the thirty-first resistor R31, the other end of the forty-first resistor R41, the other end of the forty-third resistor R43, the other end of the tenth capacitor C10, the other end of the eleventh capacitor C11, the other end of the fifteenth capacitor C15, and the other end of the sixteenth capacitor C16 are all connected to AGND.

[0040] The signal demodulation circuit in this embodiment is composed of a full-wave rectifier circuit and a mean demodulation circuit to extract a DC signal from an AC signal. The mean demodulation circuit adopts a third-order low-pass filter circuit, and the cut-off frequency is calculated based on one-tenth of the 2KHz operating frequency. The cut-off frequency of the low-pass filter is set to 200Hz.

[0041] In one embodiment, in combination Figure 5The power supply circuit includes a VPT15-2815D chip D7, a LM22676 chip D5, a LT1963 chip D6, a first inductor L1, a seventh diode VD7, a forty-fourth resistor R44, a forty-fifth resistor R45, a forty-sixth resistor R46, a forty-seventh resistor R47, a forty-eighth resistor R48, a fifty-second resistor R52, a fifty-third resistor R53, a seventeenth capacitor C17, a twentieth capacitor C20, a twenty-first capacitor C21, a twenty-fifth capacitor C25, a thirtieth capacitor C30, a twenty-sixth capacitor C26, a twenty-fourth capacitor C24, and a twenty-ninth capacitor C2 9. The thirty-first electrolytic capacitor C31; Pin 4 of the VPT15-2815D chip is connected to one end of the twenty-sixth capacitor C26 and the 28V voltage, Pin 5 of the VPT15-2815D chip is connected to one end of the twenty-fourth capacitor C24 and the AVCC_+15V voltage, Pin 7 of the VPT15-2815D chip is connected to one end of the twenty-ninth capacitor C29 and the AVCC_-15V voltage, Pin 2 of the VPT15-2815D chip is connected to the chassis ground, Pin 3 of the VPT15-2815D chip is connected to the other end of the twenty-sixth capacitor C26 and 28VGND, Pin 6 of the VPT15-2815D chip is connected to the other end of capacitor C24, the other end of capacitor C29, and AGND, pin 7 of the LM22676 chip D5 is connected to the AVCC_+15V voltage and one end of the twenty-first capacitor C21, pin 4 of the LM22676 chip D5 is connected to one end of the forty-fourth resistor R44 and one end of the forty-fifth resistor R45, pin 1 of the LM22676 chip D5 is connected to one end of the twenty-fifth capacitor C25, pin 8 of the LM22676 chip D5 is connected to the other end of the twenty-fifth capacitor C25, the cathode of the seventh diode VD7, and one end of the first inductor L1, the other end of the forty-fifth resistor R45 is connected to one end of the forty-sixth resistor R46, and the fourth The other end of the sixteenth resistor R46 is connected to the other end of the first inductor L1, one end of the thirty-first electrolytic capacitor C31, one end of the thirtieth capacitor C30, and the AVCC_5V voltage. The other end of the twenty-first capacitor C21, pin 9 and pin 6 of the LM22676 chip D5, the other end of the forty-fourth resistor R44, the other end of the thirty-first electrolytic capacitor C31, the other end of the thirtieth capacitor C30, and the positive electrode of the seventh diode VD7 are all connected to AGND. Pin 8 and pin 5 of the LT1963 chip D6 are connected to the AVCC_5V voltage and one end of the seventeenth capacitor C17. Pin 1 of the LT1963 chip D6 is connected to one end of the forty-seventh resistor R47, one end of the twentieth capacitor C20, and AVCC_3.3V voltage is connected, pin 2 of LT1963 chip D6 is connected to the other end of the 47th resistor R47 and one end of the 48th resistor R48, pin 6, pin 3 and pin 7 of LT1963 chip D6, the other end of the 17th capacitor C17, the other end of the 48th resistor R48, and the other end of the 20th capacitor C20 are all connected to AGND, one end of the 52nd resistor R52 is connected to the DVCC_3.3V voltage, the other end of the 52nd resistor R52 is connected to the AVCC_3.3V voltage, one end of the 53rd resistor R53 is connected to AGND, and the other end of the 53rd resistor R53 is connected to DGND. .

[0042] In this embodiment, the power supply circuit converts the external interface 28V voltage into ±15V voltage, the +15V voltage into 5V voltage, and the 5V voltage into 3.3V voltage.

[0043] The present invention adopts an analog circuit construction scheme, each device is independent and dispersed, the layout is simple, the device heat dissipation is good, and the device performance itself is less affected by environmental factors. Therefore, the excitation output and demodulation accuracy of the entire circuit are very high; it is equipped with a calibration circuit, which can monitor the accuracy of the excitation signal in real time and has strong anti-interference ability; the excitation signal of different frequencies can be generated by software configuration, which reduces cumbersome hardware changes, and is therefore applicable to different LVDT displacement sensors, with high adjustability and a wide range of applications; the proportion of discrete devices used in the analog circuit construction is high, the structure is relatively simple, and if a fault occurs, detection and maintenance are easy, so the production and maintenance costs are low.

[0044] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0045] The above-mentioned embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application shall be subject to the attached claims.

Claims

1. An LVDT displacement sensor excitation generation and demodulation circuit, characterized in that: It includes a DSP control circuit, an excitation generation circuit, a frequency calibration circuit, a signal demodulation circuit, and a power supply circuit; the input end of the LVDT displacement sensor is connected to the excitation generation circuit, and the output end of the LVDT displacement sensor is connected to the signal demodulation circuit; the excitation generation circuit is used to output an excitation signal to the LVDT displacement sensor; the signal demodulation circuit is used to convert the AC signal output by the LVDT displacement sensor into a DC signal and output it; the excitation generation circuit is also connected to a frequency calibration circuit, and the frequency calibration circuit is used to retrieve the actual excitation signal output by the excitation generation circuit in real time and extract the frequency of the actual excitation signal; The frequency calibration circuit is connected to the DSP control circuit, and outputs the frequency of the actual excitation signal extracted to the DSP control circuit; the DSP control circuit is connected to the excitation generation circuit, and the DSP control circuit controls the excitation generation circuit in real time according to the frequency of the actual excitation signal retrieved by the frequency calibration circuit to output the excitation signal required for normal operation to the LVDT displacement sensor; the signal demodulation circuit is connected to the DSP control circuit, and the DSP control circuit performs displacement data calculation according to the DC signal output by the signal demodulation circuit; The power supply circuit is used to provide working power for other circuits and LVDT displacement sensor; The excitation generating circuit comprises a PWM output unit, a bandpass filtering unit, an amplifying unit, and a feedback unit connected in sequence, one end of which is connected to the input end of the excitation generating circuit and the other end of which is connected to the output end of the excitation generating circuit; wherein the PWM output unit is connected to a DSP control circuit, and the frequency of the PWM output unit is set to be consistent with the working frequency of the LVDT displacement sensor through the DSP control circuit; the center frequency of the bandpass filtering unit is set to the working frequency of the LVDT displacement sensor, and the AC signal component output by the PWM output unit is filtered out; the amplifying unit adjusts the amplitude of the AC signal; the feedback unit feeds back the AC signal to the input end for fusion and superposition with the digital signal, and can make timely corrections when the digital signal is disturbed and fluctuates.

2. The LVDT displacement sensor excitation generation and demodulation circuit according to claim 1, characterized in that: The core processor model of the DSP control circuit adopts TMS320 series DSP.

3. The LVDT displacement sensor excitation generation and demodulation circuit according to claim 1, characterized in that: The PWM output unit adopts a digital isolation chip.

4. The LVDT displacement sensor excitation generation and demodulation circuit according to claim 1, characterized in that: The frequency calibration circuit converts the frequency of the actual excitation signal that has been output into a digital signal and then sends it to the DSP control circuit. The DSP control circuit obtains the actual frequency of the excitation signal after sampling the digital signal, and compares the frequency with the operating frequency of the LVDT displacement sensor. If it exceeds the range of ±1% of the operating frequency, the DSP control circuit will dynamically adjust the frequency of the PWM output unit of the excitation generating circuit to adjust it to the operating frequency for normal operation of the LVDT displacement sensor.

5. According to the LVDT displacement sensor excitation generation and demodulation circuit described in claim 1, the frequency calibration circuit uses a threshold comparison method to extract the frequency of the excitation signal, and the threshold is set to 5%~10% of the peak value of the excitation signal. When the excitation signal exceeds the threshold, a high potential of the frequency amplitude is output, and when it is lower than the threshold, a low potential of the frequency amplitude is output.

6. The LVDT displacement sensor excitation generation and demodulation circuit according to claim 1, characterized in that: The signal demodulation circuit comprises a full-wave rectifier circuit and a mean demodulation circuit connected in sequence, so as to realize the extraction of a DC signal from an AC signal; wherein the mean demodulation circuit adopts a third-order low-pass filter circuit.

7. The LVDT displacement sensor excitation generation and demodulation circuit according to claim 6, characterized in that: The core processing chips of the full-wave rectification circuit and the mean demodulation circuit both use operational amplifiers, and mean demodulation of different excitation signals is achieved through the combination and matching of peripheral resistors and capacitors of the operational amplifier.

8. The LVDT displacement sensor excitation generation and demodulation circuit according to claim 6, characterized in that: The cut-off frequency of the signal demodulation circuit is set to one tenth of the operating frequency of the LVDT displacement sensor.

9. The LVDT displacement sensor excitation generation and demodulation circuit according to claim 1, characterized in that: The power supply circuit is used to convert the external interface 28V voltage into ±15V voltage, +15V voltage into 5V voltage, and 5V voltage into 3.3V voltage.

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