Embedded controller, debugger, interface controller, chip and electronic equipment

Abstract

The embodiment of the invention provides an embedded controller, a debugger, an interface controller, a chip and electronic equipment wherein the embedded controller comprises: a bus interface circuit; the processor communicates with the host processor through the bus interface circuit; and the debugging circuit communicates with the debugger through the bus interface circuit and is used for debugging the embedded controller according to the debugging instruction of the debugger. By adopting the embodiment of the invention, the debugging circuit communicates with the debugger through the bus interface circuit of the embedded controller, and the bus interface circuit is used as the debugging interface, so that the interface non-uniformity of the embedded controller can be avoided, the debugging interface does not need to be disassembled and welded, and the debugging cost can be reduced.

Description

Technical Field

[0001] The present application relates to the technical field of electronic circuits, and in particular to an embedded controller, a debugger, an interface controller, a chip and an electronic device. Background Art

[0002] An embedded controller (EC) is an embedded main control chip that is attached to the bus of the host processor (Host CPU). EC can be applied to electronic devices such as laptops, where it can help electronic devices manage low-speed peripherals, such as touchpads, matrix keyboards, etc. In addition, electronic devices can use EC to manage power. For example, in a laptop, it can control the power on and off of the machine, and can also control the laptop to do sleep, suspend, and then wake up.

[0003] It is necessary to debug EC. In the related art, when debugging EC, it is necessary to disassemble the electronic device, then weld out the debugging interface of the EC chip, and then connect the EC-specific debugger through the Inter-Integrated Circuit (I2C), Serial Wire Debug (SWD), and Joint Test Action Group (JTAG) protocols to enter the debugging mode to analyze code problems. The need to disassemble the machine is not convenient for EC debugging, and the EC debugging interfaces of various manufacturers are not unified, which increases the debugging cost. Summary of the invention

[0004] In view of the above problems, the embodiments of the present application provide an embedded controller, a debugger, an interface controller, a chip and an electronic device to solve the above technical problems.

[0005] In a first aspect, an embodiment of the present application provides an embedded controller, comprising: a bus interface circuit; a processor, communicating with a host processor through the bus interface circuit; and a debugging circuit, communicating with a debugger through the bus interface circuit, for debugging the embedded controller according to the debugging instructions of the debugger. With the embodiment of the present application, the debugging circuit communicates with the debugger through the bus interface circuit of the embedded controller, and the bus interface circuit is used as a debugging interface, which can avoid the inconsistency of the embedded controller interface, and there is no need to disassemble the machine and weld the debugging interface, which can reduce the debugging cost.

[0006] In the second aspect, the embodiment of the present application provides an interface controller, including: an identification module for identifying the device type of a device connected to the interface; and a control module for controlling a multiplexer to connect the interface to a bus when the device type is a debugger for debugging an embedded controller, the bus being a bus between the embedded controller and a host processor. By using the embodiment of the present application, the interface and the bus between the embedded controller and the host processor are connected through the interface controller, so that the debugger connected to the interface can communicate with the embedded controller and monitor the bus data packets on the bus, without disassembling the machine and welding the debugging interface, which can reduce the debugging cost.

[0007] In a third aspect, an embodiment of the present application provides a chip, including the embedded controller mentioned above, or the interface controller mentioned above.

[0008] In a fourth aspect, an embodiment of the present application provides an electronic device, including a device body and the following components arranged on the device body: a host processor; the above-mentioned embedded controller, which is connected to the host processor via a bus; an interface; a multiplexer, one end of which is connected to the bus; and the above-mentioned interface controller. The debugging circuit communicates with the debugger via the bus interface circuit of the embedded controller, and the bus between the interface and the embedded controller and the host processor is connected via the interface controller, so that the debugger connected to the interface can communicate with the embedded controller and monitor the bus data packets on the bus, without disassembling the machine and soldering the debugging interface, which can reduce the debugging cost.

[0009] In a fifth aspect, an embodiment of the present application provides a debugger, comprising: a first interface, used to connect to a second interface of an electronic device, wherein the second interface can be connected to a bus between an embedded controller and a host processor; a control circuit, connected to the first interface, used to monitor bus data packets between the embedded controller and the host processor, and / or communicate with the embedded controller through the bus to debug the embedded controller.

[0010] The embedded controller, debugger, interface controller, chip and electronic device provided in the embodiments of the present application use the bus interface circuit of the embedded controller as a debugging interface, eliminating the need to disassemble the machine and solder the debugging interface, thereby reducing debugging costs.

[0011] These and other aspects of the present application will become more apparent from the description of the following embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0013] Figure 1 A schematic diagram of an embedded controller provided in an embodiment of the present application is shown.

[0014] Figure 2 A schematic diagram of another embedded controller provided in an embodiment of the present application is shown.

[0015] Figure 3 A schematic diagram of an interface controller provided in an embodiment of the present application is shown.

[0016] Figure 4 A schematic diagram of an electronic device provided in an embodiment of the present application is shown.

[0017] Figure 5 A schematic diagram of a debugger provided in an embodiment of the present application is shown. DETAILED DESCRIPTION

[0018] The embodiments of the present application are described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present application, and cannot be understood as limiting the present application.

[0019] In order to enable those skilled in the art to better understand the solutions of the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without making creative work are within the scope of protection of the present application.

[0020] In the embodiments of the present application, it should be noted that, in this article, relational terms such as first and second, etc. are merely used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations.

[0021] Moreover, the terms "comprises," "comprising," or any other variation thereof are intended to encompass non-exclusive inclusion, such that a process, method, article, or apparatus that includes a list of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or apparatus. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of additional identical elements in the process, method, article, or apparatus that includes the element.

[0022] In the description of the embodiments of the present application, words such as "example" or "for example" are used to indicate examples, illustrations or descriptions. Any embodiment or design described as "example" or "for example" in the embodiments of the present application is not to be interpreted as being more preferred or having more advantages than another embodiment or design. The use of words such as "example" or "for example" is intended to present relative concepts in a clear manner.

[0023] In addition, the "plurality" in the embodiments of the present application refers to two or more than two. In view of this, in the embodiments of the present application, "plurality" can also be understood as "at least two". "At least one" can be understood as one or more, for example, one, two or more. For example, including at least one means including one, two or more, and there is no limit on which ones are included. For example, including at least one of A, B and C, then A, B, C, A and B, A and C, B and C, or A, B and C can be included.

[0024] It should be noted that, in the embodiments of the present application, "and / or" describes the association relationship of the associated objects, indicating that three relationships may exist. For example, A and / or B may represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / ", unless otherwise specified, generally indicates that the associated objects before and after are in an "or" relationship.

[0025] It should be noted that in the embodiments of the present application, "connection" can be understood as electrical connection, and the connection between two electrical components can be a direct or indirect connection between the two electrical components. For example, the connection between A and B can be either a direct connection between A and B or an indirect connection between A and B through one or more other electrical components.

[0026] Figure 1 A schematic diagram of an embedded controller provided by an embodiment of the present application is shown, such as Figure 1As shown, the embedded controller 100 provided in the embodiment of the present application may include: a bus interface circuit 101, a processor 102 and a debug circuit 103. The processor 102 communicates with the host processor 200 through the bus interface circuit 101, and the debug circuit 103 communicates with the debugger 300 through the bus interface circuit 101. The debug circuit 103 is used to debug the embedded controller 100 according to the debug instructions of the debugger 300.

[0027] In the embodiment of the present application, the processor 102 is connected to the host processor 200 through a bus, and the bus may include but is not limited to an LPC (Low Pin Count, referred to as LPC) bus, a serial peripheral interface (Serial Peripheral Interface, referred to as SPI) bus, an enhanced serial peripheral interface (Enhanced Serial Peripheral Interface, referred to as eSPI) bus, etc. Correspondingly, the bus interface circuit 101 may include an LPC slave circuit, an SPI slave circuit, or an eSPI slave circuit; the host processor 200 may include an LPC master circuit, an SPI master circuit, or an eSPI master circuit. When the processor 102 communicates with the host processor 200, bus data packets (for example, LPC data packets, SPI data packets, eSPI data packets, etc.) are transmitted through the bus. When the debug circuit 103 communicates with the debugger 300 through the bus interface circuit 101, bus data packets (for example, LPC data packets, SPI data packets, eSPI data packets, etc.) are transmitted through the bus.

[0028] In the embodiment of the present application, the debug circuit 103 is connected to the bus interface circuit 101, and the debug circuit 103 communicates with the debugger 300 through the bus interface circuit 101, so that the debugger 300 can monitor the bus data packets on the bus between the processor 102 and the host processor 200, so as to record the bus data packets between the processor 102 and the host processor 200. Exemplarily, the debugger 300 can obtain the BIOS (Basic Input Output System, referred to as the basic input and output system) debug code (BIOS Debug Code) from the bus data packet between the processor 102 and the host processor 200, and determine the BIOS startup status according to the BIOS debug code.

[0029] In some implementations, the debugger 300 may send a debugging instruction to the bus interface circuit 101 , so that the debugging circuit 103 debugs the embedded controller 100 according to the debugging instruction of the debugger 300 .

[0030] As an implementation mode, the bus interface circuit 101 can identify the received instruction, and when the instruction is a debugging instruction, forward the received instruction to the debugging circuit 103. The debugging circuit 103 debugs the embedded controller 100 according to the debugging instruction forwarded by the bus interface circuit 101. If the instruction received by the bus interface circuit 101 is not a debugging instruction, the received instruction is not forwarded to the debugging circuit 103.

[0031] As another implementation, the bus interface circuit 101 forwards the received instruction to the debugging circuit 103 , and the debugging circuit 103 identifies the received instruction, and debugs the embedded controller 100 according to the debugging instruction when the received instruction is a debugging instruction.

[0032] As an example, the debugger 300 can burn firmware to the embedded controller 100, the debugger 300 can send a second debugging instruction for burning firmware, and the debugging circuit 103 can burn firmware in the embedded controller 100 according to the second debugging instruction. With this technical solution, it is possible to implement operations such as firmware update without disassembling the device. For example, referring to Figure 2 As shown, a flash memory (Flash) 106 is provided in the embedded controller 100 , and the flash memory 106 can be used to store firmware. The debugging circuit 103 can burn the firmware into the flash memory 106 according to the second debugging instruction.

[0033] Optionally, the bus interface circuit 101 identifies the received instruction, and if the instruction is a second debugging instruction for burning firmware, forwards the received second debugging instruction to the debugging circuit 103 , and the debugging circuit 103 burns the firmware in the embedded controller 100 according to the second debugging instruction.

[0034] Optionally, the bus interface circuit 101 forwards the received instruction to the debugging circuit 103 , and the debugging circuit 103 identifies the received instruction, and if the instruction is a second debugging instruction for burning firmware, burns the firmware in the embedded controller 100 according to the second debugging instruction.

[0035] As an example, refer to Figure 2As shown, the embedded controller 100 may include one or more peripheral modules 104. Taking a laptop computer as an example, the peripheral modules 104 may include a fingerprint control module, a power monitoring module, a keyboard control module, an atmosphere light control module, a fan control module, a breathing light control module, etc. The debugger 300 may access one or more peripheral modules 104 of the embedded controller 100. The debugger 300 may send a first debugging instruction for accessing one or more peripheral modules 104. The debugging circuit 103 may access the corresponding peripheral module 104 according to the first debugging instruction, for example, read the peripheral register of the peripheral module 104. With this technical solution, the debugging circuit 103 may access the corresponding peripheral module 104 according to the first debugging instruction.

[0036] Optionally, the bus interface circuit 101 identifies the received instruction, and if the instruction is a first debug instruction for accessing one or more peripheral modules 104, forwards the received first debug instruction to the debug circuit 103, and the debug circuit 103 accesses the corresponding peripheral module 104 according to the first debug instruction.

[0037] Optionally, the bus interface circuit 101 forwards the received instruction to the debug circuit 103 , and the debug circuit 103 identifies the received instruction and, if the instruction is a first debug instruction for accessing one or more peripheral modules 104 , accesses the corresponding peripheral module 104 according to the first debug instruction.

[0038] As an example, refer to Figure 2 As shown, the embedded controller 100 may include a memory 105 , the debugger 300 may access the memory 105 of the embedded controller 100 , the debugger 300 may send a third debug instruction for accessing the memory 105 , and the debug circuit 103 may access the memory 105 according to the third debug instruction, for example, perform a read operation on the memory 105 .

[0039] Optionally, the bus interface circuit 101 identifies the received instruction, and if the received instruction is a third debugging instruction for accessing the memory 105 , forwards the received third debugging instruction to the debugging circuit 103 , and the debugging circuit 103 accesses the memory 105 according to the third debugging instruction.

[0040] Optionally, the bus interface circuit 101 forwards the received instruction to the debugging circuit 103 , and the debugging circuit 103 identifies the received instruction, and when the instruction is a third debugging instruction, accesses the memory 105 according to the third debugging instruction.

[0041] In some embodiments, the bus interface circuit 101 may directly access one or more peripheral modules 104, etc. according to the instructions of the host processor 200. The debugger 300 may use the same instructions to access one or more peripheral modules 104, etc., and the access process may not pass through the debug circuit 103. Exemplarily, taking the eSPI bus as an example, the host processor 200 and the debugger 300 may serve as the eSPI master, and the bus interface circuit 101 may serve as the eSPI slave. The host processor 200 and the debugger 300 may send instructions to access the peripheral registers, etc. of the peripheral module 104, and the bus interface circuit 101 may access the peripheral registers, etc. of the peripheral module 104 based on the instructions.

[0042] In some embodiments, reference Figure 2 As shown, the embedded controller 100 may further include a control module 107. The control module 107 is used to obtain the device type of the device connected to the interface, and when the device type is a debugger for debugging the embedded controller 100, the control multiplexer connects the interface to the bus between the embedded controller 100 and the host processor 200. The control module 107 may be a circuit or a program code executed by the processor 102, which is not limited in this embodiment. As an implementation, the control module 107 may be an interface controller, and illustratively, the interface controller may be a PD (Power delivery) controller.

[0043] As an implementation mode, the control module 107 can obtain the device type of the device connected to the interface from the host processor 200. When the host processor 200 identifies that the device type of the device connected to the interface is a debugger, it can send the device type to the embedded controller 100. When the control module 107 receives that the device type is a debugger, it controls the multiplexer to connect the interface to the bus between the embedded controller 100 and the host processor 200. In this way, the debugger 300 can be connected to the bus, monitor the bus data packets on the bus, and communicate with the bus interface circuit 101.

[0044] In some implementations, the interface controller can identify the device type of the device connected to the interface, and when the device type is a debugger for debugging an embedded controller, the multiplexer is controlled to connect the interface to the bus between the embedded controller 100 and the host processor 200 .

[0045] In some implementations, the interface controller is integrated into the embedded controller 100, and the control module 107 may be the interface controller. Exemplarily, the interface is a USB Type C interface, and the interface controller may be a PD (Power delivery) controller, and the PD controller is integrated into the embedded controller 100.

[0046] Figure 3 A schematic block diagram of an interface controller provided by an embodiment of the present application is shown. Figure 3 As shown, the interface controller 400 may include: an identification module 401 and a control module 402. The identification module 401 is used to identify the device type of the device connected to the interface 500. The control module 402 is connected to the identification module 401, and is used to control the multiplexer 600 to connect the interface to the bus when the device type is a debugger for debugging an embedded controller, and the bus is a bus between the embedded controller and the host processor.

[0047] In some embodiments, the interface 500 is a USB Type C interface. The multiplexer 600 may include multiple channels, one channel being a channel between the interface 500 and the above-mentioned bus, and may also include other channels, for example, a channel between the interface 500 and a USB controller, a channel between the interface 500 and a DP (Display Port) controller, which is not limited in the embodiments of the present application. Exemplarily, when the device type of the device connected to the interface 500 is a USB device, the multiplexer 600 connects the interface 500 to the USB controller for USB communication; when the device type of the device connected to the interface 500 is a DP device, the multiplexer 600 connects the interface 500 to the DP controller for DP communication.

[0048] In an embodiment of the present application, the pins of the interface are multiplexed as the pins of the bus. Taking the eSPI bus and the USB Type-C interface as examples, the pins of the eSPI bus may include: a clock signal pin, a chip select signal pin, a reset signal pin, a warning signal pin, and four data pins. The pins of the USB Type-C interface may include 24 pins. In an embodiment of the present application, some of the 24 pins are used as the pins of the bus, and the bus signals are transmitted through these pins.

[0049] In some embodiments, the interface controller 400 is a PD (Power Delivery) controller. The PD controller can perform CC pin (configuration channel pin) detection to obtain the device type of the device connected to the USB Type-C interface, and when the device type is a debugger, control the multiplexer 600 to connect the USB Type-C interface and the bus between the embedded controller and the host processor.

[0050] In some embodiments, Figure 3 The interface controller 400 shown may be integrated into Figure 1 , Figure 2 In the embedded controller 100 shown in FIG. 1 , the interface controller 400 can implement the following Figure 2 The functions of the control module 107 are shown.

[0051] The present application embodiment provides an electronic device, such as Figure 4 As shown, the electronic device 700 may include: an embedded controller 710, a host processor 720, a multiplexer 730, an interface controller 740, and an interface 750. Figure 4 In the figure, the wireframes are used to show the independent circuit modules. In the embodiment of the present application, one or more modules can be integrated into one, which is not limited in the embodiment of the present application. For example, the embedded controller 710 and the interface controller 740 can be integrated into one.

[0052] refer to Figure 4 As shown, the embedded controller 710 is connected to the host processor 720 via a bus. The multiplexer 730 is connected to the interface 750, and a channel of the multiplexer 730 is connected to the bus between the embedded controller 710 and the host processor 720. When the multiplexer 730 switches to the channel, a path is formed between the interface 750 and the bus, and bus communication can be performed.

[0053] refer to Figure 4 As shown, the interface controller 740 can identify the device type of the device connected to the interface 750, and when the device type is a debugger 300 for debugging an embedded controller, the multiplexer 730 is controlled to connect the interface 750 and the bus between the embedded controller 710 and the host processor 720. The debugger 300 can perform bus communication with the embedded controller 710 via the bus through the interface 750. In the embodiment of the present application, the debugger 300 debugs the embedded controller 710 via bus communication.

[0054] In some embodiments, Figure 4 As shown, the embedded controller 710 may include: a bus interface circuit 711, a processor 712 and a debug circuit 713. The processor 712 communicates with the host processor 720 through the bus interface circuit 711, and the debug circuit 713 communicates with the debugger 300 through the bus interface circuit 711. The debugger 300 may send a bus data packet carrying a debug instruction. The debug circuit 713 may debug the embedded controller 710 according to the debug instruction of the debugger 300.

[0055] In the embodiment of the present application, the processor 712 is connected to the host processor 720 through a bus, and the bus may include but is not limited to an LPC (Low Pin Count, referred to as LPC) bus, a serial peripheral interface (Serial Peripheral Interface, referred to as SPI) bus, an enhanced serial peripheral interface (Enhanced Serial Peripheral Interface, referred to as eSPI) bus, etc. Correspondingly, the bus interface circuit 711 may include an LPC slave circuit, an SPI slave circuit, or an eSPI slave circuit; the host processor 720 may include an LPC master circuit, an SPI master circuit, or an eSPI master circuit. When the processor communicates with the host processor 720, bus data packets (for example, LPC data packets, SPI data packets, eSPI data packets, etc.) are transmitted through the bus. When the debug circuit 713 communicates with the debugger 300 through the bus interface circuit 711, bus data packets (for example, LPC data packets, SPI data packets, eSPI data packets, etc.) are transmitted through the bus.

[0056] In some embodiments, the interface 750 may be a USB Type-C interface. The multiplexer 730 may include multiple channels, one channel being a channel between the interface 750 and the above-mentioned bus, and may also include other channels, for example, a channel between the interface 750 and a USB controller, and a channel between the interface 750 and a DP controller, which is not limited in the embodiments of the present application. Exemplarily, when the device type of the device connected to the interface 750 is a USB device, the multiplexer 730 connects the interface 750 to the USB controller for USB communication; when the device type of the device connected to the interface 750 is a DP device, the multiplexer 730 connects the interface 750 to the DP controller for DP communication.

[0057] In some embodiments, the interface controller 740 is a PD controller. The PD controller can perform CC pin (configuration channel pin) detection to obtain the device type of the device connected to the USB Type-C interface, and when the device type is a debugger, control the multiplexer 730 to connect the USB Type-C interface and the bus between the embedded controller 710 and the host processor 720.

[0058] In some embodiments, the debugger 300 may send a debugging instruction to the bus interface circuit 711, so that the debugging circuit 713 debugs the embedded controller 710 according to the debugging instruction of the debugger 300. As an embodiment, the bus interface circuit 711 may identify the received instruction, and if the instruction is a debugging instruction, forward the received instruction to the debugging circuit 713. The debugging circuit 713 debugs the embedded controller 710 according to the debugging instruction forwarded by the bus interface circuit 711. If the received instruction is not a debugging instruction, the received instruction is not forwarded to the debugging circuit 713.

[0059] As an example, the debugger 300 may burn firmware to the embedded controller 710, and the debugger 300 may send a second debugging instruction for burning firmware, and the debugging circuit 713 may burn firmware in the embedded controller 710 according to the second debugging instruction. Optionally, the bus interface circuit 711 identifies the received instruction, and forwards the received instruction to the debugging circuit 713 when the instruction is the second debugging instruction for burning firmware. For example, referring to Figure 4 As shown, a flash memory 716 is provided in the embedded controller 710, and the flash memory 716 can be used to store firmware, and the debugging circuit 713 can burn the firmware into the flash memory 716 according to the second debugging instruction. With this technical solution, operations such as firmware update can be implemented without disassembling the device.

[0060] As an example, refer to Figure 4 As shown, the embedded controller 710 may include one or more peripheral modules 714. Taking the electronic device 710 as a laptop computer as an example, the peripheral modules 714 may include a fingerprint control module, a power monitoring module, a keyboard control module, an atmosphere light control module, a fan control module, a breathing light control module, etc. The debugger 300 can access one or more peripheral modules 714 of the embedded controller 710, and the debugger 300 can send a first debugging instruction for accessing one or more peripheral modules 714. The debugging circuit 713 can access the corresponding peripheral module 714 according to the first debugging instruction, for example, read the peripheral register of the peripheral module 714. Optionally, the bus interface circuit 711 identifies the received instruction, and forwards the received instruction to the debugging circuit 713 when the instruction is the first debugging instruction for accessing one or more peripheral modules 714. With this technical solution, the debugging circuit 103 can access the corresponding peripheral module 714 according to the first debugging instruction.

[0061] As an example, refer to Figure 4As shown, the embedded controller 100 may include a memory 715, the debugger 300 may access the memory 715 of the embedded controller 710, the debugger 300 may send a third debugging instruction for accessing the memory 715, and the debugging circuit 713 may access the memory 715 according to the third debugging instruction, for example, perform a read operation on the memory 715. Optionally, the bus interface circuit 711 identifies the received instruction, and forwards the received instruction to the debugging circuit 713 when the instruction is the third debugging instruction for accessing the memory 715.

[0062] In some embodiments, the bus interface circuit 711 can directly access one or more peripheral modules 714, etc. according to the instructions of the host processor 720. The debugger 300 can use the same instructions to access one or more peripheral modules 714, etc., and the access process can be performed without going through the debug circuit 713. Exemplarily, taking the eSPI bus as an example, the host processor 720 and the debugger 300 can act as an eSPI master, and the bus interface circuit 711 can act as an eSPI slave. The host processor 720 and the debugger 300 can send instructions to access the peripheral registers of the peripheral module 714, etc., and the bus interface circuit 711 can access the peripheral registers of the peripheral module 714 based on the instructions.

[0063] The present application embodiment provides a debugger, such as Figure 5 As shown, the debugger 300 may include: a first interface 301 and a control circuit 302. The first interface 301 is used to connect to the second interface of the electronic device, wherein the reference Figure 4 As shown, the second interface (interface 750) can be connected to the bus between the embedded controller 710 and the host processor 720. The control circuit 302 is connected to the first interface 301. In some embodiments, reference Figure 5 As shown, the control circuit 302 can monitor bus data packets between the embedded controller 710 and the host processor 720. In some embodiments, reference Figure 5 As shown, the control circuit 302 can communicate with the embedded controller 710 through the bus to debug the embedded controller 710. The first interface 301 can be a USB Type-C interface.

[0064] In some implementations, the control circuit 302 may send a bus data packet carrying a debugging instruction to the embedded controller via a bus, and receive a bus data packet sent by the embedded controller.

[0065] As an example, refer to Figure 5 and Figure 4As shown, the debugger 300 can burn firmware to the embedded controller 710, the control circuit 302 can send a second debugging instruction for burning firmware, and the debugging circuit 713 can burn firmware in the embedded controller 710 according to the second debugging instruction. With this technical solution, operations such as firmware update can be implemented without disassembling the device.

[0066] As an example, refer to Figure 5 and Figure 4 As shown, the debugger 300 can access one or more peripheral modules 714 of the embedded controller 710, the control circuit 302 can send a first debugging instruction for accessing one or more peripheral modules 714, and the debugging circuit 713 can access the corresponding peripheral module 714 according to the first debugging instruction, for example, read the peripheral register of the peripheral module 714. With this technical solution, the debugger 300 can access the peripheral module, and the debugging circuit 103 can access the corresponding peripheral module 714 according to the first debugging instruction.

[0067] As an example, refer to Figure 5 and Figure 4 As shown, the debugger 300 can access the memory 715 of the embedded controller 710 , the control circuit 302 can send a third debugging instruction for accessing the memory 715 , and the debugging circuit 713 can access the memory 715 according to the third debugging instruction, for example, perform a read operation on the memory 715 .

[0068] In some embodiments, the bus interface circuit 711 can directly access one or more peripheral modules 714, etc. according to the instructions of the host processor 720. The control circuit 302 of the debugger 300 can use the same instructions to access one or more peripheral modules 714, etc., and the access process can not pass through the debug circuit 713. Exemplarily, taking the eSPI bus as an example, the host processor 720 and the debugger 300 can be used as an eSPI master, and the bus interface circuit 711 can be used as an eSPI slave. The host processor 720 and the control circuit 302 can send instructions to access the peripheral registers of the peripheral module 714, etc., and the bus interface circuit 711 can access the peripheral registers of the peripheral module 714 based on the instructions.

[0069] In some embodiments, the debugger 300 can monitor bus data packets between the embedded controller 710 and the host processor 720. Exemplarily, the control circuit 302 can obtain BIOS debugging code from the bus data packets between the embedded controller 710 and the host processor 720, and determine the BIOS startup status according to the BIOS debugging code. Taking the eSPI bus as an example, when monitoring the bus data packets between the embedded controller 710 and the host processor 720, the debugger 300 can act as an eSPI slave.

[0070] In some embodiments, Figure 5 As shown, the control circuit 302 may include a bus interface circuit 303 and a microcontroller 304. The bus interface circuit 303 receives and sends bus data packets. The microcontroller 304 executes the debugging program, and when generating a debugging instruction, the debugging instruction is carried in the bus data packet and sent through the bus interface circuit 303.

[0071] The embodiment of the present application also provides a chip, which includes the above-mentioned embedded controller and interface control circuit. The chip is also called an integrated circuit (IC), and the chip can be, but is not limited to, a SOC (System on Chip) chip or a SIP (system in package) chip. The chip uses the bus interface circuit that the embedded controller communicates with the host processor as a debugging interface, and there is no need to disassemble the machine and weld the debugging interface, which can reduce the debugging cost.

[0072] The embodiment of the present application also provides an electronic device, which includes a device body and a chip as described above disposed in the device body. The electronic device may be, but is not limited to, a car central control screen, a car, a smart wearable device, a mobile terminal, and a smart home device. Smart wearable devices include, but are not limited to, smart watches, smart bracelets, and cervical massagers. Mobile terminals include, but are not limited to, smart phones, laptops, tablet computers, and POS (point of sales terminal). Smart home devices include, but are not limited to, smart sockets, smart rice cookers, smart sweepers, and smart lights. The electronic device uses the bus interface circuit that communicates with the host processor through the embedded controller as a debugging interface, without the need to disassemble the machine and solder the debugging interface, which can reduce the debugging cost.

[0073] The above are only preferred embodiments of the present application, and are not intended to limit the present application in any form. Although the present application has been disclosed as above with preferred embodiments, it is not intended to limit the present application. Any technical personnel in the field can make some changes or modify the technical contents disclosed above into equivalent embodiments without departing from the scope of the technical solution of the present application. However, any brief modifications, equivalent changes and modifications made to the above embodiments based on the technical essence of the present application without departing from the content of the technical solution of the present application are still within the scope of the technical solution of the present application.

Claims

1. An embedded controller, characterized in that: include: Bus interface circuit; a processor, communicating with a host processor via the bus interface circuit; The debugging circuit communicates with the debugger through the bus interface circuit and is used for debugging the embedded controller according to the debugging instructions of the debugger.

2. The embedded controller according to claim 1, wherein: The bus interface circuit is used to identify the received instruction and forward the instruction to the debugging circuit if the instruction is a debugging instruction.

3. The embedded controller according to claim 1 or 2, characterized in that: Also includes: one or more peripheral modules; The debugging instructions include a first debugging instruction for accessing the one or more peripheral modules; The debugging circuit is further used to access the corresponding peripheral module according to the first debugging instruction.

4. The embedded controller according to claim 1 or 2, characterized in that: The debugging instructions include a second debugging instruction for burning firmware; the debugging circuit is further used for burning firmware in the embedded controller according to the second debugging instruction.

5. The embedded controller according to claim 1 or 2, characterized in that: Also includes: Memory; The debugging instructions include a third debugging instruction for accessing the memory; The debugging circuit is further configured to access the memory according to the third debugging instruction.

6. The embedded controller according to claim 1, wherein: Also includes: one or more peripheral modules; The bus interface circuit is also used to access the one or more peripheral modules according to the instructions of the debugger.

7. The embedded controller according to claim 1, wherein: Also includes: The control module is used to obtain the device type of the device connected to the interface, and when the device type is a debugger for debugging an embedded controller, control the multiplexer to connect the interface to a bus, which is a bus between the embedded controller and the host processor.

8. An interface controller, characterized in that: include: an identification module, used to identify a device type of a device connected to the interface; The control module is used for controlling the multiplexer to connect the interface with a bus when the device type is a debugger for debugging an embedded controller, and the bus is a bus between the embedded controller and a host processor.

9. The interface controller according to claim 8, wherein: The interface is a USB Type-C interface.

10. The interface controller according to claim 8 or 9, characterized in that: The interface controller is a PD controller.

11. A chip, characterized in that: It comprises the embedded controller as described in any one of claims 1 to 7, and / or the interface controller as described in claim 8, 9 or 10.

12. An electronic device, characterized in that: The device comprises a device body and: Host processor; The embedded controller according to any one of claims 1 to 7, wherein the embedded controller is connected to the host processor via a bus; interface; a multiplexer, one end of which is connected to the bus; The interface controller as claimed in claim 8, 9 or 10.

13. A debugger, characterized in that: include: A first interface, used to connect to a second interface of the electronic device, wherein the second interface can be connected to a bus between the embedded controller and the host processor; A control circuit is connected to the first interface and is used to monitor bus data packets between the embedded controller and the host processor, and / or communicate with the embedded controller through the bus to debug the embedded controller.

14. The debugger according to claim 13, wherein: The control circuit is used to send a bus data packet carrying a debugging instruction to the embedded controller via the bus, and receive a bus data packet sent by the embedded controller.

15. The debugger of claim 13, wherein: The control circuit is used to obtain the BIOS debugging code from the bus data packet between the embedded controller and the host processor, and determine the BIOS startup status according to the BIOS debugging code.

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