High-side switch driving circuit and high-side driving chip

Abstract

The embodiment of the invention provides a high-side switch driving circuit and a high-side driving chip. The circuit comprises a current generation module and a current control module, the current generation module provides the sum of a first pull-up current and a second pull-up current when a logic signal is a first level signal, and provides the sum of a first pull-down current and a second pull-down current when the logic signal is a second level signal; when the logic signal jumps into a first level signal, the current control module adjusts the inverted voltage of the inverted input end of the high-side switch according to the output voltage of the high-side switch, and generates the positive phase voltage at the positive input end of the high-side switch according to the sum of the first pull-up current and the second pull-up current so as to drive the high-side switch to be switched on. And when the logic signal jumps to the second level signal, the reverse phase voltage is adjusted according to the output voltage and the sum of the first pull-down current and the second pull-down current so as to drive the high-side switch to be turned off. The circuit can reduce the electromagnetic interference of the switching action of the high-side switch on the peripheral current, and also can reduce the pulse offset.

Description

Technical Field

[0001] Embodiments of the present disclosure relate to the technical field of integrated circuits, and in particular to a high-side switch driving circuit and a high-side driving chip. Background Art

[0002] When a transistor is used as a switch, it can be divided into a high-side switch and a low-side switch according to the connection position of the transistor in the circuit. The high-side switch is connected between the positive pole of the power supply and the high-voltage end of the load. Usually, the gate of the high-side switch is connected to a driver, which can provide gate current to the high-side switch to control the on and off of the high-side switch, thereby controlling whether to output voltage to the load.

[0003] In the prior art, the driver provides a constant pull-up current or pull-down current to the gate of the high-side switch to control the high-side switch to turn on or off, and in order to reduce the electromagnetic interference caused by the switching action of the high-side switch to the peripheral circuit, the slew rate cannot be too high. However, when the slew rate is low, the asymmetry of the propagation delay will cause a large pulse offset. Summary of the invention

[0004] The embodiments of the present disclosure provide a high-side switch driving circuit and a high-side driving chip, which can reduce the electromagnetic interference of the switching action of the high-side switch on the peripheral circuit and reduce the pulse offset.

[0005] In a first aspect, the present disclosure provides a high-side switch driving circuit, comprising: a current generating module and a current control module.

[0006] The current generating module is configured to receive a logic signal and, when the logic signal is a first level signal, provide the sum of the first pull-up current, the second pull-up current and the second pull-down current to the current control module; and, when the logic signal is a second level signal, provide the sum of the first pull-down current, the second pull-down current and the second pull-up current to the current control module.

[0007] The current control module has a positive input terminal and an inverting input terminal. The current control module is configured to, when the logic signal jumps from the second level signal to the first level signal, adjust the inverting voltage of the inverting input terminal according to the output voltage of the high-side switch, and generate a positive voltage at the positive input terminal according to the sum of the first pull-up current and the second pull-up current, thereby controlling the gate current of the high-side switch to drive the high-side switch to turn on; when the logic signal jumps from the first level signal to the second level signal, adjust the inverting voltage according to the output voltage and the sum of the first pull-down current and the second pull-down current, thereby controlling the gate current to drive the high-side switch to turn off.

[0008] In some embodiments of the present disclosure, the current generating module includes a control unit, a pull-up current source unit, and a pull-down current source unit.

[0009] The input end of the pull-up current source unit and the input end of the pull-down current source unit are connected to a first power supply voltage, the control end of the pull-up current source unit is connected to a first output end of the control unit, the output end of the pull-up current source unit is connected to a positive input end of the current control module, the control end of the pull-down current source unit is connected to a second output end of the control unit, the output end of the pull-down current source unit is connected to an inverting input end of the current control module, and the input end of the control unit is connected to the logic signal.

[0010] The control unit is configured to generate a current source control signal according to the logic signal.

[0011] The pull-up current source unit is configured to, when the logic signal is the first level signal, output the sum of the first pull-up current and the second pull-up current to the current control module according to the current source control signal; and when the logic signal is the second level signal, output the second pull-up current to the current control module according to the current source control signal.

[0012] The pull-down current source unit is configured to, when the logic signal is the first level signal, output the second pull-down current to the current control module according to the current source control signal; and when the logic signal is the second level signal, output the sum of the first pull-down current and the second pull-down current to the current control module according to the current source control signal.

[0013] The second pull-down current is equal to the second pull-up current.

[0014] In some embodiments of the present disclosure, the pull-up current source unit includes a first current source, a second current source and a first switch.

[0015] The input end of the first current source and the input end of the second current source are connected to the first power supply voltage, the output end of the first current source is connected to the first end of the first switch, the second end of the first switch is connected to the output end of the second current source and the non-phase input end of the current control module, and the control end of the first switch is connected to the first output end of the control unit.

[0016] In some embodiments of the present disclosure, the pull-down current source unit includes a third current source, a fourth current source and a second switch.

[0017] The input end of the third current source and the input end of the fourth current source are connected to the first power supply voltage, the output end of the third current source is connected to the first end of the second switch, the second end of the second switch is connected to the output end of the fourth current source and the inverting input end of the current control module, and the control end of the second switch is connected to the second output end of the control unit.

[0018] In some embodiments of the present disclosure, the current control module includes a conversion unit, a transconductance amplifier, a feedback unit and a pull-down resistor.

[0019] The first input end of the conversion unit is connected to the non-inverting input end of the transconductance amplifier and the output end of the pull-up current source unit, the second input end of the conversion unit is connected to the inverting input end of the transconductance amplifier and the output end of the pull-down current source unit, and the output end of the conversion unit is connected to the input end of the high-side switch and the second power supply voltage;

[0020] The output end of the transconductance amplifier is connected to the first end of the pull-down resistor and the gate of the high-side switch, the second end of the pull-down resistor is connected to the output end of the high-side switch, and the feedback unit is connected across the gate of the high-side switch and / or the output end of the high-side switch and the inverting input end of the transconductance amplifier.

[0021] The conversion unit is configured to, when the logic signal jumps from the second level signal to the first level signal, convert the sum of the first pull-up current and the second pull-up current into the positive phase voltage, and convert the second pull-down current into the negative phase voltage; when the logic signal jumps from the first level signal to the second level signal, convert the sum of the first pull-down current and the second pull-down current into the negative phase voltage, and convert the second pull-up current into the positive phase voltage. The conversion coefficient of the negative phase voltage is equal to the conversion coefficient of the positive phase voltage.

[0022] The feedback unit is configured to adjust the inverting voltage according to the output voltage so that the inverting voltage and the positive voltage are equal and maintained when the logic signal jumps. The transconductance amplifier is configured to control the gate current according to the differential voltage between the inverting voltage and the positive voltage.

[0023] In some embodiments of the present disclosure, the conversion unit includes a first resistor and a second resistor having equal resistance values.

[0024] The first end of the first resistor is connected to the non-inverting input terminal of the transconductance amplifier and the output terminal of the pull-up current source unit, the second end of the first resistor is connected to the second end of the second resistor, the input terminal of the high-side switch and the second power supply voltage, and the first end of the second resistor is connected to the inverting input terminal of the transconductance amplifier, one end of the feedback unit and the output terminal of the pull-down current source unit.

[0025] In some embodiments of the present disclosure, the feedback unit includes a feedback capacitor.

[0026] The first plate of the feedback capacitor is connected to the output end of the pull-down current source unit, the second input end of the conversion unit and the inverting input end of the transconductance amplifier, and the second plate of the feedback capacitor is connected to the gate of the high-side switch or the output end of the high-side switch.

[0027] In some embodiments of the present disclosure, the feedback unit includes a first feedback capacitor and a second feedback capacitor.

[0028] The first plate of the first feedback capacitor is connected to the output end of the pull-down current source unit, the second input end of the conversion unit and the inverting input end of the transconductance amplifier, the second plate of the first feedback capacitor is connected to the first plate of the second feedback capacitor and the gate of the high-side switch, and the second plate of the second feedback capacitor is connected to the output end of the high-side switch.

[0029] In some embodiments of the present disclosure, the control unit includes a first inverter and a second inverter.

[0030] The input end of the first inverter is connected to the logic signal, the output end of the first inverter is connected to the input end of the second inverter and the control end of the pull-down current source unit, and the output end of the second inverter is connected to the control end of the pull-up current source unit.

[0031] In a second aspect, the present disclosure provides a high-side driver chip, comprising any high-side switch driver circuit provided in the first aspect.

[0032] In the technical solution of the embodiment of the present disclosure, the high-side switch driving circuit includes a current generating module and a current control module. The current generating module can receive a logic signal, and when the logic signal is a first level signal, provide the sum of the first pull-up current and the second pull-up current and the second pull-down current to the current control module. When the logic signal is a second level signal, provide the sum of the first pull-down current and the second pull-down current and the second pull-up current to the current control module. The current control module has a positive input terminal and an inverting input terminal. When the logic signal jumps from the second level signal to the first level signal, the current control module can adjust the inverting voltage of the inverting input terminal according to the output voltage of the high-side switch, and generate a positive voltage at the positive input terminal according to the sum of the first pull-up current and the second pull-up current, thereby controlling the gate current of the high-side switch to drive the high-side switch to turn on. When the logic signal jumps from the first level signal to the second level signal, the inverting voltage is adjusted according to the output voltage and the sum of the first pull-down current and the second pull-down current, thereby controlling the gate current to drive the high-side switch to turn off. In this way, the slew rate of the output voltage can be decoupled from the pulse offset, and a lower and close first pull-up current and a first pull-down current can be set to reduce the electromagnetic interference of the switching action of the high-side switch on the peripheral current, and a higher maximum pull-up current and a maximum pull-down current can be set to reduce the pulse offset.

[0033] The above description is only an overview of the technical solution of the embodiment of the present application. In order to more clearly understand the technical means of the embodiment of the present application, it can be implemented in accordance with the contents of the specification. In order to make the above and other purposes, features and advantages of the embodiment of the present application more obvious and easy to understand, the specific implementation methods of the present application are listed below. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] In order to more clearly illustrate the technical solutions of the embodiments of the present application, a brief introduction will be given below to the drawings required for use in the description of the embodiments. Obviously, the drawings described below are some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0035] Figure 1 A schematic diagram of the structure of a high-side driver provided in the prior art.

[0036] Figure 2 A circuit diagram of a high-side driver provided in the prior art.

[0037] Figure 3 A timing diagram of a high-side driver provided in the prior art.

[0038] Figure 4 A schematic diagram of the structure of a high-side switch driving circuit provided in an embodiment of the present disclosure.

[0039] Figure 5 A circuit diagram of a high-side switch driving circuit provided in an embodiment of the present disclosure.

[0040] Figure 6 A rising edge timing simulation diagram of a high-side switch driving circuit provided in an embodiment of the present disclosure.

[0041] Figure 7 A falling edge timing simulation diagram of a high-side switch driving circuit provided in an embodiment of the present disclosure.

[0042] Figure 8 A circuit diagram of another high-side switch driving circuit provided in an embodiment of the present disclosure.

[0043] Fig. 9 A circuit diagram of another high-side switch driving circuit provided in an embodiment of the present disclosure.

[0044] Fig.10 A timing simulation diagram of a high-side driver provided in the prior art.

[0045] Fig.11 A timing simulation diagram of a high-side switch driving circuit provided in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0046] In order to make the purpose, technical solution and advantages of the embodiments of the present disclosure clearer, the technical solution of the embodiments of the present disclosure will be clearly and completely described below in conjunction with the accompanying drawings. Obviously, the described embodiments are part of the embodiments of the present disclosure, rather than all of the embodiments. Based on the described embodiments of the present disclosure, all other embodiments obtained by those skilled in the art without creative work also fall within the scope of protection of the present disclosure.

[0047] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by those skilled in the art to which the disclosed subject matter belongs. It will be further understood that terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the specification and the relevant art, and will not be interpreted in an idealized or overly formal form unless otherwise explicitly defined herein. As used herein, a statement that two or more parts are "connected" together shall mean that the parts are joined together directly or through one or more intermediate components.

[0048] Reference to "embodiments" in this disclosure means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase "embodiments" in various places in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described in this disclosure may be combined with other embodiments.

[0049] In addition, the terms "first", "second", etc. in the specification and claims of the present disclosure or the above-mentioned drawings are used to distinguish different objects rather than to describe a specific order, and may explicitly or implicitly include one or more of the features.

[0050] The term "and / or" in this disclosure is only a description of the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can represent: A exists, A and B exist at the same time, and B exists. In addition, the character " / " in this article generally indicates that the associated objects before and after are in an "or" relationship.

[0051] In the description of the present disclosure, unless otherwise specified, "plurality" and "at least two" mean more than two (including two), and similarly, "multiple groups" and "at least two groups" mean more than two groups (including two).

[0052] In order to enable those skilled in the art to better understand the solution of the present application, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the accompanying drawings.

[0053] Figure 1 A schematic diagram of a high-side driver provided by the prior art is shown in FIG. Figure 1 As shown, the high-side driver includes a gate driver 10 and a high-side switch MH. The input end of the gate driver 10 is connected to the logic signal ON, the power end of the gate driver 10 is connected to the first power supply voltage VCP, the ground end of the gate driver 10 is connected to the first end of the load RL and the output end of the high-side switch MH, the output end of the gate driver 10 is connected to the gate of the high-side switch MH, the input end of the high-side switch MH is connected to the second power supply voltage VCC, and the second end of the load RL is grounded.

[0054] For example, Figure 1As shown, the high-side switch MH is an N-type metal oxide semiconductor field effect transistor (MOS). The source of the high-side switch MH is grounded through the load RL, and the drain of the high-side switch MH is connected to the second input power supply VCC. There is a parasitic capacitor Cgs between the source and the gate of the high-side switch MH, and there is a parasitic capacitor Cgd between the drain and the gate of the high-side switch MH.

[0055] The first power supply voltage VCP is the power supply voltage of the gate driver 10, and the second power supply voltage VCC is the power supply voltage of the high-side switch MH. The first power supply voltage VCP is usually higher than the second power supply voltage VCC. For example, the first power supply voltage VCP is about 10V higher than the second power supply voltage VCC.

[0056] The logic signal ON includes a first level signal and a second level signal. If the logic signal ON is a first level signal, the gate current i_gate output by the gate driver 10 to the high-side switch MH is a constant pull-up current i_pu to drive the high-side switch MH to turn on. If the logic signal ON is a second level signal, the gate current i_gate output by the gate driver 10 to the high-side switch MH is a constant pull-down current i_pd to drive the high-side switch MH to turn off.

[0057] For example, the first level signal is a high level signal, and the second level signal is a low level signal. Alternatively, the first level signal is a low level signal, and the second level signal is a high level signal.

[0058] Figure 2 A circuit diagram of a high-side driver provided by the prior art, combined with Figure 1 and Figure 2 As shown, the gate driver 10 includes a first inverter INV1, a second inverter INV2, a pull-up current source IB_pu, a pull-down current source IB_pd, a first switch S1, a second switch S2, a first transistor M1, a second transistor Ms and a pull-down resistor R0.

[0059] The input end of the first inverter INV1 receives a logic signal ON, the output end of the first inverter INV1 is connected to the control end of the second switch S2 and the input end of the second inverter INV2, and the output end of the second inverter INV2 is connected to the control end of the first switch S1. The input end of the pull-down current source IB_pd and the input end of the pull-up current source IB_pu are connected to the first power supply voltage VCP, the output end of the pull-up current source IB_pu is connected to the first end of the first switch S1, and the output end of the pull-down current source IB_pd is connected to the first end of the second switch S2.

[0060] The second end of the first switch S1 is connected to the first end of the pull-down resistor R0, the gate of the high-side switch MH and the second end of the second transistor M2, the second end of the second switch S2 is connected to the second end of the first transistor M1, the gate of the first transistor M1 and the gate of the second transistor M2, and the first end of the first transistor M1 is connected to the first end of the second transistor M2, the first end of the load RL and the second end of the pull-down resistor R0.

[0061] Exemplarily, the first transistor M1 and the second transistor M2 are NMOS, the source of the first transistor M1 and the source of the second transistor M2 are connected to the first end of the load RL, the drain of the first transistor M1 is connected to the second end of the second switch S2, and the drain of the second transistor M2 is connected to the second end of the first switch S1.

[0062] When the logic signal ON is the first level signal ON_H, the first switch S1 is turned on and the second switch S2 is turned off, then the first transistor M1 and the second transistor M2 are both turned off. The pull-up current i_pu provided by the pull-up current source IB_pu is output to the load RL through the pull-down resistor R0, then the pull-up current i_pu can pull up the gate voltage of the high-side switch MH to drive the high-side switch MH to turn on. At this time, the gate current i_gate of the high-side switch MH is the pull-up current i_pu.

[0063] When the logic signal ON is the second level signal ON_L, the first switch S1 is turned off and the second switch S2 is turned on, then the first transistor M1 and the second transistor M2 are both turned on, and the pull-down current i_pd provided by the pull-down current source IB_pd flows through the first transistor M1. Since the first transistor M1 and the second transistor M2 form a current mirror, the second transistor M2 can mirror the pull-down current i_pd flowing through the first transistor M1 to the load RL, and the pull-down current i_pd can pull down the gate voltage of the high-side switch MH to drive the high-side switch MH to turn off. At this time, the gate current i_gate of the high-side switch MH is the pull-down current i_pd.

[0064] Figure 3 A timing diagram of a high-side driver provided by the prior art, such as Figure 3 As shown, at time t0, the logic signal ON jumps from the second level signal ON_L to the first level signal ON_H, and the gate current i_gate of the high-side switch MH jumps from zero to the pull-up current i_pu. After the pull-up current i_pu flows into the gate of the high-side switch MH, the parasitic capacitances Cgs and Cgd of the high-side switch MH can be charged, and the gate-source voltage VGS of the high-side switch MH rises linearly with time from zero.

[0065] At time t1, the gate-source voltage VGS of the high-side switch MH reaches the threshold voltage of the high-side switch MH, the channel of the high-side switch MH is opened, and the current provided by the second power supply voltage VCC is conducted to the load RL, and the output voltage Vout of the high-side switch MH begins to rise. Assuming that the transconductance of the high-side switch MH is high, at this time, the existence of the Miller effect makes the gate-source voltage VGS of the high-side switch MH begin to remain almost unchanged, and the pull-up current i_pu stops charging the parasitic capacitor Cgs, and continues to charge the parasitic capacitor Cgd.

[0066] At time t2, the output voltage Vout of the high-side switch MH rises to a value close to the second power supply voltage VCC, and the high-side switch MH enters the ohmic region. The pull-up current i_pu continues to pull up the gate-source voltage VGS of the high-side switch MH, and the pull-up current i_pu continues to charge the parasitic capacitors Cgs and Cgd. During the time period t1-t2, the rising rate of the output voltage Vout of the high-side switch MH and the rising rate of the gate voltage of the high-side switch MH are both i_pu / C gd , where C gd is the capacitance value of the parasitic capacitance Cgd.

[0067] At time t3, the gate voltage of the high-side switch MH almost reaches the first power supply voltage VCP, and the voltage margin is insufficient, so that the gate current i_gate of the high-side switch MH is reduced from the pull-up current i_pu to almost zero. At this time, the high-side switch MH is fully turned on, and the output voltage Vout of the high-side switch MH and the gate-source voltage VGS of the high-side switch MH begin to remain stable.

[0068] At time t4, the logic signal ON changes from the first level signal ON_H to the second level signal ON_L, and the high-side switch MH is turned off, and the gate current i_gate of the high-side switch MH changes from zero to the pull-down current i_pd. The pull-down current i_pd flows into the gate of the high-side switch MH, and the parasitic capacitance Cgs and the parasitic capacitance Cgd begin to discharge, and the gate-source voltage VGS of the high-side switch MH begins to decrease linearly with time.

[0069] At time t5, the high-side switch MH leaves the ohmic region, and the output voltage Vout of the high-side switch MH begins to decrease. At this time, the gate-source voltage VGS of the high-side switch MH drops to the threshold voltage, and the gate-source voltage VGS of the high-side switch MH begins to remain stable, then the parasitic capacitor Cgs stops discharging, while the parasitic capacitor Cgd continues to discharge. During the time period t4-t5, the decreasing rate of the output voltage Vout of the high-side switch MH and the decreasing rate of the gate voltage of the high-side switch MH are both i_pd / C gd .

[0070] At time t6, the channel of the high-side switch MH is cut off, and the output voltage Vout of the high-side switch MH drops to almost zero. At this time, the pull-down current i_pd starts to continue to pull down the gate-source voltage VGS of the high-side switch MH, and the parasitic capacitors Cgd and Cgs continue to discharge.

[0071] At time t7 , the gate-source voltage VGS of the high-side switch MH drops to zero, and the voltage margin is insufficient, so that the gate current i_gate of the high-side switch MH drops from the pull-down current i_pd to almost zero.

[0072] Generally speaking, the parasitic capacitance Cgs of the high-side switch MH is usually several times greater than the parasitic capacitance Cgd, and the gate-source voltage VGS of the high-side switch MH in the time period t1-t2 is much smaller than the gate-source voltage VGS of the high-side switch MH in the time period t3-t4. In order to minimize the electromagnetic interference of the switching action of the high-side switch MH to the peripheral circuit, the slew rate of the output voltage Vout of the high-side switch MH cannot be too high, so the pull-up current i_pu and the pull-down current i_pd cannot be designed to be too high.

[0073] If the rising slew rate and falling slew rate of the output voltage Vout of the high-side switch MH are relatively low and close, the asymmetry of the propagation delay will inevitably produce a large pulse offset tskew. tskew = tpHL-tpLH, where tpHL is the pulse offset of the output voltage Vout of the high-side switch MH on the rising edge, and tpLH is the pulse offset of the output voltage Vout of the high-side switch MH on the falling edge.

[0074] For example, the second power supply voltage VCC is 12V, the rising slew rate and the falling slew rate of the high-side switch MH are both 0.5V / us, and the pulse offset tskew of the output voltage Vout of the high-side switch MH is about 20us. Obviously, the pulse offset tskew is relatively large.

[0075] In order to solve the above problems, an embodiment of the present disclosure provides a high-side switch driving circuit including a current generating module and a current control module. The current generating module can receive a logic signal, and when the logic signal is a first level signal, provide the sum of the first pull-up current and the second pull-up current and the second pull-down current to the current control module; when the logic signal is a second level signal, provide the sum of the first pull-down current and the second pull-down current and the second pull-up current to the current control module; the current control module has a positive input terminal and an inverting input terminal; when the logic signal jumps from the second level signal to the first level signal, the current control module can adjust the inverting voltage of the inverting input terminal according to the output voltage of the high-side switch, and generate a positive voltage at the positive input terminal according to the sum of the first pull-up current and the second pull-up current, thereby controlling the gate current of the high-side switch to drive the high-side switch to turn on; when the logic signal jumps from the first level signal to the second level signal, the inverting voltage is adjusted according to the output voltage and the sum of the first pull-down current and the second pull-down current, thereby controlling the gate current to drive the high-side switch to turn off. In this way, the slew rate of the output voltage can be decoupled from the pulse offset, and a lower and close first pull-up current and a first pull-down current can be set to reduce the electromagnetic interference of the switching action of the high-side switch on the peripheral current, and a higher maximum pull-up current and a maximum pull-down current can be set to reduce the pulse offset.

[0076] Figure 4 A schematic diagram of a high-side switch driving circuit provided in an embodiment of the present disclosure is shown in FIG. Figure 4 As shown, the high-side switch driving circuit 100 includes a current generating module 110 and a current controlling module 120 .

[0077] Among them, the control end of the current generating module 110 receives the logic signal ON, the input end of the current generating module 110 is connected to the first power supply voltage VCP, the first output end of the current generating module 110 is connected to the positive input end of the current control module 120, and the second output end of the current generating module 110 is connected to the negative input end of the current control module 120.

[0078] The output end of the current control module 120 is connected to the gate of the high side switch MH, the output end of the high side switch MH is connected to the first end of the load RL, and the input end of the high side switch MH is connected to the second power supply voltage VCC.

[0079] The current generating module 110 is configured to provide the sum i_u+i_u' of the first pull-up current i_u and the second pull-up current i_u', and the second pull-down current i_d' to the current control module 120 when the logic signal ON is a first level signal, and to provide the sum i_d+i_d' of the first pull-down current i_d and the second pull-down current i_d', and the second pull-up current i_u' to the current control module 120 when the logic signal ON is a second level signal.

[0080] The current control module 120 has a positive input terminal and a negative input terminal. The current control module 120 is configured to adjust the negative voltage Vd of the negative input terminal according to the output voltage Vout of the high-side switch MH when the logic signal ON jumps from the second level signal to the first level signal, and generate a positive voltage Vu at the positive input terminal according to the sum i_u+i_u' of the first pull-up current i_u and the second pull-up current i_u', thereby controlling the gate current i_gate of the high-side switch MH to drive the high-side switch MH to turn on. When the logic signal ON jumps from the first level signal to the second level signal, the negative voltage Vd is adjusted according to the output voltage Vout and the sum i_d+i_d' of the first pull-down current i_d and the second pull-down current i_d', thereby controlling the gate current i_gate to drive the high-side switch MH to turn off.

[0081] For example, Figure 5 A circuit diagram of a high-side switch driving circuit provided by an embodiment of the present disclosure is shown in FIG. Figure 5 As shown, the current generating module 110 includes a pull-up current source unit 111 , a pull-down current source unit 112 and a control unit 113 .

[0082] The input end of the pull-up current source unit 111 and the input end of the pull-down current source unit 112 are connected to the first power supply voltage VCP, the control end of the pull-up current source unit 111 is connected to the first output end of the control unit 113, and the output end of the pull-up current source unit 111 is connected to the positive input end of the current control module 120. The control end of the pull-down current source unit 112 is connected to the second output end of the control unit 113, the output end of the pull-down current source unit 112 is connected to the negative input end of the current control module 120, and the input end of the control unit 113 is connected to the logic signal ON.

[0083] Continue to see Figure 5 The control unit 113 includes a first inverter INV1 and a second inverter INV2, the input end of the first inverter INV1 is connected to the logic signal ON, the output end of the first inverter INV1 is connected to the input end of the second inverter INV2 and the control end of the pull-down current source unit 112, and the output end of the second inverter INV2 is connected to the control end of the pull-up current source unit 111.

[0084] When the control unit 113 receives the logic signal ON, the first inverter INV1 can invert the logic signal ON to obtain the second current source control signal ON_off, and the second inverter INV2 can invert the second current source control signal ON_off to obtain the first current source control signal ON_on.

[0085] For example, when the logic signal ON received by the control unit 113 is a first level signal, the second current source control signal ON_off is a second level signal, and the first current source control signal ON_on is a first level signal. When the logic signal ON received by the control unit 113 is a second level signal, the second current source control signal ON_off is a first level signal, and the first current source control signal ON_on is a second level signal.

[0086] It should be noted that the first level signal may be a high level signal and the corresponding second level signal may be a low level signal, or the first level signal may be a low level signal and the corresponding second level signal may be a high level signal, and the present disclosure does not impose any specific limitation on this.

[0087] In this way, the control unit 113 can generate the inverted first current source control signal ON_on and the second current source control signal ON_off according to the logic signal ON.

[0088] When the high-side switch driving circuit 100 is in working state, the pull-down current source unit 112 continuously outputs the second pull-down current i_d′ to the current control module 120 , and at the same time, the pull-up current source unit 111 continuously outputs the second pull-up current i_u′ to the current control module 120 , and the second pull-up current i_u′ is equal to the second pull-down current i_d′.

[0089] When the logic signal ON is a first level signal, the first current source control signal ON_on is a first level signal, and the pull-up current source unit 111 outputs the second pull-up current i_u' to the current control module 120 while also outputting the first pull-up current i_u, that is, the pull-up current source unit 111 outputs the sum i_u+i_u' of the first pull-up current i_u and the second pull-up current i_u' to the current control module 120. At this time, the second current source control signal ON_off is a second level signal, and the pull-down current source unit 112 only outputs the second pull-down current i_d' to the current control module 120.

[0090] When the logic signal ON is a second level signal, the second current source control signal ON_off is a first level signal, and the pull-down current source unit 112 outputs the second pull-down current i_d' to the current control module 120 while also outputting the first pull-down current i_d, that is, the pull-down current source unit 112 outputs the sum i_d+i_d' of the first pull-down current i_d and the second pull-down current i_d' to the current control module 120. At this time, the first current source control signal ON_on is a second level signal, and the pull-up current source unit 111 only outputs the second pull-up current i_u' to the current control module 120.

[0091] Thus, when the logic signal ON is a first level signal, the pull-up current source unit 111 outputs the sum i_u+i_u' of the first pull-up current i_u and the second pull-up current i_u' to the current control module 120 according to the first current source control signal ON_on, and the pull-down current source unit 112 outputs the second pull-down current i_d' to the current control module 120 according to the second current source control signal ON_off. When the logic signal ON is a second level signal, the pull-up current source unit 111 outputs the second pull-up current i_u' to the current control module 120 according to the first current source control signal ON_on, and the pull-down current source unit 112 outputs the sum i_d+i_d' of the first pull-down current i_d and the second pull-down current i_d' to the current control module 120 according to the second current source control signal ON_off.

[0092] Continue to see Figure 5 The current control module 120 includes a conversion unit 121, a transconductance amplifier OTA, a feedback unit 122 and a pull-down resistor R0.

[0093] Among them, the first input end of the conversion unit 121 is connected to the non-inverting input end of the transconductance amplifier OTA and the output end of the pull-up current source unit 111, the second input end of the conversion unit 121 is connected to the inverting input end of the transconductance amplifier OTA and the output end of the pull-down current source unit 112, and the output end of the conversion unit 121 is connected to the input end of the high-side switch MH and the second power supply voltage VCC.

[0094] The output of the transconductance amplifier OTA is connected to the first end of the pull-down resistor R0 and the gate of the high-side switch MH, and the second end of the pull-down resistor R0 is connected to the output of the high-side switch MH. The feedback unit 122 is connected between the output of the high-side switch MH and the inverting input of the transconductance amplifier OTA.

[0095] In other implementations, the transconductance amplifier OTA in the current control module 120 may be replaced by an operational amplifier, and the connection relationship of the operational amplifier is the same as the connection relationship of the transconductance amplifier OTA in the above embodiment.

[0096] For example, Figure 6 This is a rising edge timing simulation diagram of a high-side switch driving circuit provided by an embodiment of the present disclosure. Figure 6As shown, at time t0, the logic signal ON jumps from a low level signal to a high level signal, the pull-up current received by the conversion unit 121 is the sum i_u+i_u' of the first pull-up current i_u and the second pull-up current i_u', and the received pull-down current is the second pull-down current i_d'. The conversion unit 121 can convert the pull-up current i_u+i_u' into a positive phase voltage Vu based on the same conversion coefficient m, that is, Vu=m*i_u+mi_u', and convert the second pull-down current i_d' into a negative phase voltage Vd, that is, Vd=m*i_d'.

[0097] The transconductance amplifier OTA (or operational amplifier) ​​can calculate the differential voltage Vu-Vd of the positive phase voltage Vu and the negative phase voltage Vd, that is, Vu-Vd=m*i_u+mi_u'-m*i_d'. Since the second pull-down current i_d' and the second pull-up current i_u' are equal, the m*i_u' and m*i_d' in the differential voltage Vu-Vd are offset, so the obtained differential voltage Vu-Vd is m*i_u. The gate current i_gate output by the transconductance amplifier OTA according to the differential voltage m*i_u is the maximum pull-up current i_pu_max, and the gate-source voltage VGS of the high-side switch MH rises linearly from zero.

[0098] like Figure 6 As shown, at time t1, the gate-source voltage VGS of the high-side switch MH rises to the threshold voltage, the high-side switch MH starts to conduct, and the output voltage Vout of the high-side switch MH starts to rise. The voltage coupling effect of the feedback unit 122 causes the reverse voltage Vd to increase as the output voltage Vout of the high-side switch MH increases, thereby reducing the differential voltage Vu-Vd.

[0099] When the reverse voltage Vd increases from m*i_d' to m*(i_u+i_u'), the differential voltage Vu-Vd decreases to zero, and the feedback unit 122 forms a negative feedback effect, which can adjust the output current of the transconductance amplifier OTA (or operational amplifier) ​​to i_pu_reg, that is, the gate current i_gate jumps from the maximum pull-up current i_pu_max to the current i_pu_reg. During the negative feedback effect, the current flowing from the feedback unit 122 to the reverse input terminal of the transconductance amplifier OTA (or operational amplifier) ​​is approximately equal to the first pull-up current i_u, so that the reverse voltage Vd is approximately equal to the positive voltage Vu and the reverse voltage Vd remains stable.

[0100] During the negative feedback period, the voltage rising rate of the feedback unit 122 and the rising rate of the output voltage Vout of the high-side switch MH are both i_u / C f Among them, C f is the capacitance value of the feedback unit 122 .

[0101] At time t2, the output voltage Vout of the high side switch MH almost reaches the second power supply voltage VCC, and the output voltage Vout of the high side switch MH stops rising. The rising rate of the output voltage Vout of the high side switch MH is zero, and the voltage rising rate of the feedback unit 122 is zero.

[0102] At this time, the feedback unit 122 quits the negative feedback function, and the reverse voltage Vd starts to drop until it is lower than the positive voltage Vu. The output current of the transconductance amplifier OTA is adjusted to the maximum pull-up current i_pu_max, that is, the gate current i_gate jumps from the current i_pu_reg to the maximum pull-up current i_pu_max.

[0103] At time t3 , the gate voltage of the high-side switch MH reaches the first power supply voltage VCP, and the high-side switch MH is fully turned on.

[0104] So, like Figure 6 As shown, the gate current i_gate in the time period t0-t1 is the maximum pull-up current i_pu_max, the time period t1-t2 is the negative feedback time period of the feedback unit 122, and the gate current i_gate in this time period is the current i_pu_reg, and the gate current i_gate in the time period t2-t3 is the maximum pull-up current i_pu_max. Among them, the current i_pu_reg is calculated by i_u / C f adjust.

[0105] For example, Figure 7 This is a falling edge timing simulation diagram of a high-side switch driving circuit provided by an embodiment of the present disclosure. Figure 7 As shown, at time t4, the logic signal ON jumps from a high level signal to a low level signal, the pull-down current received by the conversion unit 121 is the sum i_d+i_d' of the first pull-down current i_d and the second pull-down current i_d', and the received pull-up current is the second pull-up current i_u'. The conversion unit 121 can convert the pull-down current i_d+i_d' into an inverting voltage Vd based on the same conversion coefficient m, that is, Vd=m*i_d+m*i_d', and convert the second pull-up current i_u' into a positive voltage Vu, that is, Vu=m*i_u'.

[0106] At this time, the differential voltage Vu-Vd calculated by the transconductance amplifier OTA is m*i_d, and the gate current i_gate output by the transconductance amplifier OTA according to the differential voltage m*i_d is the maximum pull-down current i_pd_max, and the gate-source voltage VGS of the high-side switch MH begins to decrease linearly.

[0107] Similarly, if Figure 7As shown, during the negative feedback period, i.e., the time period t5-t6, the voltage drop rate of the feedback unit 122 and the drop rate of the output voltage Vout of the high-side switch MH are both i_d / C f The gate current i_gate in the time period t4-t5 is the maximum pull-down current i_pd_max, the gate current i_gate in the time period t5-t6 is the current i_pd_reg, and the gate current i_gate in the time period t6-t7 is the maximum pull-down current i_pd_max.

[0108] It should be noted that Figure 5 The feedback unit 122 is only exemplarily shown to be connected between the output terminal of the high-side switch MH and the inverting input terminal of the transconductance amplifier OTA (or operational amplifier). Since the gate voltage of the high-side switch MH increases or decreases at the same rate when the output voltage Vout of the high-side switch MH increases or decreases, the feedback unit 122 can also be connected between the gate of the high-side switch MH and the inverting input terminal of the transconductance amplifier OTA, such as Figure 8 As shown, Figure 8 A circuit diagram of another high-side switch driving circuit provided in an embodiment of the present disclosure.

[0109] Alternatively, a portion of the feedback unit 122 is connected between the gate of the high-side switch MH and the inverting input terminal of the transconductance amplifier OTA, and another portion of the feedback unit 122 is connected between the gate of the high-side switch MH and the output terminal of the high-side switch MH. Fig. 9 As shown, Fig. 9 A circuit diagram of another high-side switch driving circuit provided in an embodiment of the present disclosure.

[0110] In summary, the slew rate of the output voltage Vout of the high-side switch MH depends on the first pull-up current i_u and the first pull-down current i_d, and the pulse offset depends on the maximum pull-up current i_pu_max and the maximum pull-down current i_pd_max, so the slew rate of the output voltage can be decoupled from the pulse offset. In this way, the first pull-up current i_u and the first pull-down current i_d can be set relatively low and close to each other to reduce the electromagnetic interference of the switching action of the high-side switch MH on the peripheral current, and the maximum pull-up current i_pu_max and the maximum pull-down current i_pd_max can be set relatively large to reduce the pulse offset.

[0111] In some embodiments, see Figure 5 , Figure 8 and Fig. 9The pull-up current source unit 111 includes a first current source IB1, a second current source IB2 and a first switch S1. The input end of the first current source IB1 and the input end of the second current source IB2 are connected to the first power supply voltage VCP, the output end of the first current source IB1 is connected to the first end of the first switch S1, the second end of the first switch S1 is connected to the output end of the second current source IB2 and the non-inverting input end of the current control module 120, and the control end of the first switch S1 is connected to the first output end of the control unit 113.

[0112] The pull-down current source unit 112 includes a third current source IB3, a fourth current source IB4 and a second switch S2. The input end of the third current source IB3 and the input end of the fourth current source IB4 are connected to the first power supply voltage VCP, the output end of the third current source IB3 is connected to the first end of the second switch S2, the second end of the second switch S2 is connected to the output end of the fourth current source IB4 and the inverting input end of the current control module 120, and the control end of the second switch S2 is connected to the second output end of the control unit 113.

[0113] Exemplarily, when the high-side switch driving circuit 100 is in a working state, the second current source IB2 and the fourth current source IB4 are always in an on state, then the second current source IB2 can continuously output the second pull-up current i_u' to the current control module 120, and the fourth current source IB4 can continuously output the second pull-down current i_d' to the current control module 120.

[0114] When the logic signal ON is a first level signal, the first switch S1 is turned on and the second switch S2 is turned off, the first current source IB1 is turned on to the positive input terminal of the current control module 120, and the third current source IB3 is turned off to the negative input terminal of the current control module 120, then the first current source IB1 can output the first pull-up current i_u to the current control module 120.

[0115] When the logic signal ON is a second level signal, the first switch S1 is disconnected and the second switch S2 is turned on, the first current source IB1 is disconnected from the positive input terminal of the current control module 120, and the third current source IB3 is turned on from the negative input terminal of the current control module 120, then the third current source IB3 can output the first pull-down current i_d to the current control module 120.

[0116] In some embodiments, see Figure 5 , Figure 8 and Fig. 9 , the conversion unit 121 includes a first resistor R1 and a second resistor R2 with equal resistance.

[0117] Among them, the first end of the first resistor R1 is connected to the non-inverting input terminal of the transconductance amplifier OTA (or operational amplifier) ​​and the output terminal of the pull-up current source unit 111, the second end of the first resistor R1 is connected to the second end of the second resistor R2, the input terminal of the high-side switch MH and the second power supply voltage VCC, and the first end of the second resistor R2 is connected to the inverting input terminal of the transconductance amplifier OTA, one end of the feedback unit 122 and the output terminal of the pull-down current source unit 112.

[0118] Exemplarily, when the logic signal ON is a first level signal, the current flowing into the first resistor R1 is the sum of the first pull-up current i_u and the second pull-up current i_u', and the current flowing into the second resistor R2 is the second pull-down current i_d'. Since the second pull-up current i_u' and the second pull-down current i_d' are equal, and the resistance values ​​of the first resistor R1 and the second resistor R2 are equal, the transconductance amplifier OTA (or operational amplifier) ​​can offset the second pull-up current i_u' and the second pull-down current i_d' during differential operation to avoid affecting the gate current i_gate.

[0119] When the logic signal ON is a second level signal, the current flowing into the first resistor R1 is the second pull-up current i_u', and the current flowing into the second resistor R2 is the sum of the first pull-down current i_d' and the second pull-down current i_d'. Since the second pull-up current i_u' and the second pull-down current i_d' are equal, and the resistance values ​​of the first resistor R1 and the second resistor R2 are equal, the transconductance amplifier OTA (or operational amplifier) ​​can offset the second pull-up current i_u' and the second pull-down current i_d' during differential operation to avoid affecting the gate current i_gate.

[0120] In some embodiments, see Figure 5 , the feedback unit 122 includes a feedback capacitor Cf.

[0121] The first plate of the feedback capacitor Cf is connected to the output end of the pull-down current source unit 112, the second input end of the conversion unit 121 and the inverting input end of the transconductance amplifier OTA (or operational amplifier), and the second plate of the feedback capacitor Cf is connected to the output end of the high-side switch MH.

[0122] Exemplarily, when the logic signal ON is a first level signal, the pull-down current source unit 112 may continuously provide the second pull-down current i_d′ to the feedback capacitor Cf to charge the feedback capacitor Cf, thereby ensuring that the feedback capacitor Cf can achieve a negative feedback effect.

[0123] In other embodiments, the second plate of the feedback capacitor Cf is connected to the gate of the high-side switch MH, such as Figure 8 shown.

[0124] In some embodiments, see Fig. 9 The feedback unit 122 includes a first feedback capacitor Cf1 and a second feedback capacitor Cf2.

[0125] Among them, the first plate of the first feedback capacitor Cf1 is connected to the output end of the pull-down current source unit 112, the second input end of the conversion unit 121 and the inverting input end of the transconductance amplifier OTA (or operational amplifier), the second plate of the first feedback capacitor Cf1 is connected to the first plate of the second feedback capacitor Cf2 and the gate of the high-side switch MH, and the second plate of the second feedback capacitor Cf2 is connected to the output end of the high-side switch MH.

[0126] For example, Fig.10 A timing simulation diagram of a high-side driver provided by the prior art, such as Fig.10 As shown in FIG. 1 , when the slew rate of the output voltage Vout of the high-side driver is 1V / us, 1.5V / us, and 2.5V / us, respectively, the timing changes of the output voltage Vout of the high-side driver, the gate-source voltage VGS of the high-side switch MH, and the gate current i_gate are different. Fig.10 As shown, as the slew rate of the output voltage Vout decreases, the pulse offset of the output voltage Vout increases.

[0127] Fig.11 A timing simulation diagram of a high-side switch driving circuit provided by an embodiment of the present disclosure is shown in FIG. Fig.11 As shown, when the slew rates of the output voltage Vout of the high-side switch driving circuit 100 are 1V / us, 1.5V / us and 2.5V / us respectively, there is almost no significant difference in the timing changes of the output voltage Vout of the high-side switch driving circuit 100, the gate-source voltage VGS of the high-side switch MH and i_gate.

[0128] Obviously, the high-side switch driving circuit 100 provided by the present disclosure can reduce the slew rate of the output voltage Vout while keeping the pulse offset at a relatively low level.

[0129] The disclosed embodiment further provides a high-side driver chip, including the high-side switch driver circuit 100 provided in any of the above embodiments.

[0130] Exemplarily, the high-side driver chip includes a high-side switch driver circuit 100 and a high-side switch MH. The control end of the high-side switch driver circuit 100 is connected to the logic signal ON, the output end of the high-side switch driver circuit 100 is connected to the gate of the high-side switch MH, the output end of the high-side switch MH is grounded through the load RL, and the output end of the high-side switch MH is the output end of the high-side switch driver circuit 100.

[0131] The high-side driver chip provided in the embodiments of the present disclosure includes the high-side switch driver circuit 100 provided in any of the above embodiments, and has the same functional modules and beneficial effects as the high-side switch driver circuit 100, which will not be described in detail here.

[0132] Unless the context clearly indicates otherwise, the singular form of the words used herein and in the appended claims includes the plural and vice versa. Thus, when referring to the singular, the plural form of the corresponding term is generally included. Similarly, the words "comprise" and "include" are to be interpreted as inclusive rather than exclusive. Likewise, the terms "include" and "or" should be interpreted as inclusive unless such interpretation is expressly prohibited herein. Where the term "example" is used herein, particularly when it is located after a group of terms, the "example" is merely exemplary and illustrative and should not be considered exclusive or comprehensive.

[0133] Further aspects and scopes of adaptability become apparent from the description provided herein. It should be understood that various aspects of the present application can be implemented individually or in combination with one or more other aspects. It should also be understood that the description and specific embodiments herein are intended for purposes of illustration only and are not intended to limit the scope of the present application.

[0134] Several embodiments of the present disclosure are described in detail above, but it is obvious that those skilled in the art can make various modifications and variations to the embodiments of the present disclosure without departing from the spirit and scope of the present disclosure. The protection scope of the present disclosure is defined by the attached claims.

Claims

1. A high side switch driving circuit, characterized in that: include: A current generating module and a current controlling module; The current generating module is configured to receive a logic signal, and when the logic signal is a first level signal, provide the sum of the first pull-up current and the second pull-up current and the second pull-down current to the current control module, and when the logic signal is a second level signal, provide the sum of the first pull-down current and the second pull-down current and the second pull-up current to the current control module; The current control module has a positive phase input terminal and a negative phase input terminal, and the current control module is configured to, when the logic signal jumps from the second level signal to the first level signal, adjust the negative phase voltage of the negative phase input terminal according to the output voltage of the high-side switch, and generate a positive phase voltage at the positive phase input terminal according to the sum of the first pull-up current and the second pull-up current, thereby controlling the gate current of the high-side switch to drive the high-side switch to turn on; When the logic signal jumps from the first level signal to the second level signal, the inverting voltage is adjusted according to the output voltage and the sum of the first pull-down current and the second pull-down current, thereby controlling the gate current to drive the high-side switch to turn off.

2. The high side switch driving circuit according to claim 1, characterized in that: The current generating module comprises a control unit, a pull-up current source unit and a pull-down current source unit; The input end of the pull-up current source unit and the input end of the pull-down current source unit are connected to a first power supply voltage, the control end of the pull-up current source unit is connected to a first output end of the control unit, the output end of the pull-up current source unit is connected to a positive input end of the current control module, the control end of the pull-down current source unit is connected to a second output end of the control unit, the output end of the pull-down current source unit is connected to an inverting input end of the current control module, and the input end of the control unit is connected to the logic signal; The control unit is configured to generate a current source control signal according to the logic signal; The pull-up current source unit is configured to output the sum of the first pull-up current and the second pull-up current to the current control module according to the current source control signal when the logic signal is the first level signal; When the logic signal is the second level signal, outputting the second pull-up current to the current control module according to the current source control signal; The pull-down current source unit is configured to, when the logic signal is the first level signal, output the second pull-down current to the current control module according to the current source control signal; when the logic signal is the second level signal, output the sum of the first pull-down current and the second pull-down current to the current control module according to the current source control signal; The second pull-down current is equal to the second pull-up current.

3. The high side switch driving circuit according to claim 2, characterized in that: The pull-up current source unit includes a first current source, a second current source and a first switch; The input end of the first current source and the input end of the second current source are connected to the first power supply voltage, the output end of the first current source is connected to the first end of the first switch, the second end of the first switch is connected to the output end of the second current source and the non-phase input end of the current control module, and the control end of the first switch is connected to the first output end of the control unit.

4. The high side switch driving circuit according to claim 2, characterized in that: The pull-down current source unit includes a third current source, a fourth current source and a second switch; The input end of the third current source and the input end of the fourth current source are connected to the first power supply voltage, the output end of the third current source is connected to the first end of the second switch, the second end of the second switch is connected to the output end of the fourth current source and the inverting input end of the current control module, and the control end of the second switch is connected to the second output end of the control unit.

5. The high side switch driving circuit according to claim 2, characterized in that: The current control module includes a conversion unit, a transconductance amplifier, a feedback unit and a pull-down resistor; The first input end of the conversion unit is connected to the non-inverting input end of the transconductance amplifier and the output end of the pull-up current source unit, the second input end of the conversion unit is connected to the inverting input end of the transconductance amplifier and the output end of the pull-down current source unit, and the output end of the conversion unit is connected to the input end of the high-side switch and the second power supply voltage; The output end of the transconductance amplifier is connected to the first end of the pull-down resistor and the gate of the high-side switch, the second end of the pull-down resistor is connected to the output end of the high-side switch, and the feedback unit is connected between the gate of the high-side switch and / or the output end of the high-side switch and the inverting input end of the transconductance amplifier; The conversion unit is configured to, when the logic signal jumps from the second level signal to the first level signal, convert the sum of the first pull-up current and the second pull-up current into the positive phase voltage, and convert the second pull-down current into the negative phase voltage; When the logic signal jumps from the first level signal to the second level signal, the sum of the first pull-down current and the second pull-down current is converted into the inverting voltage, and the second pull-up current is converted into the positive voltage; wherein the conversion coefficients of the inverting voltage and the positive voltage are equal; The feedback unit is configured to adjust the reverse voltage according to the output voltage so that the reverse voltage and the positive voltage are equal and maintained when the logic signal jumps; The transconductance amplifier is configured to control the gate current according to a differential voltage between the inverting voltage and the non-inverting voltage.

6. The high side switch driving circuit according to claim 5, characterized in that: The conversion unit includes a first resistor and a second resistor having equal resistance values; The first end of the first resistor is connected to the non-inverting input terminal of the transconductance amplifier and the output terminal of the pull-up current source unit, the second end of the first resistor is connected to the second end of the second resistor, the input terminal of the high-side switch and the second power supply voltage, and the first end of the second resistor is connected to the inverting input terminal of the transconductance amplifier, one end of the feedback unit and the output terminal of the pull-down current source unit.

7. The high side switch driving circuit according to claim 5, characterized in that: The feedback unit includes a feedback capacitor; The first plate of the feedback capacitor is connected to the output end of the pull-down current source unit, the second input end of the conversion unit and the inverting input end of the transconductance amplifier, and the second plate of the feedback capacitor is connected to the gate of the high-side switch or the output end of the high-side switch.

8. The high side switch driving circuit according to claim 5, characterized in that: The feedback unit includes a first feedback capacitor and a second feedback capacitor; The first plate of the first feedback capacitor is connected to the output end of the pull-down current source unit, the second input end of the conversion unit and the inverting input end of the transconductance amplifier, the second plate of the first feedback capacitor is connected to the first plate of the second feedback capacitor and the gate of the high-side switch, and the second plate of the second feedback capacitor is connected to the output end of the high-side switch.

9. The high side switch driving circuit according to claim 2, characterized in that: The control unit includes a first inverter and a second inverter; The input end of the first inverter is connected to the logic signal, the output end of the first inverter is connected to the input end of the second inverter and the control end of the pull-down current source unit, and the output end of the second inverter is connected to the control end of the pull-up current source unit.

10. A high-side driver chip, characterized in that: The invention comprises the high side switch driving circuit as claimed in any one of claims 1 to 9.

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