Data packet processing method and device and electronic equipment

Abstract

The invention provides a data packet processing method and device and electronic equipment, and relates to the technical field of communication. The method comprises: receiving a first data packet, the first data packet comprising N layers of packet headers, N being a positive integer; a first packet header is determined, the first packet header is the Kth-layer packet header in the N-layer packet headers, and K is a positive integer and is smaller than N; and when the packet header of the first data packet is analyzed, the first packet header is analyzed. According to the invention, the problem that the time delay is relatively large in the current data packet processing mode can be solved.

Description

Technical Field

[0001] The present application relates to the field of communication technology, and in particular to a data packet processing method, device and electronic device. Background Art

[0002] At present, the general parsing and processing mechanism for data packets is: when a data packet is received, the data packet is parsed, and the headers of the data packet are peeled off layer by layer, that is, the Ethernet header, Internet Protocol (IP) header, Transmission Control Protocol (TCP) or User Datagram Protocol (UDP) header and Internet Control Message Protocol (ICMP) header are peeled off in sequence; then some fields in the header are modified or other actions are performed, and then each header is re-encapsulated and the data packet is forwarded. In this process, there are the following problems: when parsing and processing the data packet, each header of the data packet needs to be parsed in sequence, but the modified headers may be part of the headers, and the unmodified parts still need to be encapsulated layer by layer, which leads to an increase in the parsing delay and re-encapsulation delay of the data packet header, thereby increasing the processing delay of the entire data packet. Summary of the invention

[0003] The present application provides a data packet processing method, device and electronic device, which can solve the problem of large delay in current data packet processing methods.

[0004] An embodiment of the present application provides a data packet processing method, which is applied to an electronic device, and the method includes:

[0005] Receive a first data packet, where the first data packet includes N layers of packet headers, where N is a positive integer;

[0006] Determine a first packet header, where the first packet header is a K-th layer packet header among the N layers of packet headers, where K is a positive integer and K<N;

[0007] When parsing the packet header of the first data packet, the first packet header is parsed.

[0008] Optionally, the first packet header is a packet header to be modified, or the first packet header is a preset packet header that needs to be pre-parsed.

[0009] Optionally, the N-layer packet header is agreed upon by a protocol, or the N-layer packet header is determined based on a preconfiguration.

[0010] Optionally, when parsing the packet header of the first data packet, parsing the first packet header includes:

[0011] Starting from the first layer of the N-layer packet headers, the following operations are performed on the first K-layer packet headers in the N-layer packet headers:

[0012] Determine a first field in the i-th layer header, where the first field is used to indicate the i+1-th layer header, where i is a positive integer and i≤K;

[0013] The i+1th layer packet header is parsed according to the first field.

[0014] Optionally, when parsing the packet header of the first data packet, parsing the first packet header includes:

[0015] Determine a second field in a first K-1 layer packet header in the N layer packet header, where the second field is used to indicate the first packet header;

[0016] The first packet header is parsed according to the second field.

[0017] Optionally, when parsing the packet header of the first data packet, after parsing the first packet header, the method further includes:

[0018] When the parsed first K-layer packet headers in the N-layer packet headers do not include the second packet header, the parsing continues to the second packet header; wherein the second packet header is the packet header to be modified.

[0019] Optionally, continuing to parse the second packet header includes:

[0020] Starting from the K+1th layer header of the N layer headers, the following operations are performed on the latter NK layer headers in the N layer headers:

[0021] Determine a third field in the j-th layer header, where the third field is used to indicate the j+1-th layer header, where j is a positive integer and K+1≤j≤N;

[0022] The j+1th layer packet header is parsed according to the third field.

[0023] Optionally, continuing to parse the second packet header includes:

[0024] Determine a fourth field in a later NK layer header in the N layer header, where the fourth field is used to indicate the second header;

[0025] The second packet header is parsed according to the fourth field.

[0026] Optionally, the data packet processing method further includes:

[0027] receiving update information, where the update information is used to indicate an update of a parsing configuration;

[0028] According to the update information, the first parsing rule and / or the second parsing rule are updated; wherein, the first parsing rule is a rule for parsing the N-layer header of the first data packet, and the second parsing rule is a rule for pre-parsing the first K-layer header of the N-layer header.

[0029] The embodiment of the present application also provides a data packet processing device, including a memory, a transceiver, and a processor;

[0030] The memory is used to store computer programs; the transceiver is used to send and receive data under the control of the processor; the processor is used to read the computer program in the memory and perform the following operations:

[0031] Receive a first data packet, where the first data packet includes N layers of packet headers, where N is a positive integer;

[0032] Determine a first packet header, where the first packet header is a K-th layer packet header among the N layers of packet headers, where K is a positive integer and K<N;

[0033] When parsing the packet header of the first data packet, the first packet header is parsed.

[0034] Optionally, the first packet header is a packet header to be modified, or the first packet header is a preset packet header that needs to be pre-parsed.

[0035] Optionally, the N-layer packet header is agreed upon by a protocol, or the N-layer packet header is determined based on a preconfiguration.

[0036] Optionally, the processor is configured to read the computer program in the memory and perform the following operations:

[0037] Starting from the first layer of the N-layer packet headers, the following operations are performed on the first K-layer packet headers in the N-layer packet headers:

[0038] Determine a first field in the i-th layer header, where the first field is used to indicate the i+1-th layer header, where i is a positive integer and i≤K;

[0039] The i+1th layer packet header is parsed according to the first field.

[0040] Optionally, the processor is configured to read the computer program in the memory and perform the following operations:

[0041] Determine a second field in a first K-1 layer packet header in the N layer packet header, where the second field is used to indicate the first packet header;

[0042] The first packet header is parsed according to the second field.

[0043] Optionally, the processor is configured to read the computer program in the memory and perform the following operations:

[0044] When the parsed first K-layer packet headers in the N-layer packet headers do not include the second packet header, the parsing continues to the second packet header; wherein the second packet header is the packet header to be modified.

[0045] Optionally, the processor is configured to read the computer program in the memory and perform the following operations:

[0046] Starting from the K+1th layer header of the N layer headers, the following operations are performed on the latter NK layer headers in the N layer headers:

[0047] Determine a third field in the j-th layer header, where the third field is used to indicate the j+1-th layer header, where j is a positive integer and K+1≤j≤N;

[0048] The j+1th layer packet header is parsed according to the third field.

[0049] Optionally, the processor is configured to read the computer program in the memory and perform the following operations:

[0050] Determine a fourth field in a later NK layer header in the N layer header, where the fourth field is used to indicate the second header;

[0051] The second packet header is parsed according to the fourth field.

[0052] Optionally, the processor is configured to read the computer program in the memory and perform the following operations:

[0053] receiving update information, where the update information is used to indicate an update of a parsing configuration;

[0054] According to the update information, the first parsing rule and / or the second parsing rule are updated; wherein, the first parsing rule is a rule for parsing the N-layer header of the first data packet, and the second parsing rule is a rule for pre-parsing the first K-layer header of the N-layer header.

[0055] The present application also provides an electronic device, including:

[0056] A first receiving unit, configured to receive a first data packet, wherein the first data packet includes an N-layer packet header, where N is a positive integer;

[0057] A processing unit, configured to determine a first packet header, where the first packet header is a K-th layer packet header among the N layers of packet headers, where K is a positive integer and K<N;

[0058] The first parsing unit is used to parse the first packet header when parsing the packet header of the first data packet.

[0059] An embodiment of the present application further provides a processor-readable storage medium, wherein the processor-readable storage medium stores a computer program, and the computer program is used to enable the processor to execute the steps of the data packet processing method as described above.

[0060] The beneficial effects of the above technical solution of the present application are:

[0061] In an embodiment of the present application, for the N layers of data packets in the first data packet, the electronic device only parses the packet header to be modified or only parses the preset packet header that needs to be parsed when performing packet header parsing, and then modifies the parsed packet header or performs other actions, etc., thereby avoiding layer-by-layer parsing and layer-by-layer encapsulation of N layers of packet headers during data forwarding, which can reduce the parsing delay and re-encapsulation delay of the data packet header, that is, reduce the processing delay of the entire data packet. BRIEF DESCRIPTION OF THE DRAWINGS

[0062] Figure 1 A schematic diagram showing the V1model abstract forwarding model defined by P4;

[0063] Figure 2 A schematic diagram showing the data packet parsing process;

[0064] Figure 3 A flowchart showing a method for processing a data packet according to an embodiment of the present application;

[0065] Figure 4 A schematic diagram showing a data packet parsing process according to an embodiment of the present application;

[0066] Figure 5 One of the schematic diagrams showing the P4 programmable work processing mechanism of an embodiment of the present application;

[0067] Figure 6 A second schematic diagram showing the programmable work processing mechanism of P4 according to an embodiment of the present application;

[0068] Figure 7 One of the block diagrams showing the data packet processing device according to an embodiment of the present application;

[0069] Figure 8A second block diagram showing a data packet processing device according to an embodiment of the present application;

[0070] Fig. 9 A block diagram of an electronic device according to an embodiment of the present application is shown. DETAILED DESCRIPTION

[0071] In order to make the technical problems, technical solutions and advantages to be solved by the application clearer, the following will be described in detail in conjunction with the accompanying drawings and specific embodiments. In the following description, specific details such as specific configurations and components are provided only to help fully understand the embodiments of the application. Therefore, it should be clear to those skilled in the art that various changes and modifications can be made to the embodiments described herein without departing from the scope and spirit of the application. In addition, for clarity and brevity, the description of known functions and structures has been omitted.

[0072] It should be understood that the references to "one embodiment" or "an embodiment" throughout the specification mean that the specific features, structures, or characteristics associated with the embodiment are included in at least one embodiment of the present application. Therefore, the references to "in one embodiment" or "in an embodiment" appearing throughout the specification do not necessarily refer to the same embodiment. In addition, these specific features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.

[0073] In the various embodiments of the present application, it should be understood that the size of the serial numbers of the following processes does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0074] Additionally, the terms "system" and "network" are often used interchangeably herein.

[0075] The technical solution provided in the embodiment of the present application can be applicable to a variety of systems. For example, the applicable system can be a global system of mobile communication (GSM) system, a code division multiple access (CDMA) system, a wideband code division multiple access (WCDMA) general packet radio service (GPRS) system, a long term evolution (LTE) system, a LTE frequency division duplex (FDD) system, a LTE time division duplex (TDD) system, an advanced long term evolution (LTE-A) system, a universal mobile telecommunication system (UMTS), a world-wide interoperability for microwave access (WiMAX) system, a 5G new radio (NR) system, etc. These various systems include terminal equipment and network equipment. The system may also include a core network part, such as an evolved packet system (EPS), a 5G system (5GS), a 6G system, etc.

[0076] Network devices and terminal devices can each use one or more antennas for multiple-input multiple-output (MIMO) transmission. MIMO transmission can be single-user MIMO (SU-MIMO) or multi-user MIMO (MU-MIMO). Depending on the form and number of antenna combinations, MIMO transmission can be 2D-MIMO, 3D-MIMO, FD-MIMO or massive-MIMO, or it can be diversity transmission, precoded transmission or beamforming transmission, etc.

[0077] In the embodiments of the present application, the term "and / or" describes the association relationship of the associated objects, indicating that three relationships may exist. For example, A and / or B may represent: A exists alone, A and B exist at the same time, and B exists alone. The character " / " generally indicates that the associated objects before and after are in an "or" relationship.

[0078] In the embodiments of the present application, the term "plurality" refers to two or more than two, and other quantifiers are similar.

[0079] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0080] The following is an introduction to the relevant technologies involved in this application:

[0081] 1. Programming Protocol-Independent Packet Processors (P4);

[0082] P4 technology is divided into P4 14 Version and P4 16 Version. Among them, P4 16 The version is for P4 14 The improved version consists of the following five parts: Header, Parser, Control Ingress, Table, and Action.

[0083] (1) Header:

[0084] The header defines the header fields of the data packet processed in the programmable device. For example, the header is used for data storage, header parsing, and field matching. If the match is successful, the defined action is executed, such as modification in the header field, assignment of header fields, etc. The first part is the header and metadata.

[0085] The packet header is used to describe the data packet structure, which defines the name and length of each protocol field. The packet header can define the length of each field and assign values ​​to each field.

[0086] Metadata is used to carry data and configuration information. There are two main types: one is user-defined metadata, which can store user-defined values, temporary fields, etc., such as the calculation results of the header field. The other is inherent metadata, which is used to display the switch port number and other self-configuration information.

[0087] (2) Parser:

[0088] The P4 parser is a state machine with one start state and two final states. The start state is always named start. The final two states are always named accept (indicating successful parsing) and reject (indicating failed parsing). The start state is part of the parser, while the accept and reject states are distinct from the states provided by the programmer and are logically outside the parser.

[0089] (3) Flow table:

[0090] The flow table mainly consists of three parts: matching fields, specific action operations and flow table entries. It defines the forwarding processing mechanism for data packets. The flow table will be applied by the switch to the processing of data packets.

[0091] P4 supports multiple matching types, such as exact matching, triple matching, and longest prefix matching.

[0092] The action domain (i.e., specific action operation) is an action description of data packet processing. The corresponding action is executed according to the matching result, and the number of specific parameters in each action operation is different. However, in the action domain, only the action name can be seen, not the specific parameters executed.

[0093] The table capacity (i.e., flow table entries) limits the number of specific flow tables that each flow table can accommodate.

[0094] (4) Action:

[0095] Actions define the specific operation parameters executed by the action domain. In P4 applications, the corresponding action will be executed after a successful match. The specific execution operations and variables defined in the action are composed of action primitives. The P4 language is mainly divided into primitive actions and compound actions. The basic operations mainly include: discarding, adding and deleting headers, counting and metering, etc. In addition, users can customize compound actions composed of one or more primitive actions.

[0096] (5) Control flow program:

[0097] The control flow program mainly defines the judgment condition statements and the flow tables to be called. The execution order of the flow tables is determined according to the judgment conditions, so as to realize the jump of data packets between multiple flow tables. When the data packet enters the control flow program, it enters the flow table to perform parameter matching after meeting the judgment conditions. This process can be understood as a function call to the flow table.

[0098] 2. P4’s work parsing mechanism;

[0099] The main abstract forwarding models include the Protocol-Independent Switch Architecture (PISA), the Tofino Native Architecture (TNA) launched by Barefoot, and the Virtual Model 1 (V1model). Figure 1 A schematic diagram of the V1model abstract forwarding model defined by P4 is given.

[0100] (1) Main operations of the abstract forwarding model:

[0101] The processing and forwarding logic of data packets faced by users can be described by its abstract forwarding model, which can generalize the problem of processing packets on the underlying hardware devices using programmable chips. In the abstract forwarding model, there are two main operations: configuration and filling.

[0102] Among them, the configuration operation mainly defines the protocol to be implemented and the processing and forwarding logic of the data packet. The generated file is sent to the programmable device using P4 technology to complete the definition of programmable device analysis and processing logic. Through the setting of the five elements of P4 technology, network designers can customize the protocol, matching type, processing and forwarding mechanism, and specific action execution parameters, which reflects the programmability of the user plane.

[0103] Among them, the role of the filling operation is to issue flow table entries. The specific flow table is increased or decreased by the flow table entries issued by the user. In the configuration operation, the matching operation table of each programmable device is specified, and the filling operation determines the time when the specific function of a specific flow table is applied to the data packet.

[0104] (2) Packet processing pipeline:

[0105] For reaching the parser: When the programmable device receives a data packet, it will be parsed by the parser. If the header field and data content of the data packet are separated, the data part does not participate in the match. The parser extracts and parses the header of the data packet using the matching operation function to determine the protocol supported by the programmable device. After the parsing is completed, an analysis result will be generated as the execution target of subsequent matching and operations.

[0106] For the arrival match-action table: After the parsing is completed, the generated configuration file will be sent to the input control pipeline to enter the match-action table stage, and a series of match and action (Match+Action) tables will be executed. The table is divided into two parts: "inlet pipeline" and "exit pipeline". The operation principles of these two parts are similar, and both can modify the packet header. The "match and action" operation of the inlet pipeline mainly determines the output port and queue of the data packet. The processing results of the data packet are forwarding, re-circulation, cloning, etc. The output control pipeline is mainly suitable for modifying the header field, modifying each header operation object separately, such as cloning the data packet during the multicast process. After the corresponding matching operation, the defined processing logic forwards the data packet.

[0107] 3. Data packet parsing process;

[0108] If you continue to see Figure 2 When the device receives a data packet, it first parses the Ethernet header of the data packet and then reads the Ethernet type (ethertype) field in the Ethernet header:

[0109] If the value of the ethertype field is 0x8100, it is determined that the next packet header is a virtual local area network (VLAN) packet header;

[0110] If the value of the ethertype field is 0x0800, it is determined that the next packet header is an Internet Protocol version 4 (IPv4) packet header;

[0111] If the value of the ethertype field is 0x86dd, it is determined that the next packet header is an Internet Protocol version 6 (IPv6) packet header;

[0112] If the value of the ethertype field is 0x0806, it is determined that the next packet header is an Address Resolution Protocol (ARP) packet header;

[0113] When further parsing the VLAN header, read its ethertype field:

[0114] If the value of the ethertype field is 0x0800, the next packet header is determined to be an IPv4 packet header;

[0115] If the value of the ethertype field is 0x86dd, the next packet header is determined to be an IPv6 packet header;

[0116] If the value of the ethertype field is 0x0806, the next packet header is determined to be an ARP packet header;

[0117] When further parsing the IPv4 packet header, read its protocol field:

[0118] If the value of the protocol field is 6, it is determined that the next packet header is a TCP packet header;

[0119] If the value of the protocol field is 17, it is determined that the next packet header is a UDP packet header;

[0120] When further parsing the IPv6 packet header, read its protocol field:

[0121] If the value of the protocol field is 6, it is determined that the next packet header is a TCP packet header;

[0122] If the value of the protocol field is 17, it is determined that the next packet header is a UDP packet header;

[0123] Finally, if there are subsequent packet headers after the TCP or UDP packet header, you can continue to parse them layer by layer according to the above method, which will not be repeated here.

[0124] The embodiments of the present application provide a data packet processing method, device and electronic device, which can solve the problem of large delay in the current data packet processing method. The method and the device (or electronic device) are based on the same application concept. Since the principles of the method and the device (or electronic device) for solving the problem are similar, the implementation of the method and the device (or electronic device) can refer to each other, and the repeated parts will not be repeated.

[0125] The embodiment of the present application provides a data packet processing method, which is applied to an electronic device. The electronic device can be any device that needs to forward data packets, such as a terminal, a network device, etc. The network device can be a base station, a user plane function (UPF) network element of a core network, a switch, a router, etc. In other words, the data packet processing method of the embodiment of the present application is applied to a terminal, or to a base station, or to a UPF network element, or to a switch, or to a router, etc.

[0126] The device involved in the embodiment of the present application may be a device that provides voice and / or data connectivity to a user, a handheld device with a wireless connection function, or other processing devices connected to a wireless modem. In different systems, the name of the terminal device may also be different. For example, in a 5G system, the terminal device may be called a user equipment (UE). The wireless terminal device can communicate with one or more core networks (CN) via a radio access network (RAN). The wireless terminal device may be a mobile terminal device, such as a mobile phone (or a "cellular" phone) and a computer with a mobile terminal device. For example, it may be a portable, pocket-sized, handheld, computer-built-in or vehicle-mounted mobile device that exchanges language and / or data with a wireless access network. For example, personal communication service (PCS) phones, cordless phones, session initiation protocol (SIP) phones, wireless local loop (WLL) stations, personal digital assistants (PDAs) and other devices. The wireless terminal device may also be referred to as a system, a subscriber unit, a subscriber station, a mobile station, a mobile station, a remote station, an access point, a remote terminal device, an access terminal device, a user terminal device, a user agent, and a user device, but is not limited in the embodiments of the present application.

[0127] The base station involved in the embodiment of the present application may include multiple cells providing services for the terminal. Depending on the specific application scenario, the base station may also be called an access point, or may be a device in the access network that communicates with the wireless terminal device through one or more sectors on the air interface, or other names. The base station may be used to interchange received air frames with Internet Protocol (IP) packets, and serve as a router between the wireless terminal device and the rest of the access network, wherein the rest of the access network may include an Internet Protocol (IP) communication network. The base station may also coordinate the attribute management of the air interface. For example, the base station involved in the embodiments of the present application may be a base station (Base Transceiver Station, BTS) in the Global System for Mobile communications (Global System for Mobile communications, GSM) or Code Division Multiple Access (Code Division Multiple Access, CDMA), or a base station (NodeB) in Wide-band Code Division Multiple Access (WCDMA), or an evolutionary Node B (eNB or e-NodeB) in the long-term evolution (long term evolution, LTE) system, a 5G base station (gNB) in the 5G network architecture (next generation system), or a home evolved Node B (Home evolved Node B, HeNB), a relay node, a home base station (femto), a micro base station (pico), etc., which is not limited in the embodiments of the present application. In some network structures, the base station may include a centralized unit (CU) node and a distributed unit (DU) node, and the centralized unit and the distributed unit may also be arranged geographically separately.

[0128] like Figure 3 As shown, the data packet processing method of the embodiment of the present application includes the following steps:

[0129] Step 31: Receive a first data packet, wherein the first data packet includes N layers of packet headers, where N is a positive integer.

[0130] Optionally, the first data packet may be any data packet that needs to be forwarded, for example, the first data packet may be a data packet generated or received by a starting node of a data forwarding path, or the first data packet may be a data packet received by an intermediate node or a destination node of a data forwarding path, etc.

[0131] Optionally, the first data includes the types of N-layer headers contained therein, including but not limited to at least one of the following: Ethernet header, VLAN header, IP header (such as: IPv4 header, IPv6 header, ARP header, etc.), TCP or UDP header, ICMP header, etc.

[0132] Optionally, the N-layer headers are determined by protocol agreement, or the N-layer headers are determined based on pre-configuration. For example, the electronic device adopts a fixed protocol parsing mechanism, and the N-layer headers can be determined by protocol agreement (for example Figure 2 or the electronic device may adopt a flexible and customized parsing mechanism, in which case the N layers of packet headers may be determined by pre-configuration (i.e., by pre-customization, such as including the number of layers N of the packet header, the type of each layer of the packet header, etc.).

[0133] Step 32: Determine a first packet header, where the first packet header is a K-th layer header among the N layers of packet headers, where K is a positive integer and K<N.

[0134] Optionally, the first packet header is a packet header to be modified, or the first packet header is a preset packet header that needs to be pre-parsed. For example, when an electronic device receives a first data packet to be forwarded, it can determine whether the packet header of the first data packet needs to be modified and the portion of the packet header that needs to be modified.

[0135] Step 33: When parsing the packet header of the first data packet, the first packet header is parsed.

[0136] Optionally, when parsing the header of the first data packet, parsing to the first header can be understood as: when parsing the header of the first data packet, only the first header is parsed, and other headers in the first header are not parsed. For example: only the first header of the N-layer header is parsed, and other headers in the N-layer header except the first header are not parsed, or only the first K-layer headers in the N-layer header are parsed, and the last NK-layer headers in the N-layer header are not parsed, etc.

[0137] In this embodiment, for the N layers of data packets in the first data packet, the electronic device only parses the packet header to be modified or only parses the preset packet header that needs to be parsed when performing packet header parsing, and then modifies the parsed packet header or performs other actions, etc., thereby avoiding layer-by-layer parsing and layer-by-layer encapsulation of N layers of packet headers during data forwarding, which can reduce the parsing delay and re-encapsulation delay of the data packet header, that is, reduce the processing delay of the entire data packet.

[0138] Optionally, when parsing the packet header of the first data packet, parsing the first packet header includes:

[0139] Starting from the first layer of the N-layer packet headers, the following operations are performed on the first K-layer packet headers in the N-layer packet headers:

[0140] Determine a first field in the i-th layer header, where the first field is used to indicate the i+1-th layer header, where i is a positive integer and i≤K;

[0141] The i+1th layer packet header is parsed according to the first field.

[0142] In this embodiment, the first packet header may be a packet header to be modified, or the first packet header may be a preset packet header that needs to be pre-parsed. In this case, the first N layers of data packets in the N layers of packet headers may be parsed layer by layer to the first packet header. For example: the first field in the i-th layer header is used to indicate the i+1-th layer header. The i+1-th layer header may be determined by the first field, and the i+1-th layer header may be further parsed, and so on until the first packet header (i.e., the K-th layer header) is parsed. The packet headers after the first packet header are no longer parsed. In this case, the remaining part of the first packet header may be used as the payload of the data packet, and then subsequent encapsulation and other processing may be performed.

[0143] For example: when the N-layer headers are agreed upon by the protocol, that is, under the fixed protocol parsing mechanism, for some scenarios, only a certain field of the fixed header may need to be modified. Here, the first header is the header to be modified, such as only the source and destination IP addresses of the data packet need to be modified. In this way, the protocol parsing mechanism can be customized to set the electronic device to only parse the IP header, and no longer parse the headers after the IP header. Furthermore, the remaining part of the IP header can be regarded as the payload of the data packet.

[0144] The specific parsing mechanism is: the data packet header before the IP header can be parsed using a layer-by-layer parsing mechanism. For example: if there is a VLAN header between the Ethernet header and the IP header, the Ethernet header can be parsed first, and the next layer of the Ethernet header can be determined through the ethertype field in the Ethernet header. If the next layer of the Ethernet header is a VLAN header, the VLAN header is parsed and the next layer of the VLAN header is determined through the ethertype field in the VLAN header. If it is determined that the next layer of the VLAN header is an IP header, it is parsed to the IP header and no further parsing is done for subsequent headers. If there is no VLAN header between the Ethernet header and the IP header, the Ethernet header can be parsed first, and the next layer of the Ethernet header can be determined through the ethertype field in the Ethernet header. If it is determined that the next layer of the Ethernet header is an IP header, it is parsed to the IP header and no further parsing is done for subsequent headers. The specific parsing process is as follows: Figure 4 As shown:

[0145] When the first data packet is received, the Ethernet header of the first data packet is parsed first, and then the ethertype field in the Ethernet header is read:

[0146] If the value of the ethertype field is 0x0800, the next packet header is determined to be an IPv4 packet header;

[0147] If the value of the ethertype field is 0x86dd, it is determined that the next packet header is an IPv6 packet header.

[0148] After parsing to the IP layer, no further parsing will be done and the remaining packet header and payload will be stored as a whole.

[0149] For another example: when the N-layer packet header is determined based on a pre-configuration, that is, under a flexible customized protocol parsing mechanism (for example, the parser part in the P4 work processing mechanism is modified to a customized parser), a customized parser can be used for parsing for certain specific scenarios, such as Figure 5 As shown in the figure, a schematic diagram of the programmable working processing mechanism of P4 is given. Among them, the input represents the data packet entering the device, which is then parsed according to the customized parser; after the parsing is completed, the control program is executed, and after the matching is completed, the matching action table is executed, and the actions defined in the control program are executed; finally, the data packet is repackaged and forwarded.

[0150] Specifically, the difference between the flexible customized protocol parsing mechanism and the fixed protocol parsing mechanism is that one is a flexibly formulated parsing mechanism and the other is a fixed parsing mechanism. The specific way of parsing to the first packet header is similar to the fixed protocol parsing mechanism mentioned above. For example, for the flexibly formulated parsing mechanism, the first packet header is taken as an example of the packet header to be modified: the method of parsing to the first packet header to be modified layer by layer can be adopted, and the packet headers after the first packet header are no longer parsed. The specific layer-by-layer parsing method is similar to the embodiment of the fixed protocol parsing mechanism mentioned above. To avoid repetition, it will not be repeated here.

[0151] Optionally, when parsing the packet header of the first data packet, parsing the first packet header includes:

[0152] Determine a second field in a first K-1 layer packet header in the N layer packet header, where the second field is used to indicate the first packet header;

[0153] The first packet header is parsed according to the second field.

[0154] In this embodiment, the first packet header may be a packet header to be modified, or the first packet header may be a preset packet header that needs to be pre-parsed. In this case, the first K-1 layer packet header in the N layer packet header may be directly parsed into the first packet header as a whole. For example: the second field in the K-1 layer packet header is used to indicate the K layer packet header. The K layer packet header can be determined by the second field, and only the K layer packet header is parsed. The packet headers after the K layer packet header are no longer parsed. In this case, the remaining part of the first packet header may be used as the payload of the data packet, and then subsequent encapsulation and other processing may be performed.

[0155] For example, when the N-layer headers are agreed upon by the protocol, that is, under the fixed protocol parsing mechanism, for some scenarios, it may be necessary to modify only a certain field of the fixed header, such as taking the first header as the header to be modified, and only modifying the source and destination IP addresses of the data packet as an example: In this way, the protocol parsing mechanism can be customized, and the electronic device can be set to parse only the IP header, and no longer parse the headers after the IP header. Furthermore, the remaining part of the IP header can be regarded as the payload of the data packet.

[0156] The specific parsing mechanism is: all the headers before the IP header are parsed as a whole header. The method can be to read the fixed offset value of all the headers before the IP header at one time, directly read the field value that identifies the layer where the IP header is located (that is, read the second field that identifies the layer where the first header is located in all the headers before the first header), and parse the IP header when it is determined that the header of this layer is an IP header through the field value. For example: if there is a VLAN header between the Ethernet header and the IP header, the Ethernet header and the VLAN header can be treated as a whole header, and the field value that identifies the IP header in this whole header can be directly read, and the IP header type determined by the field value is further parsed to the IP header and no further parsing is performed on subsequent headers.

[0157] For another example: when the N-layer packet header is determined based on pre-configuration, that is, under a flexible customized protocol parsing mechanism (for example, the parser part in the P4 work processing mechanism is modified to a customized parser), a customized parser can be used for parsing in certain specific scenarios. For the specific work processing mechanism, please continue to refer to Figure 5 shown.

[0158] For the flexibly customized protocol parsing mechanism, for example, taking the first packet header as the packet header to be modified, only the source and destination IP addresses of the data packet need to be modified. The specific method of treating all the packet headers before the IP packet header as a whole packet header and then parsing them into the IP packet header is similar to the above-mentioned fixed protocol parsing mechanism implementation method. To avoid repetition, it will not be repeated here.

[0159] The above takes the case where the first packet header is a packet header to be modified as an example to illustrate an embodiment of parsing the first packet header when parsing the packet header of the first data packet. Specifically, in the case where the first packet header is a preset packet header that needs to be pre-parsed, the specific layer-by-layer parsing and overall parsing mechanisms are similar to those of the case where the first packet header is a packet header to be modified, and the difference is that: in the case where the first packet header is a preset packet header that needs to be pre-parsed, it is necessary to consider whether the packet header to be modified exists in the pre-parsed first packet header, and based on the result of whether the packet header to be modified exists in the pre-parsed first packet header, further processing is performed.

[0160] Optionally, when parsing the packet header of the first data packet, after parsing the first packet header, the method further includes:

[0161] When the parsed first K-layer packet headers in the N-layer packet headers do not include the second packet header, the parsing continues to the second packet header; wherein the second packet header is the packet header to be modified.

[0162] Optionally, continuing to parse the second packet header includes:

[0163] Starting from the K+1th layer header of the N layer headers, the following operations are performed on the latter NK layer headers in the N layer headers:

[0164] Determine a third field in the j-th layer header, where the third field is used to indicate the j+1-th layer header, where j is a positive integer and K+1≤j≤N;

[0165] The j+1th layer packet header is parsed according to the third field.

[0166] For example: when the N-layer headers are agreed upon by the protocol, that is, under the fixed protocol parsing mechanism, the device can customize the secondary parsing mechanism (that is, the pre-parsing mechanism, that is, the first header is the preset header that needs to be pre-parsed) for certain scenarios. Here, the pre-parsing mechanism is taken as an example to parse the IP header: in this way, the pre-parsing mechanism can be customized, and the electronic device is set to parse the IP header first, and then perform further processing based on the result of whether the header that needs to be modified is included in the first header after the IP header is pre-parsed.

[0167] The specific processing mechanism is: first parse to the IP header based on the local resolution mechanism. If it is determined that the source and destination IP addresses and other fields in the IP header need to be modified after the matching is completed, that is, the parsing of the IP header has been completed during the pre-parsing process, then the header after the IP header will no longer be parsed at this time, and the encapsulated data packet can be forwarded after re-encapsulation. If after parsing the IP header, it is determined that the header that needs to be modified has not been parsed (for example, the header that needs to be modified is after the IP header), then the field that needs to be modified can be re-parsed to perform specific, on-demand parsing. For example, for the pre-parsing mechanism to parse to the IP header, the above-mentioned embodiment of parsing to the first header layer by layer can be adopted. To avoid repetition, it will not be repeated here. And for the second header that needs to be parsed after the IP header, the method of parsing to the second header layer by layer can also be adopted, which is similar to the above-mentioned embodiment of parsing to the first header layer by layer. To avoid repetition, it will not be repeated here.

[0168] For another example: when the N-layer header is determined based on pre-configuration, that is, under a flexible customized protocol parsing mechanism (for example, the parser part in the P4 work processing mechanism is modified to no longer execute the processing mechanism of first layer-by-layer parsing, matching, executing actions, and encapsulating layers, but adopts a process of pre-parsing (for example, only parsing to a certain data packet header), matching, on-demand parsing, executing actions, and encapsulating. For some specific scenarios, a customized parser can be used for parsing, such as Figure 6 As shown in the figure, a schematic diagram of the programmable working processing mechanism of P4 is given. Among them, the input represents the data packet entering the device, and then it is parsed according to the customized parser; after the parsing is completed, the control program is executed. After the matching is completed, if the pre-parser parses the packet header where the matching action table is located, the action defined in the control program is executed; if the packet header where the matching action table is not parsed, it is necessary to re-parse, the action defined in the control program, and finally re-encapsulate the data packet for forwarding.

[0169] Specifically, for the flexibly formulated parsing mechanism, the pre-parsing mechanism here takes the parsing to the IP header as an example: first use the pre-parser to parse, if it is determined after the match that the source and destination IP addresses and other fields in the IP header need to be modified, that is, it is determined that only the IP header needs to be parsed, if the IP header has been parsed during the pre-parsing process, then the action performed after the match is completed is to modify the source and destination IP in the IP header, and finally perform the action of re-encapsulating the data packet and forwarding it. If the header part that needs to be modified is not parsed, it can continue to parse to the corresponding header that needs to be modified according to the matching field, and perform specific, on-demand parsing (for example, starting from the first header after the pre-parsed header, parsing layer by layer to the header that needs to be modified, which is similar to the above-mentioned embodiment of parsing layer by layer to the first header, to avoid repetition, it will not be repeated here); finally, in the encapsulation stage, the unparsed split part is re-encapsulated as a whole and forwarded.

[0170] Optionally, when parsing the packet header of the first data packet, after parsing the first packet header, the method further includes:

[0171] When the parsed first K-layer packet headers in the N-layer packet headers do not include the second packet header, the parsing continues to the second packet header; wherein the second packet header is the packet header to be modified.

[0172] Optionally, continuing to parse the second packet header includes:

[0173] Determine a fourth field in a later NK layer header in the N layer header, where the fourth field is used to indicate the second header;

[0174] The second packet header is parsed according to the fourth field.

[0175] For example: when the N-layer headers are agreed upon by the protocol, that is, under the fixed protocol parsing mechanism, the device can customize the secondary parsing mechanism (i.e., the pre-parsing mechanism, that is, the first header is the preset header that needs to be pre-parsed) for certain scenarios. Here, the pre-parsing mechanism is used to parse the IP header as an example: in this way, the electronic device can be set in the pre-parsing mechanism to only parse the IP header, and no longer parse the headers after the IP header. Furthermore, the remaining part of the IP header can be regarded as the payload of the data packet.

[0176] The specific parsing mechanism is: all the headers before the IP header are parsed as a whole header. The method can be to read the fixed offset value of all the headers before the IP header at one time, directly read the field value that identifies the layer where the IP header is located, and parse the IP header when the layer is determined to be the IP header through the field value. If it is determined that the source and destination IP addresses and other fields in the IP header need to be modified after the match is completed, it is determined that only the IP header needs to be parsed. If the IP header has been parsed during the pre-parsing process, the action performed after the match is completed is to modify the source and destination IP in the IP header, and finally perform the action of re-encapsulating the data packet and forwarding it. If the header that needs to be modified is not the IP header (for example, it may be the header before or after the IP header), the overall parsing method can be further adopted to parse the header that needs to be modified, and no longer parse other headers, and finally re-encapsulate the data packet and forward it.

[0177] It should be noted that the pre-parsing mechanism here can set the modification frequency or higher packet header based on actual needs. The packet header to which the pre-parsing mechanism is applied can be one or more. For example, by adopting the overall parsing method, the pre-parsing can be set to one or more packet headers to meet the parsing processing requirements and reduce the delay of the parsing process. The embodiments of the present application are not limited to this.

[0178] For another example: when the N-layer header is determined based on pre-configuration, that is, under a flexible customized protocol parsing mechanism (for example, the parser part in the P4 work processing mechanism is modified to no longer execute the processing mechanism of first layer-by-layer parsing, matching, executing actions, and encapsulating layers, but adopts a process of pre-parsing (for example, only parsing to a certain data packet header), matching, on-demand parsing, executing actions, and encapsulating. For some specific scenarios, a customized parser can be used for parsing. For the specific work processing mechanism, please continue to refer to Figure 6 shown.

[0179] For the flexible and customized protocol parsing mechanism, for example, taking the pre-parsing mechanism as an example of parsing to the IP header, the specific method of treating all the headers before the IP header as a whole header and then parsing to the IP header is similar to the above-mentioned fixed protocol parsing mechanism implementation example, and will not be repeated here to avoid repetition. Further, if it is determined after the matching is completed that the source and destination IP addresses and other fields in the IP header need to be modified, that is, it is determined that only the IP header needs to be parsed. If the IP header has been parsed during the pre-parsing process, the action performed after the matching is completed is to modify the source and destination IP in the IP header, and finally the action of re-encapsulating the data packet and forwarding it is performed. If the header that needs to be modified is not the IP header (for example, it may be the header before or after the IP header), the overall parsing method can be further adopted to parse to the header that needs to be modified, and no longer parse other headers, and finally re-encapsulate the data packet and forward it.

[0180] Optionally, the data packet processing method further includes:

[0181] receiving update information, where the update information is used to indicate an update of a parsing configuration;

[0182] According to the update information, the first parsing rule and / or the second parsing rule are updated; wherein, the first parsing rule is a rule for parsing the N-layer header of the first data packet, and the second parsing rule is a rule for pre-parsing the first K-layer header of the N-layer header.

[0183] Specifically, the update information may be configured by a network device or a core network element, etc., but the embodiments of the present application are not limited thereto.

[0184] For example: For a flexibly customized protocol parsing mechanism, when a specific scenario changes and the customized parser needs to be changed, the configuration of the parsing mechanism can be updated by sending update information. For example, in the embodiment of the above-mentioned flexibly customized protocol parsing mechanism, the processing mechanism of layer-by-layer parsing or overall parsing to the first packet header can be updated (i.e., the first parsing rule is updated). In this way, when a specific scenario changes, the customized parsing rules can be updated without replacing the device.

[0185] For another example: In the case of a flexible and customized protocol parsing mechanism, when a pre-parsing mechanism is used to parse to the first packet header, when a specific scenario changes and the customized parser needs to be changed, it may be necessary to change to the parsing rules and / or pre-parsing rules of the parser. For example, when a specific scenario changes and the customized parser needs to be changed, the configuration of the parsing mechanism can be updated by issuing update information. For example, in the embodiment of the above-mentioned flexible and customized protocol parsing mechanism, the processing mechanism for parsing layer by layer or parsing as a whole to the first packet header can be updated (i.e., updating the first parsing rule), and / or, when a specific scenario changes and the pre-parsing mechanism needs to be changed, the configuration of the pre-parsing mechanism can be updated by issuing update information. For example, in the embodiment of the above-mentioned flexible and customized protocol parsing mechanism, the pre-parsing mechanism for parsing layer by layer or parsing as a whole to the first packet header can be updated (i.e., updating the first pre-parsing rule). In this way, in the case of changes in specific scenarios, customized parsing rules and / or pre-parsing rules can be updated without replacing the device.

[0186] The data packet processing method in the embodiment of the present application realizes the parsing optimization of the data packet header, which can reduce the data packet parsing and encapsulation delay, thereby reducing the data packet processing delay and improving the data packet processing efficiency.

[0187] The above embodiments introduce the data packet processing method of the present application. The following embodiments will further illustrate the corresponding devices and electronic devices in conjunction with the accompanying drawings.

[0188] In order to better achieve the above goals, Figure 7 As shown, an embodiment of the present application provides a data packet processing device, which is applied to an electronic device, such as a network device, including a memory 71, a transceiver 72, and a processor 73; wherein the memory 71 is used to store a computer program; the transceiver 72 is used to send and receive data under the control of the processor 73; for example, the transceiver 72 is used to receive and send data under the control of the processor 73; the processor 73 is used to read the computer program in the memory 71 and perform the following operations:

[0189] Receive a first data packet, where the first data packet includes N layers of packet headers, where N is a positive integer;

[0190] Determine a first packet header, where the first packet header is a K-th layer packet header among the N layers of packet headers, where K is a positive integer and K<N;

[0191] When parsing the packet header of the first data packet, the first packet header is parsed.

[0192] Optionally, the first packet header is a packet header to be modified, or the first packet header is a preset packet header that needs to be pre-parsed.

[0193] Optionally, the N-layer packet header is agreed upon by a protocol, or the N-layer packet header is determined based on a preconfiguration.

[0194] Optionally, the processor 73 is configured to read the computer program in the memory 71 and perform the following operations:

[0195] Starting from the first layer of the N-layer packet headers, the following operations are performed on the first K-layer packet headers in the N-layer packet headers:

[0196] Determine a first field in the i-th layer header, where the first field is used to indicate the i+1-th layer header, where i is a positive integer and i≤K;

[0197] The i+1th layer packet header is parsed according to the first field.

[0198] Optionally, the processor 73 is configured to read the computer program in the memory 71 and perform the following operations:

[0199] Determine a second field in a first K-1 layer packet header in the N layer packet header, where the second field is used to indicate the first packet header;

[0200] The first packet header is parsed according to the second field.

[0201] Optionally, the processor 73 is configured to read the computer program in the memory 71 and perform the following operations:

[0202] When the parsed first K-layer packet headers in the N-layer packet headers do not include the second packet header, the parsing continues to the second packet header; wherein the second packet header is the packet header to be modified.

[0203] Optionally, the processor 73 is configured to read the computer program in the memory 71 and perform the following operations:

[0204] Starting from the K+1th layer header of the N layer headers, the following operations are performed on the latter NK layer headers in the N layer headers:

[0205] Determine a third field in the j-th layer header, where the third field is used to indicate the j+1-th layer header, where j is a positive integer and K+1≤j≤N;

[0206] The j+1th layer packet header is parsed according to the third field.

[0207] Optionally, the processor 73 is configured to read the computer program in the memory 71 and perform the following operations:

[0208] Determine a fourth field in a later NK layer header in the N layer header, where the fourth field is used to indicate the second header;

[0209] The second packet header is parsed according to the fourth field.

[0210] Optionally, the processor 73 is configured to read the computer program in the memory 71 and perform the following operations:

[0211] receiving update information, where the update information is used to indicate an update of a parsing configuration;

[0212] According to the update information, the first parsing rule and / or the second parsing rule are updated; wherein, the first parsing rule is a rule for parsing the N-layer header of the first data packet, and the second parsing rule is a rule for pre-parsing the first K-layer header of the N-layer header.

[0213] Among them, Figure 7In the embodiment, the bus architecture may include any number of interconnected buses and bridges, specifically one or more processors represented by processor 73 and various circuits of memory represented by memory 71 are linked together. The bus architecture may also link together various other circuits such as peripheral devices, voltage regulators, and power management circuits, which are well known in the art and are therefore not further described herein. The bus interface provides an interface. The transceiver 72 may be a plurality of components, namely, a transmitter and a receiver, providing a unit for communicating with various other devices on a transmission medium, which transmission medium may include a wireless channel, a wired channel, an optical cable, and other transmission media. The processor 73 is responsible for managing the bus architecture and general processing, and the memory 71 may store data used by the processor 73 when performing operations.

[0214] The processor 73 may be a central processing unit (CPU), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or a complex programmable logic device (CPLD). The processor may also adopt a multi-core architecture.

[0215] It should be noted here that the above-mentioned device provided in the embodiment of the present application can implement all the method steps implemented in the above-mentioned data packet processing method embodiment, and can achieve the same technical effect. The parts and beneficial effects of this embodiment that are the same as the method embodiment will not be described in detail here.

[0216] like Figure 8 As shown, this embodiment provides a data packet processing device, which is applied to an electronic device, such as a terminal, including a memory 81, a transceiver 82, and a processor 83; wherein the memory 81 is used to store a computer program; the transceiver 82 is used to send and receive data under the control of the processor 83; for example, the transceiver 82 is used to receive and send data under the control of the processor 83; the processor 83 is used to read the computer program in the memory 81 and perform the following operations:

[0217] Receive a first data packet, where the first data packet includes N layers of packet headers, where N is a positive integer;

[0218] Determine a first packet header, where the first packet header is a K-th layer packet header among the N layers of packet headers, where K is a positive integer and K<N;

[0219] When parsing the packet header of the first data packet, the first packet header is parsed.

[0220] Optionally, the first packet header is a packet header to be modified, or the first packet header is a preset packet header that needs to be pre-parsed.

[0221] Optionally, the N-layer packet header is agreed upon by a protocol, or the N-layer packet header is determined based on a preconfiguration.

[0222] Optionally, the processor 83 is configured to read the computer program in the memory 81 and perform the following operations:

[0223] Starting from the first layer of the N-layer packet headers, the following operations are performed on the first K-layer packet headers in the N-layer packet headers:

[0224] Determine a first field in the i-th layer header, where the first field is used to indicate the i+1-th layer header, where i is a positive integer and i≤K;

[0225] The i+1th layer packet header is parsed according to the first field.

[0226] Optionally, the processor 83 is configured to read the computer program in the memory 81 and perform the following operations:

[0227] Determine a second field in a first K-1 layer packet header in the N layer packet header, where the second field is used to indicate the first packet header;

[0228] The first packet header is parsed according to the second field.

[0229] Optionally, the processor 83 is configured to read the computer program in the memory 81 and perform the following operations:

[0230] When the parsed first K-layer packet headers in the N-layer packet headers do not include the second packet header, the parsing continues to the second packet header; wherein the second packet header is the packet header to be modified.

[0231] Optionally, the processor 83 is configured to read the computer program in the memory 81 and perform the following operations:

[0232] Starting from the K+1th layer header of the N layer headers, the following operations are performed on the latter NK layer headers in the N layer headers:

[0233] Determine a third field in the j-th layer header, where the third field is used to indicate the j+1-th layer header, where j is a positive integer and K+1≤j≤N;

[0234] The j+1th layer packet header is parsed according to the third field.

[0235] Optionally, the processor 83 is configured to read the computer program in the memory 81 and perform the following operations:

[0236] Determine a fourth field in a later NK layer header in the N layer header, where the fourth field is used to indicate the second header;

[0237] The second packet header is parsed according to the fourth field.

[0238] Optionally, the processor 83 is configured to read the computer program in the memory 81 and perform the following operations:

[0239] receiving update information, where the update information is used to indicate an update of a parsing configuration;

[0240] According to the update information, the first parsing rule and / or the second parsing rule are updated; wherein, the first parsing rule is a rule for parsing the N-layer header of the first data packet, and the second parsing rule is a rule for pre-parsing the first K-layer header of the N-layer header.

[0241] Among them, Figure 8 In the embodiment, the bus architecture may include any number of interconnected buses and bridges, specifically one or more processors represented by processor 83 and various circuits of memory represented by memory 81 are linked together. The bus architecture may also link together various other circuits such as peripherals, voltage regulators, and power management circuits, which are well known in the art and are therefore not further described herein. The bus interface provides an interface. The transceiver 82 may be a plurality of components, namely, a transmitter and a receiver, providing a unit for communicating with various other devices on a transmission medium, including wireless channels, wired channels, optical cables, and other transmission media. For different user devices, the user interface 84 may also be an interface capable of externally and internally connecting required devices, and the connected devices include but are not limited to a keypad, a display, a speaker, a microphone, a joystick, and the like.

[0242] The processor 83 is responsible for managing the bus architecture and general processing, and the memory 81 can store data used by the processor 83 when performing operations.

[0243] Optionally, the processor 83 may be a CPU (central processing unit), an ASIC (Application Specific Integrated Circuit), an FPGA (Field-Programmable Gate Array) or a CPLD (Complex Programmable Logic Device), and the processor may also adopt a multi-core architecture.

[0244] The processor calls the computer program stored in the memory to execute any of the methods provided in the embodiments of the present application according to the obtained executable instructions. The processor and the memory can also be arranged physically separately.

[0245] It should be noted here that the above-mentioned device provided in the embodiment of the present application can implement all the method steps implemented in the above-mentioned data packet processing method embodiment, and can achieve the same technical effect. The parts and beneficial effects of this embodiment that are the same as the method embodiment will not be described in detail here.

[0246] like Fig. 9 As shown, the embodiment of the present application further provides an electronic device 900, including:

[0247] A first receiving unit 910 is configured to receive a first data packet, where the first data packet includes an N-layer header, where N is a positive integer;

[0248] The processing unit 920 is configured to determine a first packet header, where the first packet header is a K-th layer packet header among the N layers of packet headers, where K is a positive integer and K<N;

[0249] The first parsing unit 930 is configured to parse the first packet header when parsing the packet header of the first data packet.

[0250] Optionally, the first packet header is a packet header to be modified, or the first packet header is a preset packet header that needs to be pre-parsed.

[0251] Optionally, the N-layer packet header is agreed upon by a protocol, or the N-layer packet header is determined based on a preconfiguration.

[0252] Optionally, the first parsing unit 930 is further configured to:

[0253] Starting from the first layer of the N-layer packet headers, the following operations are performed on the first K-layer packet headers in the N-layer packet headers:

[0254] Determine a first field in the i-th layer header, where the first field is used to indicate the i+1-th layer header, where i is a positive integer and i≤K;

[0255] The i+1th layer packet header is parsed according to the first field.

[0256] Optionally, the first parsing unit 930 is further configured to:

[0257] Determine a second field in a first K-1 layer packet header in the N layer packet header, where the second field is used to indicate the first packet header;

[0258] The first packet header is parsed according to the second field.

[0259] Optionally, the electronic device 900 further includes:

[0260] The second parsing unit is used to continue parsing to the second packet header when the parsed first K-layer packet headers in the N-layer packet headers do not include the second packet header; wherein the second packet header is the packet header to be modified.

[0261] Optionally, the second parsing unit is further used for:

[0262] Starting from the K+1th layer header of the N layer headers, the following operations are performed on the latter NK layer headers in the N layer headers:

[0263] Determine a third field in the j-th layer header, where the third field is used to indicate the j+1-th layer header, where j is a positive integer and K+1≤j≤N;

[0264] The j+1th layer packet header is parsed according to the third field.

[0265] Optionally, the second parsing unit is further used for:

[0266] Determine a fourth field in a later NK layer header in the N layer header, where the fourth field is used to indicate the second header;

[0267] The second packet header is parsed according to the fourth field.

[0268] Optionally, the electronic device 900 further includes:

[0269] A second receiving unit, configured to receive update information, wherein the update information is used to indicate an update of the parsing configuration;

[0270] An updating unit is used to update the first parsing rule and / or the second parsing rule according to the update information; wherein the first parsing rule is a rule for parsing the N-layer header of the first data packet, and the second parsing rule is a rule for pre-parsing the first K-layer header of the N-layer header.

[0271] It should be noted that the division of units in the embodiments of the present application is schematic and is only a logical function division. There may be other division methods in actual implementation. In addition, each functional unit in each embodiment of the present application may be integrated into a processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of software functional units.

[0272] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a processor-readable storage medium. Based on this understanding, the technical solution of the present application is essentially or the part that contributes to the prior art or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including a number of instructions to enable a computer device (which can be a personal computer, server, or network device, etc.) or a processor (processor) to perform all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (Read-Only Memory, ROM), random access memory (Random Access Memory, RAM), disk or optical disk and other media that can store program codes.

[0273] It should be noted here that the above-mentioned electronic device provided in the embodiment of the present application can implement all the method steps implemented in the above-mentioned data packet processing method embodiment, and can achieve the same technical effect. The parts and beneficial effects that are the same as the method embodiment in this embodiment will not be described in detail here.

[0274] An embodiment of the present application also provides a processor-readable storage medium, which stores a computer program. The computer program is used to enable the processor to execute the steps of the above-mentioned data packet processing method and can achieve the same technical effect. The parts and beneficial effects of this embodiment that are the same as those of the method embodiment will not be described in detail here.

[0275] The processor-readable storage medium can be any available medium or data storage device that can be accessed by the processor, including but not limited to magnetic storage (such as floppy disks, hard disks, magnetic tapes, magneto-optical disks (MO), etc.), optical storage (such as CD, DVD, BD, HVD, etc.), and semiconductor storage (such as ROM, EPROM, EEPROM, non-volatile memory (NANDFLASH), solid-state drive (SSD)), etc.

[0276] Those skilled in the art will appreciate that the embodiments of the present application may be provided as methods, systems, or computer program products. Therefore, the present application may adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment in combination with software and hardware. Moreover, the present application may adopt the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage and optical storage, etc.) that contain computer-usable program code.

[0277] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer executable instructions. These computer executable instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0278] These processor executable instructions may also be stored in a processor readable memory that can direct a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the processor readable memory produce an article of manufacture including an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0279] These processor-executable instructions may also be loaded onto a computer or other programmable data processing device so that a series of operational steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for executing on the computer or other programmable device to implement the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0280] In addition, it should be noted that in the device and method of the present application, it is obvious that each component or each step can be decomposed and / or recombined. These decompositions and / or recombinations should be regarded as equivalent schemes of the present application. In addition, the steps of performing the above-mentioned series of processes can be naturally performed in chronological order according to the order of description, but it is not necessary to perform in chronological order, and some steps can be performed in parallel or independently of each other. For those of ordinary skill in the art, it is possible to understand that all or any steps or components of the method and device of the present application can be implemented in any computing device (including processors, storage media, etc.) or a network of computing devices with hardware, firmware, software or a combination thereof, which can be realized by those of ordinary skill in the art using their basic programming skills after reading the description of the present application.

[0281] Obviously, those skilled in the art can make various changes and modifications to the present application without departing from the spirit and scope of the present application. Thus, if these modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the present application is also intended to include these modifications and variations.

Claims

1. A data packet processing method, characterized in that: Applied to electronic equipment, the method comprises: Receive a first data packet, where the first data packet includes N layers of packet headers, where N is a positive integer; Determine a first packet header, where the first packet header is a K-th layer packet header among the N layers of packet headers, where K is a positive integer and K<N; When parsing the packet header of the first data packet, the first packet header is parsed.

2. The data packet processing method according to claim 1, characterized in that: The first packet header is a packet header to be modified, or the first packet header is a preset packet header that needs to be pre-parsed.

3. The data packet processing method according to claim 1, characterized in that: The N-layer packet header is agreed upon by a protocol, or the N-layer packet header is determined based on a pre-configuration.

4. The data packet processing method according to any one of claims 1 to 3, characterized in that: When parsing the header of the first data packet, parsing the first header includes: Starting from the first layer of the N-layer packet headers, the following operations are performed on the first K-layer packet headers in the N-layer packet headers: Determine a first field in the i-th layer header, where the first field is used to indicate the i+1-th layer header, where i is a positive integer and i≤K; The i+1th layer packet header is parsed according to the first field.

5. The data packet processing method according to any one of claims 1 to 3, characterized in that: When parsing the header of the first data packet, parsing the first header includes: Determine a second field in a first K-1 layer packet header in the N layer packet header, where the second field is used to indicate the first packet header; The first packet header is parsed according to the second field.

6. The data packet processing method according to claim 2, characterized in that: When parsing the header of the first data packet, after parsing the first header, the method further includes: When the parsed first K-layer packet headers in the N-layer packet headers do not include the second packet header, the parsing continues to the second packet header; wherein the second packet header is the packet header to be modified.

7. The data packet processing method according to claim 6, characterized in that: The continuing to parse the second packet header includes: Starting from the K+1th layer header of the N layer headers, the following operations are performed on the latter NK layer headers in the N layer headers: Determine a third field in the j-th layer header, where the third field is used to indicate the j+1-th layer header, where j is a positive integer and K+1≤j≤N; The j+1th layer packet header is parsed according to the third field.

8. The data packet processing method according to claim 6, characterized in that: The continuing to parse the second packet header includes: Determine a fourth field in a later NK layer header in the N layer header, where the fourth field is used to indicate the second header; The second packet header is parsed according to the fourth field.

9. The data packet processing method according to claim 2 or 3, characterized in that: Also includes: receiving update information, where the update information is used to indicate an update of a parsing configuration; According to the update information, the first parsing rule and / or the second parsing rule are updated; wherein, the first parsing rule is a rule for parsing the N-layer header of the first data packet, and the second parsing rule is a rule for pre-parsing the first K-layer header of the N-layer header.

10. A data packet processing device, characterized in that: Including memory, transceiver, processor; The memory is used to store computer programs; the transceiver is used to send and receive data under the control of the processor; the processor is used to read the computer program in the memory and perform the following operations: Receive a first data packet, where the first data packet includes N layers of packet headers, where N is a positive integer; Determine a first packet header, where the first packet header is a K-th layer packet header among the N layers of packet headers, where K is a positive integer and K<N; When parsing the packet header of the first data packet, the first packet header is parsed.

11. The data packet processing device according to claim 10, characterized in that: The first packet header is a packet header to be modified, or the first packet header is a preset packet header that needs to be pre-parsed.

12. The data packet processing device according to claim 10, characterized in that: The N-layer packet header is agreed upon by a protocol, or the N-layer packet header is determined based on a pre-configuration.

13. The data packet processing device according to any one of claims 10 to 12, characterized in that: The processor is configured to read the computer program in the memory and perform the following operations: Starting from the first layer of the N-layer packet headers, the following operations are performed on the first K-layer packet headers in the N-layer packet headers: Determine a first field in the i-th layer header, where the first field is used to indicate the i+1-th layer header, where i is a positive integer and i≤K; The i+1th layer packet header is parsed according to the first field.

14. The data packet processing device according to any one of claims 10 to 12, characterized in that: The processor is configured to read the computer program in the memory and perform the following operations: Determine a second field in a first K-1 layer packet header in the N layer packet header, where the second field is used to indicate the first packet header; The first packet header is parsed according to the second field.

15. The data packet processing device according to claim 11, characterized in that: The processor is configured to read the computer program in the memory and perform the following operations: When the parsed first K-layer packet headers in the N-layer packet headers do not include the second packet header, the parsing continues to the second packet header; wherein the second packet header is the packet header to be modified.

16. The data packet processing device according to claim 15, characterized in that: The processor is configured to read the computer program in the memory and perform the following operations: Starting from the K+1th layer header of the N layer headers, the following operations are performed on the latter NK layer headers in the N layer headers: Determine a third field in the j-th layer header, where the third field is used to indicate the j+1-th layer header, where j is a positive integer and K+1≤j≤N; The j+1th layer packet header is parsed according to the third field.

17. The data packet processing device according to claim 15, characterized in that: The processor is configured to read the computer program in the memory and perform the following operations: Determine a fourth field in a later NK layer header in the N layer header, where the fourth field is used to indicate the second header; The second packet header is parsed according to the fourth field.

18. The data packet processing device according to claim 11 or 12, characterized in that: The processor is configured to read the computer program in the memory and perform the following operations: receiving update information, where the update information is used to indicate an update of a parsing configuration; According to the update information, the first parsing rule and / or the second parsing rule are updated; wherein, the first parsing rule is a rule for parsing the N-layer header of the first data packet, and the second parsing rule is a rule for pre-parsing the first K-layer header of the N-layer header.

19. An electronic device, characterized in that: include: A first receiving unit, configured to receive a first data packet, wherein the first data packet includes an N-layer packet header, where N is a positive integer; A processing unit, configured to determine a first packet header, where the first packet header is a K-th layer packet header among the N layers of packet headers, where K is a positive integer and K<N; The first parsing unit is used to parse the first packet header when parsing the packet header of the first data packet.

20. A processor-readable storage medium, characterized in that: The processor-readable storage medium stores a computer program, and the computer program is used to enable the processor to execute the steps of the data packet processing method according to any one of claims 1 to 9.

Images