Back contact cell, back contact cell string, cell assembly, and photovoltaic system
By designing alternately arranged gate lines and Pad point structures on the back of the back contact solar cell and setting leakage contact structures, the problem of unstable probe contact is solved, the test reliability and leakage capacity of the solar cell are improved, and the heat is reduced Spot risk.
Patent Information
- Application Number
- CN202411292627.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-13
- Publication Date
- 2024-12-13
AI Technical Summary
The existing back contact solar cells cannot form stable contact during testing, and the test reliability and stability are poor.
A back contact battery is designed, and the back surface of which is provided with a first region and a second region in the second direction, and the first gate line and the second gate line are alternately arranged in the first region, and the first Pad point is connected to the first main gate. The second Pad point is connected to the second main gate, the first Pad point is connected to the first gate line, the second Pad point is connected to the second gate line, there is no Pad point in the second area, and the third gate line is connected to the first gate. The linear polarity is the same, the fourth gate line and the second gate line have the same polarity, and the gate line width is smaller than the external area in the preset area. A leakage contact structure is provided to improve leakage capacity and reverse leakage characteristics.
The stable contact between the probe and the back contact battery is achieved, the test reliability and stability is improved, and the risk of heat spot is reduced through the leakage contact structure, and the manufacturing capacity of solar cells is improved.
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Figure CN119133272A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of solar cells, and in particular to a back-contact cell, a back-contact cell string, a cell assembly, and a photovoltaic system. Background Art
[0002] In back-contact solar cells, in order to reduce the use of slurry, the back-contact solar cell adopts a busbar-less design. However, on the one hand, in such a technical solution, due to the busbar-less design on the back side, the difficulty of performing hot spot, EL and other performance tests on the back-contact solar cell is greatly increased. The back-contact solar cell cannot be in stable contact with the test probe, making the test more difficult and the reliability and stability poor. Summary of the invention
[0003] The technical problem to be solved by the present invention is to provide a back-contact battery, aiming to solve the technical problem in the prior art that when testing the back-contact battery, the probe cannot form a stable contact and the reliability and stability of the test are poor.
[0004] The technical problem to be solved by the present invention is also to provide a back-contact battery string, a battery assembly and a photovoltaic system.
[0005] In order to solve the above problems, the present invention provides a back-contact battery, wherein a first region and a second region are provided on the back side of the back-contact battery along a second direction, and first grid lines and second grid lines alternately arranged along the second direction and first pad points and second pad points alternately arranged along the first direction are provided in the first region, the first pad points are connected to a first main grid, the second pad points are connected to a second main grid, the first pad points are connected to the first grid lines in the first region, and the second pad points are connected to the second grid lines in the first region;
[0006] The second region is provided with no Pad point, and the second region is provided with a third gate line and a fourth gate line alternately arranged along the second direction, the third gate line and the first gate line collect currents of the same polarity, and the fourth gate line and the second gate line collect currents of the same polarity;
[0007] On the same first gate line or the third gate line, the gate line width in a first preset area is smaller than the gate line width outside the first preset area, and the first preset area is distributed on the extension line of the second main grid in the second direction;
[0008] Alternatively, on the same second gate line or the fourth gate line, the gate line width in the second preset area is smaller than the gate line width outside the second preset area, and the second preset area is distributed on the extension line of the first main gate in the second direction.
[0009] In some embodiments, the first region is disposed near an edge of the back side of the back contact battery, and the second region is disposed at a position away from the edge of the back side of the back contact battery relative to the first region; or
[0010] The first region is disposed at a position close to a cutting region on the back side of the back contact cell, and the second region is disposed at a position farther from the cutting region on the back side of the back contact cell than the first region.
[0011] In some embodiments, along the second direction, the second region is located between two adjacent first regions.
[0012] In some embodiments, on the same first gate line or the third gate line, a gate line width within the first preset area is 50 micrometers to 150 micrometers smaller than a gate line width outside the first preset area.
[0013] In some embodiments, on the same second gate line or the fourth gate line, a gate line width in the second preset area is 50 micrometers to 150 micrometers smaller than a gate line width outside the second preset area.
[0014] In some embodiments, a first doping layer is provided under the first gate line, a second doping layer is provided under the second gate line, a third doping layer is provided under the third gate line, and a fourth doping layer is provided under the fourth gate line. The first doping layer and the third doping layer have the same polarity, the second doping layer and the fourth doping layer have the same polarity, and the first doping layer and the second doping layer have opposite doping polarities.
[0015] In some embodiments, in a first preset area, an A stack is provided on the first doping layer, and the A stack includes a first A stack, the first A stack covers a partial area of the first doping layer, and a first A spacing area extending along a first direction is left on the first doping layer, the first A stack is connected to the second doping layer adjacent to the first doping layer, and the first A stack is a doping layer, and the doping polarity of the doping layer is the same as that of the second doping layer.
[0016] In some embodiments, within the first preset area, the A stack also includes a second A stack, the second A stack covers a partial area of the first doping layer, and a second A spacing area extending along the first direction is formed between the first A stack and the second A stack, the first A stack and the second A stack are respectively connected to the second doping layer adjacent to the first doping layer, and the first A stack and the second A stack are doping layers, and the doping polarity of the doping layers is the same as that of the second doping layer.
[0017] In some embodiments, the width of the first A-spaced region or the second A-spaced region is greater than the width of the first gate line in the first preset region;
[0018] Along the first direction, the width of the first preset area is greater than the width of the A stack.
[0019] In some embodiments, a first dielectric layer is disposed between the A stack and the first doped layer.
[0020] In some embodiments, in a first preset region, a B stack is provided on the third doping layer, and the B stack includes a first B stack, the first B stack covers a partial region of the third doping layer, and a first B spacing region extending along a first direction is left on the third doping layer, the first B stack is connected to the fourth doping layer adjacent to the third doping layer, and the first B stack is a doping layer, and the doping polarity of the doping layer is the same as that of the fourth doping layer.
[0021] In some embodiments, within the first preset region, the B stack further includes a second B stack, the second B stack covers a partial region of the third doping layer, and a second B spacing region extending along the first direction is formed between the first B stack and the second B stack, the first B stack and the second B stack are respectively connected to the fourth doping layer adjacent to the third doping layer, and the first B stack and the second B stack are doping layers, and the doping polarity of the doping layers is the same as that of the fourth doping layer.
[0022] In some embodiments, the width of the first B-spaced region or the second B-spaced region is greater than the width of the third gate line in the first preset region;
[0023] Along the first direction, the width of the first predetermined area is greater than the width of the B stack.
[0024] In some embodiments, a second dielectric layer is disposed between the B stack and the third doped layer.
[0025] In some embodiments, in a second preset region, a C stack is provided on the second doping layer, the C stack includes a first C stack, the first C stack covers a partial region of the second doping layer, and a first C spacing region extending along a first direction is left on the second doping layer, the first C stack is connected to the first doping layer adjacent to the second doping layer, and the first C stack is a doping layer, and the doping polarity of the doping layer is the same as that of the first doping layer.
[0026] In some embodiments, within the second preset area, the C stack further includes a second C stack, the second C stack covers a partial area of the second doping layer, and a second C spacing area extending along the first direction is formed between the first C stack and the second C stack, the first C stack and the second C stack are respectively connected to the first doping layer adjacent to the second doping layer, and the first C stack and the second C stack are doping layers, and the doping polarity of the doping layers is the same as that of the first doping layer.
[0027] In some embodiments, the width of the first C-spaced region or the second C-spaced region is greater than the width of the second gate line in the second preset region;
[0028] Along the first direction, the width of the second predetermined area is greater than the width of the C stack.
[0029] In some embodiments, a third dielectric layer is disposed between the C stack and the second doped layer.
[0030] In some embodiments, in the second preset area, a D stack is provided on the fourth doping layer, and the D stack includes a first D stack, the first D stack covers a partial area of the fourth doping layer, and a first D spacing area extending along a first direction is left on the fourth doping layer, the first D stack is connected to the third doping layer adjacent to the fourth doping layer, and the first D stack is a doping layer, and the doping polarity of the doping layer is the same as that of the third doping layer.
[0031] In some embodiments, within the second preset region, the D stack further includes a second D stack, the second D stack covers a partial region of the fourth doping layer, and a second D spacing region extending along the first direction is formed between the first D stack and the second D stack, the first D stack and the second D stack are respectively connected to the third doping layer adjacent to the fourth doping layer, and the first D stack and the second D stack are doping layers, and the doping polarity of the doping layers is the same as that of the third doping layer.
[0032] In some embodiments, the width of the first D spacing region or the second D spacing region is greater than the width of the fourth gate line in the second preset region;
[0033] Along the first direction, the width of the second predetermined area is greater than the width of the D stack.
[0034] In some embodiments, a fourth dielectric layer is disposed between the D stack and the fourth doped layer.
[0035] In some embodiments, the first region further includes a first edge gate line and a second edge gate line, the first edge gate line is connected to the first gate line, and the second edge gate line is connected to the second gate line.
[0036] In some embodiments, the second region further includes a third edge gate line and a fourth edge gate line, the third edge gate line is connected to the third gate line, and the fourth edge gate line is connected to the fourth gate line.
[0037] Accordingly, the present invention also provides a back-contact battery string, comprising:
[0038] A plurality of back-contact batteries as described above;
[0039] A first welding strip and a second welding strip, the first preset area coincides with the projection area of the second welding strip on the back side of the back contact battery, and the second preset area coincides with the projection area of the first welding strip on the back side of the back contact battery.
[0040] Furthermore, the present invention provides a battery assembly, comprising the back-contact battery string.
[0041] The implementation of the present invention has the following beneficial effects:
[0042] In the back-contact battery and battery assembly disclosed in the present invention, the back side of the back-contact battery is provided with a first area and a second area along the second direction, the first area is provided with a first grid line and a second grid line arranged alternately along the second direction, a first Pad point and a second Pad point arranged alternately along the first direction, the first Pad point is connected to the first main grid, the second Pad point is connected to the second main grid, the first Pad point is connected to the first grid line in the first area, and the second Pad point is connected to the second grid line in the first area. In this way, the first Pad point and the second Pad point are larger in area than a single fine grid, and the first Pad point is electrically connected to the first grid line in the first area, and the second Pad point is electrically connected to the second grid line in the first area. When the back-contact battery is subjected to electrical performance tests (such as IV tests), EL tests, and hot spot tests, the positive and negative probes of the test device can form stable contacts with the first Pad point and the second Pad point, respectively, to reduce the difficulty of the test and improve the reliability and stability of the test.
[0043] Further, on the same first grid line or the third grid line, the grid line width in the first preset area is smaller than the grid line width outside the first preset area, and the first preset area is distributed on the extension line of the second main grid in the second direction; or, on the same second grid line or the fourth grid line, the grid line width in the second preset area is smaller than the grid line width outside the second preset area, and the second preset area is distributed on the extension line of the first main grid in the second direction. With such an arrangement, during the process of welding the welding strip, the contact between the welding strip and the opposite grid line can be reduced, further reducing the probability of leakage, and improving the reliability of the battery and the component. BRIEF DESCRIPTION OF THE DRAWINGS
[0044] Figure 1 is a structural schematic diagram of the back side of the back contact battery provided by the present invention;
[0045] Figure 2 is another structural schematic diagram of the back side of the back contact battery provided by the present invention;
[0046] Figure 3 is a partial enlarged view of the back side of the back contact battery provided by the present invention;
[0047] Figure 4 is a schematic structural diagram of the grid lines in the first preset area on the back side of the back contact battery provided by the present invention;
[0048] Figure 5 It is a schematic structural diagram of an A stack on the back side of a back contact battery provided by the present invention;
[0049] Figure 6 It is a schematic structural diagram of another A stacking layer on the back side of the back contact battery provided by the present invention;
[0050] Figure 7 is a schematic structural diagram of the first dielectric layer on the back side of the back contact battery provided by the present invention;
[0051] Figure 8 It is a schematic diagram of the structure of a C stack on the back side of the back contact battery provided by the present invention;
[0052] Fig. 9 It is a schematic diagram of the structure of another C stack on the back side of the back contact battery provided by the present invention;
[0053] Fig.10 It is a schematic structural diagram of a B stack on the back side of a back contact battery provided by the present invention;
[0054] Fig.11 It is a schematic structural diagram of another B stack on the back side of the back contact battery provided by the present invention;
[0055] Fig.12It is a schematic structural diagram of a D stack on the back side of a back contact battery provided by the present invention;
[0056] Fig.13 It is a schematic structural diagram of another D stacking layer on the back side of the back contact battery provided by the present invention;
[0057] Fig.14 It is a structural schematic diagram of a battery assembly provided by the present invention;
[0058] Fig.15 It is a structural schematic diagram of the photovoltaic system provided by the present invention. DETAILED DESCRIPTION
[0059] In order to make the purpose, technical scheme and advantages of the present invention clearer, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. Examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements with the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and should not be construed as limiting the present invention. In addition, it should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.
[0060] In the description of the present invention, it is necessary to understand that the terms "length", "width", "up", "down", "left", "right", "horizontal", "top", "bottom", etc. indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention.
[0061] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.
[0062] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection, an electrical connection, or can communicate with each other; it can be a direct connection, or it can be indirectly connected through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in some embodiments of the present invention can be understood according to specific circumstances.
[0063] In some embodiments of the present invention, unless otherwise clearly specified and limited, a first feature being "above" or "below" a second feature may include that the first and second features are in direct contact, or may include that the first and second features are not in direct contact but are in contact through another feature between them. Moreover, a first feature being "above", "above" and "above" a second feature includes that the first feature is directly above and obliquely above the second feature, or simply indicates that the first feature is higher in level than the second feature. A first feature being "below", "below" and "below" a second feature includes that the first feature is directly below and obliquely below the second feature, or simply indicates that the first feature is lower in level than the second feature.
[0064] The disclosure below provides many different embodiments or examples to realize different structures of the present invention. In order to simplify the disclosure of the present invention, the parts and settings of specific examples are described below. Of course, they are only examples, and the purpose is not to limit the present invention. In addition, the present invention can repeat reference numbers and / or reference letters in different examples, and this repetition is for the purpose of simplification and clarity, which itself does not indicate the relationship between the various embodiments and / or settings discussed. In addition, the examples of various specific processes and materials provided by the present invention, but those of ordinary skill in the art can be aware of the application of other processes and / or the use of other materials.
[0065] In the present invention, "preferred" and "better" are only used to describe implementation methods or embodiments with better effects, and it should be understood that they do not constitute a limitation on the scope of protection of the present invention. In the present invention, the technical features described in an open manner include closed technical solutions composed of the listed features, and also include open technical solutions containing the listed features. In the present invention, when involving numerical ranges, unless otherwise specified, the two endpoints of the numerical range are included.
[0066] The present invention provides a back contact battery 100, such as Figures 1 to 10 As shown, the back side of the back contact battery 100 is provided with a first area 110 and a second area 120 along the second direction, the first area 110 is provided with a first grid line 210 and a second grid line 220 alternately arranged along the second direction, and a first pad point 310 and a second pad point 320 alternately arranged along the first direction, the first pad point 310 is connected to the first main grid, the second pad point 320 is connected to the second main grid, the first pad point 310 is connected to the first grid line 210 in the first area 110, and the second pad point 320 is connected to the second grid line 220 in the first area 110;
[0067] The second region 120 is provided with no Pad point, and the second region 120 is provided with a third gate line 230 and a fourth gate line 240 alternately arranged along the second direction, the third gate line 230 and the first gate line 210 collect currents of the same polarity, and the fourth gate line 240 and the second gate line 220 collect currents of the same polarity;
[0068] On the same first gate line 210 or the third gate line 230, the gate line width in the first preset area 130 is smaller than the gate line width outside the first preset area 130, and the first preset area 130 is distributed on the extension line of the second main grid in the second direction;
[0069] And / or, on the same second gate line 220 or the fourth gate line 240, the gate line width in a second preset area is smaller than the gate line width outside the second preset area, and the second preset area is distributed on the extension line of the first main gate in the second direction.
[0070] In some embodiments, the back side of the back-contact battery 100 is provided with a first region 110 and a second region 120 along a second direction. In some embodiments, the first region 110 is disposed close to an edge of the back side of the back-contact battery 100, and the second region 120 is disposed relative to the first region 110 and away from the edge of the back side of the back-contact battery 100; or, the first region 110 is disposed close to a cutting region on the back side of the back-contact battery 100, and the second region 120 is disposed relative to the first region 110 and away from the cutting region on the back side of the back-contact battery 100.
[0071] In some embodiments, Figure 2 As shown, along the second direction, the second region 120 is disposed between two adjacent first regions 110. Preferably, the back side of the back contact battery 100 is provided with four first regions 110 and two first regions 110, the first regions 110 are disposed at the head end and the tail end of the back side of the back contact battery 100 along the second direction, and the second region 120 is disposed between the two first regions 110. In one embodiment, the area of the first region 110 is smaller than the area of the second region 120.
[0072] The structural design in the first area 110 and the second area 120 is described in detail below:
[0073] (I) First area 110
[0074] The first region 110 is provided with first gate lines 210 and second gate lines 220 alternately arranged along the second direction, and first Pad points 310 and second Pad points 320 alternately arranged along the first direction, the first Pad point 310 is connected to the first main gate, the second Pad point 320 is connected to the second main gate, the first Pad point 310 is connected to the first gate line 210 in the first region 110, and the second Pad point 320 is connected to the second gate line 220 in the first region 110.
[0075] In one embodiment, the first direction and the second direction intersect; preferably, the first direction and the second direction are perpendicular to each other; more preferably, the first direction is the lateral direction of the back contact battery 100, and the second direction is the longitudinal direction of the back contact battery 100, and the two are perpendicular to each other. Of course, in other embodiments, the first direction and the second direction may also be other directions, and the present invention is not limited to this.
[0076] In one implementation, the first region 110 further includes a first edge gate line and a second edge gate line, the first edge gate line is connected to the first gate line 210 , and the second edge gate line is connected to the second gate line 220 .
[0077] In one embodiment, the first edge gate line and the second edge gate line both extend along the second direction.
[0078] In one embodiment, when the first edge gate line is connected to the first gate line 210, a gap is left between the first edge gate line and the second gate line 220, and when the second edge gate line is connected to the second gate line 220, a gap is left between the second edge gate line and the first gate line 210. In this way, contact between opposite gate lines can be avoided and current collection efficiency can be improved.
[0079] It should be noted that, in some embodiments, “the first Pad point 310 is connected to the first gate line 210 in the first area 110” means that when the back-contact battery 100 is subjected to electrical performance tests (such as IV testing), EL testing, and hot spot testing, some of the first Pad points 310 can be used as test Pad points, and when in contact with the probe of the testing device, all of the first gate lines 210 in the first area 110 can be connected to the probe of the testing device through the first Pad point 310. The setting method can be that all the first gate lines 210 are directly connected to the first Pad point 310 as a whole or electrically connected through other structures.
[0080] Similarly, in some embodiments, “the second Pad point 320 is connected to the second gate line 220 in the first area 110” means that when the back-contact battery 100 is subjected to electrical performance tests (such as IV testing), EL testing, and hot spot testing, some of the second Pad points 320 can be used as test Pad points, and when in contact with the probe of the testing device, all of the second gate lines 220 in the first area 110 can be connected to the probe of the testing device through the second Pad point 320. The arrangement can be that all the second gate lines 220 are directly connected to the second Pad points 320 as a whole or electrically connected through other structures.
[0081] Furthermore, if Figure 4 As shown, on the same first gate line 210, the gate line width in the first preset area 130 is smaller than the gate line width outside the first preset area 130, and the first preset area 130 is distributed on the extension line of the second main gate in the second direction; or, on the same second gate line 220, the gate line width in the second preset area is smaller than the gate line width outside the second preset area, and the second preset area is distributed on the extension line of the first main gate in the second direction.
[0082] In some embodiments, on the same first gate line 210, the gate line width in the first preset area 130 is 50 microns to 150 microns smaller than the gate line width outside the first preset area 130. Exemplarily, the gate line width in the first preset area 130 is 50 microns, 60 microns, 70 microns, 80 microns, 90 microns, 100 microns, 110 microns, 120 microns, 130 microns, 140 microns smaller than the gate line width outside the first preset area 130, not limited to the above enumeration.
[0083] In some embodiments, on the same second gate line 220, the gate line width in the second preset area is 50 microns to 150 microns smaller than the gate line width outside the second preset area. Exemplarily, the gate line width in the second preset area is 50 microns, 60 microns, 70 microns, 80 microns, 90 microns, 100 microns, 110 microns, 120 microns, 130 microns, 140 microns smaller than the gate line width outside the second preset area, not limited to the above enumeration.
[0084] In some embodiments, the width of the first preset area 130 in the first direction is less than the width of the second welding strip. It should be noted that the narrowing of the grid lines in the first preset area 130 or the second preset area is beneficial to reduce the contact between the welding strip and the grid lines of different sexes during the welding process of the welding strip, further reduce the probability of leakage, and improve the reliability of the battery and the component.
[0085] Moreover, the narrowing of the gate line in the first preset area 130 or the second preset area is conducive to the following anti-hot spot and reverse leakage design in the doping area below the first gate line 210 and / or the second gate line 220, as follows:
[0086] In some embodiments, a first doping layer 410 is disposed under the first gate line 210 , and a second doping layer 420 is disposed under the second gate line 220 . The first doping layer 410 and the second doping layer 420 have opposite doping polarities.
[0087] On this basis, if Figure 5 As shown, in some embodiments, within the first preset area 130, an A stack 510 is provided on the first doping layer 410, and the A stack 510 includes a first A stack 511, the first A stack 511 covers a partial area of the first doping layer 410, and a first A spacing area 611 extending along a first direction is left on the first doping layer 410, the first A stack 511 is connected to the second doping layer 420 adjacent to the first doping layer 410, and the first A stack 511 is a doping layer, and the doping polarity of the doping layer is the same as that of the second doping layer 420.
[0088] It should be noted that this embodiment introduces the A stack 510 including the first A stack 511, the first A stack 511 covers a part of the first doping layer 410, and the doping polarity of the A stack 510 is different from the doping polarity of the first doping layer 410, thereby forming a leakage contact structure, and the leakage contact structure can improve the leakage capacity of the solar cell and improve the reverse leakage characteristics. In this way, with the improvement of the leakage capacity, at the component end, when the solar cell is blocked, the voltage at both ends of the blocked solar cell will be reduced, and the heating power of the solar cell will be reduced, thereby achieving the purpose of controlling the risk of hot spots. At the same time, the leakage contact structure has a protective effect on the hot spots caused by defects in the silicon wafer itself, which can reduce or even cancel the requirements for defect control, and improve the manufacturing capacity of solar cells while reducing the risk of hot spots caused by defects.
[0089] Combination Figure 4 and Figure 5 As shown, in some embodiments, the width of the first A-spaced region 611 is greater than the width of the first gate line 210 in the first preset region 130. In this way, while the leakage contact structure is prepared on the first doping layer 410, a suitable area is reserved for preparing the first gate line 210, that is, a smaller width portion of the first gate line can be arranged at the first A-spaced region 611.
[0090] In some embodiments, along the first direction, the width of the first preset area 130 is greater than the width of the A stack 510. In some embodiments, the gate lines in the first preset area 130 are narrowed, which can reduce the risk of the gate lines contacting the heterogeneous A stack 510, thereby reducing the risk of poor contact at the gate lines and improving operational reliability.
[0091] In some embodiments, Figure 7 As shown, a first dielectric layer 710 is provided between the A stack 510 and the first doped layer 410. Here, it means that the first doped layer 410, the first dielectric layer 710 and the A stack 510 are connected in sequence. The first dielectric layer 710 includes but is not limited to silicon dioxide, aluminum oxide, and silicon nitride. These materials have high dielectric constants and excellent passivation properties. The provision of the first dielectric layer plays an important role in improving the efficiency, stability and life of the battery.
[0092] In some embodiments, Figure 6 As shown, within the first preset area 130, the A stack 510 also includes a second A stack 512, the second A stack 512 covers a partial area of the first doping layer 410, and a second A spacing area 612 extending along the first direction is formed between the first A stack 511 and the second A stack 512, the first A stack 511 and the second A stack 512 are respectively connected to the second doping layer 420 adjacent to the first doping layer 410, and the first A stack 511 and the second A stack 512 are doping layers, and the doping polarity of the doping layers is the same as that of the second doping layer 420.
[0093] As above, this embodiment introduces the A stack 510 including the first A stack 511 and the second A stack 512, wherein the first A stack 511 and the second A stack 512 cover a portion of the first doping layer 410, and the doping polarity of the first A stack 511 and the second A stack 512 is different from the doping polarity of the first doping layer 410, thereby forming a leakage contact structure, and the leakage contact structure can improve the leakage capacity of the solar cell and improve the reverse leakage characteristics. In this way, as the leakage capacity is improved, at the component end, when the solar cell is blocked, the voltage at both ends of the blocked solar cell will be reduced, and the heating power of the solar cell will be reduced, thereby achieving the purpose of controlling the risk of hot spots. At the same time, the leakage contact structure has a protective effect on the hot spots caused by defects in the silicon wafer itself, which can reduce or even cancel the requirements for the control of defects, and improve the manufacturing capacity of solar cells while reducing the risk of hot spots caused by defects.
[0094] It should be noted that if the coverage area of the A stack 510 on the first doping layer 410 is too large, it will cause too much efficiency loss, and if the coverage area of the A stack 510 on the first doping layer 410 is too small, it will not have a good reverse leakage effect. By introducing the second A stack 512 on the basis of the first A stack 511, the reverse leakage characteristics can be improved while avoiding excessive efficiency loss, thereby ensuring the conversion efficiency of the solar cell.
[0095] In some embodiments, in combination Figure 4 and Figure 6 The width of the second A-spaced region 612 is greater than the width of the first gate line 210 in the first preset region 130, so that the first gate line 210 can be formed on the first doping layer 410. In other words, the smaller width portion of the first gate line can be disposed at the second A-spaced region 612.
[0096] In some embodiments, along the first direction, the width of the first preset area 130 is greater than the width of the A stack 510. In some embodiments, the gate lines in the first preset area 130 are narrowed, which can reduce the risk of the gate lines contacting the heterogeneous A stack 510, thereby reducing the risk of poor contact at the gate lines and improving operational reliability.
[0097] In some embodiments, Figure 7 As shown, a first dielectric layer 710 is provided between the A stack 510 and the first doped layer 410. Here, it means that the first doped layer 410, the first dielectric layer 710 and the A stack 510 are connected in sequence. The first dielectric layer 710 includes but is not limited to silicon dioxide, aluminum oxide, and silicon nitride. These materials have high dielectric constants and excellent passivation properties. The provision of the first dielectric layer plays an important role in improving the efficiency, stability and life of the battery.
[0098] In addition, the leakage contact structure may be further provided on the second doping layer 420, as follows:
[0099] In some embodiments, Figure 8 As shown, in the second preset area, a C stack 530 is provided on the second doping layer 420, and the C stack 530 includes a first C stack 531, the first C stack 531 covers a partial area of the second doping layer 420, and a first C spacing area 631 extending along the first direction is left on the second doping layer 420, the first C stack 531 is connected to the first doping layer 410 adjacent to the second doping layer 420, and the first C stack 531 is a doping layer, and the doping polarity of the doping layer is the same as that of the first doping layer 410.
[0100] It should be noted that, in this embodiment, a C stack 530 is introduced, and the C stack 530 includes a first C stack 531, and the first C stack 531 covers a part of the second doping layer 420, and the doping polarity of the C stack 530 is different from the doping polarity of the second doping layer 420, thereby forming a leakage contact structure, and the leakage contact structure can improve the leakage capacity of the solar cell and improve the reverse leakage characteristics. In this way, with the improvement of the leakage capacity, at the component end, when the solar cell is blocked, the voltage at both ends of the blocked solar cell will be reduced, and the heating power of the solar cell will be reduced, thereby achieving the purpose of controlling the risk of hot spots. At the same time, the leakage contact structure has a protective effect on the hot spots caused by defects in the silicon wafer itself, which can reduce or even cancel the requirements for the control of defects, and improve the manufacturing capacity of solar cells while reducing the risk of hot spots caused by defects.
[0101] In some embodiments, the width of the first C-spacer region 631 is greater than the width of the second gate line 220 in the second preset region; thus, while the leakage contact structure is prepared on the second doping layer 420, a suitable region is reserved for preparing the second gate line 220. In other words, a portion of the second gate line with a smaller width can be arranged at the first C-spacer region 631.
[0102] In some embodiments, along the first direction, the width of the second preset area is greater than the width of the C stack 530. In some embodiments, the gate line in the second preset area is narrowed, which can reduce the risk of the gate line contacting the heterogeneous C stack 530, thereby reducing the risk of poor contact at the gate line and improving operational reliability.
[0103] In some embodiments, a third dielectric layer is provided between the C stack 530 and the second doped layer 420. Here, the second doped layer 420, the third dielectric layer and the C stack 530 are connected in sequence. The third dielectric layer includes but is not limited to silicon dioxide, aluminum oxide, and silicon nitride. These materials have a high dielectric constant and excellent passivation performance. The provision of the third dielectric layer plays an important role in improving the efficiency, stability and life of the battery.
[0104] In some embodiments, Fig. 9As shown, in the second preset area, the C stack 530 also includes a second C stack 532, the second C stack 532 covers a partial area of the second doping layer 420, and a second C spacing area 632 extending along the first direction is formed between the first C stack 531 and the second C stack 532, the first C stack 531 and the second C stack 532 are respectively connected to the first doping layer 410 adjacent to the second doping layer 420, and the first C stack 531 and the second C stack 532 are doping layers, and the doping polarity of the doping layers is the same as that of the first doping layer 410.
[0105] As above, this embodiment introduces a C stack 530 including a first C stack 531 and a second C stack 532, wherein the first C stack 531 and the second C stack 532 cover a portion of the second doping layer 420, and the doping polarity of the first C layer and the second C stack 532 is different from the doping polarity of the second doping layer 420, thereby forming a leakage contact structure, which can improve the leakage capacity of the solar cell and improve the reverse leakage characteristics. In this way, as the leakage capacity is improved, at the component end, when the solar cell is blocked, the voltage at both ends of the blocked solar cell will be reduced, and the heating power of the solar cell will be reduced, thereby achieving the purpose of controlling the risk of hot spots. At the same time, the leakage contact structure has a protective effect on the hot spots caused by defects in the silicon wafer itself, which can reduce or even cancel the requirements for the control of defects, and improve the manufacturing capacity of solar cells while reducing the risk of hot spots caused by defects.
[0106] It should be noted that if the coverage area of the C stack 530 on the second doping layer 420 is too large, it will cause too much efficiency loss, and if the coverage area of the C stack 530 on the second doping layer 420 is too small, it will not have a good reverse leakage effect. By introducing the second C stack 532 on the basis of the first C stack 531, it is possible to improve the reverse leakage characteristics while avoiding excessive efficiency loss, thereby ensuring the conversion efficiency of the solar cell.
[0107] In some embodiments, the width of the first C-spacer region 631 or the second C-spacer region 632 is greater than the width of the second gate line 220 in the second preset region; thus, while the leakage contact structure is prepared on the second doping layer 420, a suitable area is reserved for preparing the second gate line 220. In other words, a portion of the second gate line with a smaller width can be arranged at the second C-spacer region 632.
[0108] In some embodiments, along the first direction, the width of the second preset area is greater than the width of the C stack 530. In some embodiments, the gate lines in the first preset area 130 are narrowed, which can reduce the risk of the gate lines contacting the heterogeneous C stack 530, thereby reducing the risk of poor contact at the gate lines and improving operational reliability.
[0109] In some embodiments, a third dielectric layer is provided between the C stack 530 and the second doped layer 420. Here, the second doped layer 420, the third dielectric layer and the C stack 530 are connected in sequence. The third dielectric layer includes but is not limited to silicon dioxide, aluminum oxide, and silicon nitride. These materials have a high dielectric constant and excellent passivation performance. The provision of the third dielectric layer plays an important role in improving the efficiency, stability and life of the battery.
[0110] (II) Second Area 120
[0111] The second region 120 is provided with no Pad point, and the second region 120 is provided with a third gate line 230 and a fourth gate line 240 alternately arranged along the second direction, the third gate line 230 and the first gate line 210 collect currents of the same polarity, and the fourth gate line 240 and the second gate line 220 collect currents of the same polarity;
[0112] In one embodiment, the first direction and the second direction intersect; preferably, the first direction and the second direction are perpendicular to each other; more preferably, the first direction is the lateral direction of the back contact battery 100, and the second direction is the longitudinal direction of the back contact battery 100, and the two are perpendicular to each other. Of course, in other embodiments, the first direction and the second direction may also be other directions, and the present invention is not limited to this.
[0113] The second region 120 further includes a third edge gate line and a fourth edge gate line. The third edge gate line is connected to the third gate line 230 , and the fourth edge gate line is connected to the fourth gate line 240 .
[0114] In one embodiment, the third edge gate line and the fourth edge gate line both extend along the second direction.
[0115] In one embodiment, when the third edge grid line is connected to the third grid line 230, a gap is left between the third edge grid line and the fourth grid line 240, and when the fourth edge grid line is connected to the fourth grid line 240, a gap is left between the fourth edge grid line and the third grid line 230. In this way, contact between opposite-sex grid lines can be avoided and current collection efficiency can be improved.
[0116] Further, on the same third gate line 230, the gate line width within the first preset area 130 is smaller than the gate line width outside the first preset area 130, and the first preset area 130 is distributed on the extension line of the second main gate in the second direction; or, on the same fourth gate line 240, the gate line width within the second preset area is smaller than the gate line width outside the second preset area, and the second preset area is distributed on the extension line of the first main gate in the second direction.
[0117] In some embodiments, on the same third gate line 230, the gate line width in the first preset area 130 is 50 microns to 150 microns smaller than the gate line width outside the first preset area 130. Exemplarily, the gate line width in the first preset area 130 is 50 microns, 60 microns, 70 microns, 80 microns, 90 microns, 100 microns, 110 microns, 120 microns, 130 microns, 140 microns smaller than the gate line width outside the first preset area 130, not limited to the above enumeration.
[0118] In some embodiments, on the same fourth gate line 240, the gate line width in the second preset area is 50 microns to 150 microns smaller than the gate line width outside the second preset area. Exemplarily, the gate line width in the second preset area is 50 microns, 60 microns, 70 microns, 80 microns, 90 microns, 100 microns, 110 microns, 120 microns, 130 microns, 140 microns smaller than the gate line width outside the second preset area, not limited to the above enumeration.
[0119] In some embodiments, the width of the first preset area 130 in the first direction is less than the width of the second welding strip. It should be noted that the narrowing of the grid lines in the first preset area 130 or the second preset area is beneficial to reduce the contact between the welding strip and the grid lines of different sexes during the welding process of the welding strip, further reduce the probability of leakage, and improve the reliability of the battery and the component.
[0120] Moreover, narrowing the gate line in the first preset area 130 or the second preset area is conducive to making the following anti-hot spot and reverse leakage design in the doping area below the third gate line 230 and / or the fourth gate line 240, as follows:
[0121] In some embodiments, a third doping layer 430 is disposed under the third gate line 230 , and a fourth doping layer 440 is disposed under the fourth gate line 240 . The third doping layer 430 and the fourth doping layer 440 have opposite doping polarities.
[0122] On this basis, if Fig.10As shown, in some embodiments, within the first preset area 130, a B stack 520 is provided on the third doping layer 430, and the B stack 520 includes a first B stack 521, the first B stack 521 covers a partial area of the third doping layer 430, and a first B spacing area 621 extending along the first direction is left on the third doping layer 430, the first B stack 521 is connected to the fourth doping layer 440 adjacent to the third doping layer 430, and the first B stack 521 is a doping layer, and the doping polarity of the doping layer is the same as that of the fourth doping layer 440.
[0123] It should be noted that, in this embodiment, by introducing a B stack 520, the B stack 520 includes a first B stack 521, the first B stack 521 covers a part of the third doping layer 430, and the doping polarity of the B stack 520 is different from the doping polarity of the third doping layer 430, thereby forming a leakage contact structure, and the leakage contact structure can improve the leakage capacity of the solar cell and improve the reverse leakage characteristics. In this way, with the improvement of the leakage capacity, at the component end, when the solar cell is blocked, the voltage at both ends of the blocked solar cell will be reduced, and the heating power of the solar cell will be reduced, thereby achieving the purpose of controlling the risk of hot spots. At the same time, the leakage contact structure has a protective effect on the hot spots caused by defects in the silicon wafer itself, which can reduce or even cancel the requirements for the control of defects, and improve the manufacturing capacity of solar cells while reducing the risk of hot spots caused by defects.
[0124] In some embodiments, the width of the first B-spacer region 621 is greater than the width of the third gate line 230 in the first preset region 130; thus, while the leakage contact structure is prepared on the third doping layer 430, a suitable area is reserved for preparing the third gate line 230. In other words, a portion of the third gate line with a smaller width can be arranged at the first B-spacer region 621.
[0125] In some embodiments, along the first direction, the width of the first preset area 130 is greater than the width of the B stack 520. In some embodiments, the gate lines in the first preset area 130 are narrowed, which can reduce the risk of the gate lines contacting the heterogeneous B stack 520, thereby reducing the risk of poor contact at the gate lines and improving operational reliability.
[0126] In some embodiments, a second dielectric layer is provided between the B stack 520 and the third doped layer 430. Here, the third doped layer 430, the second dielectric layer and the B stack 520 are connected in sequence. The second dielectric layer includes but is not limited to silicon dioxide, aluminum oxide, and silicon nitride. These materials have a high dielectric constant and excellent passivation performance. The provision of the second dielectric layer plays an important role in improving the efficiency, stability and life of the battery.
[0127] In some embodiments, Fig.11 As shown, within the first preset area 130, the B stack 520 also includes a second B stack 522, the second B stack 522 covers a partial area of the third doping layer 430, and a second B spacing area 622 extending along the first direction is formed between the first B stack 521 and the second B stack 522, the first B stack 521 and the second B stack 522 are respectively connected to the fourth doping layer 440 adjacent to the third doping layer 430, and the first B stack 521 and the second B stack 522 are doping layers, and the doping polarity of the doping layers is the same as that of the fourth doping layer 440.
[0128] As above, this embodiment introduces a B stack 520 including a first B stack 521 and a second B stack 522, wherein the first B stack 521 and the second B stack 522 cover a portion of the third doping layer 430, and the doping polarity of the first B stack 521 and the second B stack 522 is different from the doping polarity of the third doping layer 430, thereby forming a leakage contact structure, and the leakage contact structure can improve the leakage capacity of the solar cell and improve the reverse leakage characteristics. In this way, as the leakage capacity is improved, at the component end, when the solar cell is blocked, the voltage at both ends of the blocked solar cell will be reduced, and the heating power of the solar cell will be reduced, thereby achieving the purpose of controlling the risk of hot spots. At the same time, the leakage contact structure has a protective effect on the hot spots caused by defects in the silicon wafer itself, which can reduce or even cancel the requirements for the control of defects, and improve the manufacturing capacity of solar cells while reducing the risk of hot spots caused by defects.
[0129] It should be noted that if the coverage area of the B stack 520 on the third doping layer 430 is too large, it will cause too much efficiency loss, and if the coverage area of the B stack 520 on the third doping layer 430 is too small, it will not have a good reverse leakage effect. By introducing the second B stack 522 on the basis of the first B stack 521, it is possible to improve the reverse leakage characteristics while avoiding too much efficiency loss, thereby ensuring the conversion efficiency of the solar cell.
[0130] In some embodiments, the width of the second B spacing region 622 is greater than the width of the third gate line 230 in the first preset region 130; thus, while the leakage contact structure is prepared on the third doping layer 430, a suitable area is reserved for preparing the third gate line 230. In other words, a portion of the third gate line with a smaller width can be arranged at the second B spacing region 622.
[0131] In some embodiments, along the first direction, the width of the first preset area 130 is greater than the width of the B stack 520. In some embodiments, the gate lines in the first preset area 130 are narrowed, which can reduce the risk of the gate lines contacting the heterogeneous B stack 520, thereby reducing the risk of poor contact at the gate lines and improving operational reliability.
[0132] In some embodiments, a second dielectric layer is provided between the B stack 520 and the third doped layer 430. Here, the third doped layer 430, the second dielectric layer and the B stack 520 are connected in sequence. The second dielectric layer includes but is not limited to silicon dioxide, aluminum oxide, and silicon nitride. These materials have a high dielectric constant and excellent passivation performance. The provision of the second dielectric layer plays an important role in improving the efficiency, stability and life of the battery.
[0133] In addition, the leakage contact structure may be provided on the fourth doping layer 440, as follows:
[0134] In some embodiments, Fig.12 As shown, in the second preset area, a D stack 540 is provided on the fourth doping layer 440, and the D stack 540 includes a first D stack 541, the first D stack 541 covers a partial area of the fourth doping layer 440, and a first D spacing area 641 extending along the first direction is left on the fourth doping layer 440, the first D stack 541 is connected to the third doping layer 430 adjacent to the fourth doping layer 440, and the first D stack 541 is a doping layer, and the doping polarity of the doping layer is the same as that of the third doping layer 430.
[0135] It should be noted that, in this embodiment, a D stack 540 is introduced, and the D stack 540 includes a first D stack 541, and the first D stack 541 covers a part of the second doping layer 420, and the doping polarity of the D stack 540 is different from the doping polarity of the second doping layer 420, thereby forming a leakage contact structure, and the leakage contact structure can improve the leakage capacity of the solar cell and improve the reverse leakage characteristics. In this way, with the improvement of the leakage capacity, at the component end, when the solar cell is blocked, the voltage at both ends of the blocked solar cell will be reduced, and the heating power of the solar cell will be reduced, thereby achieving the purpose of controlling the risk of hot spots. At the same time, the leakage contact structure has a protective effect on the hot spots caused by defects in the silicon wafer itself, which can reduce or even cancel the requirements for the control of defects, and improve the manufacturing capacity of solar cells while reducing the risk of hot spots caused by defects.
[0136] In some embodiments, the width of the first D spacing region 641 is greater than the width of the fourth gate line 240 in the second preset region; thus, while the leakage contact structure is prepared on the fourth doping layer 440, a suitable area is reserved for preparing the fourth gate line 240. In other words, a smaller width portion of the fourth gate line can be arranged at the first D spacing region 641.
[0137] In some embodiments, along the first direction, the width of the second preset area is greater than the width of the D stack 540. In some embodiments, the gate line in the second preset area is narrowed, which can reduce the risk of the gate line contacting the heterogeneous D stack 540, thereby reducing the risk of poor contact at the gate line and improving operational reliability.
[0138] In some embodiments, a fourth dielectric layer is provided between the D stack 540 and the fourth doped layer 440. Here, the fourth doped layer 440, the fourth dielectric layer and the D stack 540 are connected in sequence. The fourth dielectric layer includes but is not limited to silicon dioxide, aluminum oxide, and silicon nitride. These materials have high dielectric constants and excellent passivation properties. The provision of the fourth dielectric layer plays an important role in improving the efficiency, stability and life of the battery.
[0139] In some embodiments, Fig.13As shown, in the second preset area, the D stack 540 also includes a second D stack 542, the second D stack 542 covers a partial area of the fourth doping layer 440, and a second D spacing area 642 extending along the first direction is formed between the first D stack 541 and the second D stack 542, the first D stack 541 and the second D stack 542 are respectively connected to the third doping layer 430 adjacent to the fourth doping layer 440, and the first D stack 541 and the second D stack 542 are doping layers, and the doping polarity of the doping layers is the same as that of the third doping layer 430.
[0140] As above, this embodiment introduces a D stack 540, and the D stack 540 includes a first D stack 541 and a second D stack 542, and the first D stack 541 and the second D stack 542 cover a part of the second doping layer 420, and the doping polarity of the first D stack 541 and the second D stack 542 is different from the doping polarity of the second doping layer 420, thereby forming a leakage contact structure, and the leakage contact structure can improve the leakage capacity of the solar cell and improve the reverse leakage characteristics. In this way, with the improvement of the leakage capacity, at the component end, when the solar cell is blocked, the voltage at both ends of the blocked solar cell will be reduced, and the heating power of the solar cell will be reduced, thereby achieving the purpose of controlling the risk of hot spots. At the same time, the leakage contact structure has a protective effect on the hot spots caused by defects in the silicon wafer itself, which can reduce or even cancel the requirements for the control of defects, and improve the manufacturing capacity of solar cells while reducing the risk of hot spots caused by defects.
[0141] It should be noted that if the D stack 540 covers too large an area on the fourth doped layer 440, it will cause too much efficiency loss, and if the D stack 540 covers too small an area on the fourth doped layer 440, it will not have a good reverse leakage effect. By introducing the second D stack 542 on the basis of the first D stack 541, the reverse leakage characteristics can be improved while avoiding too much efficiency loss, thereby ensuring the conversion efficiency of the solar cell.
[0142] In some embodiments, the width of the second D spacing region 642 is greater than the width of the fourth gate line 240 in the second preset region; thus, while the leakage contact structure is prepared on the fourth doping layer 440, a suitable area is reserved for preparing the fourth gate line 240. In other words, a portion of the fourth gate line with a smaller width can be arranged at the second D spacing region 642.
[0143] In some embodiments, along the first direction, the width of the second preset area is greater than the width of the D stack 540. In some embodiments, the gate line in the second preset area is narrowed, which can reduce the risk of the gate line contacting the heterogeneous D stack 540, thereby reducing the risk of poor contact at the gate line and improving operational reliability.
[0144] In some embodiments, a fourth dielectric layer is provided between the D stack 540 and the fourth doped layer 440. Here, the fourth doped layer 440, the fourth dielectric layer and the D stack 540 are connected in sequence. The fourth dielectric layer includes but is not limited to silicon dioxide, aluminum oxide, and silicon nitride. These materials have high dielectric constants and excellent passivation properties. The provision of the fourth dielectric layer plays an important role in improving the efficiency, stability and life of the battery.
[0145] In some embodiments, within the second preset area, the D stack 540 also includes a second D stack 542, the second D stack 542 covers a partial area of the fourth doping layer 440, and a second D spacing region 642 extending along the first direction is formed between the first D stack 541 and the second D stack 542, the first D stack 541 and the second D stack 542 are respectively connected to the third doping layer 430 adjacent to the fourth doping layer 440, and the first D stack 541 and the second D stack 542 are doping layers, and the doping polarity of the doping layers is the same as that of the third doping layer 430.
[0146] To sum up, in the back-contact battery 100 provided by the present invention, the first Pad point 310 and the second Pad point 320 are larger in area than a single fine grid, and the first Pad point 310 is electrically connected to the first grid line 210 in the first area 110, and the second Pad point 320 is electrically connected to the second grid line 220 in the first area 110. When the back-contact battery 100 is subjected to electrical performance tests (such as IV tests), EL tests, and hot spot tests, the positive and negative probes of the testing device can form stable contact with the first Pad point 310 and the second Pad point 320, respectively, thereby reducing the difficulty of testing and improving the reliability and stability of testing.
[0147] Further, on the same first grid line 210 or the third grid line 230, the grid line width in the first preset area 130 is smaller than the grid line width outside the first preset area 130, and the first preset area 130 is distributed on the extension line of the second main grid in the second direction; or, on the same second grid line 220 or the fourth grid line 240, the grid line width in the second preset area is smaller than the grid line width outside the second preset area, and the second preset area is distributed on the extension line of the first main grid in the second direction. With such an arrangement, during the process of welding the welding strip, the contact between the welding strip and the opposite grid line can be reduced, further reducing the probability of leakage, and improving the reliability of the battery and the component.
[0148] Furthermore, the present invention is provided with a leakage contact structure in the first preset area 130 or / and the second preset area, namely, the A stack 510, B stack 520, C stack 530, and D stack 540 mentioned above, and the leakage contact structure includes one or more of the A stack 510, the B stack 520, the C stack 530, and the D stack 540. The leakage contact structure can improve the leakage capacity of the solar cell and improve the reverse leakage characteristics. In this way, as the leakage capacity is improved, at the component end, when the solar cell is blocked, the voltage at both ends of the blocked solar cell will be reduced, and the heating power of the solar cell will be reduced, thereby achieving the purpose of controlling the risk of hot spots. At the same time, the leakage contact structure has a protective effect on the hot spots caused by defects in the silicon wafer itself, which can reduce or even cancel the requirements for the control of defects, and improve the manufacturing capacity of solar cells while reducing the risk of hot spots caused by defects.
[0149] Finally, the gate line in the first preset area 130 or the second preset area is narrowed, that is, on the same first gate line 210 or the third gate line 230, the gate line width in the first preset area 130 is smaller than the gate line width outside the first preset area 130; on the same second gate line 220 or the fourth gate line 240, the gate line width in the second preset area is smaller than the gate line width outside the second preset area. The narrowing of the gate line in the first preset area 130 or the second preset area is beneficial to reduce the risk of the gate line contacting with the heterogeneous laminate under the design of the leakage contact structure, thereby reducing the risk of poor contact at the gate line and improving the operational reliability.
[0150] In addition to the above-mentioned back contact cell 100, Fig.14 As shown, the present invention also provides a string of back-contact batteries 100, including a plurality of back-contact batteries 100 as described above; and the present invention also provides a battery assembly 10, including the string of back-contact batteries 100.
[0151] In some embodiments, multiple back-contact solar cells in the battery assembly 10 are connected in series to form a battery string, and each battery string can be connected in series, in parallel, or in a combination of series and parallel to achieve current bus output. For example, the connection between each battery can be achieved by setting a welding bar, and the connection between multiple battery strings can be achieved by a bus bar.
[0152] In some embodiments, the back contact battery 100 is connected by the first welding strip and the second welding strip, the first pad is connected to the first welding strip, and the second pad point 320 is connected to the second welding strip. In some embodiments, the first welding strip and the second welding strip, the first preset area coincides with the projection area of the second welding strip on the back of the back contact battery, and the second preset area coincides with the projection area of the first welding strip on the back of the back contact battery.
[0153] In some embodiments, the battery assembly 10 may also include a metal frame, a back plate, photovoltaic glass and an adhesive film. The adhesive film may be filled between the front and photovoltaic glass, the back and the back plate of the back contact solar cell, and the adjacent cells, etc. As a filler, it may be a transparent colloid with good light transmittance and aging resistance. For example, the adhesive film may be an EVA adhesive film or a POE adhesive film, which may be selected according to actual conditions and is not limited here.
[0154] Photovoltaic glass can cover the adhesive film on the front of the back contact solar cell. The photovoltaic glass can be ultra-white glass, which has high light transmittance, high transparency, and excellent physical, mechanical and optical properties. For example, the light transmittance of ultra-white glass can reach more than 92%, which can protect the back contact solar cell without affecting the efficiency of the back contact solar cell as much as possible. At the same time, the adhesive film can bond the photovoltaic glass and the back contact solar cell together. The presence of the adhesive film can seal and insulate the back contact solar cell and make it waterproof and moisture-proof.
[0155] The backplane can be attached to the adhesive film on the back of the back-contact solar cell. The backplane can protect and support the back-contact solar cell and has reliable insulation, water resistance and aging resistance. There are multiple options for the backplane, which can usually be tempered glass, organic glass, aluminum alloy TPT composite adhesive film, etc. The specific configuration can be made according to the specific situation and is not limited here. The whole composed of the backplane, back-contact solar cell, adhesive film and photovoltaic glass can be set on a metal frame. The metal frame serves as the main external support structure of the entire battery assembly 10 and can stably support and install the battery assembly 10. For example, the battery assembly 10 can be installed at the required location through the metal frame.
[0156] Furthermore, if Fig.15As shown, the present invention also provides a photovoltaic system 1, which can be used in photovoltaic power stations, such as ground power stations, rooftop power stations, water power stations, etc., and can also be used in equipment or devices that use solar energy to generate electricity, such as user solar power supplies, solar street lights, solar cars, solar buildings, etc. Of course, it can be understood that the application scenarios of the photovoltaic system 1 are not limited to this, that is, the photovoltaic system 1 can be used in all fields that require solar energy to generate electricity. Taking the photovoltaic power generation system network as an example, the photovoltaic system 1 may include a photovoltaic array, a junction box and an inverter. The photovoltaic array can be an array combination of multiple battery assemblies 10. For example, multiple battery assemblies 10 can form multiple photovoltaic arrays. The photovoltaic array is connected to the junction box. The junction box can converge the current generated by the photovoltaic array. The converged current flows through the inverter and is converted into the alternating current required by the mains power grid, and then connected to the mains network to realize solar power supply.
[0157] In the description of this specification, the description with reference to the terms "some embodiments", "illustrative embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiments or examples are included in at least one embodiment or example of the present application. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.
[0158] The above disclosure is only a preferred embodiment of the present invention, which certainly cannot be used to limit the scope of the present invention. Therefore, equivalent changes made according to the claims of the present invention are still within the scope of the present invention.
Claims
1. A back contact battery, characterized in that: The back side of the back contact battery is provided with a first area and a second area along a second direction, the first area is provided with a first grid line and a second grid line alternately arranged along the second direction, and a first pad point and a second pad point alternately arranged along the first direction, the first pad point is connected to a first main grid, the second pad point is connected to a second main grid, the first pad point is connected to the first grid line in the first area, and the second pad point is connected to the second grid line in the first area; The second region is provided with no Pad point, and the second region is provided with a third gate line and a fourth gate line alternately arranged along the second direction, the third gate line and the first gate line collect currents of the same polarity, and the fourth gate line and the second gate line collect currents of the same polarity; On the same first gate line or the third gate line, the gate line width in a first preset area is smaller than the gate line width outside the first preset area, and the first preset area is distributed on the extension line of the second main grid in the second direction; Alternatively, on the same second gate line or the fourth gate line, the gate line width in the second preset area is smaller than the gate line width outside the second preset area, and the second preset area is distributed on the extension line of the first main gate in the second direction.
2. The back contact cell according to claim 1, characterized in that The first region is disposed at a position close to an edge of the back side of the back contact battery, and the second region is disposed at a position far from an edge of the back side of the back contact battery relative to the first region; or, The first region is disposed at a position close to a cutting region on the back side of the back contact cell, and the second region is disposed at a position farther from the cutting region on the back side of the back contact cell than the first region.
3. The back contact cell according to claim 1, characterized in that Along the second direction, the second area is located between two adjacent first areas.
4. The back contact cell according to claim 1, characterized in that For the same first gate line or the third gate line, the gate line width in the first preset area is 50 micrometers to 150 micrometers smaller than the gate line width outside the first preset area.
5. The back contact cell according to claim 1, characterized in that On the same second gate line or the fourth gate line, the gate line width in the second preset area is 50 micrometers to 150 micrometers smaller than the gate line width outside the second preset area.
6. The back contact cell according to claim 1, characterized in that A first doping layer is provided under the first gate line, a second doping layer is provided under the second gate line, a third doping layer is provided under the third gate line, and a fourth doping layer is provided under the fourth gate line. The first doping layer and the third doping layer have the same polarity, the second doping layer and the fourth doping layer have the same polarity, and the first doping layer and the second doping layer have opposite doping polarities.
7. The back contact cell according to claim 6, characterized in that In a first preset area, an A stack is provided on the first doping layer, and the A stack includes a first A stack, the first A stack covers a partial area of the first doping layer, and a first A spacing area extending along a first direction is left on the first doping layer, the first A stack is connected to the second doping layer adjacent to the first doping layer, and the first A stack is a doping layer, and the doping polarity of the doping layer is the same as that of the second doping layer.
8. The back contact cell according to claim 7, characterized in that In the first preset area, the A stack also includes a second A stack, the second A stack covers a partial area of the first doping layer, and a second A spacing area extending along the first direction is formed between the first A stack and the second A stack, the first A stack and the second A stack are respectively connected to the second doping layer adjacent to the first doping layer, and the first A stack and the second A stack are doping layers, and the doping polarity of the doping layers is the same as that of the second doping layer.
9. The back contact cell according to claim 8, characterized in that The width of the first A-spaced region or the second A-spaced region is greater than the width of the first gate line in the first preset region; Along the first direction, the width of the first preset area is greater than the width of the A stack.
10. The back contact cell according to claim 7 or 8, characterized in that: A first dielectric layer is disposed between the A stack and the first doped layer.
11. The back contact cell according to claim 6, characterized in that In the first preset area, a B stack is provided on the third doping layer, and the B stack includes a first B stack, the first B stack covers a partial area of the third doping layer, and a first B spacing area extending along the first direction is left on the third doping layer, the first B stack is connected to the fourth doping layer adjacent to the third doping layer, and the first B stack is a doping layer, and the doping polarity of the doping layer is the same as that of the fourth doping layer.
12. The back contact cell according to claim 11, characterized in that In the first preset area, the B stack also includes a second B stack, the second B stack covers a partial area of the third doping layer, and a second B spacing area extending along the first direction is formed between the first B stack and the second B stack, the first B stack and the second B stack are respectively connected to the fourth doping layer adjacent to the third doping layer, and the first B stack and the second B stack are doping layers, and the doping polarity of the doping layers is the same as that of the fourth doping layer.
13. The back contact cell according to claim 12, characterized in that The width of the first B-spaced region or the second B-spaced region is greater than the width of the third gate line in the first preset region; Along the first direction, the width of the first predetermined area is greater than the width of the B stack.
14. The back contact cell according to claim 11 or 12, characterized in that: A second dielectric layer is disposed between the B stack and the third doped layer.
15. The back contact cell according to claim 6, characterized in that In the second preset area, a C stack is provided on the second doping layer, and the C stack includes a first C stack, the first C stack covers a partial area of the second doping layer, and a first C spacing area extending along a first direction is left on the second doping layer, the first C stack is connected to the first doping layer adjacent to the second doping layer, and the first C stack is a doping layer, and the doping polarity of the doping layer is the same as that of the first doping layer.
16. The back contact cell according to claim 15, characterized in that In the second preset area, the C stack also includes a second C stack, the second C stack covers a partial area of the second doping layer, and a second C spacing area extending along the first direction is formed between the first C stack and the second C stack, the first C stack and the second C stack are respectively connected to the first doping layer adjacent to the second doping layer, and the first C stack and the second C stack are doping layers, and the doping polarity of the doping layers is the same as that of the first doping layer.
17. The back contact cell according to claim 16, characterized in that The width of the first C-spaced region or the second C-spaced region is greater than the width of the second gate line in the second preset region; Along the first direction, the width of the second predetermined area is greater than the width of the C stack.
18. The back contact cell according to claim 15 or 16, characterized in that A third dielectric layer is disposed between the C stack and the second doped layer.
19. The back contact cell according to claim 6, characterized in that In the second preset area, a D stack is provided on the fourth doping layer, and the D stack includes a first D stack, the first D stack covers a partial area of the fourth doping layer, and a first D spacing area extending along a first direction is left on the fourth doping layer, the first D stack is connected to the third doping layer adjacent to the fourth doping layer, and the first D stack is a doping layer, and the doping polarity of the doping layer is the same as that of the third doping layer.
20. The back contact cell according to claim 19, characterized in that In the second preset area, the D stack also includes a second D stack, the second D stack covers a partial area of the fourth doping layer, and a second D spacing area extending along the first direction is formed between the first D stack and the second D stack, the first D stack and the second D stack are respectively connected to the third doping layer adjacent to the fourth doping layer, and the first D stack and the second D stack are doping layers, and the doping polarity of the doping layers is the same as that of the third doping layer.
21. The back contact cell according to claim 20, characterized in that The width of the first D spacing region or the second D spacing region is greater than the width of the fourth gate line in the second preset region; Along the first direction, the width of the second predetermined area is greater than the width of the D stack.
22. The back contact cell according to claim 19 or 20, characterized in that A fourth dielectric layer is disposed between the D stack and the fourth doped layer.
23. The back contact cell according to claim 1, characterized in that The first region further includes a first edge gate line and a second edge gate line, wherein the first edge gate line is connected to the first gate line, and the second edge gate line is connected to the second gate line.
24. The back contact cell according to claim 1, characterized in that The second region further includes a third edge gate line and a fourth edge gate line, wherein the third edge gate line is connected to the third gate line, and the fourth edge gate line is connected to the fourth gate line.
25. A back contact battery string, characterized in that: include: A plurality of back contact cells according to any one of claims 1 to 24; A first welding strip and a second welding strip, the first preset area coincides with the projection area of the second welding strip on the back side of the back contact battery, and the second preset area coincides with the projection area of the first welding strip on the back side of the back contact battery.
26. A battery assembly, characterized in that: Comprising a back-contact cell string as claimed in claim 25.
27. A photovoltaic system, characterized in that: Comprising a battery assembly as claimed in claim 26.
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