Hardware log information output method and device and electronic equipment
The method and device enhance digital IC verification efficiency by converting hardware log information into ASCII code for screen output, addressing the challenge of error localization in large hardware programs.
Patent Information
- Application Number
- CN202411279782.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-12
- Publication Date
- 2024-12-17
AI Technical Summary
In digital IC verification, especially in SoC level verification environments using UVM, the CPU cannot output log information to the screen during hardware program execution, making it difficult to locate errors in large hardware programs, thereby reducing verification efficiency.
A method and device for outputting hardware log information by defining a MSG function or redirecting the printf function, converting log information into ASCII code data, and using mark data to judge and read ASCII code data from memory addresses, ultimately converting it into character strings for screen output.
Facilitates convenient debugging of hardware programs by enabling log information output, improving the efficiency of digital IC verification by allowing engineers to locate errors more effectively.
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Figure CN119148940A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of digital integrated circuit verification, for example, to a method and device for outputting hardware log information, and an electronic device. Background Art
[0002] At present, in the field of digital IC (Integrated Circuit) verification, the mainstream SoC (System on a Chip) level verification environment mostly adopts UVM (Universal Verification Methodology) environment. The transaction-level verification framework of UVM environment can improve the efficiency of verification. UVM environment has the characteristics of modular reconfiguration, random stimulus generation, automatic comparison, and flexible control of dynamic threads, which can effectively shorten the development cycle of project verification work. Compared with the traditional interface-based SoC verification method, verification personnel need to program directly for CPU (Central Processing Unit) based on UVM environment to realize software and hardware interaction, so as to effectively shorten the simulation time.
[0003] In order to achieve interaction between software and hardware and shorten simulation time, the relevant technology discloses a method of interaction using Labels, where one side of the hardware or software writes specific data to a certain address of the memory, and the other side performs subsequent test actions after reading the specific data.
[0004] In the process of implementing the embodiments of the present disclosure, it is found that there are at least the following problems in the related art: During the Label interaction process, the CPU cannot output log information to the screen when executing the hardware program. When the hardware program is large, it is difficult to locate the error during the debugging process, which makes it difficult to debug the hardware program and reduces the verification efficiency.
[0005] It should be noted that the information disclosed in the above background technology section is only used to enhance the understanding of the background of the present application, and therefore may include information that does not constitute the prior art known to ordinary technicians in the field. Summary of the invention
[0006] In order to provide a basic understanding of some aspects of the disclosed embodiments, a brief summary is given below. The summary is not an extensive review, nor is it intended to identify key / critical elements or delineate the scope of protection of these embodiments, but rather serves as a prelude to the detailed description that follows.
[0007] The embodiments of the present disclosure provide a method and device for outputting hardware log information, and an electronic device to improve the efficiency of digital IC verification.
[0008] In some embodiments, the method for outputting hardware log information includes: defining a MSG function, or redirecting the output of a printf function; converting the acquired hardware output log information into ASCII (American Standard Code for Information Interchange) code data through a MSG function or a printf function; obtaining a judgment result indicating whether the read data of a first memory address contains mark data; based on the judgment result, reading the ASCII code data written in a second memory address; converting the ASCII code data into a character string and outputting it to a screen.
[0009] Optionally, based on the judgment result, reading the ASCII code data written in the second memory address includes: when the read data of the first memory address does not contain mark data, writing the ASCII code data to the second memory address; when the read data of the first memory address contains mark data, reading the ASCII code data written in the second memory address.
[0010] Optionally, writing the ASCII code data into the second memory address includes: writing multiple bytes of the ASCII code data into the second memory address in sequence until all bytes of the ASCII code data are written into the second memory address; wherein, after each byte of data is written, writing mark data into the first memory address.
[0011] Optionally, reading the ASCII code data written in the second memory address includes: sequentially reading multiple bytes of the ASCII code data written in the second memory address until all bytes of the ASCII code data are read; wherein, after each byte of data is read, the mark data in the first memory address is cleared.
[0012] Optionally, obtaining a judgment result indicating whether the read data of the first memory address contains the mark data includes: reading the data of the first memory address; and using a defined function to respectively judge whether the read data of the first memory address contains the mark data to obtain a judgment result.
[0013] Optionally, converting the ASCII code data into a string and outputting it to the screen includes: converting the ASCII code data into a string through a formatting command; printing and outputting the string to the screen.
[0014] Optionally, define a MSG function, or redirect the output of a printf function, including: define a MSG function with variable parameters to convert log information into ASCII code data using the MSG function, or redirect the output of a printf function so that the output data of the printf function is written to a second memory address.
[0015] Optionally, the method for outputting hardware log information further includes: defining a wait msg function so that the wait msg function is executed in parallel with the main program, and determining whether the data is marked data.
[0016] In some embodiments, the device for outputting hardware log information includes a processor and a memory storing program instructions, and the processor is configured to execute the above-mentioned method for outputting hardware log information when running the program instructions.
[0017] In some embodiments, an electronic device includes: an electronic device body; and an output device for hardware log information as described above, installed in the electronic device body.
[0018] The method and device for outputting hardware log information, and the electronic device provided by the embodiments of the present disclosure can achieve the following technical effects: In the disclosed embodiment, the read data of the first memory address is obtained, and the read data is judged to know whether the read data contains the mark data. The mark data can be used as a judgment standard, so that the processor can read the ASCII code data written in the second memory address according to the judgment result. The ASCII code data is obtained by converting the log information of the hardware output obtained during the digital IC verification process, and the ASCII code data can facilitate the writing and reading of data. Finally, the read ASCII code data is converted into character output, and the output of the log information during the verification process is realized, so that engineers can more conveniently debug the problems that occur during the verification process according to the output score log information, thereby improving the efficiency of digital IC verification.
[0019] The above general description and the following description are exemplary and explanatory only and are not intended to limit the present application. BRIEF DESCRIPTION OF THE DRAWINGS
[0020] One or more embodiments are exemplarily described by corresponding drawings, which do not limit the embodiments. Elements with the same reference numerals in the drawings are shown as similar elements, and the drawings do not constitute a scale limitation, and wherein: Figure 1 It is a schematic diagram of a hardware environment for a method for outputting hardware log information provided by an embodiment of the present disclosure; Figure 2 is a schematic diagram of a method for outputting hardware log information provided by an embodiment of the present disclosure; Figure 3 is a schematic diagram of another method for outputting hardware log information provided by an embodiment of the present disclosure; Figure 4 is a schematic diagram of another method for outputting hardware log information provided by an embodiment of the present disclosure; Figure 5 is a schematic diagram of another method for outputting hardware log information provided by an embodiment of the present disclosure; Figure 6 It is an application diagram of a method for outputting hardware log information provided by an embodiment of the present disclosure; Figure 7 It is a schematic diagram of a device for outputting hardware log information provided by an embodiment of the present disclosure. DETAILED DESCRIPTION
[0021] In order to be able to understand the features and technical contents of the embodiments of the present disclosure in more detail, the implementation of the embodiments of the present disclosure is described in detail below in conjunction with the accompanying drawings. The attached drawings are for reference only and are not used to limit the embodiments of the present disclosure. In the following technical description, for the convenience of explanation, a full understanding of the disclosed embodiments is provided through multiple details. However, one or more embodiments can still be implemented without these details. In other cases, to simplify the drawings, well-known structures and devices can be simplified for display.
[0022] The terms "first", "second", etc. in the technical solutions described in the embodiments of the present disclosure are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so as to describe the embodiments of the present disclosure described here. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions.
[0023] Unless otherwise stated, the term "plurality" means two or more.
[0024] In the embodiment of the present disclosure, the character " / " indicates that the preceding and following objects are in an "or" relationship. For example, A / B indicates: A or B.
[0025] The term "and / or" is a description of the association relationship between objects, indicating that three relationships can exist. For example, A and / or B means: A or B, or, A and B.
[0026] The term "correspondence" may refer to an association relationship or a binding relationship. The correspondence between A and B means that there is an association relationship or a binding relationship between A and B.
[0027] Digital IC verification is an important part of ensuring the correctness and integrity of chip design. It involves the use of appropriate verification languages, verification tools, and verification methods to verify whether the chip design meets the required specifications before chip production.
[0028] UVM is a verification methodology widely used in current digital IC verification, helping engineers build a reusable and scalable verification environment. The UVM environment can record detailed test case execution information through log information, track the verification process, and help engineers quickly locate and diagnose problems or abnormal behaviors that occur during the simulation process.
[0029] In the present disclosure, in combination Figure 1 As shown, the hardware environment for implementing the method for outputting hardware log information includes a processor 600 , a first memory 101 , and a second memory 102 .
[0030] The processor 600 converts the obtained log information output by the hardware into ASCII code data. The mark data is stored in the first memory 101. The processor 600 reads the ASCII code data written in the second memory 102 according to the judgment result indicating whether the read data of the first memory address contains the mark data, and outputs the ASCII code data to the screen for engineers to locate the error position and debug the hardware program.
[0031] Combination Figure 2 As shown, the embodiment of the present disclosure provides a method for outputting hardware log information, including: S201, the processor defines a MSG function, or redirects the output of a printf function.
[0032] S202: The processor converts the obtained log information output by the hardware into ASCII code data through the MSG function or the printf function.
[0033] S203: The processor obtains a determination result indicating whether the read data of the first memory address includes tag data.
[0034] S204: The processor reads the ASCII code data written in the second memory address according to the determination result.
[0035] S205: The processor converts the ASCII code data into a character string and outputs it to the screen.
[0036] In the disclosed embodiment, the read data of the first memory address is obtained, and the read data is judged to know whether the read data contains the mark data. The mark data can be used as a judgment standard, so that the processor can read the ASCII code data written in the second memory address according to the judgment result. The ASCII code data is obtained by converting the log information of the hardware output obtained during the digital IC verification process, and the ASCII code data can facilitate the writing and reading of data. Finally, the read ASCII code data is converted into character output, and the output of the log information during the verification process is realized, so that engineers can more conveniently debug the problems that occur during the verification process according to the output score log information, thereby improving the efficiency of digital IC verification.
[0037] Optionally, based on the judgment result, reading the ASCII code data written in the second memory address includes: when the read data of the first memory address does not contain mark data, writing the ASCII code data to the second memory address; when the read data of the first memory address contains mark data, reading the ASCII code data written in the second memory address.
[0038] Combination Figure 3 As shown, the embodiment of the present disclosure provides another method for outputting hardware log information, including: S301, the processor defines a MSG function, or redirects the output of a printf function.
[0039] S302: The processor converts the obtained log information output by the hardware into ASCII code data through the MSG function or the printf function.
[0040] S303: The processor obtains a determination result indicating whether the read data of the first memory address includes tag data.
[0041] S304: When the read data at the first memory address does not include the mark data, the processor writes the ASCII code data into the second memory address.
[0042] S305: The processor writes a mark to the first memory address.
[0043] S306: The processor reads data at the first memory address and executes S303.
[0044] S307: When the read data at the first memory address includes the mark data, the processor reads the ASCII code data written at the second memory address.
[0045] S308, the processor converts the ASCII code data into a character string and outputs it to the screen.
[0046] In the disclosed embodiment, the processor needs to read the data in the first memory address first. In the case where the read data of the first memory address does not contain the mark data, it means that the ASCII code data is not currently written in the second memory address. Therefore, it is necessary to write the ASCII code data to the second memory address. In the case where the read data of the first memory address contains the mark data, it means that the ASCII code data has been written in the second memory address, therefore, the processor needs to read the ASCII code data written in the second memory address for subsequent output of log information.
[0047] Optionally, writing the ASCII code data into the second memory address includes: writing multiple bytes of the ASCII code data into the second memory address in sequence until all bytes of the ASCII code data are written into the second memory address; wherein, after each byte of data is written, writing mark data into the first memory address.
[0048] In the disclosed embodiment, after each byte of data is written, the tag data is written at the first memory address. In this way, after the processor reads the data at the first memory address, it can identify the tag data to indicate that the ASCII code data has been written at the second memory address, thereby enabling the processor to read the ASCII code data written at the second memory address.
[0049] Furthermore, multiple bytes of the ASCII code data are sequentially written into the second memory address until all bytes of the ASCII code data are written into the second memory address. The process of writing the ASCII code data into the memory as a character string is implemented one character at a time, and each time the writing and software handshake are performed, only two memory addresses are used to implement the entire process of printing and outputting the hardware log information, thereby saving memory usage space.
[0050] Optionally, reading the ASCII code data written in the second memory address includes: sequentially reading multiple bytes of the ASCII code data written in the second memory address until all bytes of the ASCII code data are read; wherein, after each byte of data is read, the mark data in the first memory address is cleared.
[0051] In the disclosed embodiment, multiple bytes of ASCII code data written in the second memory address are read in sequence until all bytes of ASCII code data are read. After all bytes of ASCII code data are read, they can be combined into complete data for representing log information. All bytes of ASCII code data are converted into characters for output, thereby enabling the output of log information.
[0052] After each byte of data is read, the mark data in the first memory address is cleared. In this way, after the processor reads the data in the first memory address, it can recognize that the mark data in the first memory address has been cleared, indicating that the ASCII code data in the second memory address has been read, so that the processor can re-write the ASCII code data in the second memory address.
[0053] Optionally, obtaining a judgment result indicating whether the read data of the first memory address contains the mark data includes: reading the data of the first memory address; and using a defined function to respectively judge whether the read data of the first memory address contains the mark data to obtain a judgment result.
[0054] In the disclosed embodiment, the forever keyword is used in the defined function without the break keyword, and the simulation is executed until the simulation ends. In this way, the marking signal can be detected in real time to determine whether it is marking data, so as to process the ASCII code data into characters and print them out on the screen.
[0055] Optionally, converting the ASCII code data into a string and outputting it to the screen includes: converting the ASCII code data into a string through a formatting command; printing and outputting the string to the screen.
[0056] Combination Figure 4 As shown, the embodiment of the present disclosure provides another method for outputting hardware log information, including: S401, the processor defines a MSG function, or redirects the output of a printf function.
[0057] S402: The processor converts the obtained log information output by the hardware into ASCII code data through the MSG function or the printf function.
[0058] S403: The processor obtains a determination result indicating whether the read data of the first memory address includes tag data.
[0059] S404: When the read data at the first memory address does not include the mark data, the processor writes the ASCII code data into the second memory address.
[0060] S405: The processor writes a mark to the first memory address.
[0061] S406: The processor reads data at the first memory address and executes S403.
[0062] S407: When the read data at the first memory address includes the mark data, the processor reads the ASCII code data written at the second memory address.
[0063] S408: The processor converts the ASCII code data into a character string through a formatting command.
[0064] S409: The processor prints and outputs the character string to the screen.
[0065] In the disclosed embodiment, the read ASCII code data is converted into character output, which realizes the output of log information during the verification process, so that engineers can more conveniently debug problems that occur during the verification process based on the output score log information, thereby improving the efficiency of digital IC verification. The %c formatting command in the $write function defined by the software can process ASCII code data into characters, output them into strings, and print them out on the screen.
[0066] Optionally, define a MSG function, or redirect the output of a printf function, including: define a MSG function with variable parameters to convert log information into ASCII code data using the MSG function, or redirect the output of a printf function so that the output data of the printf function is written to a second memory address.
[0067] Combination Figure 5 As shown, the embodiment of the present disclosure provides another method for outputting hardware log information, including: S501, the processor defines a MSG function with variable parameters to convert log information into ASCII code data using the MSG function, or redirects the output of the printf function so that the output data of the printf function is written into the second memory address.
[0068] S502: The processor converts the obtained log information output by the hardware into ASCII code data through the MSG function or the printf function.
[0069] S503: The processor obtains a determination result indicating whether the read data of the first memory address includes tag data.
[0070] S504: When the read data at the first memory address does not include the mark data, the processor writes the ASCII code data into the second memory address.
[0071] S505: The processor writes a mark to the first memory address.
[0072] S506: The processor reads data at the first memory address and executes S503.
[0073] S507: When the read data at the first memory address includes the mark data, the processor reads the ASCII code data written at the second memory address.
[0074] S508: The processor converts the ASCII code data into a character string and outputs it to the screen.
[0075] In the disclosed embodiment, the prerequisite for using the MSG function with variable parameters is to use the stdarg.h header in the standard library. The method of using the MSG function is that the first parameter of the variable parameter input must be a string, and the string is the log information to be output. If a variable information is to be output, it is used as the second input parameter. At the same time, a symbol to replace the variable is added at any position in the first string parameter, such as %x. In addition, the function can add multiple variables. For example, MSG("Hello world!\n"); MSG("This data is %x \n",value); MSG(“Those datas are %x,%x,%x\n”,value1,value2,value3); The variable parameter MSG function has the following logic: Variable parameter input logic: You can enter multiple parameters, but the first parameter must be a string, and the other parameters are variables.
[0076] Placeholder replacement logic: Identify placeholders in string parameters, such as %x, and replace them with the variables after the first parameter.
[0077] String length calculation logic: The length of the replaced string is calculated inside the function.
[0078] String conversion to ASCII code logic: According to the string length, convert each character into binary ASCII code.
[0079] Write memory logic: ASCII code data is written into the memory in sequence.
[0080] Tag check logic: reads the first memory address data and determines whether it is a tag.
[0081] Therefore, the processor can use the string conversion ASCII code logic of the MSG function to convert the log information into ASCII code data.
[0082] In the disclosed embodiment, the printf output redirection includes redefining the write function when using the gcc compiler, and redefining the fputc function when using the Keil MDK compiler, so that the redefined function outputs data to the memory.
[0083] Optionally, the method for outputting hardware log information further includes: defining a wait msg function so that the wait msg function is executed in parallel with the main program, and determining whether the data is marked data.
[0084] In the disclosed embodiment, a wait msg function is defined in the base test of UVM, and the wait msg function is called in the case. The wait msg function is executed in parallel with the main program. During the execution process, the wait msg function continuously reads the data at the first memory address. The wait msg function determines whether the data is marked data and obtains a determination result.
[0085] The Wait msg function has the following logic: Read tag logic: loop to read the data of the first memory address of the memory.
[0086] Judgment logic: Determine whether the data is labeled data.
[0087] Data conversion logic: Convert binary ASCII code data into characters.
[0088] Software print output logic: characters are output to the screen and log file by the $write function.
[0089] Clear mark logic: the first memory address data is overwritten or written to 0.
[0090] Combination Figure 6 As shown, in actual application, the method for outputting hardware log information provided by the embodiment of the present disclosure is implemented on the hardware program side and the software program side.
[0091] S601, the hardware program defines a MSG function, or redirects the output of a printf function.
[0092] S602, the hardware program terminal inputs log information such as a string or a variable, and calls the MSG function.
[0093] S603, the hardware program terminal executes the MSG function, processes the log information into ASCII binary data, and calculates the data length as n bytes.
[0094] S604, the hardware program end reads the data at the first memory address.
[0095] S605, the hardware program side determines whether the data at the first memory address is a mark: if the data at the first memory address is not a mark, execute S606; if the data at the first memory address is a mark, execute S604.
[0096] S606, the hardware program end writes 1 byte of ASCII data into the second memory address.
[0097] S607, the hardware program end writes a mark to the first memory address and executes S604.
[0098] S608, the software program terminal defines the Wait msg function.
[0099] S609, the software program end calls the Wait mg function in the case, and the function is executed in parallel with the main program.
[0100] S610, the software program terminal reads data at the first memory address.
[0101] S611, determine whether the data at the first memory address is a mark: if the data at the first memory address is a mark, execute S612; if the data at the first memory address is not a mark, execute S610.
[0102] S612, the software program terminal reads 1 byte of ASCII code data from the second memory address, processes it into characters, and prints it out to the screen.
[0103] S613, the software program terminal clears the mark of the first memory address and executes S610.
[0104] Combination Figure 7 As shown, the embodiment of the present disclosure provides a device 70 for outputting hardware log information, including a processor 700 and a memory 701. Optionally, the device 70 may also include a communication interface 702 and a bus 703. The processor 700, the communication interface 702, and the memory 701 may communicate with each other through the bus 703. The communication interface 702 may be used for information transmission. The processor 700 may call the logic instructions in the memory 701 to execute the method for outputting hardware log information of the above embodiment.
[0105] In addition, the logic instructions in the memory 701 described above may be implemented in the form of software functional units and when sold or used as independent products, may be stored in a computer-readable storage medium.
[0106] The memory 701 is a computer-readable storage medium that can be used to store software programs, computer executable programs, such as program instructions / modules corresponding to the methods in the embodiments of the present disclosure. The processor 700 executes functional applications and data processing by running the program instructions / modules stored in the memory 701, that is, implements the output method for hardware log information in the above-mentioned embodiment.
[0107] The memory 701 may include a program storage area and a data storage area, wherein the program storage area may store an operating system and an application required for at least one function; the data storage area may store data created according to the use of the terminal device, etc. In addition, the memory 701 may include a high-speed random access memory and may also include a non-volatile memory.
[0108] The embodiments of the present disclosure provide an electronic device, comprising: an electronic device body, and the above-mentioned output device for hardware log information. The output device for hardware log information is installed on the electronic device body. The installation relationship described here is not limited to placement inside the electronic device body, but also includes installation connections with other components of the electronic device, including but not limited to physical connections, electrical connections or signal transmission connections, etc. Those skilled in the art can understand that the output device for hardware log information can be adapted to a feasible electronic device body, thereby realizing other feasible embodiments.
[0109] The technical solution of the embodiment of the present disclosure can be embodied in the form of a software product, which is stored in a storage medium and includes one or more instructions for enabling a computer device (which may be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the method described in the embodiment of the present disclosure. The aforementioned storage medium may be a non-transient storage medium, such as: a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a disk or an optical disk, and other media that can store program codes.
[0110] The above description and the accompanying drawings fully illustrate the embodiments of the present disclosure so that those skilled in the art can practice them. Other embodiments may include structural, logical, electrical, process and other changes. The embodiments represent only possible changes. Unless explicitly required, separate components and functions are optional, and the order of operations may vary. Parts and features of some embodiments may be included in or replace parts and features of other embodiments. Moreover, the words used in this application are only used to describe the embodiments and are not used to limit the claims. As used in the description of the embodiments and the claims, unless the context clearly indicates, the singular forms of "a", "an" and "the" are intended to include plural forms as well. Similarly, the term "and / or" as used in this application refers to any and all possible combinations of one or more associated listings. In addition, when used in this application, the term "comprise" and its variants "comprises" and / or comprising refer to the presence of stated features, wholes, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components and / or groups thereof. In the absence of further restrictions, the elements defined by the sentence "including one..." do not exclude the presence of other identical elements in the process, method or device including the elements. In this article, each embodiment may focus on the differences from other embodiments, and the same and similar parts between the embodiments may refer to each other. For the methods, products, etc. disclosed in the embodiments, if they correspond to the method part disclosed in the embodiments, then the relevant parts can refer to the description of the method part.
[0111] Those skilled in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software may depend on the specific application and design constraints of the technical solution. The technicians may use different methods for each specific application to implement the described functions, but such implementations should not be considered to exceed the scope of the embodiments of the present disclosure. The technicians may clearly understand that, for the convenience and simplicity of description, the specific working processes of the systems, devices and units described above may refer to the corresponding processes in the aforementioned method embodiments, and will not be repeated here.
[0112] In the embodiments disclosed herein, the disclosed methods and products (including but not limited to devices, equipment, etc.) can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the units can be only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the coupling or direct coupling or communication connection between each other shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms. The units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the units may be selected according to actual needs to implement this embodiment. In addition, each functional unit in the embodiment of the present disclosure may be integrated in a processing unit, or each unit may exist physically alone, or two or more units may be integrated in one unit.
[0113] The flowchart and block diagram in the accompanying drawings show the possible architecture, function and operation of the system, method and computer program product according to the embodiment of the present disclosure. In this regard, each box in the flowchart or block diagram can represent a module, a program segment or a part of the code, and the module, the program segment or a part of the code contains one or more executable instructions for realizing the specified logical function. In some alternative implementations, the functions marked in the box can also occur in a different order from the order marked in the accompanying drawings. For example, two consecutive boxes can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, which can depend on the functions involved. In the description corresponding to the flowchart and the block diagram in the accompanying drawings, the operations or steps corresponding to different boxes can also occur in a different order from the order disclosed in the description, and sometimes there is no specific order between different operations or steps. For example, two consecutive operations or steps can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, which can depend on the functions involved. Each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, may be implemented by a dedicated hardware-based system that performs the specified functions or actions, or may be implemented by a combination of dedicated hardware and computer instructions.
Claims
1. A method for outputting hardware log information, It is characterized in that include: Define the MSG function, or redirect the output of the printf function; Convert the obtained hardware output log information into ASCII code data through MSG function or printf function; Obtaining a determination result indicating whether the read data of the first memory address includes the tag data; According to the judgment result, read the ASCII code data written in the second memory address; Convert ASCII data into a string and output it to the screen.
2. The output method according to claim 1, It is characterized in that According to the judgment result, the ASCII code data written in the second memory address is read, including: When the read data at the first memory address does not contain the mark data, writing the ASCII code data to the second memory address; When the read data at the first memory address includes the mark data, the ASCII code data written at the second memory address is read.
3. The output method according to claim 2, It is characterized in that Writing ASCII code data to the second memory address includes: Writing the multiple bytes of the ASCII code data into the second memory address in sequence until all the bytes of the ASCII code data are written into the second memory address; Wherein, after each byte of data is written, mark data is written at the first memory address.
4. The output method according to claim 2, It is characterized in that Read the ASCII code data written in the second memory address, including: sequentially reading a plurality of bytes of the ASCII code data written in the second memory address until all bytes of the ASCII code data are read; Wherein, after each byte of data is read, the mark data in the first memory address is cleared.
5. The output method according to claim 1, It is characterized in that Obtaining a determination result indicating whether the read data of the first memory address includes the tag data, comprising: Reading data from a first memory address; The defined function is used to respectively determine whether the data read from the first memory address contains the mark data, and obtain a determination result.
6. The output method according to any one of claims 1 to 5, It is characterized in that Convert ASCII data into strings and output them to the screen, including: Convert ASCII code data into a string through the format command; Prints a string to the screen.
7. The output method according to any one of claims 1 to 5, It is characterized in that Define the MSG function, or redirect the output of the printf function, including: Define a MSG function with variable parameters to use the MSG function to convert log information into ASCII code data, or, The output of the printf function is redirected so that the output data of the printf function is written to the second memory address.
8. The output method according to any one of claims 1 to 5, It is characterized in that Also includes: Define the wait msg function so that it is executed in parallel with the main program and determines whether the data is marked data.
9. A device for outputting hardware log information, comprising a processor and a memory storing program instructions, It is characterized in that The processor is configured to execute the method for outputting hardware log information according to any one of claims 1 to 8 when running the program instructions.
10. An electronic device, It is characterized in that include: Electronic device body; The device for outputting hardware log information as claimed in claim 9 is installed on the electronic device body.
