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6 results about "ASCII" patented technology

ASCII (/ˈæskiː/ ASS-kee), abbreviated from American Standard Code for Information Interchange, is a character encoding standard for electronic communication. ASCII codes represent text in computers, telecommunications equipment, and other devices. Most modern character-encoding schemes are based on ASCII, although they support many additional characters.

A three-mode redundant circuit netlist compiling method and device based on state machine conversion

PendingCN122263752AComputer aided designSpecial data processing applicationsLexical analysisText stream
The application provides a three-mode redundant circuit netlist compiling method and device based on state machine conversion, belongs to the technical field of anti-radiation integrated circuit netlist compiling processing, and comprises the following steps: generating a netlist ASCII text stream and a keyword-regular set by inputting core source data suitable for an anti-radiation scene, triggering a lexical analyzer, forming an ordered lexical unit sequence through lexical analysis, constructing a state transition graph and checking the state transition graph, integrating the graph and a fragment, extracting a syntax tree, converting the syntax tree into a flow graph data structure, finally generating an IR intermediate representation mapped with SoC hardware, and outputting the IR intermediate representation. The three-mode redundant circuit netlist compiling method and device based on state machine conversion are used, so that the problems of low recognition efficiency, large cost and easy deletion of redundant logic in the process of processing a three-mode redundant circuit netlist by a traditional hardware compiler are solved.
Owner:BEIJING UNIV OF TECH

An angle detection fault-tolerant system and method

This application discloses an angle detection fault-tolerant system and method. The system includes a heterogeneous interface acquisition module, a CRC secondary verification module, a security word parsing module, a fault diagnosis decision module, a smooth switching control module, and a historical data management module. The heterogeneous interface acquisition module acquires dual-channel sensor data in parallel via ASCII and QSPI interfaces; the CRC secondary verification module independently calculates the expected CRC value based on the J1850 standard and compares it with the CRC value returned by the sensor; the security word parsing module performs hierarchical bit-domain parsing of the security word to extract multi-dimensional state information; the fault diagnosis decision module integrates the verification results and state information, and determines the fault type based on the diagnostic matrix; the smooth switching control module uses the most recent valid angle stored in the historical data management module as a reference to perform linear interpolation for smooth transition. This invention solves the problems of single-point fault risk and insufficient data integrity verification, meeting the ASIL-B / C level requirements for automotive functional safety.
Owner:CHONGQING HETIAN ELECTRONIC TECH CO LTD

Yokogawa Power Analyzer Data Processing System Based on LabVIEW Platform

This invention belongs to the field of measurement and analysis technology, and relates to a data processing system for a Yokogawa power analyzer based on the LabVIEW platform. The system includes a communication module, a data processing module, a data acquisition and synchronization module, and a data storage and export module. By constructing a standardized communication interface based on VISA-SCPI, an ASCII data stream structured parsing engine, a unified modeling mechanism with a shared variable library, and a native synchronous acquisition architecture based on TDMS, this invention achieves physical homogeneity, temporal synchronization, and logical isomorphism between the raw measurement data from the Yokogawa power analyzer and the multi-source sensor data from the test bench within the LabVIEW platform. Without the need for additional hardware gateways or post-processing interpolation, it achieves microsecond-level trigger alignment and frame-level parameter binding, ensuring the time synchronization of power parameters with other physical quantities. This significantly improves the automated testing efficiency, data integration capabilities, and multi-dimensional joint analysis level of the test bench.
Owner:XIAN FASHITE AUTOMOBILE TRANSMISSION CO LTD

A numerical implementation method for transparent representation of a mining engineering stress field

PendingCN122287100Agood predictive accuracyReduce memory usageComputational scienceSource Data Verification
This invention discloses a numerical method for transparent characterization of stress fields in mining engineering, belonging to the field of numerical simulation. The method includes: constructing a standardized numerical computation environment and determining the target processing area; establishing a three-dimensional rock mass mesh model and performing mechanical equilibrium solutions, simultaneously acquiring stress component and elastic strain energy data to achieve stress-energy dual-dimensional characterization; based on preset target center coordinates, real-time analysis and direct storage of spatial distance and angle information of each mesh point; writing node coordinates, displacement, stress, energy, and element connection relationships into a unified ASCII universal format file to generate a cross-platform readable data file; and finally, data verification and output. This invention overcomes the limitations of traditional methods, such as single characterization dimension, reliance on third-party processing for spatial analysis, and difficulties in cross-platform data interaction, significantly improving the efficiency and accuracy of stability analysis in mining engineering.
Owner:ANHUI UNIV OF SCI & TECH

Binary replacement configuration

Existing computer systems using 8-bit binary representation require a large amount of energy and hardware resources for data processing, and are relatively slow. The present invention describes a computer system for accelerating information processing by replacing 8-bit binary representation with a single location or transistor configuration mapped by a new binary conversion code (NBCC code) and utilizing a variety of mapping methods. The system employs a hardware component configured for mapping data encoded in NBCC code to a single location or transistor configuration using a variety of mapping methods, including binary conversion, directional timing, location mapping, and image correlation. These mapping methods include binary conversion between 8-bit binary and a single location, sequential processing with time, direction, and distance components, location mapping using timing data, and a three-dimensional representation with images directly correlated to associated codes, reducing the amount of energy and resources consumed while significantly increasing the speed of data processing. Compared to conventional systems using ASCII code and 8-bit binary representation, the present system achieves up to 8 times reduction in energy consumption and up to 8 times increase in data processing speed. Other advantages include increased data storage space, advanced artificial intelligence learning potential, and novel methods for generating public and private keys for advanced encryption techniques. The system also creates and utilizes a novel three-dimensional language, further improving data processing and encryption methods.
Owner:本·库利

An encryption and decryption method and device based on an uncertain graph

PendingCN122339676AAlgorithmCiphertext
An encryption and decryption method and apparatus based on uncertain graphs, relating to the fields of computer and network communication technologies, the encryption method includes: A1. Obtaining a plaintext string of length n, constructing a sequence graph and a sequence matrix using the ASCII code value corresponding to each character as a vertex and the difference between the ASCII code values ​​corresponding to adjacent characters as edges; A2. Generating a sequence of uncertain implication subgraphs and an adjacency matrix of uncertain implication subgraphs based on the number of vertices in the sequence graph, and making the non-invertible uncertain implication subgraphs in the sequence graph invertible to obtain a list of adjacency matrices of invertible uncertain implication subgraphs; A3. Dividing the value of the first vertex of the sequence graph by 2... n The quotient and remainder are obtained. The quotient is added to the order matrix to obtain the encryption matrix. The invertible matrix with the same index and remainder is queried from the adjacency matrix list of the invertible uncertain implication subgraph. Finally, the encryption matrix is ​​multiplied by the invertible matrix to obtain the ciphertext. This solves the quantum risk and structural incompatibility problem of traditional encryption and improves the security of the string.
Owner:HUNAN INSTITUTE OF ENGINEERING