9 results about "Maximum size" patented technology

The invention discloses a buffer optimization method and device for an SSD (Solid State Disk) mass production test. The method comprises the following steps: acquiring buffer resource information required by each test task in a complete life cycle of the test task, and calculating the total size of the maximum buffer required in all the tasks according to the buffer resource information; applying for a static buffer area with the same size as the maximum size; in the test execution process, all tasks are controlled to dynamically apply for and release buffer resources from the single static area according to the execution time sequence, and time division multiplexing is achieved. According to the method, a shared buffer pool mechanism is established, so that the traditional mode of independently allocating static buffers to each task is thoroughly changed, the utilization rate of limited buffer resources is greatly improved, the industrial problem that MPFW mass production test cannot be smoothly executed due to insufficient resources under the condition that the buffer resources such as an SRAM (Static Random Access Memory) and the like are sharply reduced is effectively solved, and meanwhile, the product cost is reduced.

The present invention relates to a content distribution method for storing data in a decentralized storage, comprising dividing (105) the data into a set of n segments, wherein each segment has a maximum size K 0, and wherein n is determined dependent upon a size, G, of the data, determining (110) a first set of concatenated segment pairs, wherein one instance of each of the unique segments in the set of n segments is comprised in the first set of concatenated segments pairs, determining (115) a parameter k such that the number of pairs in the first set of concatenated segment pairs is equal to k, and wherein k is equal to n / 2 if n is even, and n is equal to (n + 1) / 2) if n is odd, such that one segment is repeated in the first set of concatenated segments pairs if n is odd, determining (120) a second set of concatenated segment pairs, wherein the number of pairs in the second set of concatenated segment pairs is equal to n - 1, and wherein the second set of concatenated segment pairs represent a subset of a Cartesian square of the set of n segments, determining (125) a set of concatenated segment pairs for storing, comprising the first set of concatenated segment pairs and the second set of concatenated segment pairs.

A system includes a memory and a processing device, operatively coupled to the memory, to perform operations including initiating a write operation in a first mode to write a first portion of data to a cache, determining whether a logical saturation of the first portion of the data satisfies a first threshold condition based on the first maximum size, and in response to determining that the logical saturation of the first portion of the data satisfies the first threshold condition, continuing the write operation in the second mode to write a second portion of the data to the cache. The cache has a first maximum size corresponding to the first mode and a second maximum size greater than the first maximum size corresponding to a second mode.

The invention provides an operator execution method and device, equipment, a storage medium and a program product, and relates to the technical field of artificial intelligence chips, and the method comprises the steps: obtaining a target tensor of a first dimension output by a first operator, and transmitting the target tensor to a first cache region, when the size of the target tensor on any specified dimension exceeds a size upper limit supported by the chip pair arrangement type on the specified dimension, expanding the target tensor to a second dimension in a first cache region according to a rule that the sizes of the target tensor on various specified dimensions are not greater than the size upper limit corresponding to each specified dimension, and performing data rearrangement in the first cache region according to the target tensor of the second dimension, and writing the target tensor into the second cache region after determining the writing coordinate of the rearranged target tensor, and using the target tensor for calculation by a second operator. According to the application, the second dimension does not change along with the change of various business scenes of different memories, and the tensors of different dimensions are converted into the second dimension, so that various business scenes of different memories can be covered.

The utility model relates to a connecting piece for a flat long hole. The connecting piece is provided with a lower limiting part (1), a connecting part (2), an upper limiting part (3) and a hand screwing part (4) from bottom to top, the upper surface of the lower limiting part (1) is a plane; the connecting part (2) is of a square structure and is connected between the lower limiting part (1) and the upper limiting part (3), the height of the connecting part is matched with the depth size of the flat long hole, and the two side end faces are flush with the plane where the two side outer walls of the lower limiting part (1) are located; the lower surface of the upper limiting part (3) is a plane, and the maximum size in the direction perpendicular to the length direction of the lower limiting part (1) is larger than the width of the lower limiting part (1). And the hand screwing part (4) stands on the upper limiting part (3). According to the connecting piece, the one-piece structure is adopted, connection work can be completed only through one piece, compared with a traditional bolt and nut combination mode, connection failure caused by accessory loss is avoided, operation is easy, the connecting part is of the square structure and cannot rotate in the flat long hole, and therefore the falling phenomenon is prevented.

A system (10) and method for magnetic density separation of a mixed stream of products (1) having different densities (Da,Db,Dc). At least one splitter plate (3) is arranged at a respective height in a separation chamber (8) and configured to split incoming product streams (1a,1b,1c) into separate channels (4a,4b,4c). The at least one splitter plate (3) is provided with one or more, preferably all, of the following characteristics: the convex cross-section profile of the front side (3f) is rounded, or at least any corners in the convex cross-section profile have obtuse inside angles (α); the front side (3f) is relatively thick, e.g. compared to a maximum size (Lp) of the products; and the splitter plate (3), at least at the front side (3f), is relatively smooth.

The present application belongs to the technical field of structural topology optimization, and discloses a level set topology optimization design method considering structural size constraints. The method comprises the following steps: S1, for a to-be-optimized structure, identifying a center axis in the to-be-optimized structure as a coarse skeleton of the to-be-optimized structure, performing morphological operation on the coarse skeleton to obtain a fine skeleton, calculating the nearest distance from each point in the to-be-optimized structure to the fine skeleton to obtain a distance field, and constructing a maximum size constraint and a minimum size constraint of the to-be-optimized structure according to the distance values in the distance field; S2, taking the minimum flexibility of the to-be-optimized structure as the target, and taking the volume constraint, the maximum size constraint and the minimum size constraint of the to-be-optimized structure as the constraint conditions, establishing a velocity field level set topology optimization design model, and solving the optimal solution of the model to realize the level set topology optimization of the to-be-optimized structure. Through the present application, the maximum and minimum sizes of the to-be-optimized structure are effectively controlled, and the manufacturability of the optimization design result is increased.

The embodiment of the invention relates to the technical field of three-dimensional design, in particular to an orthogonal pipeline, an arrangement method of items arranged on the orthogonal pipeline, the orthogonal pipeline and an arrangement device of the items arranged on the orthogonal pipeline. Then the size of the obstacle continues to be expanded according to the maximum size of the target item so as to determine the interference condition of the target item to be arranged and the obstacle, the laying path of the pipeline and the branch points of the pipeline are determined according to the preset arrangement requirement of the orthogonal pipeline and the sizes of the expanded wall and the obstacle, and then the length of the straight pipe section in the pipeline is determined; compared with a manual arrangement method, various constraint conditions can be comprehensively considered in the arrangement process, so that the finally obtained arrangement result is smoothly applied to the actual arrangement of the orthogonal pipelines and the target items, and the arrangement efficiency of the target items and the orthogonal pipelines is improved.

In some aspects, a program is executed on a coarse-grained reconfigurable (CGR) processor. The CGR determines that the program produces an output that includes a variable length tensor, determines a maximum size of the variable length tensor and sets, based on the maximum size, a maximum of a counter associated with the program. The counter is set to an initial value of zero. The CGR initiates execution of the program, causing the program to receive an input tensor. Based on determining that the program is operating on a first portion of the input tensor, the CGR performs an update to the counter, to create an updated counter, and communicates the updated counter to one or more consumers within the program. After determining that the program has completed operating on the input tensor, a final size of the output is communicated to one or more downstream consumers external to the program.