Electronic package

Abstract

An electronic packaging piece is mainly characterized in that an electronic element and a heat dissipation piece are arranged on different areas of a bearing structure with a heat dissipation layer, the electronic element is wrapped by a packaging layer, and the heat dissipation piece is thermally connected with the electronic element through the heat dissipation layer. Therefore, the problem that the periphery of the electronic component is overheated due to the fact that heat energy generated by the electronic component is conducted to the packaging layer in the heat dissipation process of the electronic component is solved.

Description

Technical Field

[0001] The present invention relates to a packaging structure, in particular to an electronic packaging with a heat dissipation element. Background Art

[0002] As the demand for electronic products in terms of functions and processing speed increases, semiconductor chips, as the core components of electronic products, need to have higher density electronic components and electronic circuits, so semiconductor chips will generate more heat energy during operation. Furthermore, since the conventional packaging colloid that covers the semiconductor chip is a poor heat transfer material with a thermal conductivity of only 0.8 (unit Wm-1.k-1) (i.e., poor heat dissipation efficiency), if the heat generated by the semiconductor chip cannot be effectively dissipated, it will cause damage to the semiconductor chip and product reliability issues.

[0003] Therefore, in order to quickly dissipate the heat to the outside, the industry usually configures a heat sink or heat spreader in the semiconductor package. The heat sink is usually bonded to the back of the semiconductor chip through a heat dissipation adhesive, such as a thermal interface material (TIM), and the top surface of the heat sink is usually exposed to the packaging adhesive or directly exposed to the atmosphere, so that the heat generated by the semiconductor chip can be dissipated by the heat dissipation adhesive and the heat sink.

[0004] like Figure 1 As shown, the manufacturing method of the conventional semiconductor package 1 is to first place a semiconductor chip 11 on a package substrate 10 with its active surface 11a by flip chip bonding (i.e., through conductive bumps 110 and bottom glue 111), and then place a heat sink 12 on the inactive surface 11b of the semiconductor chip 11 with its top sheet 120 through a TIM layer 13, and the support legs 121 of the heat sink 12 are mounted on the package substrate 10 through an adhesive layer 15. Next, a package molding operation is performed so that the packaging glue 14 covers the semiconductor chip 11 and the heat sink 12, and the top sheet 120 of the heat sink 12 is exposed to the outside of the packaging glue 14.

[0005] During operation, heat energy generated by the semiconductor chip 11 is conducted to the top plate 120 of the heat sink 12 through the inactive surface 11 b and the TIM layer 13 to be dissipated to the outside of the semiconductor package 1 .

[0006] However, in the conventional semiconductor package 1, the heat sink 12 and the encapsulation body 14 are disposed at the same location on the encapsulation substrate 10. Therefore, when the heat energy generated by the semiconductor chip 11 is conducted to the heat sink 12, it is conducted to the encapsulation body 14 via the support pins 121, resulting in the encapsulation body 14 dissipating heat too slowly, causing the semiconductor chip 11 to overheat around it. As a result, the semiconductor chip 11 will be damaged due to overheating, thereby causing the reliability of the semiconductor package 1 to be poor.

[0007] Therefore, how to overcome the above-mentioned problems of the prior art has become a difficult problem that needs to be overcome urgently in the industry. Summary of the invention

[0008] In view of the various defects of the above-mentioned prior art, the present invention provides an electronic package, including: a supporting structure, which defines a packaging area and a functional area adjacent to the packaging area on one side; an electronic component, which is arranged on the packaging area of ​​the supporting structure and is electrically connected to the supporting structure; a heat sink, which is arranged on the functional area of ​​the supporting structure and is thermally connected to the electronic component; and a packaging layer, which is arranged on the packaging area of ​​the supporting structure to cover the electronic component, and the packaging layer is not arranged on the functional area.

[0009] In the aforementioned electronic package, the supporting structure has a heat dissipation layer which thermally connects the electronic component and the heat dissipation element.

[0010] In the aforementioned electronic package, the height of the electronic component relative to the supporting structure is equal to the height of the packaging layer relative to the supporting structure.

[0011] In the aforementioned electronic package, the height of the heat sink relative to the supporting structure is equal to the height of the electronic component relative to the supporting structure.

[0012] In the aforementioned electronic package, the height of the heat sink relative to the supporting structure is equal to or lower than the height of the packaging layer relative to the supporting structure.

[0013] In the aforementioned electronic package, the heat sink is flush with the side surface of the supporting structure.

[0014] In the aforementioned electronic package, the heat sink protrudes from the side surface of the supporting structure.

[0015] In the aforementioned electronic package, the electronic component has a heat sensible area, and the supporting structure has a functional pad corresponding to the position of the heat sensible area, so that the electronic component can be thermally connected to the heat sink through the functional pad.

[0016] The aforementioned electronic package also includes at least one electronic module disposed on the functional area, which is electrically connected to the supporting structure. For example, the heat sink surrounds the electronic module.

[0017] The aforementioned electronic package may include a heat dissipation structure disposed on the heat dissipation element.

[0018] In the aforementioned electronic package, a plurality of heat sinks may be disposed on the supporting structure.

[0019] From the above, it can be seen that the electronic package of the present invention is mainly arranged on different areas of the supporting structure by the electronic component and the heat sink, and the heat sink is thermally connected to the electronic component to prevent the electronic component from conducting the heat energy generated by it to the packaging layer during the heat dissipation process, thereby avoiding the problem of overheating around the electronic component. Therefore, compared with the prior art, the electronic package of the present invention can effectively avoid the problem of overheating during operation, thereby ensuring the reliability of the electronic package. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 It is a cross-sectional schematic diagram of a conventional semiconductor package.

[0021] Figure 2A It is a cross-sectional schematic diagram of the electronic package of the present invention.

[0022] Figure 2B for Figure 2A Schematic diagram of the top view.

[0023] Figure 2C and Figure 2D for Figure 2A A top schematic diagram of other embodiments of the present invention.

[0024] Figure 3 for Figure 2A A cross-sectional schematic diagram of another embodiment of the present invention.

[0025] Figure 4A for Figure 2A Schematic cross-sectional view of other embodiments.

[0026] Figure 4B for Figure 4A Schematic diagram of the top view.

[0027] Figure 5 for Figure 2A A cross-sectional schematic diagram of another embodiment of the present invention.

[0028] Fig. 6A and Figure 6B for Figure 4A Schematic cross-sectional views of other different embodiments.

[0029] Main component symbols

[0030] 1 Semiconductor Package

[0031] 10 Package substrate

[0032] 11,26 Semiconductor chips

[0033] 11a,21a Action surface

[0034] 11b, 21b Non-active surface

[0035] 110,211 Conductive bumps

[0036] 111 Primer

[0037] 12,22,42 Heat sink

[0038] 120 Top sheet

[0039] 121,22b Support feet

[0040] 13 TIM layer

[0041] 14 Encapsulation colloid

[0042] 15 Adhesive layer

[0043] 2,3,4,5,6a,6b Electronic packaging

[0044] 2a Electronic module

[0045] 20 Load-bearing structure

[0046] 20a First side

[0047] 20b Second side

[0048] 20c Side

[0049] 200 Line Layer

[0050] 200a Electrical contact pad

[0051] 200b Ball Planting Pad

[0052] 201 heat dissipation layer

[0053] 201a First Function Pad

[0054] 201b Second Function Pad

[0055] 21,23 Electronic components

[0056] 210 Electrode pads

[0057] 22a,42a Heat sink

[0058] 220,221 Frame

[0059] 24,34 Encapsulation layer

[0060] 24a First surface

[0061] 24b Second surface

[0062] 25 Carrier Board

[0063] 250 Dielectric layer

[0064] 251 Wiring Layer

[0065] 252 Conductors

[0066] 260 Wire

[0067] 27 Coating

[0068] 29 Conductive element

[0069] 58 heat dissipation structure

[0070] 580 Bonding layer

[0071] A Functional Area

[0072] M Packaging area

[0073] F Thermal Path

[0074] T Sensible heat area

[0075] H1,H2,H3,H4 heights. DETAILED DESCRIPTION

[0076] The following describes the implementation of the present invention through specific embodiments. Those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification.

[0077] It should be noted that the structures, proportions, sizes, etc. illustrated in the drawings of this specification are only used to match the contents disclosed in the specification for the understanding and reading of those skilled in the art, and are not used to limit the limiting conditions under which the present invention can be implemented, so they have no substantial technical significance. Any structural modification, change in proportional relationship, or adjustment in size should still fall within the scope of the technical contents disclosed by the present invention without affecting the effects and purposes that can be achieved by the present invention. At the same time, the terms such as "on", "first", "second", and "one" quoted in this specification are only for the convenience of description, and are not used to limit the scope of the implementation of the present invention. Changes or adjustments in their relative relationships should also be regarded as the scope of the implementation of the present invention without substantially changing the technical contents.

[0078] Figure 2A is a cross-sectional schematic diagram of an electronic package 2 of the present invention, Figure 2B It is a top view schematically showing the electronic package 2 of the present invention.

[0079] like Figure 2AAs shown, the electronic package 2 includes a supporting structure 20 , at least one electronic module 2 a disposed on the supporting structure 20 , at least one electronic element 21 , at least one heat sink 22 , and a packaging layer 24 covering the electronic element 21 .

[0080] The supporting structure 20 has a first side 20 a and a second side 20 b opposite to each other, and the first side 20 a defines at least one packaging area M for disposing the packaging layer 24 and at least one functional area A adjacent to the packaging area M.

[0081] In the present embodiment, the supporting structure 20 is, for example, a package substrate having a core layer and a circuit structure, a package substrate having a coreless circuit structure, a silicon interposer (TSI) with conductive through-silicon via (TSV), or other board types, which includes at least one insulating layer and at least one circuit layer 200 combined with the insulating layer, such as at least one fan-out type redistribution layer (RDL). For example, the material forming the circuit layer 200 is copper, and the material forming the insulating layer is polybenzoxazole (PBO), polyimide (PI), prepreg (PP), or other dielectric materials. It should be understood that the supporting structure 20 can also be other board materials for carrying chips, such as a lead frame, a wafer, or other board bodies with metal routing, etc., and is not limited to the above.

[0082] Furthermore, the first side 20a of the carrier structure 20 can be used as a die placement side, so that the circuit layer 200 is formed with a plurality of electrical contact pads 200a, first functional pads 201a and second functional pads 201b exposed on the first side 20a of the carrier structure 20, and the second side 20b of the carrier structure 20 can be used as a ball planting side, so that the circuit layer 200 is formed with a plurality of ball planting pads 200b exposed on the second side 20b of the carrier structure 20. For example, the electrical contact pad 200a is located on the packaging area M and the functional area A, and the first functional pad 201a is used as a heat dissipation pad and is located on the packaging area M, and the second functional pad 201b is used as a heat dissipation pad and is located on the functional area A.

[0083] In addition, the second side 20b of the supporting structure 20 can be used as a ball planting side to configure a plurality of conductive elements 29 on the ball planting pad 200b. For example, the conductive element 29 can be a metal pillar such as a copper pillar, a metal bump coated with an insulating block, a solder ball, a solder ball with a core copper ball, or other conductive structures.

[0084] In addition, at least one heat dissipation layer 201 connecting the ball pad 200b and the first and second functional pads 201a and 201b is formed in the support structure 20. For example, the heat dissipation layer 201 can be manufactured using the same process as the circuit layer 200 to simplify the manufacturing of the support structure 20.

[0085] The electronic module 2a is disposed on the functional area A of the first side 20a of the supporting structure 20 and is electrically connected to the circuit layer 200 , wherein the electronic module 2a includes a carrier 25 , at least one semiconductor chip 26 disposed on the carrier 25 , and a coating layer 27 coating the semiconductor chip 26 .

[0086] In the present embodiment, the carrier 25 is, for example, a package substrate with a core layer and a circuit structure, a package substrate with a coreless circuit structure, a silicon interposer (TSI) with a conductive through-silicon via (TSV), or other board types, which includes at least one dielectric layer 250 and at least one wiring layer 251 combined with the dielectric layer 250, such as at least one fan-out type redistribution layer (RDL). For example, the material forming the wiring layer 251 is copper, and the material forming the dielectric layer 250 is polybenzoxazole (PBO), polyimide (PI), prepreg (PP), or other dielectric materials. It should be understood that the carrier 25 may also be other plates for carrying chips, such as a lead frame, a wafer, or other plates with metal routing, and is not limited to the above.

[0087] Furthermore, a plurality of semiconductor chips 26 are stacked on the carrier 25, and the semiconductor chips 26 are electrically connected to the wiring layer 251 through a plurality of wires 260 in a wire bonding manner. Alternatively, the semiconductor chips 26 can also be electrically connected to the wiring layer 251 of the carrier 25 through a plurality of conductive bumps (not shown) in a flip chip manner, and the conductive bumps are coated with a primer (not shown); or, the semiconductor chips 26 can also directly contact the wiring layer 251 of the carrier 25.

[0088] In addition, the material forming the coating layer 27 is an insulating material, such as polyimide (PI), epoxy resin packaging colloid or packaging material, which can be formed by molding, lamination or coating.

[0089] In addition, the wiring layer 251 of the electronic module 2a is bonded to the electrical contact pad 200a through a plurality of conductors 252 to electrically connect the circuit layer 200. For example, the conductor 252 may be a metal pillar such as a copper pillar, a metal bump coated with an insulating block, a solder ball, a solder ball with a copper core ball, or other conductive structures.

[0090] It should be understood that there are many embodiments of the electronic module 2a, which can be designed according to the requirements of the functional area A and are not limited to the above.

[0091] The electronic component 21 is arranged on the packaging area M of the first side 20a of the supporting structure 20 and is electrically connected to the circuit layer 200 and thermally connected to the heat dissipation layer 201, wherein the electronic component 21 is an active component, a passive component or a combination thereof, and the active component is, for example, a semiconductor chip, and the passive component is, for example, a resistor, a capacitor and an inductor.

[0092] In this embodiment, the electronic component 21 is a semiconductor chip having an active surface 21a and an inactive surface 21b opposite to each other. The active surface 21a has a plurality of electrode pads 210 to combine with a plurality of conductive bumps 211 such as solder materials, metal pillars or others, so that the electronic component 21 is electrically connected to the circuit layer 200 by combining with the electrical contact pad 200a through the plurality of conductive bumps 211 in a flip chip manner, and is thermally connected to the heat dissipation layer 201 by combining with the first functional pad 201a. For example, a primer (not shown) or a packaging layer 24 may be used to cover the conductive bumps 211.

[0093] In other embodiments, the electronic component 21 may be connected to the electrical contact pad 200a and the first functional pad 201a by bonding through a plurality of welding wires (not shown); or, the electronic component 21 may directly contact the electrical contact pad 200a and the first functional pad 201a.

[0094] Furthermore, the electronic component 21 has at least one sensible heat zone T. For example, a portion of the electronic component 21 that is more likely to generate high temperature during operation is the sensible heat zone T, and its temperature is higher than that of the surrounding portions, such as Figure 2A The area near the edge electrode pad 210 shown and / or Figure 2B Other parts shown.

[0095] It should be understood that electronic components 23 such as passive components may also be disposed on the packaging area M of the supporting structure 20 , so the layout of components on the packaging area M may be designed according to requirements without any particular limitation.

[0096] The packaging layer 24 is formed on the packaging area M but not on the functional area A, so that the packaging layer 24 covers the electronic components 21 and 23 but does not cover the electronic module 2 a.

[0097] In this embodiment, the material forming the packaging layer 24 is an insulating material, such as a packaging colloid or packaging material of polyimide (PI) or epoxy resin, which can be formed by molding, lamination or coating.

[0098] Furthermore, the packaging layer 24 has a first surface 24a and a second surface 24b opposite to each other, and the first surface 24a is combined with the supporting structure 20, and the electronic components 21 are exposed on the second surface 24b of the packaging layer 24. For example, the inactive surface 21b of the electronic components 21 is flush with the second surface 24b of the packaging layer 24, so that the inactive surface 21b of the electronic components 21 is exposed on the second surface 24b of the packaging layer 24. Or, as Figure 3 In the electronic package 3 shown, the packaging layer 34 can cover the inactive surface 21 b of the electronic component 21 , so that the electronic component 21 is not exposed on the second surface 24 b of the packaging layer 24 .

[0099] The heat dissipation element 22 is disposed on the functional area A of the first side 20 a of the supporting structure 20 and is combined with the second functional pad 201 b .

[0100] In this embodiment, the heat sink 22 is a heat-conducting wall structure, which surrounds the electronic module 2a and exposes the electronic module 2a. For example, the heat sink 22 is made of metal material, such as Figure 2B The continuous copper frame or discontinuous copper frame shown (such as Figure 2C The two L-shaped frames 220 shown or Figure 2C The two C-shaped frames 221 are shown.

[0101] Furthermore, the heat sink 22 has a heat sink 22a and a support leg 22b that supports the heat sink 22a and is combined with the second functional pad 201b. For example, the heat sink 22a is a boss shape that protrudes from two opposite sides of the support leg 22b, so that the cross section of the heat sink 22 is T-shaped; or Figure 4A In the electronic package 4 shown, the heat sink 42a only protrudes out of one side of the support leg 22b, so that the cross-section of the heat sink 42 is an inverted L-shape.

[0102] In addition, the height H2 of the heat sink 22 relative to the first side 20a of the supporting structure 20 is equal to the height H1 of the electronic component 21 relative to the first side 20a of the supporting structure 20 and / or the height H3 of the packaging layer 24 relative to the first side 20a of the supporting structure 20. In another embodiment, Figure 3 In the electronic package 3 shown, a height H2 of the heat sink 22 relative to the first side 20 a of the supporting structure 20 is lower than a height H4 of the packaging layer 34 relative to the first side 20 a of the supporting structure 20 .

[0103] In addition, the heat sink 22a of the heat sink 22 does not protrude (or even flush with) the side surface 20c of the supporting structure 20; or Figure 4A and Figure 4B In the electronic package 4 shown, the heat sink 42 a of the heat sink 42 protrudes from the side surface 20 c of the supporting structure 20 .

[0104] Therefore, when the electronic package 2, 3, 4 of the present invention is in operation, the electronic component 21 is connected to the first functional pad 201a, the heat dissipation layer 201 and the second functional pad 201b through the heat conduction path F (such as Figure 2A , Figure 3 or Figure 4A As shown in the figure, the heat energy of the sensible heat area T is conducted to the heat sink 22, 42, and then dissipated to the external environment, so that the electronic component 21 can dissipate heat from the sensible heat area T, so the electronic package 2, 3, 4 can meet the high heat dissipation requirements.

[0105] Furthermore, the heat sink 22 may be provided with a heat dissipation structure 58 such as a metal cover as required. Figure 5 The electronic package 5 shown is used to improve the heat dissipation effect. For example, the heat dissipation structure 58 is combined with the heat dissipation body 22a and the packaging layer 24 (or even the electronic component 21) through a bonding layer 580 such as a thermal interface material (TIM).

[0106] In addition, multiple sets of heat dissipation elements 22, 42 can be configured as required to accelerate the heat dissipation rate. Fig. 6A or Figure 6B The electronic package 6a, 6b shown in the figure is provided with two sets of heat sinks 42, wherein the heat sinks 42a of the heat sinks 42 are flush (eg Fig. 6A as shown) or not protruding (as shown Figure 6B ) side 20c of the supporting structure 20.

[0107] It should be understood that the first functional pad 201a can be arranged corresponding to the position of the heat-sensing area T of the electronic component 21, so that the first functional pad 201a is connected to the electrode pad 210 closest to the heat-sensing area T to accelerate the heat dissipation rate.

[0108] In summary, the electronic package 2, 3, 4, 5, 6a, 6b of the present invention is mainly arranged on different areas of the supporting structure 20 through the electronic component 21 and the heat sink 22, 42, and the heat sink 22, 42 is thermally connected to the electronic component 21 to prevent the electronic component 21 from conducting the heat energy generated by it to the packaging layer 24 during the heat dissipation process, thereby avoiding the problem of overheating around the electronic component 21, so as to effectively improve the heat dissipation rate of the electronic package 2, 3, 4, 5, 6a, 6b. Therefore, compared with the prior art, the electronic package 2, 3, 4, 5, 6a, 6b of the present invention can effectively avoid the problem of overheating during operation, thereby ensuring the reliability of the electronic package 2, 3, 4, 5, 6a, 6b.

[0109] Furthermore, the board surface of the supporting structure 20 is enlarged due to the addition of the functional area A, which makes it easy to warp due to uneven stress distribution. Therefore, the metal frame is used as the heat sink 22, 42 to disperse the stress of the supporting structure 20 and control the deformation (warping) of the supporting structure 20, thereby effectively improving the rigidity of the electronic package 2, 3, 4, 5, 6a, 6b. Therefore, the electronic package 2, 3, 4, 5, 6a, 6b of the present invention can not only meet the requirements of thinning and increasing the board surface, but also prevent the problem of excessive warping caused by stress concentration of the supporting structure 20 at the electronic module 2a or the electronic component 21.

[0110] The above embodiments are used to illustrate the principles and effects of the present invention, but are not used to limit the present invention. Any person skilled in the art may modify the above embodiments without violating the spirit and scope of the present invention. Therefore, the scope of protection of the present invention should be as listed in the claims.

Claims

1. An electronic package, comprising: A supporting structure having a packaging area and a functional area adjacent to the packaging area defined on one side thereof; An electronic component is disposed on the packaging area of ​​the supporting structure and is electrically connected to the supporting structure; A heat sink, which is disposed on the functional area of ​​the supporting structure and is thermally connected to the electronic component; as well as The packaging layer is arranged on the packaging area of ​​the supporting structure to cover the electronic component, and the packaging layer is not arranged on the functional area.

2. The electronic package of claim 1, wherein: The supporting structure has a heat dissipation layer which thermally connects the electronic component and the heat dissipation element.

3. The electronic package of claim 1, wherein: The height of the electronic component relative to the supporting structure is equal to the height of the packaging layer relative to the supporting structure.

4. The electronic package of claim 1, wherein: The height of the heat sink relative to the supporting structure is equal to the height of the electronic component relative to the supporting structure.

5. The electronic package of claim 1, wherein: The height of the heat sink relative to the supporting structure is equal to or lower than the height of the packaging layer relative to the supporting structure.

6. The electronic package of claim 1, wherein: The heat sink is flush with the side surface of the supporting structure.

7. The electronic package of claim 1, wherein: The heat dissipation element protrudes from the side surface of the supporting structure.

8. The electronic package of claim 1, wherein: The electronic component has a heat sensible area, and the bearing structure has a functional pad corresponding to the position of the heat sensible area, so that the electronic component can be thermally connected to the heat sink through the functional pad.

9. The electronic package of claim 1, wherein: The electronic package also includes at least one electronic module arranged on the functional area and electrically connected to the supporting structure.

10. The electronic package of claim 9, wherein: The heat sink surrounds the electronic module.

11. The electronic package of claim 1, wherein: The electronic package also includes a heat dissipation structure arranged on the heat dissipation element.

12. The electronic package of claim 1, wherein: A plurality of heat dissipating elements are arranged on the supporting structure.

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