Pixel driving circuit, display panel and display device

Abstract

The embodiment of the invention discloses a pixel driving circuit, a display panel and a display device. The pixel driving circuit comprises a pulse amplitude modulation module and a pulse width modulation module. The pulse amplitude modulation module comprises a first driving unit and a first light-emitting control unit, and the first light-emitting control unit is electrically connected with the first enable signal end; the pulse width modulation module comprises a control unit and is electrically connected with the pulse amplitude modulation module through the control unit; wherein the control unit is electrically connected with the first enable signal end. According to the embodiment of the invention, by modulating the structure of the pixel driving circuit, the coupling influence of the signal of the PAM module on the PWM module is avoided, the deviation of the luminance of the light-emitting element is avoided, and the display effect is improved.

Description

Technical Field

[0001] Embodiments of the present invention relate to display technology, and more particularly to a pixel driving circuit, a display panel, and a display device. Background Art

[0002] With the development of display technology, the use of display panels has become increasingly common, and users' demand for display quality is also increasing. To meet the driving requirements of high-resolution display panels such as micro-LED (Micro Light Emitting Diode) or organic light-emitting diode (OLED) panels, existing technologies widely use a drive circuit that combines pulse amplitude modulation (PAM) and pulse width modulation (PWM) to control the intensity and duration of the driving current to control the light-emitting state of the light-emitting element.

[0003] However, the driving circuit that combines pulse amplitude modulation (PAM) and pulse width modulation (PWM) may cause the brightness of the light-emitting element to shift due to the coupling effect of the signal of the PAM module on the PWM module, thereby affecting the display effect. Summary of the Invention

[0004] Embodiments of the present invention provide a pixel driving circuit, a display panel, and a display device. By modulating the structure of the pixel driving circuit, the coupling effect of the signal of the PAM module on the PWM module is avoided, the brightness of the light-emitting element is prevented from being offset, and the display effect is improved.

[0005] In a first aspect, an embodiment of the present invention provides a pixel driving circuit, comprising a pulse amplitude modulation module and a pulse width modulation module;

[0006] The pulse amplitude modulation module includes a first driving unit and a first light-emitting control unit, wherein the control terminal of the first light-emitting control unit is electrically connected to the first enable signal terminal;

[0007] The pulse width modulation module includes a control unit, and is electrically connected to the pulse amplitude modulation module via the control unit; wherein the control unit is electrically connected to the first enable signal terminal.

[0008] In a second aspect, an embodiment of the present invention further provides a display panel, comprising the pixel driving circuit described in the first aspect.

[0009] In a third aspect, an embodiment of the present invention further provides a display device, comprising the display panel described in the second aspect.

[0010] The pixel driving circuit provided by an embodiment of the present invention includes a pulse amplitude modulation module and a pulse width modulation module. The pulse amplitude modulation module includes a first driving unit and a first light-emitting control unit, and the first light-emitting control unit is electrically connected to the first enable signal terminal; the pulse width modulation module includes a control unit, and is electrically connected to the pulse amplitude modulation module through the control unit; wherein the control unit is electrically connected to the first enable signal terminal. By providing a control unit between the pulse width modulation module and the pulse amplitude modulation module, the control unit is turned on or off under the control of the first enable signal terminal, which can prevent the signal of the pulse width modulation module from being input to the pulse amplitude modulation module in advance, thereby avoiding the influence of signal coupling on the pulse amplitude modulation module and improving the display effect. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Figure 1 This is a schematic diagram of the structure of a pixel driving circuit designed by the inventor during the research process;

[0012] Figure 2 Figure 1 The pixel driving circuit shown is a schematic diagram of simulation results of part of the signal when it is working;

[0013] Figure 3 A schematic structural diagram of a pixel driving circuit provided by an embodiment of the present invention;

[0014] Figure 4 A schematic structural diagram of another pixel driving circuit provided by an embodiment of the present invention;

[0015] Figure 5 for Figure 4 The schematic diagram of simulation results of some signals when the pixel driving circuit is working is shown;

[0016] Figure 6 A schematic structural diagram of another pixel driving circuit provided by an embodiment of the present invention;

[0017] Figure 7 A schematic structural diagram of another pixel driving circuit provided by an embodiment of the present invention;

[0018] Figure 8 A schematic structural diagram of another pixel driving circuit provided by an embodiment of the present invention;

[0019] Figure 9 A schematic structural diagram of another pixel driving circuit provided by an embodiment of the present invention;

[0020] Figure 10 A timing diagram of a driving signal of a pixel driving circuit provided by an embodiment of the present invention;

[0021] Figure 11A schematic structural diagram of another pixel driving circuit provided by an embodiment of the present invention;

[0022] Figure 12 A schematic structural diagram of a display device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0023] The present invention will be further described in detail below with reference to the accompanying drawings and examples. It will be understood that the specific embodiments described herein are intended only to illustrate the present invention and are not intended to limit the present invention. It should also be noted that, for ease of description, the accompanying drawings only illustrate portions relevant to the present invention, not all structures.

[0024] The terms used in the embodiments of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. It should be noted that the directional words such as "upper", "lower", "left", and "right" described in the embodiments of the present invention are described based on the angles shown in the accompanying drawings and should not be understood as limitations on the embodiments of the present invention. In addition, in the context, it is also necessary to understand that when it is mentioned that an element is formed "on" or "under" another element, it can not only be formed directly "on" or "under" another element, but can also be formed indirectly "on" or "under" another element through an intermediate element. The terms "first", "second", etc. are only used for descriptive purposes and do not indicate any order, quantity or importance, but are only used to distinguish different components. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to the specific circumstances.

[0025] Figure 1 This is a schematic diagram of the structure of a pixel driving circuit designed by the inventor during the research process, reference Figure 1 The pixel driving circuit includes a PAM module 1 and a PWM module 2, wherein the PAM module 1 includes a PAM driving unit 101, the PAM driving unit 101 includes a transistor M1′, a first end of the transistor M1′ is electrically connected to the voltage end PVDD, a control end of the transistor M1′ is electrically connected to the N1′ node, a second end of the transistor M1′ is electrically connected to the first end of the light emitting element 3, and a second end of the light emitting element 3 is electrically connected to the voltage end PVEE. The PAM module 1 is connected to the corresponding scanning signal end ( Figure 1 Not shown) provides a scan signal and an enable signal terminal ( Figure 1The PWM module 2 operates under the control of the enable signal provided by the PAM module (not shown), and includes a PAM driving unit 201, a PAM light emitting control unit 202, and a storage unit 203. The PAM driving unit 201 includes a transistor M2′, the PAM light emitting control unit 202 includes a transistor M3′, and the storage unit 203 includes a capacitor C1′. The first end of the transistor M2′ is connected to the voltage terminal PVDD, the control end of the transistor M2′ is electrically connected to the Q1′ node, the second end of the transistor M2′ (the Q2′ node) is electrically connected to the first end of the transistor M3′, the control end of the transistor M2′ is electrically connected to the enable signal terminal, the control end of the transistor M3′ is electrically connected to the enable signal terminal PWM_EM, the second end of the transistor M3′ is electrically connected to the N1′ node, the first end of the capacitor C1′ is electrically connected to the Q1′ node, and the second end of the capacitor C1′ is electrically connected to the scan signal terminal SWEEP. The PWM module 2 operates under the control of the enable signal provided by the PAM module 2, and includes a PAM driving unit 201, a PAM light emitting control unit 202, and a storage unit 203. The PAM driving unit 201 includes a transistor M2′, the PAM light emitting control unit 202 includes a transistor M3′, and the storage unit 203 includes a capacitor C1′. The first end of the transistor M2′ is connected to the voltage terminal PVDD, the control end of the transistor M2′ is electrically connected to the Q1′ node, the second end of the transistor M2′ (the Q2′ node) is electrically connected to the first end of the transistor M3′, the control end of the transistor M2′ is electrically connected to the enable signal terminal PWM_EM, the second end of the transistor M3′ is electrically connected to the N1′ node, the first end of the capacitor C1′ is electrically connected to the Q1′ node, Figure 1 The pixel driver circuit operates under the control of a scan signal provided by a PAM module (not shown) and an enable signal PWM_EMIT provided by an enable signal terminal PWM_EM. This pixel driver circuit can achieve pixel-level dimming, or it can ensure that the light-emitting element always operates at a relatively efficient current or voltage (provided by PAM module 1), adjusting brightness by only adjusting the light-emitting time (PWM module 2 adjusts the duty cycle). Figure 2 for Figure 1 The simulation results of some signals when the pixel driving circuit is working are shown in the figure. Figure 2 The inventors discovered that after the PAM and PWM modules complete writing, nodes N1′ and Q1′ maintain a stable value. When PWM module 2's enable signal PWM_EM is turned on, M2′ is turned on, connecting nodes N1′ and Q2′. Although N1′'s holding capacitance is large and Q2′'s parasitic capacitance is small, the voltage at N1′ is written to Q2′. However, N1′ is actually affected by the voltage at Q2′, causing a slight rise. This results in an increased voltage at N1′, resulting in a low actual luminous brightness and an abnormally dimmed luminance when the light-emitting element is illuminated. Furthermore, the inventors' experiments confirmed that this issue cannot be resolved by changing the timing. Even if PAM module 1's enable signal is turned on first, followed by PWM module 2's enable signal PWM_EMIT, N1′ will still be affected by Q2′ and experience an abnormally high voltage.

[0026] To solve the above problems, an embodiment of the present invention provides a pixel driving circuit, comprising a pulse amplitude modulation module and a pulse width modulation module; the pulse amplitude modulation module comprises a first driving unit and a first light-emitting control unit, the first light-emitting control unit being electrically connected to a first enable signal terminal; the pulse width modulation module comprises a control unit, which is electrically connected to the pulse amplitude modulation module via the control unit; wherein the control terminal of the control unit is electrically connected to the first enable signal terminal. The pixel driving circuit provided by an embodiment of the present invention prevents the signal of the pulse width modulation module from being input to the pulse amplitude modulation module in advance by disposing a control unit between the pulse width modulation module and the pulse amplitude modulation module, and the control unit is turned on or off under the control of the first enable signal terminal, thereby avoiding the influence of signal coupling on the pulse amplitude modulation module and improving the display effect.

[0027] The above is the core idea of ​​the embodiment of the present invention. The specific embodiments of the present invention are explained below with reference to the accompanying drawings. Figure 3 A schematic diagram of a pixel driving circuit according to an embodiment of the present invention is provided. Figure 3 The pixel driving circuit includes a pulse amplitude modulation module 10 and a pulse width modulation module 20; the pulse amplitude modulation module 10 includes a first driving unit 11 and a first light-emitting control unit 12, and the first light-emitting control unit 12 is electrically connected to the first enable signal terminal PAM_EM; the pulse width modulation module 20 includes a control unit 21, and is electrically connected to the pulse amplitude modulation module 10 through the control unit 21; wherein the control unit 21 is electrically connected to the first enable signal terminal PAM_EM.

[0028] Optionally, the pulse amplitude modulation module 10 is electrically connected to the light-emitting element 30 and is used to provide a driving current or voltage of a preset amplitude to the light-emitting element 30 to drive the light-emitting element 30 to emit light. Specifically, the pulse width modulation module 20 is electrically connected to the pulse amplitude modulation module 10 and is used to adjust the brightness of the light-emitting element 30 by controlling the light-emitting duration of the light-emitting element 30. Specifically, the pulse width modulation module 20 provides a pulse width modulation (PWM) control signal to the pulse amplitude modulation module 10. When the light-emitting element 30 needs to emit a higher brightness, a PWM control signal with a larger effective duty cycle can be provided, that is, the light-emitting duration of the light-emitting element 30 is longer within a light-emitting cycle. When the light-emitting element 30 needs to emit a lower brightness, a PWM control signal with a smaller effective duty cycle can be provided, that is, the light-emitting duration of the light-emitting element 30 is shorter within a light-emitting cycle. The pulse amplitude modulation module 10 can always provide the maximum driving current or voltage when the light-emitting element 30 is emitting light, thereby improving the efficiency of the pixel driving circuit. It should be noted that within one cycle of the PWM control signal, the first drive unit 10 is controlled to be turned off when the signal jumps. In this embodiment, the effective duty cycle refers to the duty cycle of the time period in which the PWM control signal turns on the first drive unit 10 within one cycle of the PWM control signal.

[0029] It should be noted that in the embodiment of the present invention, the control unit 21 acts as a switch that controls the electrical connection between the pulse amplitude modulation module 10 and the pulse width modulation module 20. Specifically, only when the control unit 21 is turned on by the enable signal PAM_EMIT provided by the first enable signal terminal PAM_EM can the PWM signal provided by the pulse width modulation module 20 be transmitted to the pulse amplitude modulation module 10. The pulse width modulation module 20 actually influences the effective duty cycle of the light-emitting period of the light-emitting element 30 during the light-emitting phase, thereby controlling the light-emitting duration. The first light-emitting control unit 12 in the pulse amplitude modulation module 10 is configured to be turned on during the light-emitting phase of the light-emitting element 30 under the control of the enable signal PAM_EMIT provided by the enable signal terminal PAM_EM. Therefore, the pulse amplitude modulation module 10 can only receive the PWM control signal generated by the pulse width modulation module 20 for the light-emitting element 30 during the period when the first light-emitting control unit 12 in the pulse amplitude modulation module 10 is turned on to enable the light-emitting element 30 to receive the driving current or voltage. Therefore, by uniformly setting the start-up signals of the control unit 21 and the first light-emitting control unit 12, that is, electrically connecting them to the first enable signal terminal PAM_EM, the first enable signal terminal PAM_EM can simultaneously control the control unit 21 and the first light-emitting control unit 12 to be turned on, thereby avoiding the phenomenon of node voltage offset caused by turning on the pulse amplitude modulation module 10 and the pulse width modulation module 20 before this.

[0030] The technical solution of the embodiments of the present invention, by providing a pulse width modulation module including a control unit, wherein the control terminal of the control unit is connected to the first enable signal terminal PAM_EM, can prevent unnecessary conduction between the pulse width modulation module and the pulse amplitude modulation module, thereby preventing the voltage in the pulse width modulation module from affecting the voltage of important nodes in the pulse amplitude modulation module due to coupling, thereby preventing the abnormal dimming of the light-emitting element brightness, which affects the display effect. In addition, the control signal electrically connected to the control unit 21 is the same as that of the first light-emitting control unit 12, thereby eliminating the need for additional control signals. The enable signal provided by the first enable signal terminal PAM_EM is multiplexed as the control signal of the control unit. This design achieves the technical effects of the embodiments of the present invention without increasing the process difficulty, and avoids the introduction of new signals that couple with other signals in the pixel drive circuit, which may cause other problems when the light-emitting element emits light.

[0031] Optional, continue to refer to Figure 3 The control unit 21 includes a first transistor M1 , and a control terminal of the first transistor M1 is electrically connected to the first enable signal terminal PAM_EM.

[0032] Among them, the first enable signal terminal PAM_EM is the light-emitting control signal terminal of the pulse amplitude modulation module 10, which is connected to the control terminal of the first transistor M1 through the signal terminal. When the light-emitting control signal ( Figure 3 When the first transistor M1 is turned on, the first transistor M1 is turned off, thereby preventing the pulse width modulation module 20 from being connected to the pulse amplitude modulation module 10, and removing the influence of the light emitting control signal in the pulse width modulation module 20 on the pulse amplitude modulation module 10 when it is turned on.

[0033] Figure 4 A schematic diagram of another pixel driving circuit according to an embodiment of the present invention is provided. Figure 4Optionally, the pulse width modulation module 20 further includes a second driving unit 22 and a second light-emitting control unit 23. The first end of the first driving unit 11 and the first end of the second driving unit 22 are both electrically connected to the first voltage terminal PVDD, the control end of the first driving unit 11 is electrically connected to the first node N1, the first end of the second driving unit 22 is electrically connected to the second node N2, the second end of the first driving unit 11 is electrically connected to the first end of the first light-emitting control unit 12, the second end of the second driving unit 22 is electrically connected to the first end of the second light-emitting control unit 23, the control end of the second light-emitting control unit 23 is electrically connected to the second enable signal terminal PWM_EM, the second end of the second light-emitting control unit 23 is electrically connected to the first end of the first transistor M1, the second end of the first light-emitting control unit 12 is electrically connected to the first end of the light-emitting element 30, and the second end of the light-emitting element 30 is electrically connected to the third voltage terminal PVEE. The signal output terminal 20a of the pulse width modulation module 20 is electrically connected to the first end of the first transistor M1, and the second end of the first transistor M1 is electrically connected to the first node N1.

[0034] Among them, the first voltage terminal PVDD provides a positive power supply voltage for the anode of the light-emitting element, and the third voltage terminal PVEE provides a negative power supply voltage for the cathode provided by the light-emitting element. The light-emitting element can be a Micro LED or an OLED. The specific implementation can be designed according to actual conditions, and the embodiment of the present invention does not limit this. It can be understood that the voltage of the first node N1 is used to control the working state of the first drive unit 11. When the voltage of the first node N1 controls the first drive unit 11 to be turned on, the electrical signal provided by the first voltage terminal PVDD can be provided to the light-emitting element 30 through the first drive unit 11. The voltage of the second node N2 is used to control the working state of the second drive unit 22. Unlike the first drive unit 11, the second node N2 can be connected to the sweep signal terminal through a capacitor (refer to Figure 1 , Figure 4(not shown), the sweep signal output by the sweep signal terminal controls the voltage of the second node N2, causing the pulse width modulation module 20 to output a PWM control signal. The enable signal PWM_EMIT provided by the second light-emitting control signal terminal PWM_EM is used to turn on the second light-emitting control unit 23. In this embodiment, during the light-emitting phase of the light-emitting element 30, the enable signal PAM_EMIT provided by the first enable signal terminal PAM_EM turns on the first transistor M1, and the enable signal PWM_EMIT provided by the second light-emitting control signal terminal PWM_EM turns on the second light-emitting control unit 23. The PWM signal provided by the pulse width modulation module 20 is transmitted to the first node N1. Moreover, due to the provision of the first transistor M1, the first transistor M1 is in the off state before the first enable signal terminal PAM_EM provides a valid enable signal. This can prevent the voltage at 20a from affecting the voltage of the first node N1 when the second light-emitting control unit 23 is turned on, thereby preventing the brightness of the light-emitting element 30 from being affected when it is subsequently illuminated.

[0035] For example, Figure 5 for Figure 4 The simulation results of some signals when the pixel driving circuit is working are shown in the figure. Figure 2 and Figure 5 It can be seen that, since the embodiment of the present invention sets the first transistor M1 to block PWM_EMIT so that the second light emitting control unit 23 is turned on at position 20a and the first node N1, the first node N1 ( Figure 2 The voltage jump corresponding to N1′ in the first node disappears, so the influence of the voltage jump of the first node N1 on the brightness of the light emitting element 30 can be eliminated.

[0036] Figure 6 A schematic diagram of a pixel driving circuit according to an embodiment of the present invention is provided. Figure 6 ,and Figure 4 The embodiment shown is different in that, in this embodiment, the second end of the second driving unit 22 is electrically connected to the first end of the first transistor M1, the first end of the second light-emitting control unit 23 is electrically connected to the second end of the first transistor M1, and the second end of the second light-emitting control unit 23 is electrically connected to the first node N1. That is, the control unit 21 is electrically connected in series between the second light-emitting control unit 23 and the second driving unit 22.

[0037] It is understandable that Figure 4 In the embodiment shown, the first transistor M1 is provided between the second light emitting control unit 23 and the pulse amplitude modulation module 10. Figure 6 In the embodiment shown, the first transistor M1 is disposed between the second light emitting control unit 23 and the second driving unit 22 , which can achieve the same technical effect. The specific implementation can be designed according to actual conditions, and the embodiment of the present invention is not limited thereto.

[0038] Since the control unit 21 and the second light emitting control unit 23 both function as switches, the inventors have discovered that in order to simplify the circuit structure, the second light emitting control unit 23 can be reused as the control unit 21 . Figure 7 A schematic diagram of a pixel driving circuit according to an embodiment of the present invention is provided. Figure 7 Optionally, the control unit 21 is multiplexed as a second light-emitting control unit 23; the first end of the second driving unit 22 is electrically connected to the first voltage end PVDD, the control end of the second driving unit 22 is electrically connected to the second node N2, and the second end of the second driving unit 22 is electrically connected to the first end of the second light-emitting control unit 23.

[0039] It will be appreciated that in this embodiment, to simplify the circuit structure, the second light-emitting control unit 23 can be directly reused as the control unit 21. This design does not require increasing the number of transistors in the pixel driving circuit; it only requires connecting the control terminal of the second light-emitting control unit 23 to the first enable signal terminal PAM_EM. This simplifies the circuit structure and reduces the difficulty of panel design caused by the increase in the number of transistors. It also eliminates the impact of the voltage jump of the first node N1 on the brightness of the light-emitting element 30, thereby improving the display effect.

[0040] In another embodiment, the output terminal of the pulse width modulation module may not be directly electrically connected to the first node to avoid affecting the voltage of the first node. Figure 8 A schematic diagram of a pixel driving circuit according to an embodiment of the present invention is provided. Figure 8 Optionally, the pulse amplitude modulation module 10 also includes a third light-emitting control unit 13, a first end of the third light-emitting control unit 13 is electrically connected to the first voltage end PVDD, a second end of the third light-emitting control unit 13 is electrically connected to the first end of the first driving unit 11, a second end of the first driving unit 11 is electrically connected to the first end of the first light-emitting control unit 12, a second end of the first light-emitting control unit 12 is electrically connected to the first end of the light-emitting element 30, and a second end of the light-emitting element 30 is electrically connected to the third voltage end PVEE; the signal output end of the pulse width modulation module 20 is electrically connected to the first end of the first transistor M1, and the second end of the first transistor M1 is electrically connected to the control end of the third light-emitting control unit 13.

[0041] It is understandable that, in this embodiment, the pulse width modulation module 20 is not directly connected to the control terminal (first node, Figure 8The first node is not shown in the figure, but is connected to the control end of the third light-emitting control unit 13. That is, the pulse width modulation module 20 transmits the PWM control signal to the third control unit 13 to control the light-emitting duration of the light-emitting element 30. Since the pulse width modulation module 20 is not directly electrically connected to the first node, the influence of the voltage in the pulse width modulation module 20 on the voltage of the first node can also be eliminated, thereby avoiding the brightness of the light-emitting element 30 being inconsistent with the expected brightness, and improving the display effect.

[0042] The following describes other structures of the pixel driving circuit by taking the connection between the pulse width modulation module 20 and the first node as an example. Figure 9 A schematic diagram of a pixel driving circuit according to an embodiment of the present invention is provided. Figure 9Optionally, the pulse amplitude modulation module 10 also includes a first initialization unit 14, a second initialization unit 15, a first data writing unit 16, a first threshold compensation unit 17, a third light-emitting control unit 13 and a first storage unit 18; the pulse width modulation module 20 also includes a third initialization unit 24, a second data writing unit 25, a second threshold compensation unit 26, a fourth light-emitting control unit 27 and a second storage unit 28.The first end of the first initialization unit 14 is electrically connected to the first reference voltage terminal PAM_VREF1, the control end of the first initialization unit 14 is electrically connected to the first scan signal terminal PAM_S1, the second end of the first initialization unit 14 is electrically connected to the first node N1, the first end of the second initialization unit 15 is electrically connected to the second reference voltage terminal PAM_VREF2, the control end of the second initialization unit 15 is electrically connected to the first scan signal terminal PAM_S1 or the second scan signal terminal PAM_S2, the second end of the second initialization unit 15 is electrically connected to the first end of the light emitting element 30, the first end of the third initialization unit 24 is electrically connected to the third reference voltage terminal PWM_VRFE1, and the third initialization unit 25 is electrically connected to the third reference voltage terminal PWM_VRFE1. The control end of the initialization unit 24 is electrically connected to the third scan signal end PWM_S1, and the second end of the third initialization unit 24 is electrically connected to the second node N2; the first end of the first data writing unit 16 is electrically connected to the first data signal end PAM_DATA, the control end of the first data writing unit 16 is electrically connected to the second scan signal end PAM_S2, the second end of the first data writing unit 16 is electrically connected to the first end of the first driving unit 11, the first end of the first threshold compensation unit 17 is electrically connected to the second end of the first driving unit 11, the control end of the first threshold compensation unit 17 is electrically connected to the second scan signal end PAM_S2, and the second end of the first threshold compensation unit 17 is electrically connected to the first node N1. The first end of the second data writing unit 25 is electrically connected to the second data signal terminal PWM_DATA, the control end of the second data writing unit 25 is electrically connected to the fourth scan signal terminal PWM_S2, the second end of the second data writing unit 25 is electrically connected to the first end of the second driving unit 22, the first end of the second threshold compensation unit 26 is electrically connected to the second end of the second driving unit 22, the control end of the second threshold compensation unit 26 is electrically connected to the fourth scan signal terminal PWM_S2, and the second end of the second threshold compensation unit 26 is electrically connected to the second node N2; the first end of the third light emitting control unit 13 is electrically connected to the first voltage terminal PVDD, and the control end of the third light emitting control unit 13 is electrically connected to the first The enable signal terminal PAM_EM is electrically connected, the second terminal of the third light-emitting control unit 13 is electrically connected to the first terminal of the first driving unit 11, the first terminal of the fourth light-emitting control unit 27 is electrically connected to the first voltage terminal PVDD, the control terminal of the fourth light-emitting control unit 27 is electrically connected to the second enable signal terminal PWM_EM, and the second terminal of the fourth light-emitting control unit 27 is electrically connected to the first terminal of the second driving unit 22; the first terminal of the first storage unit 18 is electrically connected to the first voltage terminal PVDD, the second terminal of the first storage unit 18 is electrically connected to the first node, the first terminal of the second storage unit 28 is electrically connected to the sweep voltage terminal SWEEP, and the second terminal of the second storage unit 28 is electrically connected to the second node N2.

[0043] Optional, continue to refer to Figure 9The first driving unit 11 includes a second transistor M2, the first light-emitting control unit 12 includes a third transistor M3, the first initialization unit 14 includes a fourth transistor M4, the second initialization unit 15 includes a fifth transistor M5, the first data writing unit 16 includes a sixth transistor M6, the first threshold compensation unit 17 includes a seventh transistor M7, the third light-emitting control unit 13 includes an eighth transistor M8, and the first storage unit 18 includes a first capacitor C1. In a specific implementation, M4 and M7 may be dual-gate transistors, which is not limited in this embodiment of the present invention. The second driving unit 22 includes a twelfth transistor M12, the second light-emitting control unit 23 includes a thirteenth transistor M13, the third initialization unit 24 includes a fourteenth transistor M14, the second data writing unit 25 includes a fifteenth transistor M15, the second threshold compensation unit 26 includes a sixteenth transistor M16, the fourth light-emitting control unit 27 includes a seventeenth transistor M17, and the second storage unit 28 includes a third capacitor C3. In a specific implementation, M14 and M16 may be dual-gate transistors, which is not limited in this embodiment of the present invention. It is understandable that, in other embodiments, M1 and M13 may be multiplexed into a control unit 21 using one transistor, namely, the second light emitting control unit 23 .

[0044] It can be understood that the pulse amplitude modulation module 10 includes 7 transistors and one capacitor, and its basic structure and principle are the same as the structure of the 7T1C circuit including seven transistors and one capacitor in the prior art. The pulse width modulation module 20 includes 6 transistors and one capacitor, excluding the control unit, and its basic structure is similar to the structure of the 7T1C circuit in the prior art. The difference is that the first end of the capacitor C3 is not connected to the first voltage terminal PVDD, but is connected to the scanning signal terminal SWEEP. In addition, since the pulse width modulation module 20 is not directly electrically connected to the light-emitting element 30, the initialization unit connected to the first end of the light-emitting element 30 is removed. Figure 10 A timing diagram of a driving signal of a pixel driving circuit provided by an embodiment of the present invention, with reference to Figure 10The driving process of the pixel driving circuit includes a PAM input stage T1, a PWM input stage T2 and a light-emitting stage T3. In the PAM input stage T1, the scanning signal PAM_SCAN1 provided by the first scanning signal terminal PAM_S1 first controls the fourth transistor M4 to turn on, and the reference voltage signal provided by the first reference voltage terminal PAM_VREF1 is written to the first node N1 to initialize the voltage of N1. Then, the scanning signal PAM_SCAN2 provided by the second scanning signal terminal PAM_S2 controls the sixth transistor M6 and the seventh transistor M7 to turn on, and the data signal PAM_DATA is written to the first node N1, and the threshold compensation of the second transistor M2 is realized at the same time. In the PWM input stage T2, the scanning signal PWM_SCAN1 provided by the third scanning signal terminal PWM_S1 first controls the fourteenth transistor M14 to turn on, and the reference voltage signal provided by the third reference voltage terminal PWM_VRFE1 is written to the second node N2 to initialize the voltage of N2. Then, the fourth scanning signal The scanning signal PWM_SCAN2 provided by the terminal PWM_S2 controls the turning on of the fifteenth transistor M15 and the sixteenth transistor M16, and the data signal PWM_DATA is written into the second node N2, thereby realizing threshold compensation of the twelfth transistor M112. In the light-emitting stage T3, the second enable signal terminal PWM_EM provides the enable signal PWM_EMIT to control the turning on of the thirteenth transistor M13 and the seventeenth transistor M17, and simultaneously applies the sweep signal SWEEP to the PWM module 2. The gate voltage of the twelfth transistor M12 is changed by utilizing the bootstrap effect of the capacitor. When the voltage of the sweep signal reaches the threshold, the PWM module 2 outputs a shutdown signal to the gate of the second transistor M2 to control the turning off of the second transistor M2. At the same time, in this stage, the enable signal PAM_EMIT provided by the first enable signal terminal PAM_EM controls the turning on of the first transistor M1, the third transistor M3, and the eighth transistor M8. Before the second transistor M2 is turned off, the light-emitting element is in a light-emitting state.

[0045] Continue to refer Figure 10 Optionally, within a working cycle in which the pixel driving circuit drives the light-emitting element to emit light, the second enable signal PWM_EMIT provided by the second enable signal terminal is earlier than the first enable signal PAM_EMIT provided by the first enable signal terminal.

[0046] In one operating cycle of the pixel driving circuit driving the light-emitting element, the second enable signal PWM_EMIT provided by the second enable signal terminal PWM_EM is set to be earlier than the first enable signal PAM_EMIT provided by the first enable signal terminal PAM_EM, that is, the valid signal of PAM_EM is later than the valid signal of PWM_EM. Since the first transistor M1 is controlled by the first enable signal terminal PAM_EM, this can ensure that the first node N1 is prevented from being connected to the second end of the second driving unit 22 before the pulse amplitude modulation module 10 operates, thereby preventing the voltage of the first node N1 from changing due to the coupling effect.

[0047] Figure 11 A schematic diagram of a pixel driving circuit according to an embodiment of the present invention is provided. Figure 11 Optionally, the pulse amplitude modulation module 10 further includes a voltage stabilization unit 19, and the voltage stabilization unit 19 is used to stabilize the voltage of the first voltage terminal PVDD.

[0048] By providing the voltage stabilizing unit 19 , the stability of the power supply voltage provided by the first voltage terminal PVDD can be improved, thereby enhancing the display effect.

[0049] Optionally, the voltage stabilization unit 19 includes a ninth transistor M9, a tenth transistor M10, an eleventh transistor M11 and a second capacitor C2; the first end of the ninth transistor M9 is electrically connected to the first voltage end PVDD, the control end of the ninth transistor M9 is electrically connected to the first scan signal end PAM_S1, and the third end of the ninth transistor M9 is electrically connected to the first end of the first storage unit 18; the first end of the tenth transistor M10 is electrically connected to the first voltage end PVDD, the control end of the tenth transistor M10 is electrically connected to the second scan signal end PWM_S2, and the third end of the tenth transistor M10 is electrically connected to the first end of the first storage unit 18; the first end of the eleventh transistor M11 is electrically connected to the first voltage end PVDD, the control end of the eleventh transistor M11 is electrically connected to the second enable signal end PWM_EM, and the second end of the eleventh transistor M11 is electrically connected to the first end of the first storage unit 18; the first end of the second capacitor C2 is electrically connected to the second voltage end Vinit, and the second end of the second capacitor C2 is electrically connected to the first end of the first storage unit 18.

[0050] Optionally, the pulse width modulation module 20 further includes a sweep voltage reset module 29 , which is used to reset the sweep signal of the sweep voltage terminal SWEEP.

[0051] By providing the sweep voltage reset module 29 , the sweep signal of the previous frame can be reset when scanning the next frame of display signal, thereby avoiding the influence of the sweep signal of the previous frame on the circuit.

[0052] Optionally, the sweep voltage reset module 29 includes an eighteenth transistor M18, the first end of the eighteenth transistor M18 is electrically connected to the sweep ground end SWEEP_GND, the control end of the eighteenth transistor M18 is electrically connected to the fourth scan signal end PWM_S2, and the second end of the eighteenth transistor M18 is electrically connected to the first end of the second storage unit 28.

[0053] An embodiment of the present invention further provides a display panel, comprising any one of the pixel driving circuits provided in the above embodiments.

[0054] Since the display panel provided by the embodiment of the present invention includes any one of the pixel driving circuits provided by the above embodiments, it has the same or corresponding technical effects as the pixel driving circuit and will not be described in detail here.

[0055] Figure 12 A schematic diagram of the structure of a display device provided by an embodiment of the present invention. Figure 12 The display device 100 includes any one of the display panels 200 provided in the embodiments of the present invention. The display device 100 can be a mobile phone, a computer, a smart wearable device, etc.

[0056] Note that the above are only preferred embodiments of the present invention and the technical principles employed. Those skilled in the art will appreciate that the present invention is not limited to the specific embodiments herein, and that various obvious changes, readjustments, combinations, and substitutions are possible for those skilled in the art without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in detail through the above embodiments, the present invention is not limited to the above embodiments and may include many other equivalent embodiments without departing from the scope of the present invention. The scope of the present invention is determined by the scope of the appended claims.

Claims

1. A pixel driving circuit, characterized in that: It includes a pulse amplitude modulation module and a pulse width modulation module; The pulse amplitude modulation module includes a first driving unit and a first light emitting control unit, and the first light emitting control unit is electrically connected to the first enable signal terminal; The pulse width modulation module includes a control unit, and is electrically connected to the pulse amplitude modulation module through the control unit; wherein the control end of the control unit is electrically connected to the first enable signal end.

2. The pixel driving circuit according to claim 1, characterized in that: The control unit includes a first transistor, and a control terminal of the first transistor is electrically connected to the first enable signal terminal.

3. The pixel driving circuit according to claim 2, characterized in that: The first end of the first driving unit is electrically connected to the first voltage end, the control end of the first driving unit is electrically connected to the first node, the second end of the first driving unit is electrically connected to the first end of the first light emitting control unit, and the second end of the first light emitting control unit is electrically connected to the first end of the light emitting element; The signal output terminal of the pulse width modulation module is electrically connected to the first terminal of the first transistor, and the second terminal of the first transistor is electrically connected to the first node.

4. The pixel driving circuit according to claim 3, characterized in that: The pulse width modulation module includes a second driving unit and a second light emitting control unit; a first terminal of the second driving unit is electrically connected to the first voltage terminal, a control terminal of the second driving unit is electrically connected to a second node, a second terminal of the second driving unit is electrically connected to a first terminal of the second light emitting control unit, a control terminal of the second light emitting control unit is electrically connected to a second enable signal terminal, and a second terminal of the second light emitting control unit is electrically connected to a first terminal of the first transistor; or A first end of the second driving unit is electrically connected to the first voltage end, a control end of the second driving unit is electrically connected to a second node, a second end of the second driving unit is electrically connected to a first end of the first transistor, a first end of the second light-emitting control unit is electrically connected to a second end of the first transistor, a control end of the second light-emitting control unit is electrically connected to a second enable signal end, and a second end of the second light-emitting control unit is electrically connected to the first node.

5. The pixel driving circuit according to claim 4, characterized in that: In a working cycle in which the pixel driving circuit drives the light-emitting element to emit light, the second enable signal provided by the second enable signal terminal is earlier than the first enable signal provided by the first enable signal terminal.

6. The pixel driving circuit according to claim 3, characterized in that: The pulse width modulation module includes a second driving unit and a second light emitting control unit, and the control unit is multiplexed into the second light emitting control unit; The first end of the second driving unit is electrically connected to the first voltage end, the control end of the second driving unit is electrically connected to the second node, and the second end of the second driving unit is electrically connected to the first end of the second light emitting control unit.

7. The pixel driving circuit according to claim 2, characterized in that: The pulse amplitude modulation module further includes a third light-emitting control unit, a first end of the third light-emitting control unit is electrically connected to the first voltage end, a second end of the third light-emitting control unit is electrically connected to the first end of the first driving unit, a control end of the first driving unit is electrically connected to the first node, a second end of the first driving unit is electrically connected to the first end of the first light-emitting control unit, and a second end of the first light-emitting control unit is electrically connected to the first end of the light-emitting element; The signal output terminal of the pulse width modulation module is electrically connected to the first terminal of the first transistor, and the second terminal of the first transistor is electrically connected to the control terminal of the third light emitting control unit.

8. The pixel driving circuit according to claim 1, characterized in that: The pulse amplitude modulation module further includes a first initialization unit, a second initialization unit, a first data writing unit, a first threshold compensation unit, a third light emitting control unit and a first storage unit; A first end of the first initialization unit is electrically connected to a first reference voltage end, a control end of the first initialization unit is electrically connected to a first scan signal end, a second end of the first initialization unit is electrically connected to a first node, a first end of the second initialization unit is electrically connected to a second reference voltage end, a control end of the second initialization unit is electrically connected to the first scan signal end or the second scan signal end, a second end of the second initialization unit is electrically connected to a first end of a light-emitting element, a first end of the first data writing unit is electrically connected to a first data signal end, a control end of the first data writing unit is electrically connected to the second scan signal end, a second end of the first data writing unit is electrically connected to a first end of the first driving unit, a first end of the first threshold compensation unit is electrically connected to a second end of the first driving unit, a control end of the first threshold compensation unit is electrically connected to the second scan signal end, and a second end of the first threshold compensation unit is electrically connected to the first node, a first end of the third light-emitting control unit is electrically connected to a first voltage end, a control end of the third light-emitting control unit is electrically connected to the first enable signal end, a second end of the third light-emitting control unit is electrically connected to a first end of the first driving unit, a first end of the first storage unit is electrically connected to the first voltage end, and a second end of the first storage unit is electrically connected to the first node.

9. The pixel driving circuit according to claim 8, characterized in that: The first driving unit includes a second transistor, the first light emitting control unit includes a third transistor, the first initialization unit includes a fourth transistor, the second initialization unit includes a fifth transistor, the first data writing unit includes a sixth transistor, the first threshold compensation unit includes a seventh transistor, the third light emitting control unit includes an eighth transistor, and the first storage unit includes a first capacitor.

10. The pixel driving circuit according to claim 8, characterized in that: The pulse amplitude modulation module further includes a voltage stabilization unit, and the voltage stabilization unit is used to stabilize the voltage of the first voltage terminal.

11. The pixel driving circuit according to claim 10, characterized in that: The voltage stabilization unit includes a ninth transistor, a tenth transistor, an eleventh transistor and a second capacitor; The first end of the ninth transistor is electrically connected to the first voltage end, the control end of the ninth transistor is electrically connected to the first scan signal end, and the third end of the ninth transistor is electrically connected to the first end of the first storage unit; The first terminal of the tenth transistor is electrically connected to the first voltage terminal, the control terminal of the tenth transistor is electrically connected to the second scan signal terminal, and the third terminal of the tenth transistor is electrically connected to the first terminal of the first storage unit; The first terminal of the eleventh transistor is electrically connected to the first voltage terminal, the control terminal of the eleventh transistor is electrically connected to the second enable signal terminal, and the second terminal of the eleventh transistor is electrically connected to the first terminal of the first storage unit; The first end of the second capacitor is electrically connected to the second voltage end, and the second end of the second capacitor is electrically connected to the first end of the first storage unit.

12. The pixel driving circuit according to claim 4, characterized in that: The pulse width modulation module further includes a third initialization unit, a second data writing unit, a second threshold compensation unit, a fourth light emitting control unit and a second storage unit; A first end of the third initialization unit is electrically connected to a third reference voltage end, a control end of the third initialization unit is electrically connected to a third scan signal end, a second end of the third initialization unit is electrically connected to the second node, a first end of the second data write unit is electrically connected to a second data signal end, a control end of the second data write unit is electrically connected to a fourth scan signal end, a second end of the second data write unit is electrically connected to a first end of the second drive unit, a first end of the second threshold compensation unit is electrically connected to a second end of the second drive unit, a control end of the second threshold compensation unit is electrically connected to the fourth scan signal end, a second end of the second threshold compensation unit is electrically connected to the second node, a first end of the fourth light-emitting control unit is electrically connected to the first voltage end, a control end of the fourth light-emitting control unit is electrically connected to the second enable signal end, a second end of the fourth light-emitting control unit is electrically connected to a first end of the second drive unit, a first end of the second storage unit is electrically connected to a scan voltage end, and a second end of the second storage unit is electrically connected to the second node.

13. The pixel driving circuit according to claim 12, characterized in that: The second driving unit includes a twelfth transistor, the second light-emitting control unit includes a thirteenth transistor, the third initialization unit includes a fourteenth transistor, the second data writing unit includes a fifteenth transistor, the second threshold compensation unit includes a sixteenth transistor, the fourth light-emitting control unit includes a seventeenth transistor, and the second storage unit includes a third capacitor.

14. The pixel driving circuit according to claim 12, characterized in that: The pulse width modulation module further comprises a frequency sweeping voltage reset module, and the frequency sweeping voltage reset module is used to reset the frequency sweeping signal at the frequency sweeping voltage terminal.

15. The pixel driving circuit according to claim 14, characterized in that: The frequency sweep voltage reset module includes an eighteenth transistor, a first end of the eighteenth transistor is electrically connected to the frequency sweep ground end, a control end of the eighteenth transistor is electrically connected to the fourth scan signal end, and a second end of the eighteenth transistor is electrically connected to the first end of the second storage unit.

16. A display panel, characterized in that: The invention comprises the pixel driving circuit as claimed in any one of claims 1 to 15.

17. A display device, characterized in that: Includes the display panel as claimed in claim 16.

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