Method and system for improving time delay compensation precision of array antenna signal

Abstract

The invention discloses a method and a system for improving the time delay compensation precision of an array antenna signal, and the method comprises the steps: sequentially carrying out the time delay compensation and signal synthesis of the array antenna on a signal received by the array antenna, and enabling the time delay compensation to be divided into the whole-cycle time delay compensation of the signal and the interpolation time delay compensation of the signal, the time delay compensation precision of the signal is controlled to be within a system clock period through the whole-cycle time delay compensation, the time delay compensation precision of the signal is reduced to a preset value through the interpolation time delay compensation of the signal, and the preset value is smaller than the system clock period; and synthesizing the signals subjected to interpolation time delay compensation in a phase compensation residual time delay mode. The method for improving the time delay compensation precision is simple, reliable and convenient to implement, and the system requirement for antenna array signal synthesis can be met without additionally arranging any external equipment.

Description

Technical Field

[0001] The present invention relates to the technical field of array antennas, and in particular to a method and system for improving the accuracy of time delay compensation of array antenna signals. Background Art

[0002] Since the targets of deep space exploration are far away, the signals transmitted from deep space targets to ground observation stations are very weak. In order to ensure that ground antennas can receive data from deep space exploration, the receiving antennas generally use two technical solutions. One is to build a large-aperture antenna. Another technical solution is to build multiple small-aperture antennas and combine the signals received by these small-aperture antennas into an equivalent large-aperture antenna receiving signal through the antenna array method. Since small-aperture antenna arrays have the characteristics of low construction cost, simple equipment maintenance and flexible use, they are increasingly valued in deep space exploration technology and have become a hot area in deep space exploration technology in recent years.

[0003] In antenna array systems, a key issue is how to synthesize the signals received by each antenna in the array into one signal. Since the delays of the signals received by each antenna in the antenna array system vary greatly, it is necessary to compensate for the delays of each antenna in the array when synthesizing the signal. Using the traditional delay compensation method, the control accuracy of the compensation delay is one system clock cycle. Therefore, traditionally, in order to improve the delay compensation accuracy, the only method is to increase the system clock frequency and reduce the system clock cycle. However, the system clock frequency is limited by the device chip used, and often cannot meet the accuracy requirements of the delay compensation of the system design. Summary of the invention

[0004] In view of this, the present invention provides a method and system for improving the accuracy of delay compensation of array antenna signals, through which the delay difference of signals received by each antenna of the antenna array system can be reduced to within 1 / 10 of the system clock cycle, and based on this, the synthesis of the received signals of the antenna array can be completed by adjusting the phase of the received signals of each antenna. The method for improving the accuracy of delay compensation proposed by the present invention is simple and reliable, easy to implement, and does not require any external equipment. It can meet the system requirements for antenna array signal synthesis and is easy to design an antenna array system that meets the index requirements in engineering practice.

[0005] The present invention discloses a method for improving the accuracy of delay compensation of array antenna signals, which comprises:

[0006] The signals received by the array antenna are sequentially subjected to array antenna delay compensation and signal synthesis, wherein the delay compensation is divided into integer delay compensation of the signal and interpolation delay compensation of the signal. The integer delay compensation controls the delay compensation accuracy of the signal within a system clock cycle, and the interpolation delay compensation of the signal reduces the delay compensation accuracy of the signal to a preset value, which is less than the system clock cycle. The signal after the interpolation delay compensation is synthesized by means of phase compensation residual delay.

[0007] Furthermore, firstly, the integer delay compensation is performed on the signal received by the array antenna, and the delay compensation accuracy of the signal is determined by the integer time of the system clock; then, the interpolation delay compensation is performed on the signal after the integer delay compensation.

[0008] Furthermore, in the process of performing integer delay compensation on the signal received by the array antenna, the time delay of an integer multiple of T is compensated with the system clock period T as a unit to obtain a signal after integer delay compensation.

[0009] Furthermore, the following formulas are used to obtain the signals received by each antenna in the array antenna after being processed by the whole cycle delay compensation.

[0010]

[0011] Among them, s k_1 (t) is the signal received by antenna k in the array antenna after the whole cycle delay compensation processing; t is time; t k is the delay of antenna k receiving the signal; t max t 1 ,t 2 ,…,t n The maximum value among them, n is the total number of antennas in the array antenna; Δt k is the theoretical delay to be compensated for antenna k; T is the system clock period; Δt′ k The residual delay error of the signal received by antenna k after the integer delay compensation processing, that is, the difference between the theoretical compensation delay of the signal received by antenna k and the integer processing delay, that is, the integer delay compensation error, Δt′ k Less than the system clock cycle time T.

[0012] Furthermore, the signal after the whole cycle delay compensation is subjected to interpolation delay compensation by the following formula to obtain the signal after the interpolation delay compensation:

[0013]

[0014] Among them, s k (t) is the signal of antenna k in the array antenna after the interpolation delay compensation processing is completed; s k_1(t) is the signal after the full - cycle time - delay compensation processing for the signal of antenna k; T is the system clock period; a is the interpolation compensation coefficient.

[0015] Furthermore, the calculation formula for the interpolation compensation coefficient is:

[0016]

[0017] where, Δt′ k <T is the full - cycle time - delay compensation error of the signal of antenna k after the full - cycle time - delay compensation processing.

[0018] Furthermore, substituting formulas (3) and (5) into formula (4) gives:

[0019]

[0020] where, Δt″ k is the time - delay compensation error after the interpolation time - delay compensation processing of the antenna.

[0021] Furthermore, Δt″ k The calculation formula for is:

[0022]

[0023] The time - delay compensation error after the interpolation time - delay compensation processing is reduced to less than 1 / 10 of the system clock period T.

[0024] Furthermore, the method of synthesizing the signal after the interpolation time - delay compensation by compensating the residual time - delay through phase includes:

[0025] The synthesized signal s 合成 (t) is obtained through the following formula:

[0026]

[0027] where, θ k is the phase control value of antenna k, n is the total number of antennas in the array antenna, and the value of θ k is:

[0028] θ k =(Δt″ k ·f) 余数 ·360

[0029] where, Δt″ k is the residual time - delay error of the signal received by antenna k after the time - delay compensation; f is the carrier frequency of the received signal, and s k (t) is the signal after the interpolation time - delay compensation processing.

[0030] The present invention also discloses a system for improving the accuracy of delay compensation of array antenna signals, and implements any of the above methods for improving the accuracy of delay compensation of array antenna signals, which includes a delay compensation unit and a signal synthesis unit connected in sequence; the delay compensation unit includes a signal integer delay compensation unit and a signal interpolation delay compensation unit connected in sequence; the signal integer delay compensation unit is used to perform integer delay compensation on the signal received by each antenna in the antenna array to obtain a signal after integer delay compensation processing; the signal interpolation delay compensation unit is used to perform interpolation delay compensation on the signal after integer delay compensation processing to obtain a signal after interpolation delay compensation processing; the signal synthesis unit is used to synthesize the signal after interpolation delay compensation processing.

[0031] Due to the adoption of the above technical solution, the present invention has the following advantages:

[0032] 1. The present invention solves the problem of improving the accuracy of delay compensation when synthesizing array signals of array antennas. The present invention reduces the accuracy of delay compensation of array antenna signals to 1 / 10 of the system clock cycle by adopting a hierarchical delay compensation method, and finally completes the signal synthesis function of the array antenna by sampling phase compensation residual delay. Through this method, it can be ensured that the array signal synthesis of the array antenna system meets the system design requirements, solving a key problem in the design of the array antenna system.

[0033] 2. The present invention is simple to implement, occupies less resources, and reduces the system design cost. The present invention does not require complex circuits, and the implementation method is relatively simple. The present invention only uses the original equipment of the system without adding additional equipment, and realizes the function of improving the delay compensation accuracy of the array signal through software algorithms, which is convenient for automatic operation and reduces the system design cost.

[0034] 3. When using the traditional delay compensation method, the accuracy of the compensation delay is controlled by the system clock cycle, that is, the control accuracy of the delay compensation is one system clock cycle. Therefore, traditionally, in order to improve the accuracy of delay compensation, the only way is to increase the system clock frequency and reduce the system clock cycle. However, the system clock frequency is limited by the device chip used, and often cannot meet the accuracy requirements of the delay compensation of the system design. The present invention uses the digital signal after digital sampling of the received signal, and for the signal after the full cycle delay compensation is completed, the signal delay compensation accuracy is improved to within 1 / 10 of the sampling clock cycle by interpolation, and finally the signal synthesis of the antenna array is completed based on this. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the embodiments of the present invention. For ordinary technicians in this field, other drawings can also be obtained based on these drawings.

[0036] Figure 1 It is a schematic diagram of the structure of the array signal synthesis subsystem of the array antenna system.

[0037] Figure 2 It is a schematic diagram of the structure of the delay compensation unit of the array signal synthesis subsystem of the array antenna system.

[0038] Figure 3 It is a structural diagram of a signal interpolation delay compensation unit of an array signal synthesis subsystem of an array antenna system.

[0039] Figure 4 It is a structural schematic diagram of a signal synthesis unit of an array signal synthesis subsystem of an array antenna system. DETAILED DESCRIPTION

[0040] The present invention is further described in conjunction with the accompanying drawings and embodiments, and the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. All other embodiments obtained by ordinary technicians in this field should fall within the scope of protection of the embodiments of the present invention.

[0041] The present invention provides an embodiment of a method for improving the accuracy of delay compensation of array antenna signals, which comprises:

[0042] The signals received by the array antenna are sequentially subjected to array antenna delay compensation and signal synthesis, wherein the delay compensation is divided into integer delay compensation of the signal and interpolation delay compensation of the signal. The integer delay compensation controls the delay compensation accuracy of the signal within a system clock cycle, and the interpolation delay compensation of the signal reduces the delay compensation accuracy of the signal to a preset value, which is less than the system clock cycle. The signal after the interpolation delay compensation is synthesized by means of phase compensation residual delay.

[0043] In this embodiment, first, integer delay compensation is performed on the signal received by the array antenna, and the delay compensation accuracy of the signal is determined by the integer time of the system clock; then, interpolation delay compensation is performed on the signal after the integer delay compensation.

[0044] In this embodiment, when performing integer-cycle delay compensation processing on the signal received by the array antenna, a time delay of an integer multiple of T is compensated with the system clock period T as a unit to obtain a signal after integer-cycle delay compensation processing.

[0045] In this embodiment, the signals received by each antenna in the array antenna after the integer delay compensation process are obtained respectively through the following formula;

[0046]

[0047] where s k_1 (t) is the signal received by antenna k in the array antenna after the integer delay compensation process; t is time; t k is the delay of the signal received by antenna k; t max is t 1 ,t 2 ,…,t n is the maximum value among them, n is the total number of antennas in the array antenna; Δt k is the theoretical delay to be compensated for antenna k; T is the system clock period; Δt′ k is the residual delay error of the signal received by antenna k after the integer delay compensation process, that is, the difference between the theoretical compensation delay of the signal received by antenna k and the integer processing delay, namely the integer delay compensation error, and Δt′ k is less than the integer time T of the system clock.

[0048] In this embodiment, the signal after the integer delay compensation process is subjected to interpolation delay compensation through the following formula to obtain the signal after the interpolation delay compensation process:

[0049]

[0050] where s k (t) is the signal of antenna k in the array antenna after the interpolation delay compensation process is completed; s k_1 (t) is the signal of antenna k after the integer delay compensation process is completed; T is the system clock period; a is the interpolation compensation coefficient.

[0051] In this embodiment, the calculation formula of the interpolation compensation coefficient is:

[0052]

[0053] where Δt′ k <T is the integer delay compensation error of the signal of antenna k after the integer delay compensation process is completed.

[0054] In this embodiment, substituting formulas (3) and (5) into formula (4) gives:

[0055]

[0056] where Δt″ k is the delay compensation error of the antenna after the interpolation delay compensation process.

[0057] In this embodiment, Δt″ k The calculation formula is:

[0058]

[0059] After the interpolation delay compensation process, the delay compensation error is reduced to less than 1 / 10 of the system clock period T.

[0060] In this embodiment, the synthesizing of the signal after interpolation delay compensation by phase compensating residual delay includes:

[0061] The synthetic signal s is obtained by the following formula 合成 (t):

[0062]

[0063] Among them, θ k is the phase control value of antenna k, n is the total number of antennas in the array antenna, θ k The value of is:

[0064] θ k =(Δt″ k f) 余数 ·360

[0065] Where, Δt″ k is the residual delay error of the signal received by antenna k after delay compensation; f is the carrier frequency of the received signal, s k (t) is the signal after interpolation delay compensation processing.

[0066] The present invention also provides an embodiment of a system for improving the accuracy of delay compensation of array antenna signals, which implements the method for improving the accuracy of delay compensation of array antenna signals described in the above embodiment, and includes a delay compensation unit and a signal synthesis unit connected in sequence; the delay compensation unit includes a signal integer delay compensation unit and a signal interpolation delay compensation unit connected in sequence; the signal integer delay compensation unit is used to perform integer delay compensation on the signal received by each antenna in the antenna array to obtain a signal after integer delay compensation processing; the signal interpolation delay compensation unit is used to perform interpolation delay compensation on the signal after integer delay compensation processing to obtain a signal after interpolation delay compensation processing; the signal synthesis unit is used to synthesize the signal after interpolation delay compensation processing.

[0067] For ease of understanding, the present invention also provides a more specific embodiment:

[0068] See also Figure 1 ,like Figure 1As shown, the signals received by each antenna of the array antenna are first subjected to digital A / D sampling processing, and then the digitized signals are sent to the FPGA digital signal processing chip for digital signal processing: First, the sampling signals of each antenna are first sent to the signal full-cycle delay compensation unit to complete the full-cycle delay compensation processing; then the signals after the full-cycle delay compensation processing are sent to the signal synthesis unit to complete the signal synthesis. The signal received by each antenna of the array antenna is s(tt 1 ),s(tt 2 ),…,s(tt n ), where t 1 ,t 2 ,…,t n They are the sum of the spatial delay of the signals received by antennas A1, A2, ..., An and the device delay of the device itself. The spatial delay can be calculated through the position information of the antenna and the target, while the device delay of the antenna itself can be obtained by calibrating the antenna.

[0069] From the principle of signal synthesis, signal synthesis can be completed by adjusting the signal delays received by each antenna to be consistent, that is, the following delay compensation algorithm is used for the signal received by antenna k:

[0070] s(tt k -(t max -t k ))=s(tt max ) (1)

[0071] Among them, t k is the delay of the antenna receiving the signal; t max t 1 ,t 2 ,…,t n The maximum value in t max =max(t 1 ,t 2 ,…,t n ).

[0072] The idealized formula for antenna array signal synthesis is:

[0073]

[0074] According to the above formula, let Δt 1 =t max -t 1 ,Δt 2 =t max -t 2 ,…,Δt n =t max -t n, are the theoretical delays to be compensated for the signals received by the array antennas A1, A2, ..., An, i.e., the idealized compensation delays when the signals received by each antenna are synthesized, and n is the total number of antennas in the array antenna. When delay compensation is implemented in reality, since it is impossible to achieve completely ideal delay compensation, the delay compensation unit can only compensate the delay of the received signal of each antenna close to Δt 1 ,Δt 2 ,…,Δt n , that is, the signal obtained after each antenna receives the signal through the delay compensation unit is s 1 (t) = s(tt max +Δt″ 1 ),s 2 (t) = s(tt max +Δt″ 2 ),…,s n (t) = s(tt max +Δt″ n ), where Δt″ 1 ,Δt″ 2 ,…,Δt″ n is the residual delay error of the signals received by array antennas A1, A2, …, An.

[0075] Finally, the signal synthesis unit processes the residual delay error of each antenna of the array antenna.

[0076] See also Figure 2 and Figure 3 The purpose of antenna array delay compensation is to convert max(Δt″ k -Δt″ l )k,l∈1,…,n is made as small as possible and controlled within an acceptable accuracy range, that is, after the delay compensation processing, the delay of each antenna receiving the signal is close to a fixed value.

[0077] like Figure 2 As shown, the delay compensation process is divided into two steps: the first step is to perform the whole cycle delay compensation process, and the second step is to perform the signal interpolation delay compensation process. First, in the whole cycle delay compensation process, the signal delay compensation is to compensate the integer multiple time delay of T in the system clock cycle T, that is, the compensation whole cycle time delay processing algorithm for antenna k is:

[0078]

[0079] Among them, s k_1 (t) The signal received by antenna k after the whole cycle delay compensation processing; t k is the delay of antenna k receiving the signal; Δt kis the theoretical delay to be compensated for antenna k; T is the system clock period; Δt′ k The residual delay error of the signal received by antenna k after the integer delay compensation process. According to formulas (1) and (3), Δt′ k is the difference between the theoretical compensation delay of the signal received by antenna k and the integer processing delay, that is, the integer delay compensation error, Δt′ k is less than the integer time T of the system clock.

[0080] In the integer delay compensation, the delay compensation accuracy of the signal is determined by the integer time of the system clock. To further reduce the signal delay compensation error, the signal after the integer delay compensation is further processed by a signal interpolation delay compensation unit to further improve the compensation accuracy of the delay compensation unit.

[0081] As Figure 3 shown, the signal interpolation delay compensation unit consists of a delay unit driven by the system clock, two multipliers, and an adder. The delay unit is used to delay one system clock period T; the implemented interpolation delay compensation algorithm is as follows:

[0082]

[0083] where s k (t) is the signal after the interpolation delay compensation process of the signal of antenna k; s k_1 (t) is the signal after the integer delay compensation process of the signal of antenna k; T is the system clock period; a is the interpolation compensation coefficient, and its value is calculated according to the following algorithm:

[0084]

[0085] where Δt′ k <T is the integer delay compensation error of the signal of antenna k after the integer delay compensation process.

[0086] Substituting formulas (3) and (5) into formula (4) gives:

[0087]

[0088] where is the delay compensation error after the interpolation delay compensation process of the antenna. It can be seen that the delay compensation error after the interpolation delay compensation process is reduced to less than 1 / 10 of the system clock period T.

[0089] Refer to Figure 4 As Figure 4 shown, finally, the signal synthesis unit synthesizes the signal according to the traditional phase control signal synthesis algorithm to complete the array signal synthesis, that is, the synthesized signal s 合成 (t) is:

[0090]

[0091] Among them, θ k is the phase control value of antenna k, n is the total number of antennas in the array antenna, θ k The value of is calculated according to the following algorithm:

[0092] θ k =(Δt″ k f) 余数 360 (unit: degree)

[0093] Where, Δt″ k is the residual delay error of the signal received by antenna k after delay compensation; f is the carrier frequency of the received signal.

[0094] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention rather than to limit it. Although the present invention has been described in detail with reference to the above embodiments, ordinary technicians in the relevant field should understand that the specific implementation methods of the present invention can still be modified or replaced by equivalents. Any modification or equivalent replacement that does not depart from the spirit and scope of the present invention should be covered within the scope of protection of the claims of the present invention.

Claims

1. A method for improving the accuracy of delay compensation of array antenna signals, characterized in that: include: The signals received by the array antenna are sequentially subjected to array antenna delay compensation and signal synthesis, wherein the delay compensation is divided into integer delay compensation of the signal and interpolation delay compensation of the signal. The integer delay compensation controls the delay compensation accuracy of the signal within a system clock cycle, and the interpolation delay compensation of the signal reduces the delay compensation accuracy of the signal to a preset value, which is less than the system clock cycle. The signal after the interpolation delay compensation is synthesized by means of phase compensation residual delay.

2. The method for improving the delay compensation accuracy of array antenna signals according to claim 1, characterized in that: First, the integer delay compensation is performed on the signal received by the array antenna. The accuracy of the signal delay compensation is determined by the integer time of the system clock. Then, the interpolation delay compensation is performed on the signal after the integer delay compensation.

3. The method for improving the delay compensation accuracy of array antenna signals according to claim 1 or 2, characterized in that: In the integer delay compensation processing for the signal received by the array antenna, the time delay of an integer multiple of T is compensated with the system clock period T as a unit to obtain a signal after the integer delay compensation processing.

4. The method for improving the delay compensation accuracy of array antenna signals according to claim 3, characterized in that: The following formula is used to obtain the signals received by each antenna in the array antenna after the whole cycle delay compensation processing; Among them, s k_1 (t) is the signal received by antenna k in the array antenna after the whole cycle delay compensation processing; t is time; t k is the delay of antenna k receiving the signal; t max for t1, t2, …, t n The maximum value among them, n is the total number of antennas in the array antenna; Δt k is the theoretical delay to be compensated for antenna k; T is the system clock period; Δt ′ k The residual delay error of the signal received by antenna k after the integer delay compensation processing, that is, the difference between the theoretical compensation delay of the signal received by antenna k and the integer processing delay, that is, the integer delay compensation error, Δt ′ k Less than the system clock cycle time T.

5. The method for improving the delay compensation accuracy of array antenna signals according to claim 4, characterized in that: The signal after the whole cycle delay compensation is subjected to interpolation delay compensation by the following formula to obtain the signal after the interpolation delay compensation: Among them, s k (t) is the signal of antenna k in the array antenna after the interpolation delay compensation processing is completed; s k_1 (t) is the signal of antenna k after the whole cycle delay compensation processing is completed; T is the system clock period; a is the interpolation compensation coefficient.

6. The method for improving the delay compensation accuracy of array antenna signals according to claim 5, characterized in that: The calculation formula of the interpolation compensation coefficient is: where Δt′ k <T is the integer delay compensation error of the signal of antenna k after the integer delay compensation process is completed.

7. The method for improving the delay compensation accuracy of array antenna signals according to claim 6, characterized in that: Substituting formula (3) and (5) into formula (4), we can obtain: Where, Δt″ k is the delay compensation error of the antenna after interpolation delay compensation processing.

8. The method for improving the delay compensation accuracy of array antenna signals according to claim 7, characterized in that: Δt″ k The calculation formula is: After the interpolation delay compensation process, the delay compensation error is reduced to less than 1 / 10 of the system clock period T.

9. The method for improving the delay compensation accuracy of array antenna signals according to claim 1, characterized in that: The method of synthesizing the signal after interpolation delay compensation by phase compensating residual delay includes: The synthetic signal s is obtained by the following formula 合成 (t): Among them, θ k is the phase control value of antenna k, n is the total number of antennas in the array antenna, θ k The value of is: i k =(Δt″ k ·f) 余数 ·360 Where, Δt″ k is the residual delay error of the signal received by antenna k after delay compensation; f is the carrier frequency of the received signal, s k (t) is the signal after interpolation delay compensation processing.

10. A system for improving the accuracy of delay compensation of array antenna signals, implementing the method for improving the accuracy of delay compensation of array antenna signals as claimed in any one of claims 1 to 9, characterized in that: It includes a delay compensation unit and a signal synthesis unit connected in sequence; the delay compensation unit includes a signal whole cycle delay compensation unit and a signal interpolation delay compensation unit connected in sequence; the signal whole cycle delay compensation unit is used to perform whole cycle delay compensation on the signal received by each antenna in the antenna array to obtain a signal after whole cycle delay compensation processing; The signal interpolation delay compensation unit is used to perform interpolation delay compensation on the signal after the whole cycle delay compensation processing to obtain the signal after the interpolation delay compensation processing; the signal synthesis unit is used to synthesize the signal after the interpolation delay compensation processing.

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