Preparation method of packaging substrate and packaging substrate

Abstract

The preparation method comprises the steps that a core plate layer is provided, the core plate layer comprises a core plate, the core plate comprises two surfaces which are oppositely arranged, core plate copper layers are arranged on the two surfaces, and the surface of the core plate layer comprises a coding area and a functional area. Codes are printed in the code printing area of the core board layer to form through hole codes, and the through hole codes penetrate through the core board layer. And patterning the core board copper layer of the functional area so as to respectively form core board circuit layers on the two surfaces of the core board. Laminating a layer-adding film on the surface of the circuit layer of the core board, and controlling the layer-adding film to be formed in the functional area far away from the coding area. Forming a circuit layer on the layer-adding film, wherein the layer-adding film and the circuit layer form an adding layer; when the layer-adding film is pressed, the layer-adding film is controlled to be far away from the coding area so as to prevent the layer-adding film from covering the coding area and affecting the readability of the through hole code of the coding area. Therefore, through the scheme of'one code to the bottom ', the yield and the production efficiency of the PCB are improved, and the manufacturing cost is reduced.

Description

Technical Field

[0001] The present invention relates to the technical field of circuit board manufacturing, and in particular to a method for preparing a packaging substrate and a packaging substrate. Background Art

[0002] With the intensification of market competition and the acceleration of the informatization process of manufacturing industry, the market has put forward higher requirements for product quality and production control. PCB (Printed Circuit Board) is widely used in various electronic products and is an important electronic connector. The quality of PCB is related to the quality of the entire electronic product, and thus its quality and reliability are crucial. In order to better control product quality, control the production process, record key parameters in the production process, analyze defects in the production process, etc., it is necessary to record relevant production information to facilitate the full traceability and quality control of electronic products.

[0003] During the PCB printing process, a series of processes such as ink coating, copper plating, dry film, solder mask ink, etc. will be experienced. The fonts or QR codes on the PCB board are easily covered and become invalid. The traceability method currently used is "transcoding", that is, each time a layer is added to the board, a traceability code needs to be engraved to transfer the information of the previous layer to the next layer. However, this process has the following disadvantages: 1) Each time a layer is added, a "transcoding" is required, which reduces production efficiency; 2) It is necessary to purchase additional transcoding equipment, which also increases the manufacturing cost of the PCB board. Summary of the invention

[0004] In view of the above shortcomings of the prior art, an object of the present invention is to provide a method for preparing a packaging substrate and a packaging substrate, so as to improve the yield and production efficiency of a PCB board and reduce the manufacturing cost.

[0005] In order to achieve the above-mentioned object and other related objects, the present invention provides a method for preparing a packaging substrate, comprising:

[0006] A core board layer is provided, the core board layer includes a core board, the core board includes two surfaces arranged opposite to each other, core board copper layers are arranged on both surfaces, and the surface of the core board layer includes a coding area and a functional area;

[0007] The coding area of ​​the core board layer is coded to form a through-hole code, and the through-hole code runs through the core board layer;

[0008] Patterning the core board copper layer of the functional area to form core board circuit layers on two surfaces of the core board respectively;

[0009] The build-up film is laminated on the surface of the core board circuit layer, and the build-up film is controlled to be formed in the functional area and away from the coding area;

[0010] A circuit layer is formed on the build-up film, and the build-up film and the circuit layer form a build-up layer.

[0011] Optionally, the step of coding the coding area of ​​the core board layer to form a through-hole code includes:

[0012] The coding area of ​​the core board layer is coded by laser coding process, the coding times are controlled to be 20 to 80 times, the laser focus is 0.2 mm to 1 mm, and the power of the laser coding equipment is controlled to be 15 w to 28 w.

[0013] Optionally, the step of coding the coding area of ​​the core board layer to form a through-hole code includes:

[0014] The speed of the laser coding equipment is controlled to be 200mm / s~600mm / s, and the frequency is 40kHz~80kHz.

[0015] Optionally, after coding the coding area of ​​the core board layer to form a through-hole code, the method further comprises:

[0016] After forming the through-hole code, the core board layer is subjected to copper reduction, burr removal and board grinding.

[0017] Optionally, the step of forming a circuit layer on the build-up film includes:

[0018] forming a dry film on the build-up film;

[0019] Dry film for graphic functional areas;

[0020] Copper is plated on the patterned dry film to form a circuit layer.

[0021] Optionally, after forming a circuit layer on the build-up film, the method further includes:

[0022] Continuing to form a next build-up layer on the build-up layer;

[0023] When the number of build-up layers is greater than or equal to 12, a dry film is formed on the current and subsequent build-up layer films, and the dry film is controlled to cover the coding area of ​​the core board layer;

[0024] Dry film for graphic functional areas;

[0025] Copper is plated on the patterned dry film to form a circuit layer.

[0026] Optionally, after forming a circuit layer on the build-up film, the method further includes:

[0027] Continuing to form a next build-up layer on the build-up layer;

[0028] After forming a circuit layer on the outermost build-up film, nickel-gold is plated on the welding area and the coding area of ​​the outermost circuit layer.

[0029] Optionally, after forming a circuit layer on the outermost build-up film and before plating nickel and gold on the welding area and the coding area of ​​the outermost circuit layer, the method further includes:

[0030] A solder mask is formed on the non-welding area of ​​the outermost circuit layer.

[0031] The present invention also provides a packaging substrate, the packaging substrate comprising:

[0032] The core board layer includes two surfaces arranged opposite to each other, both surfaces of the core board layer are provided with core board circuit layers, the surface of the core board layer includes a coding area and a functional area, and a through-hole code is formed on the coding area;

[0033] At least one build-up layer is arranged on the core board circuit layer. The build-up layer includes a build-up layer film formed on the core board circuit layer and a circuit layer formed on the build-up layer film. The build-up layer avoids the coding area on the core board layer, and the through-hole code on the coding area is readable.

[0034] Optionally, the packaging substrate is formed by the above-mentioned packaging substrate preparation method.

[0035] Compared with the prior art, the method for preparing a packaging substrate and the packaging substrate of the present invention have at least the following beneficial effects:

[0036] The preparation method of the packaging substrate of the present invention includes providing a core board layer, the core board layer includes a core board, the core board includes two surfaces arranged opposite to each other, both surfaces are provided with a core board copper layer, and the surface of the core board layer includes a coding area and a functional area. Coding is performed in the coding area of ​​the core board layer to form a through-hole code, and the through-hole code runs through the core board layer. The core board copper layer in the functional area is patterned to form a core board circuit layer on the two surfaces of the core board respectively. A build-up film is laminated on the surface of the core board circuit layer, and the build-up film is controlled to be formed in the functional area, away from the coding area. A circuit layer is formed on the build-up film, and the build-up film and the circuit layer form a build-up layer. When laminating the build-up film, the build-up film is controlled to be away from the coding area to avoid the build-up film covering the coding area and affecting the readability of the through-hole code in the coding area.

[0037] Furthermore, since coding on the core board layer will cause bulging of the copper sheet on the core board layer, the copper sheet will be damaged during the subsequent thinning, deburring and grinding process, affecting the readability of the through-hole code on the core board layer. The present invention controls the coding times to 20 to 80 times, the laser focus to 0.2 mm to 1 mm, and the power of the laser coding equipment to 15w to 28w, so that the copper sheet on the core board layer and the core board do not delaminate, thereby solving the problem of copper sheet damage caused by bulging and ensuring the readability of the through-hole code.

[0038] Furthermore, in order to prevent the vertical copper plating from clogging the through hole code during subsequent layer building, when a dry film is formed on the building layer, the dry film is controlled to cover the through hole code to protect the through hole code and prevent the subsequent copper plating from clogging the through hole code.

[0039] The packaging substrate of the present invention is formed by adopting the above-mentioned packaging substrate preparation method, and also has the above-mentioned technical effects. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] Figure 1 is a flow chart of steps of a method for preparing a packaging substrate in an embodiment of the present invention;

[0041] Figure 2 A schematic diagram of a core plate layer is provided in an embodiment of the present invention;

[0042] Figure 3 It is a schematic diagram of a through hole code formed in the coding area of ​​the core board layer in an embodiment of the present invention;

[0043] Figure 4 It is a schematic diagram of a core board circuit layer formed in a functional area of ​​a core board layer in an embodiment of the present invention;

[0044] Figure 5 It is a schematic diagram of a core board circuit layer after laminating a build-up film on the core board layer functional area in an embodiment of the present invention;

[0045] Figure 6 It is a schematic diagram of forming a patterned dry film on the surface of the build-up film in an embodiment of the present invention;

[0046] Figure 7 It is a schematic diagram of a patterned dry film formed on the surface of the build-up film and the coding area in an embodiment of the present invention;

[0047] Figure 8 It is a schematic diagram of forming a circuit layer by electroplating copper on a patterned dry film in an embodiment of the present invention;

[0048] Fig. 9 is a schematic structural diagram of a packaging substrate after the dry film is removed in an embodiment of the present invention;

[0049] Fig.10 This is a photo of abnormal copper bulging in the coding area of ​​the package substrate;

[0050] Fig.11 This is a photo of the copper foil being damaged in the coding area of ​​the package substrate.

[0051] Fig.12 This is a photo of the coding area of ​​the package substrate in an embodiment of the present invention;

[0052] Fig.13 When forming a build-up film, the build-up film covers part of the coding area;

[0053] Fig.14 This is a photo of the coding area not covered by the build-up film when the build-up film is formed in an embodiment of the present invention;

[0054] Fig.15 This is a photo of the through hole code blockage in the coding area after the build-up layer is formed;

[0055] Fig.16 This is a photo of the through-hole code in the coding area not being blocked after the build-up layer is formed in the embodiment of the present invention;

[0056] Figure 17a-17h It is a data comparison chart of the copper thickness of the sample board (the build-up film is not offset) and the copper thickness of the test board whose build-up film is offset and does not cover the coding area in the embodiment of the present invention.

[0057] List of reference numerals:

[0058] 100 core layers

[0059] 110 Coding Area

[0060] 111 Through hole code

[0061] 120 Functional Area

[0062] 101 Core Board

[0063] 102, 102' core copper layer

[0064] 103, 103' core board circuit layer

[0065] 200, 200' Addition

[0066] 201, 201' build-up film

[0067] 202, 202' line layer

[0068] 300, 300' dry film DETAILED DESCRIPTION

[0069] The following specific embodiments illustrate the embodiments of the present invention, and those familiar with the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present application. It should be noted that the following embodiments and features in the embodiments can be combined with each other without conflict.

[0070] It should be noted that the diagrams provided in the embodiments of the present invention are only used to illustrate the basic concept of the present invention in a schematic manner. Although the diagrams only show the components related to the present invention rather than being drawn according to the number, shape and size of the components in actual implementation, the form, quantity and proportion of each component can be changed at will during actual implementation, and the layout of the components may also be more complex. The structures, proportions, sizes, etc. illustrated in the drawings of the specification are only used to match the contents disclosed in the specification for people familiar with this technology to understand and read, and are not used to limit the limiting conditions that can be implemented in this application, so they have no technical substantive significance. Any structural modification, change in proportional relationship or adjustment of size should still fall within the scope of the technical content disclosed in this application without affecting the effects and purposes that can be achieved by the present invention.

[0071] In order to ensure the traceability of information on each layer of the packaging substrate, improve the production efficiency of the packaging substrate, and reduce production costs, this embodiment provides a method for preparing a packaging substrate and a packaging substrate. The method for preparing the packaging substrate only forms a traceability code on the core layer, and the traceability code can be used from the core layer to the outermost layer of the added layer, so as to avoid the drawbacks of the "transcoding" process. Furthermore, this embodiment can realize the traceability of information on each process of the packaging substrate, and provide relevant basis for subsequent product traceability. At the same time, since the traceability code only needs to be formed once, the production efficiency is improved, and there is no need to perform a transcoding step during the preparation process, which avoids the increase in production costs caused by the purchase of transcoding equipment.

[0072] Example 1

[0073] This embodiment provides a method for preparing a packaging substrate. Figure 1 , the preparation method of the packaging substrate comprises:

[0074] S1: providing a core board layer, the core board layer comprising a core board, the core board comprising two surfaces arranged opposite to each other, both surfaces being provided with a core board copper layer, and the core board layer comprising a coding area and a functional area;

[0075] Specifically, refer to Figure 2 , providing a core board layer 100. The specific steps of obtaining the core board layer 100 are: cutting the material, cutting the substrate into a core board layer 100 of a preset size. The preset size here refers to cutting a large-sized substrate into a core board layer 100 that meets the PCB board. The selection of the preset size depends on application requirements and technical limitations.

[0076] The core board layer 100 includes a core board 101 and core board copper layers 102 and 102' formed on two surfaces of the core board 101. Figure 3The surface of the core board layer 100 also includes a coding area 110 and a functional area 120. The coding area 110 is used for subsequent coding to form a traceability code, and the functional area 120 is used to form build-up layers 200 and 200'. The build-up layers 200 and 200' contain circuit layers 202 and 202' with a conductive function. The traceability code can be a two-dimensional code composed of square dots or circular dots. The traceability code can be scanned and read to obtain information such as the production equipment model and production time of the packaging substrate.

[0077] S2: coding the coding area of ​​the core board layer to form a through-hole code, and the through-hole code runs through the core board layer;

[0078] Specifically, refer to Figure 3 , coding is performed on the coding area 110 of the core board layer 100 obtained in step S1 to form a through hole code 111. The through hole code 111 runs through the core board layer 100. The through hole code 111 is used as a traceability code of the package substrate to provide relevant basis for subsequent product traceability.

[0079] However, forming a through-hole code 111 in the coding area 110 of the core board layer 100 is likely to cause bulging of the core board copper layer 102, 102'. The bulging core board layer 100 is prone to damage or shedding of the copper skin of the core board copper layer 102, 102' in the subsequent copper thinning, deburring and grinding processes, affecting the readability of the through-hole code 111. This technical problem is difficult to overcome, which in turn limits the application of coding directly on the core board layer 100. After in-depth research by the inventor, it was found that the reason for the bulging of the through-hole code 111 is that a large amount of heat is generated when the through-hole code 111 is formed by laser engraving. Excessive heat can cause loosening between the copper skin and the core board 101, and the bonding force is reduced, resulting in bulging of the copper skin and bulging. This bulging phenomenon will cause the force of the medicine biting the copper skin to be greater than the bonding force between the copper skin and the substrate during the subsequent copper thinning, thereby causing the entire copper skin to fall off. When deburring, when the package substrate passes through the brush wheel, the force exerted by the brush wheel on the copper skin is greater than the bonding force between the copper skin and the substrate, and the entire copper skin falls off. When grinding the plate, the force exerted by the brush wheel on the copper skin is greater than the bonding force between the copper skin and the substrate, and the entire copper skin falls off.

[0080] Based on the above technical problems and in-depth exploration of the causes of the copper skin bulging phenomenon, the inventors have conducted in-depth and systematic research on the laser coding process and improved the laser coding process to avoid the copper skin bulging phenomenon during coding. The specific improvement plan is: during the coding process, the laser focus is controlled to 0.2mm~1mm, the power of the laser coding equipment is 15w~28w, and the number of coding times is controlled at 20 times~80 times. Due to the proper control of the laser focus and power, it can be ensured that the copper skin will not cause the bonding force between the core board 101 to decrease due to excess heat, resulting in copper skin bulging. At the same time, the number of coding times can ensure that the core board layer 100 can be punched through to form a through-hole code 111, and the heat will not accumulate excessively. In this embodiment, the speed of the laser coding equipment is controlled to 200mm / s~600mm / s and the frequency is 40kHz~80kHz at the same time to further avoid excess heat and improve the copper skin bulging phenomenon. After the above-mentioned laser coding process, the process parameters are in a balanced state between "no bulging on the code copper surface" and "the code through hole penetrates the board", and the copper skin of the coding area 110 of the core board layer 100 does not bulge. After subsequent processes such as copper thinning, deburring and grinding, the copper skin will not be damaged or fall off due to bulging, thereby ensuring the integrity and readability of the through-hole code 111 during the product production process.

[0081] In order to solve the bulging problem of DM through hole code 111 after cutting and coding, the cutting and coding parameters are optimized. While reducing the heat generated by the laser, it is also necessary to ensure that the DM through hole code 111 must penetrate the board to avoid the through hole not being punched. The parameters that play the main role are the number of coding times, power, and focus, so these three groups of parameters are mainly verified. Through repeated testing with different permutations and combinations, the parameters that meet the requirements can be verified, as shown in Table 1 below.

[0082] Table 1 Experimental parameters and results

[0083]

[0084]

[0085] Through testing, it was found that the three groups of parameters 20, 28 and 29 met the requirements, among which parameter 29 had the best production effect. The three groups of parameters were all within the range of the DM through hole code 111 cutting and coding process parameters in Example 1.

[0086] Through testing and verification, the three process parameters of coding times, power and focus are controlled within the range of 20 to 80 times, 15w to 28w, 60% to 100% power, and 0.2mm to 1mm focus. The process parameter range is in a balanced state between "no bulging on the code copper surface" and "the code through hole penetrates the plate", thus solving the problem of damage to the copper skin of DM through hole code 111 after thinning, deburring and grinding, and ensuring the integrity and readability of DM through hole code 111 during the product production process.

[0087] S3: patterning the core copper layer of the functional area to form core circuit layers on two surfaces of the core;

[0088] Specifically, refer to Figure 4 , the core copper layers 102 and 102' located in the functional area 120 are patterned, for example, a dry film (not shown in the figure) can be formed above the core copper layers 102 and 102', the dry film is patterned, and the core copper layers 102 and 102' are etched based on the patterned dry film. After the etching is completed, the dry film is removed to form the core circuit layers 103 and 103'.

[0089] S4: Laminating a build-up film on the surface of the core board circuit layer, controlling the build-up film to be formed in the functional area and away from the coding area;

[0090] Specifically, refer to Figure 5 , because after the through hole code 111 is laminated with the build-up films 201 and 201', it is easy to be partially covered by the build-up films 201 and 201'. After electroplating, the local part is easily plated with copper, making the through hole code 111 incomplete and affecting the readability of the code. By optimizing the lamination process, the build-up films 201 and 201' are offset in the opposite direction to the position of the through hole code 111, so that the build-up films 201 and 201' are far away from the through hole code 111, ensuring the integrity of the through hole code 111. In this embodiment, Figure 5 As shown, the build-up films 201, 201' are laminated on the surface of the core circuit layers 103, 103'. When laminating the build-up films 201, 201', it is necessary to control the build-up films 201, 201' to be formed only on the functional area 120, away from the coding area 110, so as to avoid the build-up films 201, 201' covering the coding area 110 and affecting the readability of the through-hole code 111. In addition, it has been found through testing that placing the build-up films 201, 201' away from the coding area 110 has little effect on the copper thickness subsequently formed on the entire package substrate. Optionally, the material of the build-up films 201, 201' can be polyimide, polypropylene, ABF or other dielectric materials.

[0091] In the present embodiment, the build-up films 201 and 201' are ABF films. During vacuum lamination, the DM through hole code 111 is partially covered by the ABF film after the DM through hole code 111 is laminated by ABF. After vertical electroplating, the partially covered with copper makes the DM through hole code 111 incomplete, thereby affecting the readability of the code. The ABF is controlled to shift in the opposite direction of the position of the DM through hole code 111, so that the ABF film is away from the DM through hole code 111, thereby ensuring the integrity of the DM through hole code 111. That is, the present embodiment optimizes the ABF lamination process, that is, shifts the ABF film in the opposite direction of the position of the DM through hole code 111, so that the ABF film is away from the DM through hole code 111, thereby ensuring the integrity of the DM through hole code 111.

[0092] Since the only possible impact of ABF film offset is to cause unqualified copper thickness, a test board is put into test and produced according to the sample process flow. The copper thickness of each layer (L1 layer, L2 layer, L3 layer, L4 layer, L7 layer, L8 layer, L9 layer, L10 layer) of the test board after "ABF film offset" is compared with the copper thickness data of the corresponding layers of the sample. The comparison data is as follows Figures 17a-17h By comparison, it is found that the difference between the copper thickness data of the test board and the sample board is ±1μm, that is, the "ABF film offset" measure does not affect the copper thickness, so this measure can be actually applied in product production to solve the problem that the DM through hole code 111 is covered by the ABF film, resulting in an incomplete DM through hole code 111 and thus affecting readability.

[0093] S5: forming a circuit layer on the build-up film, and the build-up film and the circuit layer form a build-up layer.

[0094] Specifically, refer to Fig. 9 , forming circuit layers 202, 202' on the build-up films 201, 201', and the build-up films 201, 201' and the circuit layers 202, 202' form a build-up layer 200, 200'. In this embodiment, when forming the circuit layers 202, 202', refer to Figure 6 Or 7, firstly, a dry film 300 is formed on the build-up films 201, 201', and the dry film 300 is patterned, referring to Figure 8 , copper is plated in the area not covered by the dry film 300 to form the circuit layers 202, 202'. Optionally, the dry film 300 is a photosensitive film for resist plating, and the dry film 300 can be patterned by exposure and development. Figure 7 When forming the circuit layers 202 and 202' of the build-up layers 200 and 200', it is necessary to control the dry film 300 to cover the coding area 110 to avoid the copper blocking the through hole code 111 during the copper plating process.

[0095] Optionally, refer to Fig. 9, the preparation method of the packaging substrate also includes continuing to form the next build-up layer 200, 200' on the build-up layer 200, 200'. Each time a build-up layer 200, 200' is formed, it is necessary to control the dry film 300 to cover the through-hole code 111 of the coding area 110 when the circuit layer 202, 202' is formed. After research, it was found that when the number of build-up layers 200, 200' is less than 12, due to the small number of electroplating times, not forming the dry film 300 in the coding area 110 will not cause copper plating to block the through-hole code 111. When the number of build-up layers 200, 200' is greater than or equal to 12, too many electroplating times will cause part of the through holes of the DM through-hole code to be completely filled with copper, thereby causing hole blockage. In order to improve production efficiency and save manufacturing costs, in this embodiment, refer to Figure 6 When the number of build-up layers 200, 200' is less than 12, the dry film 300 may not be formed in the coding area 110. Figure 7 When the build-up layers 200, 200' are greater than or equal to 12, when the dry film 300 is formed on the current and later build-up layer films 201, 201', the dry film 300 is controlled to cover the coding area 110 of the core board layer 100 to avoid the copper plating blocking the through hole code 111 on the coding area 110.

[0096] After patterning the dry film 300 and copper plating the patterned dry film 300 to form the circuit layers 202 and 202', a step of removing the dry film is also included. In this embodiment, a strong alkaline solution can be used to remove the dry film. The copper plating layer can also be thinned by a flash etching step.

[0097] When forming the last layer of build-up layer 200, 200' (i.e., the outermost layer of build-up layer 200, 200') on the package substrate, a solder mask (not shown in the figure) is also formed on the outermost circuit layer 202, 202' of the package substrate. The solder mask can prevent the copper surface of the non-welding area on the circuit layer 202, 202' from being exposed to the air, thereby preventing copper oxidation. Optionally, the solder mask is a photosensitive ink. Since some pads and solder joints (welding areas) on the circuit layers 202, 202' cannot be covered by ink and need to be exposed, in order to avoid oxidation of this part of the copper on the circuit layers 202, 202', nickel gold is also plated on the pads and solder joints (not shown in the figure). In this embodiment, while nickel-gold is plated on the circuit layers 202 and 202', nickel-gold is also plated on the coding area. Since the DM through-hole code has a watermark on its surface after passing through the water line and the baking plate in the previous process, resulting in uneven color, a layer of nickel-gold or gold is plated on the surface of the DM through-hole code through the nickel-gold process, so that the DM through-hole code can have a uniform color and better readability.

[0098] See also Figures 10 to 16 , the embodiments of the present invention are further described below in conjunction with the accompanying drawings.

[0099] like Fig.10 As shown, when using the cutting and marking machine to make DM through-hole codes, an abnormal "copper bulging" occurs.

[0100] like Fig.11 As shown in the figure, the abnormal "copper bulging" will cause the core board layer to become thinner, and the copper skin of the traceability code will be damaged during deburring and grinding, which will affect the reading of the traceability code.

[0101] like Fig.12 As shown, by debugging the laser coding process parameters in this embodiment, the processing parameters make the heat generated by the laser and the bonding force between the copper skin and the substrate at a balance point, thereby maintaining the stability of the copper skin after the traceability code laser processing and solving the problems of deburring the core board layer and copper skin wear after grinding.

[0102] like Fig.13 As shown, when the package substrate product undergoes ABF lamination, the traceability code will be covered by the ABF film. After vertical electroplating, the traceability code through-hole will be blocked, thereby affecting the integrity of the traceability code and further affecting the readability of the traceability code.

[0103] like Fig.14 As shown, the ABF film is moved in the opposite direction of the traceability code position to avoid the traceability code being covered by the ABF film.

[0104] like Fig.15 As shown in the figure, when the number of added layers of the package substrate product is greater than 12 layers, vertical continuous electroplating causes the traceability code through-hole to be blocked, thus affecting readability.

[0105] like Fig.16 As shown, by forming a dry film in the coding area, the traceability code position can "avoid copper" during vertical continuous electroplating to avoid "hole blocking" from occurring.

[0106] In summary, the FCBGA product is formed by the preparation method of the above-mentioned packaging substrate, which can realize full-process traceability. In addition, this method adopts a "one-code-to-the-end" solution, and only needs to perform a through-hole code once in the coding process after cutting, so that it can be used from the core board layer to the outermost layer. There is no need to "transcode" existing non-FCBGA products during the process ("transcoding" means that each time a layer is added, the traceability code information of the previous layer needs to be transferred to the current added layer). The through-hole code coding process is controlled after cutting, and coordinated with processes such as lamination and layer addition film, dry film and electroplating, so that the through-hole code is readable throughout the entire process. The through-hole code is coordinated with the production equipment of each process. The information of each board will be recorded by the equipment and bound with the production equipment model, production time and other information and uploaded to the server, providing relevant basis for subsequent product traceability.

[0107] Compared with the "transcoding" process of existing non-FCBGA products, the "one-code-to-the-end" process of the preparation method of the packaging substrate in this embodiment improves production efficiency and reduces economic costs while also having the traceability function.

[0108] Example 2

[0109] This embodiment provides a packaging substrate, which is formed by the packaging substrate preparation method in embodiment 1. Fig. 9 The package substrate includes a core board layer and at least one build-up layer 200. The core board layer includes a core board 101, and the core board 101 includes two surfaces arranged opposite to each other. Both surfaces of the core board 101 are provided with core board circuit layers 103 and 103'. The surface of the core board layer includes a coding area 110 and a functional area 120. A through-hole code 111 is formed on the coding area 110. The build-up layers 200 and 200' are arranged on the core board circuit layers 103 and 103'. The build-up layers 200 and 200' include build-up layer films 201 and 201' formed on the core board circuit layers 103 and 103' and circuit layers 202 and 202' formed on the build-up layer films 201 and 201'. The build-up layers 200 and 200' avoid the coding area 110 on the core board layer, so that the through-hole code 111 on the coding area 100 is readable.

[0110] The present invention is described in detail below by testing a packaging substrate formed by the method for preparing the packaging substrate of the present invention.

[0111] The quality of DM through-hole codes is mainly related to cutting and coding, copper thinning, deburring, horizontal electroplating, grinding, etching, ABF lamination, vertical electroplating, flash etching, and nickel-gold processes. Therefore, data collection during testing is mainly based on the conditions of DM through-hole codes after these processes. By collecting these data, a basis is provided for subsequent judgment of whether the quality of DM through-hole codes is qualified.

[0112] Specific data collection includes sampling plan, sampling location, measurement items, and measurement standards. The specific contents are shown in "Table 2 Data Collection Plan".

[0113] Table 2 Data collection plan

[0114]

[0115]

[0116] The sample size is directly related to "Table 3 Data Collection". Based on our purpose of judging whether the quality of DM through-hole codes is qualified, there is a principle in statistics that at least 25 data must be collected to conduct statistical research. Therefore, during the test process, we collected 30 data for each item of each test for research and judgment, as shown in Table 3 below.

[0117] Table 3 Data collection

[0118]

[0119] This test measures:

[0120] (1) After the board has gone through each process of cutting and coding, copper thinning, deburring, horizontal electroplating, grinding, etching, ABF lamination, vertical electroplating, flash etching, and nickel-gold, the DM through-hole code is collected and analyzed using tools such as three-dimensional measuring instruments, microscopes, and barcode scanners.

[0121] (2) Compare the test results with the measurement standard to determine whether they meet the standard.

[0122] (3) The measuring instruments, measuring items and measuring standards are shown in the following table.

[0123] Table 4 List of measuring instruments, measuring items and measuring standards

[0124]

[0125] The data analysis is as follows:

[0126] (1) Through data analysis, record the DM through hole code test results after the relevant processes in the embodiment of the present invention and make a result judgment. See "Table 5 Data Result Summary Table" for details.

[0127] (2) Analyze the time and economic cost savings brought about by the introduction of the FCBGA "one-code-to-end" process.

[0128] Table 5 Summary of process optimization results

[0129]

[0130]

[0131] It can be seen from Table 5 that the method in the embodiment of the present invention can achieve a one-code-through and ensure the readability of the code throughout the entire process. In addition, after the DM through-hole code is put into use in the product, it saves costs for the company, including production time cost and economic cost.

[0132] (1) In terms of time cost, the "one-code-through" process saves 14,400 seconds = 4 hours compared to the transcoding process. The more product layers and the more products there are, the more time is saved.

[0133] (2) In terms of economic cost, the "one-code-to-the-end" process can save the cost of one device compared to the transcoding process (the transcoding equipment in the SP factory costs RMB 1 million per device). The more equipment required for production capacity, the more economic cost can be saved.

[0134] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by a person of ordinary skill in the art without departing from the spirit and technical concept disclosed by the present invention shall still be covered by the claims of the present invention.

Claims

1. A method for preparing a packaging substrate, characterized in that: include: Providing a core board layer, the core board layer includes a core board, the core board includes two surfaces arranged opposite to each other, the two surfaces are both provided with a core board copper layer, and the core board layer includes a coding area and a functional area; Coding the coding area of ​​the core board layer to form a through-hole code, wherein the through-hole code runs through the core board layer; Patterning the core board copper layer of the functional area to form core board circuit layers on two surfaces of the core board respectively; Laminating a build-up film on the surface of the core board circuit layer, and controlling the build-up film to be formed in the functional area and away from the coding area; A circuit layer is formed on the build-up film, and the build-up film and the circuit layer form a build-up layer.

2. The method for preparing a packaging substrate according to claim 1, characterized in that The step of coding the coding area of ​​the core board layer to form a through-hole code includes: The coding area of ​​the core layer is coded by a laser coding process, the coding times are controlled to be 20 to 80 times, the laser focus is 0.2 mm to 1 mm, and the power of the laser coding equipment is controlled to be 15 w to 28 w.

3. The method for preparing a packaging substrate according to claim 2, characterized in that The step of coding the coding area of ​​the core board layer to form a through-hole code includes: The speed of the laser coding equipment is controlled to be 200mm / s~600mm / s, and the frequency is 40kHz~80kHz.

4. The method for preparing a packaging substrate according to claim 3, characterized in that After the coding area of ​​the core board layer is coded to form a through-hole code, the method further comprises: After forming the through-hole code, the core board layer is subjected to copper reduction, burr removal and board grinding.

5. The method for preparing a packaging substrate according to claim 1, characterized in that: The step of forming a circuit layer on the build-up film includes: forming a dry film on the build-up film; Patterning the dry film of the functional area; Copper is plated on the patterned dry film to form a circuit layer.

6. The method for preparing a packaging substrate according to claim 1, characterized in that: After forming a circuit layer on the build-up film, the method further includes: Continuing to form a next build-up layer on the build-up layer; When the number of the build-up layers is greater than or equal to 12, a dry film is formed on the build-up layer films currently formed and formed later, and the dry film is controlled to cover the coding area of ​​the core board layer; Patterning the dry film of the functional area; Copper is plated on the patterned dry film to form a circuit layer.

7. The method for preparing a packaging substrate according to claim 1, characterized in that: After forming a circuit layer on the build-up film, the method further includes: Continuing to form a next build-up layer on the build-up layer; After forming a circuit layer on the outermost build-up film, nickel-gold is plated on the welding area and the coding area of ​​the outermost circuit layer.

8. The method for preparing a packaging substrate according to claim 7, characterized in that: After forming a circuit layer on the outermost build-up film, and before plating nickel and gold on the welding area of ​​the outermost circuit layer and the coding area, the method further includes: A solder mask is formed on the non-soldering area of ​​the outermost circuit layer.

9. A packaging substrate, characterized in that: The packaging substrate comprises: A core board layer, wherein the core board layer comprises two surfaces arranged opposite to each other, both surfaces of the core board layer are provided with a core board circuit layer, the core board layer comprises a coding area and a functional area, and a through-hole code is formed on the coding area; At least one build-up layer is arranged on the core board circuit layer, the build-up layer includes a build-up layer film formed on the core board circuit layer and a circuit layer formed on the build-up layer film, the build-up layer avoids the coding area on the core board layer, and the through-hole code on the coding area is readable.

10. The packaging substrate according to claim 9, characterized in that: The packaging substrate is formed by the packaging substrate manufacturing method according to any one of claims 1 to 8.

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