Patterning method and wafer mask
By using bonding and lithography processing between silicon wafers and glass wafers, the weight, thermal expansion coefficient and deformation problems in OLED production are solved, and the lightweight, stability and accuracy are improved. They are suitable for MEMS, Mask layout patterning processing in technologies such as silicon-based OLED and microLED.
Patent Information
- Application Number
- CN202411411878.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-11
- Publication Date
- 2025-01-10
AI Technical Summary
FMM Mask has problems with low weight, low coefficient of thermal expansion and metal deformation during the manufacturing process in OLED production, which affects the stability and accuracy of the mask plate.
The silicon wafer is used as the mask plate. By temporarily bonding with the glass wafer, etching hole slots on its surface and lithography is performed, the patterning process is realized, which reduces the weight and thermal expansion coefficient of the mask plate and reduces the Deformation amount.
The mask plate is lightweight, low expansion coefficient and reduced deformation, which improves the stability and accuracy of the mask plate in OLED production, and can be used in technologies such as MEMS, silicon-based OLED and microLED, and integrates traditional processes. Steps to achieve graphic processing of multiple materials.
Smart Images
Figure CN119287313A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of microelectronics technology, and in particular, to a patterning method and a wafer mask. Background Art
[0002] The existing technology is FMM Mask technology, the full name of which is Fine Metal Mask. It is a fine metal mask that plays a vital role in the production process of OLED (organic light-emitting diode). In the evaporation process of OLED, FMMMask is an indispensable consumable core component.
[0003] The main function of FMM Mask is to deposit RGB organic substances onto the designated pixel area through the small holes on it during the OLED production process, forming three different pixels: red, green, and blue. The opening of FMM Mask directly determines the pixel height of the OLED display. The smaller the opening, the higher the pixel. At the same time, its precise alignment and deposition technology helps to improve the yield and resolution of the product.
[0004] Although FMM Mask plays an important role in OLED production, there are still some technical challenges in its manufacturing process, such as the requirements of low weight, low thermal expansion coefficient, and how to reduce the impact of metal deformation. Summary of the invention
[0005] The purpose of the present application is to provide a patterning method and a wafer mask, which uses a silicon wafer as a mask, reduces the weight and thermal expansion coefficient of the mask, and reduces the deformation of the mask.
[0006] Other features and advantages of the present application will become apparent from the following detailed description, or may be learned in part by the practice of the present application.
[0007] According to one aspect of an embodiment of the present application, a patterning method is provided, the method comprising: providing a silicon wafer and a first glass wafer, and temporarily bonding the first side of the silicon wafer to the first glass wafer; etching holes and grooves on the second side of the silicon wafer according to a preset pattern, the holes and grooves passing through both sides of the silicon wafer; providing a second glass wafer, temporarily bonding the second glass wafer to the second side of the silicon wafer, and releasing the bonding of the first side of the silicon wafer from the first glass wafer; temporarily bonding the first side of the silicon wafer to a device wafer to be patterned, and releasing the bonding of the second glass wafer from the second side of the silicon wafer; and patterning the device wafer through the holes and grooves of the silicon wafer.
[0008] In some embodiments, in the etching of holes and grooves on the second side of the silicon wafer according to a preset pattern, the method includes: coating a photoresist on the second side of the silicon wafer; exposing the photoresist using a mask having a preset pattern; developing the exposed portion of the photoresist; etching the second side of the silicon wafer according to the pattern after the development of the photoresist to obtain patterned holes and grooves that penetrate both sides of the silicon wafer; removing the photoresist, and cleaning the silicon wafer.
[0009] In some embodiments, before coating the photoresist on the second side of the silicon wafer, the method further includes: oxidizing the outer side of the silicon wafer to form silicon oxide.
[0010] In some embodiments, in the patterning process of the device wafer through the holes and grooves of the silicon wafer, the method includes: performing a deposition process on the second side of the silicon wafer; and debonding the first side of the silicon wafer from the device wafer to complete the patterning process of the device wafer.
[0011] In some embodiments, after the first side of the silicon wafer is debonded from the device wafer to complete the patterning process of the device wafer, the method further includes: cleaning the silicon wafer and reusing it.
[0012] In some embodiments, before etching holes and grooves on the second side of the silicon wafer according to a preset pattern, the method includes: coating a photoresist on the second side of the silicon wafer; exposing the photoresist using a mask having a marking position; developing the exposed portion of the photoresist; etching the second side of the silicon wafer according to the pattern after the photoresist is developed so that the silicon wafer is marked with a groove; removing the photoresist, and cleaning the silicon wafer.
[0013] In some embodiments, after temporarily bonding the first side of the silicon wafer to the first glass wafer, the method further includes: grinding and thinning the second side of the silicon wafer, and stopping the grinding and thinning when the silicon wafer is ground and thinned to a preset thickness.
[0014] In some embodiments, the cross-section of the hole is tapered.
[0015] In some embodiments, the temporary bonding is performed using a temporary bonding glue.
[0016] According to one aspect of an embodiment of the present application, a wafer mask is provided, and the wafer mask is prepared by the method as described above.
[0017] Compared with the prior art, the technical solution of the present application has the following significant beneficial effects: the present application adopts silicon wafer as the mask, which reduces the weight and thermal expansion coefficient of the mask, and reduces the deformation of the mask. The present application aims to solve the mask used in 12-inch and smaller MEMS, silicon-based OLED, microLED and other technologies. The purpose of patterning of unique materials can be achieved by integrating the traditional (a. thin film deposition; b. glue coating; c. photolithography machine exposure; d. development; e. etching; f. degumming; g. wet cleaning) af processes into a one-step process. It can be used for a. metal thin film patterning; b. organic material patterning; c. semiconductor compounds such as inorganic non-metals; d. metal compounds and other materials.
[0018] It should be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present application. BRIEF DESCRIPTION OF THE DRAWINGS
[0019] The above and other features and advantages of the present application will become more apparent by describing in detail exemplary embodiments thereof with reference to the attached drawings.
[0020] Figure 1 A schematic diagram of the first stage of the process of the graphical method according to an embodiment of the present application is shown;
[0021] Figure 2 A schematic diagram of the second stage process of the graphical method according to an embodiment of the present application is shown;
[0022] Figure 3 The third stage flow diagram of the patterning method according to one embodiment of the present application is shown. The reference numerals are as follows: 1. silicon wafer; 2. first glass wafer; 3. silicon oxide; 4. second glass wafer; 5. device wafer. DETAILED DESCRIPTION
[0023] Example embodiments will now be described more fully with reference to the accompanying drawings. However, example embodiments can be implemented in a variety of forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that this application will be more comprehensive and complete and fully convey the concept of the example embodiments to those skilled in the art.
[0024] In addition, described feature, structure or characteristic can be combined in one or more embodiments in any suitable manner. In the following description, many specific details are provided to provide a full understanding of the embodiments of the present application. However, those skilled in the art will appreciate that the technical scheme of the present application can be put into practice without one or more of the specific details, or other methods, components, devices, steps, etc. can be adopted. In other cases, known methods, devices, realizations or operations are not shown or described in detail to avoid blurring the various aspects of the application.
[0025] The block diagrams shown in the accompanying drawings are merely functional entities and do not necessarily correspond to physically independent entities. That is, these functional entities may be implemented in software form, or in one or more hardware modules or integrated circuits, or in different networks and / or processor devices and / or microcontroller devices.
[0026] The flowcharts shown in the accompanying drawings are only exemplary and do not necessarily include all the contents and operations / steps, nor must they be executed in the order described. For example, some operations / steps can be decomposed, and some operations / steps can be combined or partially combined, so the actual execution order may change according to actual conditions.
[0027] The technical solution of the embodiment of the present application is briefly described below:
[0028] According to some embodiments, Figures 1 to 3 As shown, the present application provides a graphical method, the method comprising:
[0029] Step 100, such as Figure 1 As shown in step a in FIG. 1 , a silicon wafer 1 and a first glass wafer 2 are provided, and a first side (bottom) of the silicon wafer 1 is temporarily bonded to a top of the first glass wafer 2 .
[0030] Step 200, such as Figure 2 As shown, holes are etched on the second side (top) of the silicon wafer 1 according to a preset pattern, and the holes run through both sides of the silicon wafer 1. The preset pattern can be set according to actual needs.
[0031] Step 300, such as Figure 3 As shown in steps j to k, a second glass wafer 4 is provided, the bottom of the second glass wafer 4 is temporarily bonded to the second side (top) of the silicon wafer 1, and the first side (bottom) of the silicon wafer 1 is released from the top of the first glass wafer 2.
[0032] Step 400, such as Figure 3As shown in steps 1 to m, the first side (bottom) of the silicon wafer 1 is temporarily bonded to the device wafer 5 to be patterned, and the bottom of the second glass wafer 4 is released from the second side (top) of the silicon wafer 1.
[0033] Step 500, such as Figure 3 As shown in step n to step o in the process, the device wafer 5 is patterned through the holes of the silicon wafer 1. In some embodiments, PAD is deposited on the device wafer 5 through the holes of the silicon wafer 1 to electrically connect electronic components.
[0034] The present application adopts the silicon wafer 1 as the mask, which reduces the weight and thermal expansion coefficient of the mask, and reduces the deformation of the mask.
[0035] In order to make those skilled in the art better understand the present application, Figure 1 The details of this application are explained in detail.
[0036] According to some embodiments, in step 200, a hole groove is etched in the second side (top) of the silicon wafer 1 according to a preset pattern, and the method specifically includes:
[0037] Step 210, such as Figure 2 As shown in step g in FIG. 1 , photoresist is coated on the second side (top) of the silicon wafer 1 .
[0038] Step 220, using a mask having a preset pattern to expose the photoresist.
[0039] Step 230, such as Figure 2 As shown in step g in FIG. 1 , the exposed portion of the photoresist is developed.
[0040] Step 240, such as Figure 2 As shown in step h, the second side (top) of the silicon wafer 1 is etched according to the pattern after the photoresist is developed to obtain patterned holes and grooves that penetrate both sides of the silicon wafer 1.
[0041] Step 250, such as Figure 2 As shown in step i, the photoresist is removed and the silicon wafer 1 is wet cleaned.
[0042] The size, shape and position of the hole groove can be changed according to actual needs.
[0043] According to some embodiments, in step 210, before photoresist is coated on the second side (top) of the silicon wafer 1, the method may further include:
[0044] Step 209, as Figure 2 As shown in step f, the outer side of the silicon wafer 1 is oxidized to form silicon oxide 3 as a protective film of the wafer, and then the process proceeds to step 210 to step 250.
[0045] According to some embodiments, in step 500, in patterning the device wafer 5 through the holes and grooves of the silicon wafer 1, the method specifically includes:
[0046] Step 501, such as Figure 3 As shown in step m to step n in FIG. 1 , required materials are deposited on the second side (top) of the silicon wafer 1 .
[0047] Step 502, such as Figure 3 As shown in step o in FIG. 1 , the first side (bottom) of the silicon wafer 1 is debonded from the device wafer 5 to complete the patterning process of the device wafer 5 .
[0048] In some embodiments, PAD is deposited on the device wafer 5 through the vias of the silicon wafer 1 to electrically connect electronic components.
[0049] According to some embodiments, after the first side (bottom) of the silicon wafer 1 is debonded from the device wafer 5 in step 502 to complete the patterning process of the device wafer 5, the method further includes:
[0050] Step 503, wet-cleaning the silicon wafer 1 to obtain a wafer mask, which can be reused.
[0051] The present application adopts the silicon wafer 1 as the mask, which reduces the weight and thermal expansion coefficient of the mask, and reduces the deformation of the mask.
[0052] According to some embodiments, in step 200, before etching holes and grooves on the second side (top) of the silicon wafer 1 according to a preset pattern, the method further includes:
[0053] Step 191, as Figure 1 As shown in step b in FIG. 1 , photoresist is coated on the second side (top) of the silicon wafer 1 .
[0054] Step 192, using a mask with marked positions to expose the photoresist.
[0055] Step 193, as Figure 1 As shown in step c in the figure, the exposed portion of the photoresist is developed.
[0056] Step 194, as Figure 1 As shown in step d in the figure, the second side (top) of the silicon wafer 1 is etched according to the pattern after the photoresist is developed, so that the silicon wafer 1 has a groove mark.
[0057] Step 195, as Figure 1 As shown in step e, the photoresist is removed and the silicon wafer 1 is wet cleaned.
[0058] According to some embodiments, after temporarily bonding the first side (bottom) of the silicon wafer 1 to the top of the first glass wafer 2 at step 100, the method further comprises:
[0059] Step 110, such as Figure 1 As shown in step a to step b, the second side (top) of the silicon wafer 1 is ground and thinned. When the silicon wafer 1 is ground and thinned to a preset thickness, the grinding and thinning is stopped, and then step 191 is entered to coat the second side (top) of the silicon wafer 1 with photoresist. The preset thickness can be set according to actual needs.
[0060] According to some embodiments, Figures 2 to 3 As shown, the cross section of the hole groove is an inverted cone.
[0061] According to some embodiments, the first side (bottom) of the silicon wafer 1 is bonded to the top of the first glass wafer 2 using a temporary bonding adhesive.
[0062] According to some embodiments, the present application provides a wafer mask, which is prepared using the method described above.
[0063] The present application adopts silicon wafer 1 as a mask, which reduces the weight and thermal expansion coefficient of the mask, as well as the deformation of the mask. The present application aims to solve the mask used in 12-inch and smaller MEMS, silicon-based OLED, microLED and other technologies. The purpose of patterning of unique materials can be achieved by integrating the traditional (a. thin film deposition; b. glue coating; c. photolithography machine exposure; d. development; e. etching; f. degumming; g. wet cleaning) af processes into a one-step process. It can be used for a. metal thin film patterning; b. organic material patterning; c. semiconductor compounds such as inorganic non-metals; d. metal compounds and other materials.
[0064] Those skilled in the art will readily appreciate other embodiments of the present application after considering the specification and practicing the embodiments disclosed herein. The present application is intended to cover any variations, uses or adaptations of the present application, which follow the general principles of the present application and include common knowledge or customary technical means in the art that are not disclosed in the present application.
[0065] It should be understood that the present application is not limited to the precise structures that have been described above and shown in the drawings, and that various modifications and changes may be made without departing from the scope thereof. The scope of the present application is limited only by the appended claims.
Claims
1. A graphical method, characterized in that: The method comprises: Providing a silicon wafer and a first glass wafer, and temporarily bonding a first side of the silicon wafer to the first glass wafer; Etching holes and grooves on the second side of the silicon wafer according to a preset pattern, wherein the holes and grooves penetrate through both sides of the silicon wafer; Providing a second glass wafer, temporarily bonding the second glass wafer to the second side of the silicon wafer, and debonding the first side of the silicon wafer from the first glass wafer; Temporarily bonding the first side of the silicon wafer to the device wafer to be patterned, and debonding the second glass wafer from the second side of the silicon wafer; The device wafer is patterned through the holes and grooves of the silicon wafer.
2. The method according to claim 1, characterized in that In etching a hole groove in the second side of the silicon wafer according to a preset pattern, the method comprises: coating a photoresist on a second side of the silicon wafer; Expose the photoresist using a mask having a preset pattern; developing the exposed portion of the photoresist; Etching the second side of the silicon wafer according to the pattern after the photoresist is developed to obtain patterned holes and grooves penetrating both sides of the silicon wafer; The photoresist is removed and the silicon wafer is cleaned.
3. The method according to claim 2, characterized in that Before coating the second side of the silicon wafer with photoresist, the method further comprises: The outer side of the silicon wafer is oxidized to form silicon oxide.
4. The method according to claim 1, characterized in that: In the process of patterning the device wafer through the holes and grooves of the silicon wafer, the method comprises: Performing a deposition process on the second side of the silicon wafer; The first side of the silicon wafer is debonded from the device wafer to complete the patterning process of the device wafer.
5. The method according to claim 4, characterized in that After the first side of the silicon wafer is debonded from the device wafer to complete the patterning process of the device wafer, the method further includes: The silicon wafer is cleaned and reused.
6. The method according to claim 1, characterized in that Before etching the holes and grooves on the second side of the silicon wafer according to the preset pattern, the method includes: coating a photoresist on a second side of the silicon wafer; Expose the photoresist using a mask having a marking position; developing the exposed portion of the photoresist; Etching the second side of the silicon wafer according to the pattern after the photoresist is developed, so that the silicon wafer is marked with a groove; The photoresist is removed and the silicon wafer is cleaned.
7. The method according to claim 6, characterized in that After temporarily bonding the first side of the silicon wafer to the first glass wafer, the method further includes: The second side of the silicon wafer is ground and thinned, and when the silicon wafer is ground and thinned to a preset thickness, the grinding and thinning is stopped.
8. The method according to claim 1, characterized in that The cross section of the hole groove is tapered.
9. The method according to claim 1, characterized in that: The temporary bonding is performed using temporary bonding glue.
10. A wafer mask, characterized in that: The wafer mask is prepared by the method according to any one of claims 1 to 9.