Semiconductor device forming method and semiconductor device

Abstract

The invention provides a method for forming a semiconductor device, which comprises the following steps of: before a grid electrode is formed, etching a semiconductor substrate, forming semiconductor island-shaped structures in array distribution, mutually connecting at least part of the semiconductor island-shaped structures through a cantilever connecting region, forming a hole control region at a first groove between the semiconductor island-shaped structures, therefore, defects generated by a subsequent epitaxial process are reduced. According to the invention, dislocation between the photodiodes can be avoided in the technological process of the cantilever connection structure, the quality of a single crystal semiconductor growing at the cantilever connection structure is good, defects are few, and the quality requirement for arranging a floating diffusion region is met. Meanwhile, the risk that thin columns remain at the bottom of the cantilever due to incomplete lateral etching is avoided, and the position where holes are formed in the epitaxial layer is controlled, so that the influence of defects on photoelectric secondary light is avoided. According to the scheme, the process steps are simple, and the high-performance image sensor with high full well electron capacity, low dark current and low crosstalk can be formed.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a semiconductor device forming method and a semiconductor device. Background Art

[0002] CMOS image sensors are simple to operate, and their signal processing circuits are integrated into a single chip, which is small in size. In addition, CMOS image sensors have relatively low power consumption and low cost, so they are widely used. With the increasing demand, higher requirements are placed on the performance of CMOS image sensors. Ideally, CMOS image sensors should have lower dark current and smaller crosstalk while having higher full well capacity.

[0003] In the existing process, there is a solution that uses N-type doped substrates to form discrete photodiodes by etching and secondary epitaxial growth. In this solution, the photodiode forming mask is specially designed, and its main feature is that the oblique connection between the semiconductor island structures is retained, and the bottom of the interconnection position is hollowed out by isotropic etching in the etching process to form a cantilever connection structure, so as to avoid the problem of crystal orientation. <111> The defects caused by the crystal holes in the subsequent epitaxial growth are affected. At the same time, the scheme uses photolithography and lateral etching to self-align to form a complete and uniform N-type semiconductor columnar structure, and then epitaxially grows a high-concentration P-type epitaxial layer as a pinning layer, and continues to grow a gate oxide layer outside the P-type epitaxial layer, and then fills the polycrystalline semiconductor to complete the production of the entire photodiode. This process scheme has certain requirements for the accuracy of the mask, and the scheme itself is more targeted at image sensors with small-sized photodiode units, and its process cost is relatively high; for image sensors with larger-sized photodiode units, although lower-precision masks can be used to save costs, such accuracy will cause problems such as difficulty in engraving through to form a cantilever connection structure and leaving a thinner columnar structure, thereby affecting the overall process manufacturing and the performance of the image sensor. Moreover, for image sensors with large-sized photodiode units, the filling of polysilicon on the side will also face the problem of being unable to fill solidly. Summary of the invention

[0004] The object of the present invention is to provide a method for forming a semiconductor device, comprising: Before the gate is formed, the semiconductor substrate is etched to form an array of semiconductor island structures. At least some of the semiconductor island structures are interconnected through cantilever connection areas, and a hole control area is formed at the first groove between the semiconductor island structures to reduce defects caused by subsequent epitaxial processes.

[0005] Furthermore, the cantilever beam connection area includes at least three cantilever beam connection structures with uniform line width, and the edge position of at least one cantilever beam connection structure does not exceed the line connecting the end points of the same side of other cantilever beam connection structures.

[0006] Furthermore, after forming the semiconductor island structure and the cantilever beam connection area, the method further includes: Forming a first dielectric layer on the surface of the semiconductor island structure, wherein the first dielectric layer has a doping element having a doping type opposite to that of the semiconductor substrate; Through an annealing process, the doping elements in the first dielectric layer are infiltrated into the semiconductor substrate to form a lateral PN junction structure; The first dielectric layer is filled with polycrystalline semiconductor material to form a polycrystalline semiconductor layer.

[0007] Furthermore, a line width of the hole control region is greater than a line width of the first groove.

[0008] Furthermore, after forming the polycrystalline semiconductor layer, the method further comprises: Etching back the polycrystalline semiconductor layer to below the surface of the semiconductor substrate; forming a second dielectric layer on the surface of the polycrystalline semiconductor layer; An epitaxial layer is formed on the surface of the semiconductor substrate through an epitaxial process, and holes are caused to appear in the hole control region by controlling the epitaxial conditions. The epitaxial layer forms a device layer.

[0009] Furthermore, the hole control region is arranged in a region other than a preset position of the functional transistor on the first trench without affecting the first trench.

[0010] Furthermore, the hole control area is arranged in a grounding area of ​​the first groove.

[0011] Further, the etching of the semiconductor substrate comprises: According to a preset mask pattern, etching the semiconductor substrate to form a second trench; forming a third dielectric layer on the surface of the second trench; Etching the third dielectric layer and the semiconductor substrate at the bottom of the second trench to form a third trench; The semiconductor substrate at the bottom of the third dielectric layer is etched by lateral etching to form the cantilever beam connection region.

[0012] The present invention also provides a semiconductor device, which is formed by using the semiconductor device forming method as described above.

[0013] Furthermore, the semiconductor device is an image sensor, and the semiconductor island structure is used to form a photosensitive area of ​​a pixel unit.

[0014] Through the above scheme, the present invention proposes a method for forming an image sensor, which can avoid the formation of dislocations between photodiodes in the process flow of the cantilever connection structure. The quality of the single crystal semiconductor grown at the cantilever connection structure is also good, with fewer defects, meeting the quality requirements for setting a floating diffusion area. At the same time, further, the design of the three cantilever connection structures with uniform line widths in this scheme can well avoid the risk of residual fine columns at the bottom of the cantilever caused by incomplete lateral etching, and it is not easy to form defects when filling polycrystalline semiconductors. In addition, in the mask formed by the photodiode, some areas with larger sizes are designed, which can well control the position of the holes formed in the epitaxial layer, thereby avoiding the influence of its defects on the photoelectric secondary light. The scheme of the present invention has simple process steps and can form a high-performance image sensor with high full well electron capacity, low dark current and low crosstalk. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Other features, objects and advantages of the present invention will become more apparent from the following detailed description of non-limiting embodiments with reference to the accompanying drawings.

[0016] Figure 1 is a cross-sectional schematic diagram of a method for forming a semiconductor device in one embodiment of the present invention; Figure 2~Figure 7 Schematic diagrams of different cross sections during a method for forming a semiconductor device in one embodiment of the present invention.

[0017] In the drawings, the same or similar reference numerals denote the same or similar devices (modules) or steps throughout different drawings. Implementation

[0018] The object of the present invention is to provide a method for forming a semiconductor device, comprising: Before the gate is formed, the semiconductor substrate 100 is etched to form an array of semiconductor island structures 110, at least some of which are connected to each other through the cantilever connection area 120, and a hole control area 131 is formed at the first trench 130 between the semiconductor island structures 110. Figure 1 As shown, defects generated in the subsequent epitaxial process can be reduced.

[0019] In a preferred embodiment, Figure 1 As shown, the cantilever beam connection area 120 includes at least three cantilever beam connection structures 121 with uniform line width, and the edge position of at least one cantilever beam connection structure 121 does not exceed the line connecting the end points of the same side of other cantilever beam connection structures 121. That is, in this embodiment, the three cantilever beam connection structures 121 form a "U"-shaped arrangement to avoid the residual thin column at the bottom of the cantilever beam caused by incomplete lateral etching, and it is not easy to form defects when filling polycrystalline semiconductors in subsequent processes.

[0020] In addition, preferably, the line width of the hole control region 131 is greater than the line width of the first groove 130. Figure 1 As shown, the holes generated due to process reasons during epitaxy are controlled to appear in the hole control area 131, which is easy to control and process, thereby avoiding the influence of this defect on the performance of the photodiode.

[0021] Preferably, the hole control region 131 is disposed in a region other than a preset position of a functional transistor on the first trench 130 that does not affect the first trench 130. For example, the hole control region 131 may be disposed in a grounding region of the first trench 130.

[0022] In an optional embodiment, the semiconductor substrate 100 may be etched to form the cantilever beam connection region 120 by the following steps: Step S11: etching the semiconductor substrate 100 according to a preset mask pattern 200 to form a second trench 150; Step S12: forming a third dielectric layer 151 on the surface of the second trench 150, such as Figure 2 As shown; Step S13: etching the third dielectric layer 151 and the semiconductor substrate 100 at the bottom of the second trench 150 to form a third trench 160. Figure 3 As shown; Step S14: etching the semiconductor substrate 100 at the bottom of the third dielectric layer 151 by lateral etching to form the cantilever beam connection region 120, such as Figure 4 shown.

[0023] On this basis, after forming the semiconductor island structure 110 and the cantilever beam connection area 120, the following steps may be further taken: Step S21: forming a first dielectric layer 111 on the surface of the semiconductor island structure 110, wherein the first dielectric layer 111 has a doping element having a doping type opposite to that of the semiconductor substrate 100, such as Figure 5 As shown; Step S22: through an annealing process, the doping elements in the first dielectric layer 111 penetrate into the semiconductor substrate 100 to form a lateral PN junction structure; Step S23: Fill the first dielectric layer 111 with polycrystalline semiconductor material to form a polycrystalline semiconductor layer 112. Figure 6 shown.

[0024] In an optional implementation, after the polycrystalline semiconductor layer 112 is formed in step S23, the following steps may be further performed: Step S24: etching back the polycrystalline semiconductor layer 112 to below the surface of the semiconductor substrate 100; Step S25: forming a second dielectric layer 140 on the surface of the polycrystalline semiconductor layer 112; Step S26: forming an epitaxial layer 300 on the surface of the semiconductor substrate 100 by epitaxial process, and making a hole 310 appear in the hole control area 131 by controlling the epitaxial conditions, and the epitaxial layer 300 forms a device layer, such as Figure 7 shown.

[0025] The present invention also provides a semiconductor device, which is formed by using the semiconductor device forming method as described above.

[0026] Furthermore, the semiconductor device is an image sensor, and the semiconductor island structure is used to form a photosensitive area of ​​a pixel unit.

[0027] It will be apparent to those skilled in the art that the invention is not limited to the details of the exemplary embodiments described above and that the invention can be implemented in other specific forms without departing from the spirit or essential features of the invention. Therefore, in any case, the embodiments should be considered exemplary and non-restrictive. In addition, it is clear that the term "comprising" does not exclude other elements and steps, and the wording "a" does not exclude the plural. Multiple elements stated in a device claim may also be implemented by one element. The terms first, second, etc. are used to indicate names and do not indicate any particular order.

Claims

1. A method for forming a semiconductor device, characterized in that: include: Before the gate is formed, the semiconductor substrate is etched to form an array of semiconductor island structures. At least some of the semiconductor island structures are interconnected through cantilever connection areas, and a hole control area is formed at the first groove between the semiconductor island structures to reduce defects caused by subsequent epitaxial processes.

2. The method for forming a semiconductor device according to claim 1, wherein: The cantilever beam connection area includes at least three cantilever beam connection structures with uniform line width, and the edge position of at least one cantilever beam connection structure does not exceed the line connecting the end points of the same side of other cantilever beam connection structures.

3. The method for forming a semiconductor device according to claim 1, wherein: After forming the semiconductor island structure and the cantilever beam connection area, the method further includes: Forming a first dielectric layer on the surface of the semiconductor island structure, wherein the first dielectric layer has a doping element having a doping type opposite to that of the semiconductor substrate; Through an annealing process, the doping elements in the first dielectric layer are infiltrated into the semiconductor substrate to form a lateral PN junction structure; The first dielectric layer is filled with polycrystalline semiconductor material to form a polycrystalline semiconductor layer.

4. The method for forming a semiconductor device according to claim 1, wherein: The line width of the hole control region is greater than the line width of the first trench.

5. The method for forming a semiconductor device according to claim 3, wherein: After forming the polycrystalline semiconductor layer, the method further comprises: Etching back the polycrystalline semiconductor layer to below the surface of the semiconductor substrate; forming a second dielectric layer on the surface of the polycrystalline semiconductor layer; An epitaxial layer is formed on the surface of the semiconductor substrate through an epitaxial process, and holes are caused to appear in the hole control region by controlling the epitaxial conditions. The epitaxial layer forms a device layer.

6. The method for forming a semiconductor device according to claim 1, wherein: The hole control region is arranged in a region other than a preset position of the functional transistor on the first trench without affecting the first trench.

7. The method for forming a semiconductor device according to claim 6, wherein: The hole control area is disposed in a grounding area of ​​the first groove.

8. The method for forming a semiconductor device according to claim 1, wherein: The etching of the semiconductor substrate comprises: According to a preset mask pattern, etching the semiconductor substrate to form a second trench; forming a third dielectric layer on the surface of the second trench; Etching the third dielectric layer and the semiconductor substrate at the bottom of the second trench to form a third trench; The semiconductor substrate at the bottom of the third dielectric layer is etched by lateral etching to form the cantilever beam connection region.

9. A semiconductor device, characterized in that: The semiconductor device is formed by the semiconductor device forming method as described in claims 1 to 8.

10. The semiconductor device according to claim 9, wherein: The semiconductor device is an image sensor, and the semiconductor island structure is used to form a photosensitive area of ​​a pixel unit.

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