High-speed data acquisition, storage and playback device

Abstract

The invention relates to a high-speed data acquisition, storage and playback device. The device comprises a high-speed AD module; a storage module; a high-speed DA module; the computer is provided with a central processing unit; wherein the high-speed AD module is in communication connection with the storage module, the storage module is in communication connection with the computer, and the storage module is in communication connection with the high-speed DA module; wherein the first FPGA is configured to directly control data interaction between the first high-speed communication interface and the storage module and analog-digital signal conversion of the high-speed AD converter in a mode of bypassing the central processing unit; the second FPGA is configured to directly control the access to the DDR cache and the data interaction between the disk array and the second and third high-speed communication interfaces and the network interface in a manner of bypassing the central processing unit; and the third FPGA is configured to directly control data interaction between the fourth high-speed communication interface and the storage module and digital-analog signal conversion of the high-speed DA converter in a manner of bypassing the central processing unit.

Description

Technical Field

[0001] The invention relates to the field of high-speed data acquisition, storage and data playback devices. Background Art

[0002] In the field of data acquisition, storage and playback, high-speed data acquisition, storage and playback devices are important equipment. It can collect and store high-speed data and play it back when needed. This device is widely used, especially in applications that require high-speed data processing and high-precision data storage, such as data center servers, etc., as well as other applications that require high-performance computing, storage and network services. In these occasions, the importance of high-speed data acquisition, storage and playback devices is particularly prominent. High-speed data acquisition, storage and playback device solutions usually consist of high-speed AD modules, storage modules, high-speed DA modules and computers. The high-speed AD module is used to collect high-speed data and send the data to the storage module for storage. The storage module is used to store high-speed data and send the data to the high-speed DA module for playback when needed. The high-speed DA module is used to convert the digital signal in the storage module into an analog signal for playback. The computer is used to control the operation of the entire device and can communicate with external devices through a network interface.

[0003] CN202410030844.4 discloses a high-speed SATA storage system, including: a processor module, a flash memory module, an FPGA module, a storage array module, a first memory module and a second memory module. The advantage is that the function of the file system is realized by running the operating system through the processor, and files and disks can be managed conveniently. The disadvantage is that the storage and reading instructions need to be sent through the processor, and the real-time performance is poor. The data transmission bandwidth of the SATA interface is limited and cannot meet higher bandwidth requirements.

[0004] CN202311767864.1 discloses a high-speed data storage and transmission method based on ZYNQ, including ZYNQ, SSD and DDR storage and steps. Its advantages are: the disk with NVME interface can meet the requirements of higher-speed data storage bandwidth. The disadvantages are: the real-time performance of ZYNQ still cannot meet the requirements of higher-demand scenarios; the data export rate is slow.

[0005] However, existing high-speed data acquisition, storage and playback devices have some problems in practical applications. First, the data access and interaction of existing devices usually rely on computer control, which not only increases the complexity of the system, but also limits the portability and flexibility of the device. Secondly, the existing devices are not ideal in terms of data transmission speed and stability, data storage capacity, and cannot meet the application requirements of some high-speed data processing and high-precision data storage. In addition, the existing devices also have problems in the accuracy of data playback and the stability of transmission speed, and cannot guarantee the integrity and accuracy of the data. Therefore, the existing high-speed data acquisition, storage and playback devices have many problems in practical applications, and the industry needs to further improve and optimize the high-speed data acquisition, storage and playback devices.

[0006] The information included in this background section of the present specification, including any references cited herein and any description or discussion thereof, is included for technical reference purposes only and is not to be construed as subject matter that will limit the scope of the present invention. Summary of the invention

[0007] The present invention is proposed in view of the above and other concepts.

[0008] The existing technology can realize high-speed data storage, but in the case of high-speed data acquisition, high bandwidth and higher real-time performance are required. Traditional high-speed storage devices generally use network interfaces for data transmission, which cannot meet the requirements of converting the stored data into analog signals through high-speed digital-to-analog converters. In particular, in the existing technology, high-speed storage devices generally use the average speed over a long time range as a design indicator. However, the urgent requirement of high-speed AD / DA conversion for data storage and reading is that in addition to requiring a high data rate, the data transmission rate must also be stable, that is, the data rate fluctuation must be as small as possible.

[0009] According to one aspect of the present invention, a high-speed data acquisition, storage and playback device is provided, comprising: a high-speed AD module, which comprises: a high-speed AD converter, a first FPGA and a first high-speed communication interface; a storage module, which comprises: a second FPGA; a DDR cache; a disk array for storing data; a second high-speed communication interface; a third high-speed communication interface; and a network interface, wherein the second FPGA in the storage module is configured to be connected to the DDR cache, the second FPGA is connected to the disk array, the second FPGA is connected to the second high-speed communication interface, the third high-speed communication interface and the network interface and are configured to directly control their data transmission, and the DDR cache is configured for buffer storage of high-speed data; a high-speed DA module, which comprises: a fourth high-speed communication interface, a third FPGA and a high-speed DA converter; a computer, which is configured with a central processing unit ; wherein the high-speed AD module is communicatively connected with the storage module, the storage module is communicatively connected with the computer, and the storage module is communicatively connected with the high-speed DA module; wherein the first FPGA is configured to directly control, in a manner bypassing the central processing unit: data interaction between the first high-speed communication interface and the storage module; and analog-to-digital signal conversion of the high-speed AD converter; wherein the second FPGA is configured to directly control, in a manner bypassing the central processing unit: access to the DDR cache; data interaction between the disk array and the second high-speed communication interface, the third high-speed communication interface and the network interface; wherein the third FPGA is configured to directly control, in a manner bypassing the central processing unit: data interaction between the fourth high-speed communication interface and the storage module; and digital-to-analog signal conversion of the high-speed DA converter.

[0010] According to one embodiment, control software is installed on the computer, and the control software is used to generate control instructions for transmission via the network interface of the computer, and the network interface of the computer is directly connected to the network interface of the storage module.

[0011] According to one embodiment, the control software is configured to send data acquisition storage instructions to the storage module, and the storage module is configured to send the data acquisition instructions to the high-speed AD module accordingly, whereby the high-speed AD module starts data acquisition and performs analog-to-digital signal conversion, and the storage module starts storing corresponding data.

[0012] According to one embodiment, the control software is configured to send data read playback instructions to the storage module, and the storage module is configured to send data read playback instructions to the high-speed DA module accordingly, whereby the storage module starts to store the corresponding data, and the high-speed DA module starts to perform digital-to-analog signal conversion to perform data read playback.

[0013] According to an embodiment, the DDR cache is a single-group DDR or a multi-group DDR.

[0014] According to an embodiment, the disk array may be constructed by disks with SATA interfaces or disks with NVME interfaces.

[0015] According to one embodiment, the first high-speed communication interface, the second high-speed communication interface, the third high-speed communication interface and the fourth high-speed communication interface are selected from any one of the following items: optical fiber interface, network twisted pair interface and printed circuit board high-speed differential signal; the high-speed AD converter adopts a parallel LVCMOS interface, a parallel LVDS interface or a JESD204B serial interface; and the high-speed DA converter adopts a parallel LVCMOS interface, a parallel LVDS interface or a JESD204B serial interface.

[0016] According to one embodiment, the average jitter of the high-speed data acquisition, storage and playback device is less than 1 millisecond.

[0017] According to one embodiment, the total delay of the high-speed data acquisition, storage and playback device when operating is in the range of 0.2-0.3 milliseconds.

[0018] According to one embodiment, the high-speed data acquisition, storage and playback device is a high-speed data acquisition, storage and playback device suitable for a data center, such as an Internet Data Center (IDC).

[0019] Compared with the prior art, the present invention can solve one or more of the following main technical problems and thereby achieve corresponding technical effects:

[0020] 1) Improve the actual data transmission rate and minimize the rate fluctuation, reduce the system complexity, and improve the portability and flexibility of the device: Existing high-speed data acquisition, storage and playback devices usually rely on computers for control, which not only increases the complexity of the system, but also limits the portability and flexibility of the device. This technical solution realizes autonomous control and high-speed data transmission of the device by setting FPGA and high-speed communication interface in the high-speed AD module, setting FPGA, DDR cache, disk array, high-speed communication interface A, high-speed communication interface B, network interface in the storage module, and setting FPGA and high-speed DA converter in the high-speed DA module, thereby achieving a high actual data transmission rate and the smallest possible rate fluctuation, and making it possible to reduce system complexity and improve the portability and flexibility of the device.

[0021] 2) Improve data transmission speed and data storage capacity: Existing high-speed data acquisition, storage and playback devices have limitations in data transmission speed and data storage capacity, and cannot meet some application requirements of high-speed data processing and high-precision data storage. This technical solution uses optical fiber interface, network twisted pair interface, or printed circuit board high-speed differential signal as a high-speed communication interface, and uses a single group of DDR or multiple groups of DDR as DDR cache, and builds a disk array through a SATA interface disk or an NVME interface disk, so as to achieve high-speed data transmission and high-precision data storage, thereby improving data transmission speed and data storage capacity.

[0022] 3) Improve the accuracy and stability of data playback: Existing high-speed data acquisition, storage and playback devices have problems with the accuracy and stability of data playback and cannot guarantee the integrity and accuracy of data. This technical solution achieves high-precision conversion of digital signals to analog signals by setting FPGA and high-speed DA converter in the high-speed DA module, thereby improving the accuracy and stability of data playback and ensuring the integrity and accuracy of data.

[0023] More embodiments of the present invention can also achieve other advantageous technical effects that are not listed one by one. These other technical effects may be partially described below and are predictable and understandable to those skilled in the art after reading the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] The above-mentioned features and advantages and other features and advantages of these embodiments and the manner in which they are achieved will become more apparent and embodiments of the present invention may be better understood by referring to the following description taken in conjunction with the accompanying drawings.

[0025] Figure 1 It is a schematic block diagram of the main configuration and signal transmission / processing logic of the high-speed data acquisition, storage and playback device according to the first embodiment of the present invention.

[0026] Figure 2 It is available for Figure 1 The schematic block diagram shows the main configuration of the high-speed AD module of the high-speed data acquisition, storage and playback device.

[0027] Figure 3 It is available for Figure 1 The schematic block diagram shows the main configuration of the storage module of the high-speed data acquisition, storage and playback device.

[0028] Figure 4 It is available for Figure 1 The schematic block diagram shows the main configuration of the high-speed DA module of the high-speed data acquisition, storage and playback device.

[0029] Figure 5 yes Figure 1 A schematic flow chart of data acquisition and storage of the high-speed data acquisition, storage and playback device shown.

[0030] Figure 6 yes Figure 1 A schematic flow chart of the reading and playback of the high-speed data acquisition, storage and playback device shown. DETAILED DESCRIPTION

[0031] In the following description of the drawings and specific embodiments, the details of one or more embodiments of the present invention will be described. Other features, objects and advantages of the present invention can be clearly seen from these descriptions, drawings and claims.

[0032] It should be understood that the illustrated and described embodiments are not limited in application to the details of the construction and arrangement of the components set forth in the following description or illustrated in the accompanying drawings. The illustrated embodiments may be other embodiments and may be implemented or executed in various ways. Each example is provided by explaining the disclosed embodiments rather than limiting them. In fact, it will be apparent to those skilled in the art that various modifications and variations may be made to the embodiments of the present invention without departing from the scope or essence of the present invention. For example, a feature illustrated or described as part of one embodiment may be used together with another embodiment to still produce another embodiment. Therefore, the present invention discloses such modifications and variations that fall within the scope of the appended claims and their equivalent elements.

[0033] Likewise, it is understood that the phrases and terms used herein are for descriptive purposes and should not be considered restrictive. The use of "include," "comprise," or "have" and variations thereof herein is intended to be open-ended to include the items listed thereafter and their equivalents and additional items.

[0034] In the present invention, unless otherwise clearly specified and limited, the terms "installed", "connected", "connected" and the like should be understood in a broad sense, for example, they can be directly connected or indirectly connected through an intermediate medium. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0035] The present invention is further described and illustrated in detail below in conjunction with the accompanying drawings and specific embodiments.

[0036] Figure 1 1 is a schematic block diagram of the main configuration and signal transmission / processing logic of the high-speed data acquisition, storage and playback device according to the first embodiment of the present invention. Figure 1As shown, a high-speed data acquisition, storage and playback device according to an embodiment of the present invention is shown, which may include a high-speed AD module, a storage module, a high-speed DA module, a computer and control software. A communication connection may be provided between the high-speed AD module and the storage module, and the connection method may be an optical fiber, a network cable, etc., or a high-speed differential signal of a printed circuit board. A connection may be provided between the storage module and the computer, and the connection method may be a network interface, an optical fiber, a serial port, etc. A connection may be provided between the storage module and the high-speed DA module, and the connection method may be an optical fiber, a network cable, etc., or a high-speed differential signal of a printed circuit board.

[0037] Figure 2 It is available for Figure 1 The schematic block diagram of the main configuration of the high-speed AD module of the high-speed data acquisition, storage and playback device is shown in FIG. Figure 2 As shown, the high-speed AD module may include a high-speed AD converter, an FPGA, and a high-speed communication interface. The high-speed AD module is configured to control the working state of the high-speed AD converter, convert the format of the data of the high-speed AD converter, and send the data to the storage module through the high-speed communication interface. For example, the high-speed AD converter may use a parallel LVCMOS or LVDS interface, or a JESD204B serial interface as a high-speed communication interface.

[0038] Figure 3 It is available for Figure 1 The schematic block diagram of the main configuration of the storage module of the high-speed data acquisition, storage and playback device is shown in FIG. Figure 3 As shown, the storage module may be provided with an FPGA, a DDR cache, a disk array, a high-speed communication interface A, a high-speed communication interface B, and a network interface. The FPGA in the storage module may be connected to the DDR cache, the FPGA may be connected to the disk array, the FPGA may be connected to the high-speed communication interface A, the FPGA may be connected to the high-speed communication interface B, and the FPGA may be connected to the network interface. The FPGA may be directly used to control the data transmission of each interface. The DDR cache may be used for buffer storage of high-speed data. The disk array may be used to store data. The network interface may be used to provide a network connection to the computer for transmitting control instructions or data.

[0039] In the present invention, the technical route of mounting FPGA to DDR memory (Double Data Rate SDRAM, i.e., double rate SDRAM) is mainly to access the contents in DDR memory directly (i.e., bypassing the computer CPU) through FPGA to achieve more efficient and high-speed access. In a preferred technical solution of the present invention, the high-speed AD module, high-speed DA module, DDR memory and NVME hard disk are all mounted on the FPGA, and the transmission protocol is simplified and optimized to achieve higher speed, low latency and more stable access. In contrast, the existing technical solutions are mainly designed for general occasions, and their interface design is often mainly for the convenience of computer read and write access (which is the opposite of the above-mentioned concept of the present invention-bypassing the computer CPU-), providing FTP, HTTP and other protocols with better compatibility with computers. In essence, compared with more general high-speed storage devices, the high-speed storage device of the present invention is particularly suitable for specific use scenarios, such as data centers, especially Internet data centers (IDCs), so it can achieve lower latency and ensure a more stable high-speed transmission rate to provide more efficient, high-speed and more stable access.

[0040] According to an example, the DDR cache may use a single group of DDR or multiple groups of DDR.

[0041] According to an example, a disk array may be constructed using disks with a SATA interface or disks with an NVME interface.

[0042] Figure 4 It is available for Figure 1 The schematic block diagram of the main configuration of the high-speed DA module of the high-speed data acquisition, storage and playback device is shown in FIG. Figure 4 As shown. The high-speed DA module may be provided with a high-speed communication interface, an FPGA, and a high-speed DA converter. The high-speed DA module may be used to receive data read out from the storage module, and may convert the digital signal into an analog signal through a high-speed DA converter. The FPGA may be used to control the working state of the high-speed communication interface and the high-speed DA converter. The high-speed communication interface may be used to connect the storage module to achieve high-speed data transmission. For example, the high-speed DA converter may adopt a parallel LVCMOS or LVDS interface, or may adopt a JESD204B serial interface.

[0043] Control software may be installed on the computer, and the control software may be used to generate control instructions. The control instructions may be transmitted through a network interface of the computer, and the network interface of the computer may be directly connected to a network interface of the storage module.

[0044] Figure 5 yes Figure 1Schematic flow chart of data acquisition and storage of high-speed data acquisition, storage and playback device. Figure 5 As shown, for example, the control software sends a data acquisition storage instruction, the storage module receives the instruction, the storage module sends a data acquisition instruction to the high-speed AD module, the high-speed AD module works, and the storage module stores the data, so that the data storage is completed.

[0045] Figure 6 yes Figure 1 A schematic flow chart of the reading and playback of the high-speed data acquisition, storage and playback device shown in FIG. Figure 6 As shown, for example, the control software sends a data read playback instruction, the storage module receives the instruction, the storage module sends an instruction to the high-speed DA module, the storage module stores the data, and the high-speed DA module works, so that the data reading is completed.

[0046] According to an exemplary but not restrictive embodiment of the present invention, the high-speed data acquisition, storage and playback device provided by the embodiment is specifically implemented as follows.

[0047] Step 1: Set up FPGA and high-speed communication interface in the high-speed AD module. The FPGA uses the XC7K325T model of Xilinx, and the high-speed communication interface uses an optical fiber interface with a transmission rate of up to 10Gbps.

[0048] Step 2: Set up FPGA, DDR cache, disk array, high-speed communication interface A, high-speed communication interface B, and network interface in the storage module. FPGA uses the XC7K325T model of Xilinx, an example of DDR cache can be Samsung's K4A8G084PCBB-HC16 model, with a capacity of 8GB, the disk array is connected to 4 Western Digital's WD10EZEX model hard disks through a SATA interface, each hard disk has a capacity of 1TB, high-speed communication interface A and high-speed communication interface B both use optical fiber interfaces, with a transmission rate of up to 10Gbps, and the network interface uses a Gigabit Ethernet interface.

[0049] Step 3: Set up FPGA and high-speed DA converter in the high-speed DA module. The FPGA can be Xilinx's XC7K325T model, and the high-speed DA converter can be ADI's AD9768 model, with a sampling rate of up to 200MSPS.

[0050] Step 4: Install control software on the computer. The control software is written in LabVIEW programming language and is used to generate control instructions. The control instructions are transmitted through the computer's network interface, and the computer's network interface is directly connected to the network interface of the storage module.

[0051] Step 5: The control software sends a data acquisition and storage instruction, the storage module receives the instruction, the storage module sends a data acquisition instruction to the high-speed AD module, the high-speed AD module works, and the storage module stores the data.

[0052] Step 6: The storage module transmits the stored data to the high-speed DA module through the high-speed communication interface A. The high-speed DA module receives the data and converts the digital signal into an analog signal through a high-speed DA converter, and finally transmits it to the computer through the high-speed communication interface B for data playback.

[0053] The above is a specific description and implementation steps of this embodiment. Through this embodiment, high rate stability, low latency, high-speed data acquisition, storage and playback can be achieved, and the system complexity is reduced, the portability and flexibility of the device are improved, and the data transmission speed and data storage capacity are also improved, ensuring the accuracy and stability of data playback, and ensuring the integrity and accuracy of the data.

[0054] The technical effects that can be achieved by the present invention include but are not limited to those listed below.

[0055] In the existing technology, the mainstream latency level of NVME memory in the industry is: read latency can be as low as 1-10 microseconds. Write latency can also be as low as 1-10 microseconds. However, in practice, these values ​​are not the total latency from issuing instructions to receiving data. In fact, the latency level is also affected by the time the operating system processes instructions and the length of the data transmission and reception path. The actual latency will be around hundreds of milliseconds, or even longer.

[0056] In contrast, the present invention optimizes the cache path by: (1) adding DDR cache; (3) minimizing the impact of CPU on delay through software and hardware collaborative DMA (e.g., through FPGA, direct memory access) solution, for example, directly controlling the memory and each interface data interaction (including direct data transmission) through FPGA, directly accessing the content in DDR memory through FPGA (i.e., bypassing the computer CPU) to achieve more efficient and high-speed access. For example, in a preferred embodiment of the present invention, by mounting the high-speed AD module, high-speed DA module, DDR memory and NVME hard disk on FPGA, the access to them is directly controlled through FPGA to achieve higher speed, lower latency and more stable access; (3) optimizing the transmission delay by streamlining the network protocol. The present invention can reduce the total delay to 200-300 microseconds (i.e., 0.2-0.3 milliseconds) or even shorter through the above technical means combined with relevant configurations, which is a huge improvement compared to the delay level of the prior art, showing an order of magnitude delay reduction.

[0057] According to the present invention, FPGA can be used as the main controller, and the analog-to-digital, digital-to-analog conversion process and data storage and reading process can be operated with lower latency, so as to realize high-speed, low-latency data acquisition and playback. In this case, according to the solution of the present invention, the data reading process can be completely realized by FPGA, and with the addition of DDR cache, the stability of high-speed rate in high-speed reading scenario can be realized, and the stored data can be conveniently transferred to the high-speed DA module to realize the conversion of digital signal to analog signal.

[0058] According to an embodiment of the high-speed data acquisition, storage and playback device of the present invention, FPGA is used to directly control the data interaction between the disk and each interface, avoiding the storage and reading delay caused by the use of CPU. Among the main technical indicators (i.e., the stability of speed) used in the industry to evaluate data acquisition, storage and playback devices, the existing mainstream data transmission jitter in the industry is about 10ms to 50ms. In comparison, the average jitter of an embodiment of the high-speed data acquisition, storage and playback device of the present invention can reach a level of less than 1ms.

[0059] Compared with the existing technology, the data acquisition, storage and playback device according to the present invention no longer relies on a computer for control, but controls the data transmission of each interface through the FPGA in the storage module, which not only simplifies the complexity of the system, but also improves the portability and flexibility of the device.

[0060] According to the technical solution of the present invention, the data transmission speed and data storage capacity are significantly improved. The connection between the high-speed AD module and the storage module can be achieved by high-speed connection methods such as optical fiber, and the storage module is provided with multiple groups of DDR cache and disk arrays. These measures greatly improve the data transmission speed and data storage capacity, and meet the application requirements of high-speed data processing and high-precision data storage.

[0061] According to the present invention, the accuracy and stability of data playback are significantly improved. The connection between the high-speed DA module and the storage module can be a high-speed connection method such as optical fiber, and a plurality of high-speed DA converters are provided in the high-speed DA module. These measures greatly improve the accuracy and stability of data playback and ensure the integrity and accuracy of the data.

[0062] The data acquisition, storage and playback device according to the present invention can have higher scalability and adaptability. The connections between its various modules are all standard interfaces, which can be replaced and upgraded according to actual needs, which makes the technical solution have higher scalability and adaptability.

[0063] The data acquisition, storage and playback device according to the present invention can have lower power consumption and higher reliability. The modules are connected by low-power consumption methods such as high-speed differential signals, and low-power consumption design is also adopted inside each module, which greatly reduces the power consumption of the device and improves its reliability.

[0064] The basic concept of the present invention is described above in conjunction with the embodiments, but the above embodiments are only non-limiting descriptions of exemplary embodiments of the present invention. It will be understood by those skilled in the art that the present invention is not limited to the specific embodiments described herein, and that various obvious changes, readjustments, recombinations, mutual combinations and substitutions of technical features are possible for those skilled in the art without departing from the scope of protection of the present invention. The scope of the present invention is determined by the scope of the appended claims.

Claims

1. A high-speed data acquisition, storage and playback device, characterized in that: The high-speed data acquisition, storage and playback device comprises: A high-speed AD module, comprising: a high-speed AD converter, a first FPGA and a first high-speed communication interface; A storage module, comprising: a second FPGA; a DDR cache; a disk array for storing data; a second high-speed communication interface; a third high-speed communication interface; and a network interface, wherein the second FPGA in the storage module is configured to be connected to the DDR cache, the second FPGA is connected to the disk array, the second FPGA is connected to the second high-speed communication interface, the third high-speed communication interface and the network interface and configured to directly control their data transmission, and the DDR cache is configured for buffer storage of high-speed data; a high-speed DA module, comprising: a fourth high-speed communication interface, a third FPGA, and a high-speed DA converter; and A computer having a central processing unit; The high-speed AD module is communicatively connected to the storage module, the storage module is communicatively connected to the computer, and the storage module is communicatively connected to the high-speed DA module; Wherein, the first FPGA is configured to directly control: data interaction between the first high-speed communication interface and the storage module; and analog-to-digital signal conversion of the high-speed AD converter in a manner bypassing the central processor; The second FPGA is configured to directly control, in a manner bypassing the central processor: access to the DDR cache; data interaction between the disk array and the second high-speed communication interface, the third high-speed communication interface, and the network interface; and The third FPGA is configured to directly control, in a manner bypassing the central processing unit: data interaction between the fourth high-speed communication interface and the storage module; and digital-to-analog signal conversion of the high-speed DA converter.

2. The high-speed data acquisition, storage and playback device according to claim 1, characterized in that: Control software is installed on the computer, and the control software is used to generate control instructions for transmission via the network interface of the computer. The network interface of the computer is directly connected to the network interface of the storage module.

3. The high-speed data acquisition, storage and playback device according to claim 1 or 2, characterized in that: The control software is configured to send data acquisition and storage instructions to the storage module, and the storage module is configured to send the data acquisition instructions to the high-speed AD module accordingly, whereby the high-speed AD module starts data acquisition and performs analog-to-digital signal conversion, and the storage module starts storing corresponding data.

4. The high-speed data acquisition, storage and playback device according to claim 1 or 2, characterized in that: The control software is configured to send data read playback instructions to the storage module, and the storage module is configured to send data read playback instructions to the high-speed DA module accordingly, whereby the storage module starts to store the corresponding data, and the high-speed DA module starts to perform digital-to-analog signal conversion for data read playback.

5. The high-speed data acquisition, storage and playback device according to claim 1 or 2, characterized in that: The DDR cache is a single-group DDR or multiple-group DDR.

6. The high-speed data acquisition, storage and playback device according to claim 1 or 2, characterized in that: The disk array can be constructed by using disks with SATA interfaces or disks with NVME interfaces.

7. The high-speed data acquisition, storage and playback device according to claim 1 or 2, characterized in that: The first high-speed communication interface, the second high-speed communication interface, the third high-speed communication interface and the fourth high-speed communication interface are selected from any one of the following items: an optical fiber interface, a network twisted pair interface and a printed circuit board high-speed differential signal; and The high-speed AD converter adopts a parallel LVCMOS interface, a parallel LVDS interface or a JESD204B serial interface; and the high-speed DA converter adopts a parallel LVCMOS interface, a parallel LVDS interface or a JESD204B serial interface.

8. The high-speed data acquisition, storage and playback device according to claim 1 or 2, characterized in that: The average jitter of the high-speed data acquisition, storage and playback device is less than 1 millisecond.

9. The high-speed data acquisition, storage and playback device according to claim 1 or 2, characterized in that: The total delay of the high-speed data acquisition, storage and playback device when working is in the range of 0.2-0.3 milliseconds.

10. The high-speed data acquisition, storage and playback device according to claim 1 or 2, characterized in that: The high-speed data acquisition, storage and playback device is a high-speed data acquisition, storage and playback device suitable for a data center.

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