Fast processing method for FFT (Fast Fourier Transform) with ultra-large points

By segmenting and segmenting FFT calculation of super-large point data, optimizing input rearrangement and cardinal decomposition, the problems of high computational complexity and high memory consumption in the existing technology are solved, and efficient computing and memory management are achieved.

CN119415814AActive Publication Date: 2025-02-11GUANGZHOU XINHUA TECHNICAL SERVICE CO LTD
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Patent Information

Application Number
CN202411463447.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-10-21
Publication Date
2025-02-11
Estimated Expiration
2044-10-21

AI Technical Summary

Technical Problem

When processing ultra-large point FFT calculations, the prior art has high computational complexity, high memory consumption, data transmission and synchronization problems in distributed systems or parallel computing environments, and hardware architecture limitations lead to a decrease in computing speed.

Method used

By segmenting the data of millions of points, implementing FFT in segments, optimizing input reordering, cardinal decomposition and recursive calculations, the final result merges significantly improves the calculation efficiency and reduces memory consumption.

Benefits of technology

It realizes the realization of significantly reducing memory consumption while ensuring computing speed, which is suitable for practical applications of large-scale data processing, and improves algorithm complexity and computing efficiency.

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Abstract

The invention discloses an ultra-large point FFT (Fast Fourier Transform) fast processing method, which relates to the field of digital signal fast processing and comprises the following steps of: firstly, carrying out zero padding operation on original sampling signal data until the total length of a sequence meets integral multiples of M1 points; the method comprises the following steps of: performing zero padding operation on an input super-large point sequence, segmenting the data after the zero padding operation, segmenting the input super-large point sequence into L subsequences with the length of M1 points, performing FFT (Fast Fourier Transform) calculation with the point number of M1 points on the subsequences, and performing iterative calculation by adopting a high-radix FFT algorithm architecture; and finally, a specific twiddle factor is multiplied by the FFT calculation result of the sub-sequence to realize phase correction of the FFT result, the sub-FFT results after phase correction are combined and spliced according to a specific weighting mode, the component of each frequency point is ensured to be correctly adjusted, and the FFT result of the original data sequence is obtained. According to the method, the algorithm complexity can be reduced, and meanwhile, the calculation efficiency of the super-large point FFT is improved.
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Description

Technical Field

[0001] The present invention relates to the field of wireless communication technology, and in particular to a very large point number FFT fast processing method, which can be used in applications such as millimeter wave / terahertz high-speed communication, radar detection, and signal processing. Background Art

[0002] FFT (Fast Fourier Transform) is a high-efficiency algorithm for calculating discrete Fourier transform (DFT) and its inverse transform. It is widely used in signal processing, image processing, communication systems, spectrum analysis and other fields. The Cooley-Tukey Fast Fourier Transform algorithm (Cooley-Tukey algorithm) is the most common Fast Fourier Transform algorithm, which reduces the computational complexity from O(N 2 ) is reduced to O(NlogN), which significantly improves the computational efficiency.

[0003] With the advent of the big data era and the increasing application demands, processing signals with extremely large numbers of points is becoming more and more common. In order to meet the needs of high-resolution frequency domain information analysis in applications such as millimeter wave / terahertz high-speed communication, radar detection, and signal processing, fast processing of large-point FFT calculations can meet the real-time requirements of information systems. However, when processing ultra-large-point FFT calculations, traditional FFT algorithms face the following challenges: 1) High computational complexity. Although FFT reduces the computational complexity to O(NlogN), the amount of calculation is still huge for signals with millions or even billions of points, and traditional algorithms show obvious shortcomings in computing time; 2) Ultra-large-point FFT calculations require a large amount of memory, especially in high-resolution signal processing and large-scale data analysis. Memory consumption becomes a key bottleneck, and traditional FFT implementations are difficult to run efficiently under limited memory resources; 3) In distributed systems or parallel computing environments, ultra-large-point FFT calculations require frequent data transmission and synchronization issues, which further increases the complexity of the system and the inefficiency of the calculation; 4) In terms of hardware limitations, the existing hardware architecture may encounter problems such as insufficient cache and data bus bandwidth limitations when processing ultra-large-point FFT calculations, resulting in a significant drop in computing speed.

[0004] In order to cope with the above challenges, researchers have proposed various improvements and optimization methods. For example, using a decomposition algorithm with a higher radix (such as Radix-4, Radix-8, etc.) to reduce the recursive depth; improving memory access efficiency through data rearrangement and storage optimization; optimizing data transmission and synchronization through task decomposition and scheduling strategies in a parallel computing environment. In terms of radix selection, the algorithm architecture that can currently achieve the highest Radix-32FFT is selected. The Radix-32FFT algorithm is used to perform 4 parallel 1024-point MSC FFT hardware architectures to achieve a data throughput of up to 1.32GS / s. The architecture attempts to use in-memory computing (IMC) technology to eliminate the need for dedicated reordering schemes, while enabling ultra-high throughput and low-latency FFT calculations. In the design scheme of using Radix-4 for frequency domain segmentation, the researchers cleverly designed the address transformation of the data sequence for each level of butterfly transformation, and obtained the FFT results in natural order without the need for code bit inversion sorting. After hardware simulation, the scheme took a total of 40.96μs at a 200MHz clock, and the remaining small amount of time was consumed by butterfly operation multiplication and addition.

[0005] However, existing optimization methods still have limitations, especially when dealing with FFT calculations with very large points, it is still difficult to balance computational efficiency and memory consumption. Therefore, there is an urgent need for a new and efficient FFT calculation method with very large points, which can significantly reduce memory consumption while ensuring computational speed and can adapt to the characteristics of modern hardware architecture. Summary of the invention

[0006] The purpose of the present invention is to overcome the shortcomings of the prior art and propose a new ultra-large point FFT calculation method, which significantly improves the calculation efficiency and reduces memory consumption by segmenting data of millions of points, realizing FFT in segments, optimizing input rearrangement, radix decomposition and recursive calculation, and merging the final results, so as to be suitable for practical applications of large-scale data processing.

[0007] In order to achieve the above object, the technical solution specifically adopted by the present invention is as follows:

[0008] A fast processing method for a very large number of points FFT comprises the following steps:

[0009] S1. Perform zero padding on the original sampled signal data until the total length of the sequence satisfies M. 1 Integer multiples of points;

[0010] S2, performing data segmentation on the sampled signal data after the zero-padding operation to obtain data segments;

[0011] S3, count the number of points of the obtained data segment as M 1 Point FFT calculation;

[0012] S4, allocating memory space to store intermediate results;

[0013] S5, for each segment of M 1 The point FFT calculation result is multiplied by the corresponding rotation factor for phase correction;

[0014] S6. Based on the result processed in step S5, the segmented frequency spectra are merged to obtain the total result after the frequency spectrum calculation.

[0015] In general, the algorithm formula of a very large point number FFT fast processing method of the present invention is as follows:

[0016]

[0017] in,

[0018] The above formula is M 1 Point DFT calculation formula, the present invention uses n and k in DFT calculation as n 1 、n 2 , k 1 and k 2 Represented as can be decomposed into the multiplication of multiple rotation factors, and the single-stage summation calculation can also be decomposed into a two-stage summation calculation. 1 and k 1 As time domain and frequency domain variables respectively, since n 1 , k 1 =0,1,2,…,M 1 , the number of input data points to be processed is L×M 1 The original digital signal is expressed in M 1 The number is considered as a group, so there are L groups M 1 Point DFT calculation; the calculation result after calculating the first layer FFT needs to be Multiply, this rotation factor corresponds to the rotation factor of the intermediate stage of the butterfly calculation. This step uses the rotation factor generation module to calculate the result generated by the previous step in real time to ensure the uninterrupted serial flow of data in the hardware.

[0019] Furthermore, in step S1, it is first determined whether the length of the input sampling signal data is M 1 If the condition is met, step S2 is performed. If the condition is not met, the sampling signal sequence of the input system is padded with zeros until the length of the new sequence is M. 1 An integer multiple of a point.

[0020] Furthermore, in step S2, the data signal sequence from step S1 is first received, and the data signal sequence is represented as L×M 1 , specifically: x={x[0],x[1],x[2],...,x[L×M 1 -1]}, split the input signal x into L segments, each segment is of length M 1 , define each segment as x i , then:

[0021] x i ={x[i],x[i+L],x[i+2L],...,x[i+(M 1 -1)L]}i=0,1,...,L-1;

[0022] After data segmentation, the length of each subsequence is M 1 .

[0023] Furthermore, in step S3, L arrays are created to store the rotation factors corresponding to each data segment, and then for each segment M 1 The data sequence of the points is subjected to FFT calculation. The most reasonable high-radix FFT algorithm architecture is selected during FFT calculation. If the high-radix algorithm architecture with a radix of R is used in this step, M 1 The point FFT will be divided into multiple stages of calculation, and M 1 / R times R-point butterfly DFT calculation.

[0024] Design M 1 The point FFT core calculation module decomposes and recursively calculates the sequence after reverse order. First, the module input M 1 The point subsequence is preprocessed, including the reverse order of the R-base bits to adapt to the radix decomposition, and then decomposition and recursive calculation are performed to decompose the input sequence according to the predetermined radix. The present invention uses the Radix-R FFT algorithm to decompose the input sequence into M 1 / R subsequences of R points are obtained, and FFT calculation is performed on each subsequence. The calculation can be performed recursively until the length of the decomposed subsequence reaches a predetermined basic length (R points).

[0025] In the specific implementation, M is carried out according to the following formula 1 Point FFT calculation:

[0026]

[0027] The large number of cumulative multiplication and accumulation calculations in the formula require highly parallel calculations in the hardware implementation process. This parallel calculation process is based on actual requirements and is selected to be suitable for M 1The optimal base for calculating the FFT of the point sequence is different. The degree of parallelism required in the calculation process varies according to the base. If the optimal base is R, then M 1 The point is R to the Kth power, and the sub-module is designed using K-level Radix-R butterfly computing units.

[0028] Furthermore, in step S4, the data segment is processed by M 1 Create a new memory space to store the intermediate results of the FFT calculation of the number of points.

[0029] Furthermore, in step S5, the intermediate rotation factor is calculated according to the number of L segments. Then multiply it with the FFT intermediate result calculated in step S4, and the expression of the new sequence is as follows:

[0030]

[0031] Furthermore, in step S6, the sub-FFT results after phase correction are used as intermediate results, and an iterative multiplication and addition of the base L FFT is performed according to the number of segments L of the original data, and finally a complete high-precision spectrum sequence is obtained. Based on this, a segmented FFT result merging module is designed, according to the formula X 1 ′(k 1 ,n 1 ) to do Radix-LFFT calculation, according to the above formula, L×M 1 Point data continues M 1 L-point FFT calculations are performed, and the number of points for each FFT calculation is L points. This calculation process only requires one stage of iteration to complete the final result calculation.

[0032] In summary, the present invention processes large-scale data sequences (the scale of the data processed by the present invention is generally greater than M 1 Points) are padded with zeros and then divided into multiple 1 The subsequences of points are counted, smaller-scale FFT operations are performed on these subsequences respectively, and then the complete FFT results of the original large-scale data are reconstructed through an innovative merging algorithm.

[0033] Compared with the prior art, the present invention has the following beneficial effects: through experimental verification, compared with the traditional FFT method, the present method can achieve significant performance improvement, and in the context of requiring ultra-large point FFT calculations, it reduces the algorithm complexity and computational efficiency of high-precision spectrum calculations. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] Other features, objects and advantages of the present invention will become more apparent from the detailed description of non-limiting embodiments made with reference to the following drawings:

[0035] Figure 1 This is an overall flow chart of a very large number of points FFT fast processing method of the present invention;

[0036] Figure 2 This is a specific implementation architecture diagram of the series structure proposed in a very large point number FFT fast processing method of the present invention;

[0037] Figure 3 A 1M-point FFT calculation flow chart of a super-large-point FFT fast processing method of the present invention;

[0038] Figure 4 A comparison chart of the multiplication complexity of processing 1M-point FFT under different bases for a fast processing method of a super-large-point FFT according to the present invention;

[0039] Figure 5 It is a schematic diagram of the implementation of a super large point FFT fast processing method of the present invention for merging results after subsequence 1M point FFT calculation;

[0040] Figure 6 This is a picture of the simulation results of a very large point FFT fast processing method under different signals of the present invention. DETAILED DESCRIPTION

[0041] The present invention is described in detail below in conjunction with specific embodiments. The following embodiments will help those skilled in the art to further understand the present invention, but are not intended to limit the present invention in any form. It should be noted that, in the absence of conflict, the embodiments of the present invention and the features in the embodiments can be combined with each other.

[0042] In some embodiments of the present invention, Figure 1 Schematically shows the overall implementation structure of the algorithm according to a preferred embodiment of the present invention. Specifically, the method includes the following key steps (the present invention will 2 20 1M is used to represent the quantity. Unless otherwise specified, the quantity represented by 1M below is 2 20 ):

[0043] Step 1: Data preprocessing: First, determine whether the length of the input sampling signal data is 1M points (in this embodiment, 1M points is selected as M in the content of the invention). 1 In general, in actual engineering, the number of points is a multiple of 1M. If this condition is met, proceed to step 2. If this condition is not met, the sampling signal sequence of the input system is padded with zeros to make its length an integer multiple of the length of 1M points. For example, if the value of 0 is added to the end of the original discrete data, the method of padding upward with zeros can be used until the length of the new sequence meets the integer multiple of the length of 1M points.

[0044] Step 2: Perform data segmentation on the new sequence after the zero-filling operation so that the data length of each sub-segment meets 1M points, and obtain data segments; the specific method of segmentation is:

[0045] First, the zero-filled signal sequence x from step 1 is received. The signal sequence x is represented as L×M 1 , divide the signal sequence x into L segments, each segment is 1M points long. Define the i-th segment subsequence as x i , then:

[0046] x i ={x[i],x[i+L],x[i+2L],...,x[i+(1M-1)L]}i=0,1,...,L-1;

[0047] Then the elements in each segment can be expressed as:

[0048] x i [n]=x[n+L]n=0,1,...,M-1;

[0049] Here n represents the index of the element in the i-th subsequence. After data segmentation, the length of each subsequence is 1M points. It is worth noting that this step also needs to be initialized and converted according to the input data type (floating point or fixed point) in actual engineering practice to ensure that the accuracy requirements of the design are met. Specifically: If the input data sequence is a floating point representation, the data sequence is fixed-point processed. First, the bit width of the integer and decimal is determined, for example, 3 bits for integers, 12 bits for decimals, and 1 bit for sign bits. Then the maximum and minimum values ​​of the fixed-point numbers are determined. Here, the maximum value that can be represented by 15 bits and one sign bit is 32767, and the minimum value is -32768. For example, 3.1415926 is fixed-point, 3.1415926 / (8 / (32768))=12867.9632896≈12867. Here, 12867 after fixed-point processing is fixed-point data that can be used for subsequent hardware calculations.

[0050] If the fixed-point format of the given data is different from the required fixed-point format, the fixed-point data format conversion is required. The specific implementation process of this step is: clarify the required fixed-point format, determine the position of the decimal point, the bit width of the integer and the decimal, and then calculate the scaling factor according to the fixed-point format of the input signal. The calculation of the scaling factor depends on the difference in decimal places. For example, if the fixed-point format of the input data is Q15 (that is, there are 15 decimal places) and the target is Q7 (that is, there are 7 decimal places), then the scaling factor is 2 15-7=256, and then divided by the scaling factor. In this process, the decimals will be rounded when converting from high precision to low precision. Conversely, if converting from high precision Q15 to low precision Q7, it is necessary to multiply by the scaling factor. Overflow may occur during the multiplication. In this embodiment, a scaling factor of 1 / 32 is used to prevent overflow of the intermediate result in terms of precision control.

[0051] Especially when dealing with sign bits, since fixed-point numbers can be signed or unsigned, when converting formats: for signed numbers, sign extension is required when increasing the bit width, extending the sign bit to the newly added high bits to maintain the correctness of the value. For unsigned numbers, directly fill the high bits with 0.

[0052] Step 3: Perform 1M-point FFT calculation on the obtained data segment. Specifically, Radix-32 is designed as the basic algorithm architecture to perform 5-stage iterative butterfly calculation, improve the Radix-32 butterfly operation, and use specific rotation factors and complex multiplication optimization to improve computational efficiency.

[0053] For the specific implementation of Radix-32FFT, we first reverse the order of the 32-bit sequence to ensure that the elements in the sequence can be correctly matched during the butterfly calculation, and perform necessary scaling and type conversion on the data. The FFT calculation of the subsequence can be expressed as:

[0054]

[0055] Where L is the number of the subsequence; according to the Radix-32FFT butterfly operation formula, the above formula can be expressed as:

[0056]

[0057] In the above formula, k is the frequency point of FFT, the range of k is 0 to 32767, n represents the index of the element in the i-th subsequence, the value of N is 1M in the present invention, and W represents the rotation factor. This process adopts a pipeline computing architecture according to the selection of the hardware platform. Because 1M points is 32 to the fifth power, a 5-level Radix-32 butterfly operation is used to design the submodule.

[0058] In the formula, the input discrete sequence (length 1M) is first divided into multiple subsequences of size 32. In each layer of recursion, the sequence is divided into 32 sub-blocks, and FFT calculation is performed based on each sub-block. Next, the sub-problem is recursively decomposed. In each recursive level, the FFT calculation problem is decomposed into 32 smaller FFT sub-problems. The end of the algorithm will recursively reduce to only 32 data points per block. According to the grouping method of the above formula, 32 parallel multiplication operations are performed within the group, and finally the basic butterfly operation is completed by accumulation. Because 1M points is 32 to the power of 5, a 5-level Radix-32 butterfly operation is used for implementation. By recursively processing these smaller problems, the original problem is gradually transformed into a simple DFT calculation.

[0059] After each decomposition, a butterfly operation is performed on the block results. The butterfly structure recombines the calculation results of different sub-blocks to obtain the intermediate results. The rotation factor is used to adjust the intermediate results in each level of recursive calculation so that the frequency domain information output by each sub-problem can be correctly combined. During the hardware implementation of the algorithm, the rotation factor table is pre-calculated, and the corresponding memory is created for data storage. The addressing method without address conflict is designed to query and read the rotation factor table to avoid recursive recalculation each time.

[0060] Step 4: For the sub-data segment, a new memory space is established to store the intermediate results generated after the 1M-point FFT calculation. Specifically, after the 1M-point FFT calculation, the intermediate results of the same amount of data will be generated. After the L-segment 1M-point FFT calculation, new memory is needed to temporarily store this data during the calculation process. The size of the memory is: L×1M×bit width.

[0061] Step 5: Calculate the intermediate rotation factor based on the number of L segments k ranges from 0 to 1M-1, and then multiplied with the corresponding FFT intermediate results calculated in step S4, the intermediate results after L-segment FFT calculations are assigned to different complex multiplication calculation cores for parallel calculation. The specific calculation process is the expression of the obtained new sequence as follows:

[0062]

[0063] Wherein, i ranges from 0 to L-1. This step is the transition calculation process for butterfly merging in the next stage. After complex multiplication with the intermediate rotation factor according to the corresponding address, the calculated result is stored in the original memory space.

[0064] Step 6: Use the sub-FFT result after phase correction in step 5 as the input of step 6, perform DFT calculation with a base of L according to the number of segments L of the original data, perform DFT iteration once, and finally obtain a complete high-precision spectrum sequence. The merging formula using DFT is as follows:

[0065]

[0066] The calculation process after splitting the above formula is as follows:

[0067] X(k)=X 1 '(k)+X 2 '(k)+L+X L '(k)

[0068]

[0069] Where, X 1 'To X L ' is the data of each sub-segment 1M point FFT result after step 5 processing, and the L×1M point FFT processing result is obtained after calculation. According to the formal characteristics of this group of formulas, the merging process is highly parallelized with the help of the hardware platform. The calculation process will be implemented as a merging calculation with a parallel degree of L on the hardware, and the merging process is processed with the help of pipeline technology. Specifically, while calculating X(k), the next step will preload the data required for X(k+1M) and the merging rotation factor. This step uses the rotation factor The frequency components of each frequency point after FFT calculation of each sub-segment are adjusted and merged so that the intermediate result after L-segment 1M-point FFT is in the correct position in the final spectrum.

[0070] In some embodiments of the present invention, Figure 2 according to Figure 1 The requirements of each step in the specific implementation process, a serial form of hardware implementation architecture is proposed, the specific implementation of this method in a specific hardware platform adopts pipeline technology, according to Figure 1After the steps are decomposed, the engineering requirements are divided into three sub-steps for implementation. The use of the pipeline architecture can provide a data throughput rate three times higher than the original. In the actual implementation of the solution, it is necessary to finely control the address exchange in the process to ensure that the data in the system can flow correctly between the various sub-modules. Specifically, these addresses include the addresses of the rotation factors stored in the ROM in advance, the addresses of the intermediate result data generated after each level of FFT iteration calculation, and the address operations that need to be reversed and sorted at the end of the hardware implementation of the algorithm to restore to the normal order. In the process of the next level of FFT iteration, it is necessary to calculate based on these intermediate result data, and the corresponding interface is defined inside the sub-module to facilitate data processing. The ping-pong RAM structure is used in conjunction with the pipeline working mode of the butterfly operation unit to ensure the continuous operation of the pipeline, and there will be no empty phenomenon in the entire hardware system.

[0071] In some embodiments of the present invention, Figure 3 The comparison of the multiplication complexity of 1M-point FFT calculations with different radixes is shown. According to simulation calculations, when performing 1M-point FFT calculations, the multiplication complexity of Radix-32 is reduced by 61.25%, 48.33%, 68.37%, 17.3%, and 91.9% compared to Radix-2, Radix-4, Radix-8, Radix-16, and Radix-64, respectively. By comparison, it is not difficult to see that choosing Radix-32 is a good choice for 1M-point FFT calculations in the algorithm hardware implementation process. This is because the reduction in algorithm complexity will improve the algorithm's operating efficiency and ensure that the system can accurately calculate and analyze the spectrum of large-scale data in real time.

[0072] In some embodiments of the present invention, Figure 4 The flowchart of the 1M-point FFT algorithm in the embodiment of the present invention is shown. Specifically, after the original data is padded with zeros, it is divided into L sub-data segments with a length of 1M points using a specific grouping method. The sub-data segments will complete the 1M-point FFT calculation through this module. At the beginning of the calculation, the data needs to be rearranged in reverse order in 32-base according to the characteristics of the Radix-32FFT algorithm. According to the formula derivation, the 1M-point FFT calculation requires 5 levels of iterative calculation. After the reverse order is arranged, the relevant parameters need to be iteratively updated during the hardware implementation process. The parameters are then passed to the butterfly calculation submodule of Radix-32, which multiplies the specific elements in x(n) and the corresponding rotation factors and then adds them in a butterfly manner. According to the formula derivation, this butterfly process needs to be performed 32768 times. After one butterfly calculation, the index and relevant parameters of the array are updated to prepare for the next stage of calculation.

[0073] In some embodiments of the present invention, Figure 5 In the method, the result of L-times 1M-point FFT is multiplied by the rotation factor of the intermediate stage, and then 1M-times L-point FFT calculation is performed. This method improves the 1M-times L-point FFT calculation and designs the base to be L. This ensures that in the final calculation merging process, only one iteration of the new sequence calculated in the previous step is required to obtain the final result.

[0074] In some embodiments of the present invention, Figure 6 In the figure, the calculation waveforms of the algorithm of the present invention and the function algorithm built into Matlab are compared. Figure 6 The figure shows the comparison of four different waveforms calculated by the two algorithms. The number of points for algorithm simulation is 4M points. FFT calculation is used as a general example of this method. It can be seen from the figure that both algorithms effectively convert the information of time domain signals to frequency domain and can draw correct waveforms according to the characteristics of frequency information. The calculation errors of this algorithm are: the relative error of random signal is 1.785147×10 -15 , the relative error of the specific frequency signal is 1.748959×10 -15 , the relative error of the unit pulse signal is 0.0026312×10 -15 , the relative error of the constant signal is 1.680131×10 -15 Compared with the built-in FFT function of Matlab, the error of the calculated results can be guaranteed to be within ×10 -15 The order of magnitude meets the accuracy requirements of actual engineering and can verify the accuracy of the algorithm proposed in this invention.

[0075] The above shows and describes the basic principles, main features and advantages of the present invention. Those skilled in the art should understand that the present invention is not limited by the above embodiments. The above embodiments and descriptions are only preferred examples of the present invention and are not intended to limit the present invention. Without departing from the spirit and scope of the present invention, the present invention may have various changes and improvements, which fall within the scope of the present invention. The scope of protection of the present invention is defined by the attached claims and their equivalents.

Claims

1. A fast processing method for ultra-large point FFT, characterized in that: The steps include: S1, perform zero padding operation on the original sampled signal data until the total length of the sequence satisfies the integer multiple of the M1 point; S2, performing data segmentation on the sampled signal data after the zero-padding operation to obtain data segments; S3, performing FFT calculation with M1 points on the obtained data segment; S4, allocating memory space to store intermediate results; S5, multiplying the FFT calculation result of the M1 point of each segment by the corresponding rotation factor to perform phase correction; S6. Based on the result processed in step S5, the segmented frequency spectra are merged to obtain the total result after the frequency spectrum calculation.

2. The method for fast processing of a very large number of FFTs according to claim 1, characterized in that: In step S1, it is first determined whether the length of the input sampling signal data is a multiple of the M1 point. If this condition is met, step S2 is performed. If this condition is not met, the sampling signal sequence of the input system is padded with zeros until the length of the new sequence is an integer multiple of the M1 point.

3. The method for fast processing of a very large number of FFTs according to claim 1, characterized in that: In step S2, the zero-filled sampling signal sequence x is divided into L segments, each segment is M1 points long, and each segment is defined as x i , then: x i ={x[i],x[i+L],x[i+2L],…,x[i+(M1-1)L]}i=0,1,…,L-1; Then the elements in each segment can be expressed as: x i [n]=x[n+L]n=0,1,…,M1-1; Where n represents the index of the element in the i-th subsequence.

4. The method for fast processing of a very large number of points FFT according to claim 1, characterized in that: In step S3, L arrays are created to store the rotation factors corresponding to each data segment, and then FFT calculation is performed on each segment of the M1 point data sequence. During the calculation, the M1 point subsequence input by the module is first preprocessed, including the reverse order of the R-base bits to adapt to the radix decomposition, and then decomposition and recursive calculation are performed to decompose the input sequence according to a predetermined radix.

5. The method for fast processing of ultra-large number FFT according to claim 1, characterized in that: In step S3, the Radix-R FFT algorithm is used to decompose the input sequence into M1 / R subsequences of R points, and FFT calculation is performed on each subsequence.

6. The method for fast processing of a very large number of points FFT according to claim 1, characterized in that: In step S4, a new memory space is created to store the intermediate result of the FFT calculation of the data segment with M1 points.

7. The method for fast processing of ultra-large number FFT according to claim 1, characterized in that: In step S5, the intermediate rotation factor is calculated according to the number of L segments. Then, the corresponding result is multiplied with the FFT intermediate result calculated in step S4.

8. The method for fast processing of very large number of FFTs according to claim 1, characterized in that: In step S6, the sub-FFT result after phase correction is used as an intermediate result, and an iterative multiplication and addition of the base L FFT is performed according to the number of segments L of the original data, so as to finally obtain a complete and high-precision spectrum sequence.

Citation Information

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