Trans-impedance amplifier and deep sea heavy metal detection device

Abstract

The invention discloses a transimpedance amplifier and a deep sea heavy metal detection device. The transimpedance amplifier comprises a working electrode for generating input current, an integrator, a buffer, a feedback capacitor and a feedback resistor, the feedback capacitor is connected between the output end and the input end of the integrator; the feedback resistor is connected between the output end of the buffer and the input end of the integrator; the input end of the integrator is connected with the working electrode, and the integrator is used for amplifying input current and outputting first amplified voltage to the buffer; the buffer is used for amplifying the received first amplified voltage and outputting a second amplified voltage. The transimpedance amplifier provided by the invention is integrated with the on-chip electrode, so that the distance between the transimpedance amplifier and an electrochemical reaction tank can be shortened to hundreds of microns, the capacitance effect of electrochemical reaction is reduced, the noise level can be reduced, and quantitative detection of the concentration of trace heavy metals in deep sea is realized.

Description

Technical Field

[0001] The present invention relates to the technical field of deep sea detection, and in particular to a transimpedance amplifier and a deep sea heavy metal detection device. Background Art

[0002] Heavy metals are often widely distributed in the ocean at trace concentrations. Heavy metals that are known to cause the most damage to the human body, such as cadmium and lead, are difficult to decompose in water, will interact strongly with proteins and enzymes in organisms, have high toxicity, and will cause irreversible damage. In the deep sea, the concentration of heavy metals is very low, and any slight disturbance will affect the detection results. Inductively coupled plasma-mass spectrometry (ICP-MS) is a high-fidelity technology for detecting trace heavy metal concentrations. It enables people to conduct more in-depth quantitative analysis of trace heavy metals in the environment. However, due to the high price of the machine, complex sample pretreatment (usually requires dilution), and high requirements for external environmental conditions, the development of ICP-MS in heavy metal trace detection in extreme environments and complex backgrounds is limited. Electrochemical technology is widely used in the field of heavy metal detection due to its advantages such as small equipment, simple sample pretreatment (even no treatment), and low cost. However, compared with traditional ICP-MS, the detection limit and detection sensitivity of electrochemical technology are still a major challenge.

[0003] The core device of the electrochemical workstation is a potentiostat composed of a transimpedance amplifier (TIA). By applying specific inputs to the instrument and collecting the current output signal of the system, the concentration of heavy metals can be calculated by the size of the current value. For actual samples in the deep sea, the current value collected is very low, usually at the pA to nA level. Therefore, the performance of the TIA, especially the noise level, directly determines the correctness of the test results. Existing electrochemical workstations usually use customized solutions based on integrated circuits (ICs). However, customized solutions based on integrated circuits have poor suppression of negative capacitive effects that affect electrochemical reactions, resulting in a high noise level, making it difficult to achieve quantitative detection of trace heavy metal concentrations in the deep sea.

[0004] Therefore, the prior art still needs to be improved and developed. Summary of the invention

[0005] In view of the above-mentioned deficiencies in the prior art, an object of the present invention is to provide a transimpedance amplifier and a deep-sea heavy metal detection device to solve the problem of high noise level caused by poor suppression of negative capacitive effects affecting electrochemical reactions in existing electrochemical workstations.

[0006] The technical solution of the present invention is as follows: In a first aspect, the present invention provides a transimpedance amplifier, comprising: a working electrode for generating an input current, an integrator, a buffer, a feedback capacitor and a feedback resistor; The feedback capacitor is connected between the output terminal and the input terminal of the integrator; The feedback resistor is connected between the output terminal of the buffer and the input terminal of the integrator; The input end of the integrator is connected to the working electrode, the output end of the integrator is connected to the input end of the buffer, and the integrator is used to amplify the input current and output a first amplified voltage to the buffer; The buffer is used to amplify the received first amplified voltage and output a second amplified voltage.

[0007] According to a further configuration of the present invention, the integrator comprises: a first bias voltage providing unit, a first operational amplifier unit, an output amplifier unit and a low-frequency noise optimization unit; The first bias voltage providing unit is connected to the first operational amplifier unit and is used to provide a first bias voltage for the first operational amplifier unit; The first operational amplifier unit is connected to the working electrode and is used to increase the gain of the integrator; The output amplifying unit is connected to the first operational amplifying unit and the buffer respectively, and the output amplifying unit is used to increase the output swing of the first amplified voltage; The low-frequency noise optimization unit is connected to the first operational amplifier unit and the output amplifier unit respectively, and is used to reduce low-frequency noise.

[0008] According to a further configuration of the present invention, the first bias voltage providing unit includes a first MOS transistor, a second MOS transistor, a third MOS transistor and a fourth MOS transistor; wherein, The gate of the first MOS tube is connected to the gate of the second MOS tube, the drain of the first MOS tube is connected to the bias current, and the source of the first MOS tube is grounded; the common terminal of the gate of the first MOS tube and the gate of the second MOS tube is connected to the bias current; The drain of the second MOS tube is respectively connected to the drain of the third MOS tube and the first operational amplifier unit, and the source of the second MOS tube is grounded; The gate of the third MOS tube is connected to the first operational amplifier unit, and the source of the third MOS tube is connected to the source of the fourth MOS tube and the gate of the fourth MOS tube respectively; The source of the fourth MOS tube is connected to the power supply voltage.

[0009] According to a further configuration of the present invention, the first operational amplifier unit includes: a fifth MOS tube, a sixth MOS tube, a seventh MOS tube, an eighth MOS tube and a ninth MOS tube; wherein, The source of the fifth MOS tube is connected to the power supply voltage, the gate of the fifth MOS tube is respectively connected to the gate of the fourth MOS tube and the output amplification unit, and the drain of the fifth MOS tube is respectively connected to the source of the sixth MOS tube and the source of the seventh MOS tube; The gate of the sixth MOS tube is connected to the first input terminal or the second input terminal of the integrator, and the drain of the sixth MOS tube is connected to the source of the eighth MOS tube; The gate of the seventh MOS tube is connected to the first input terminal or the second input terminal of the integrator, and the drain of the seventh MOS tube is connected to the source of the ninth MOS tube; The gate of the eighth MOS tube is connected to the gate of the ninth MOS tube, and the drain of the eighth MOS tube is connected to the low-frequency noise optimization unit; The drain of the ninth MOS tube is connected to the low-frequency noise optimization unit and the output amplification unit respectively; The low-frequency noise optimization unit includes: a tenth MOS tube, an eleventh MOS tube, a first resistor and a second resistor; wherein, The gate of the tenth MOS tube is connected to the gate of the eleventh MOS tube, the drain of the tenth MOS tube is connected to the drain of the eighth MOS tube, the source of the tenth MOS tube is connected to one end of the first resistor, and the other end of the first resistor is grounded; The common terminal of the gate of the eleventh MOS tube and the gate of the tenth MOS tube is connected to the drain of the eighth MOS tube; The drain of the eleventh MOS tube is respectively connected to the drain of the ninth MOS tube and the output amplifying unit, the source of the eleventh MOS tube is connected to one end of the second resistor, and the other end of the second resistor is grounded.

[0010] According to a further configuration of the present invention, the output amplification unit includes: a twelfth MOS tube, a thirteenth MOS tube, a third resistor and a first capacitor; wherein, The gate of the twelfth MOS tube is connected to the common terminal of the gate of the fourth MOS tube and the gate of the fifth MOS tube, the source of the twelfth MOS tube is connected to the power supply voltage, and the drain of the twelfth MOS tube is connected to the drain of the thirteenth MOS tube; the common terminal of the twelfth MOS tube and the thirteenth MOS tube is the output terminal of the integrator; The gate of the thirteenth MOS tube is connected to the common terminal of the drain of the ninth MOS tube and the drain of the eleventh MOS tube, and the source of the thirteenth MOS tube is grounded; One end of the third resistor is connected to the gate of the thirteenth MOS transistor, and the other end of the third resistor is connected to the drain of the thirteenth MOS transistor; the first capacitor is connected in series with the third resistor.

[0011] According to a further configuration of the present invention, the buffer comprises: a second bias voltage providing unit, a fully differential amplifying unit and a common mode feedback unit; wherein, The second bias voltage providing unit is connected to the fully differential amplifying unit, and is used to provide a second bias voltage for the fully differential amplifying unit; The fully differential amplifying unit is connected to the output end of the integrator, and is used to perform differential amplification processing on the first amplified voltage and output a second amplified voltage; The common-mode feedback unit is connected to the fully differential amplification unit and is used to provide a stable common-mode point for the buffer and adjust the gain of the buffer.

[0012] According to a further configuration of the present invention, the second bias voltage providing unit includes: a fourteenth MOS tube, a fifteenth MOS tube and a sixteenth MOS tube; wherein, The gate of the fourteenth MOS tube is connected to the gate of the fifteenth MOS tube, the drain of the fourteenth MOS tube is connected to the bias current, and the source of the fourteenth MOS tube is grounded; the common terminal of the gate of the fourteenth MOS tube and the gate of the fifteenth MOS tube is connected to the bias current; The drain of the fifteenth MOS tube is connected to the drain and gate of the sixteenth MOS tube, and the source of the fifteenth MOS tube is grounded; The source of the sixteenth MOS tube is connected to the power supply voltage.

[0013] According to a further configuration of the present invention, the fully differential amplifying unit includes: a seventeenth MOS tube, an eighteenth MOS tube, a nineteenth MOS tube, a twentieth MOS tube and a twenty-first MOS tube; wherein, The gate of the seventeenth MOS tube is connected to the gate of the sixteenth MOS tube, the drain of the seventeenth MOS tube is connected to the common terminal of the source of the eighteenth MOS tube and the source of the nineteenth MOS tube, and the source of the seventeenth MOS tube is connected to the power supply voltage; The gate of the eighteenth MOS tube is connected to the output end of the integrator or connected to the common mode voltage, and the drain of the eighteenth MOS tube is connected to the drain of the twentieth MOS tube and the first output end of the buffer; The gate of the nineteenth MOS tube is connected to the output end of the integrator or connected to the common mode voltage, and the drain of the nineteenth MOS tube is connected to the drain of the twenty-first MOS tube and the second output end of the buffer; The gate of the 20th MOS tube is connected to the gate of the 21st MOS tube, and the source of the 20th MOS tube is grounded; The source of the twenty-first MOS tube is grounded.

[0014] According to a further configuration of the present invention, the common-mode feedback unit comprises: a common-mode feedback device, a fourth resistor, a fifth resistor, a second capacitor and a third capacitor; wherein, The first input terminal of the common-mode feedback device is connected to the reference voltage, the second input terminal of the common-mode feedback device is connected to the common terminal of the fourth resistor and the fifth resistor, and the output terminal of the common-mode feedback device is connected to the common terminal of the gate of the 20th MOS transistor and the gate of the 21st MOS transistor; The second capacitor is connected in parallel with the fourth resistor, and the third capacitor is connected in parallel with the fifth resistor.

[0015] The transimpedance amplifier further includes: a range selection unit, which is connected in parallel with the feedback resistor and is used for switching gears according to the range of the input current.

[0016] In a second aspect, the present invention further provides a deep-sea heavy metal detection device, which comprises: a second operational amplifier unit, a reference electrode, a counter electrode, a channel selection unit, an analog-to-digital conversion unit, a filtering unit, and at least one transimpedance amplifier as described above; The inverting input terminal of the second operational amplifier unit is connected to the reference electrode, the output terminal of the second operational amplifier unit is connected to the counter electrode, and the second operational amplifier unit is used to amplify the input signal and then input it to the reference electrode; The channel selection unit is connected to the transimpedance amplifier and the analog-to-digital conversion unit respectively, and the channel selection unit is used to access the second amplified voltage output by the transimpedance amplifier and output a third amplified voltage to the analog-to-digital conversion unit; The analog-to-digital conversion unit is connected to the filtering unit, and the analog-to-digital conversion unit is used to convert the third amplified voltage into a digital signal and input the digital signal into the filtering unit; The filtering unit is used to filter the digital signal and then output it.

[0017] The present invention provides a transimpedance amplifier and a deep-sea heavy metal detection device, wherein the transimpedance amplifier includes: a working electrode for generating an input current, an integrator, a buffer, a feedback capacitor and a feedback resistor; the feedback capacitor is connected between the output and input of the integrator; the feedback resistor is connected between the output of the buffer and the input of the integrator; the input of the integrator is connected to the working electrode, the output of the integrator is connected to the input of the buffer, the integrator is used to amplify the input current and output a first amplified voltage to the buffer; the buffer is used to amplify the received first amplified voltage and output a second amplified voltage. The transimpedance amplifier provided by the present invention integrates on-chip electrodes, that is, the working electrode, so that the distance between the transimpedance amplifier and the electrochemical reaction cell can be reduced to hundreds of microns, reducing the capacitive effect of the electrochemical reaction, thereby reducing the noise level. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary personnel in this field, other drawings can be obtained based on the structures shown in these drawings without paying any creative work.

[0019] Figure 1 It is a working principle diagram of the deep-sea heavy metal detection device in the present invention.

[0020] Figure 2 It is a working principle diagram of the transimpedance amplifier and the electrochemical reaction cell in the present invention.

[0021] Figure 3 It is a waveform diagram of the input signal in the present invention.

[0022] Figure 4 It is a circuit schematic diagram of the integrator in the present invention.

[0023] Figure 5 It is a circuit schematic diagram of the buffer in the present invention.

[0024] Figure 6 This is a diagram of the detection results of a deep-sea heavy metal detection device in artificial seawater in one embodiment of the present invention.

[0025] Figure 7 This is a diagram of the detection results of seawater collected by a deep-sea heavy metal detection device in one embodiment of the present invention at a water depth of 8448 meters in the Mariana Trench.

[0026] The marks in the accompanying drawings are: 100, transimpedance amplifier; 110, integrator; 111, first bias voltage providing unit; 112, first operational amplifier unit; 113, low-frequency noise optimization unit; 114, output amplifier unit; 120, buffer; 121, second bias voltage providing unit; 122, fully differential amplifier unit; 123, common-mode feedback unit; 130, range selection unit; 200, second operational amplifier unit; 300, channel selection unit; 400, analog-to-digital conversion unit; 500, filtering unit; 600, capacitance compensation unit. DETAILED DESCRIPTION

[0027] The present invention provides a transimpedance amplifier and a deep-sea heavy metal detection device. In order to make the purpose, technical solution and effect of the present invention clearer and more specific, the present invention is further described in detail with reference to the accompanying drawings and examples. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0028] In the embodiments and the scope of the patent application, unless the text specifically defines the article, "a", "an", "the" and "the" may also include plural forms. If there are descriptions involving "first", "second", etc. in the embodiments of the present invention, the descriptions of "first", "second", etc. are only used for descriptive purposes and cannot be understood as indicating or implying their relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" or "second" may explicitly or implicitly include at least one of the features.

[0029] It should be further understood that the term "comprising" used in the specification of the present invention refers to the presence of the features, integers, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or groups thereof. It should be understood that when an element is said to be "connected" or "coupled" to another element, it can be directly connected or coupled to the other element, or there can also be intermediate elements. In addition, the "connection" or "coupling" used herein can include wireless connection or wireless coupling. The term "and / or" used herein includes all or any unit and all combinations of one or more associated listed items.

[0030] It will be understood by those skilled in the art that, unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as generally understood by those skilled in the art in the art to which the present invention belongs. It should also be understood that terms such as those defined in general dictionaries should be understood to have meanings consistent with the meanings in the context of the prior art, and will not be interpreted with idealized or overly formal meanings unless specifically defined as herein.

[0031] In addition, the technical solutions between the various embodiments can be combined with each other, but it must be based on the fact that ordinary technicians in the field can implement it. When the combination of technical solutions is contradictory or cannot be implemented, it should be deemed that such combination of technical solutions does not exist and is not within the scope of protection required by the present invention.

[0032] Please also see Figures 1 to 7 The present invention provides a preferred embodiment of a deep-sea heavy metal detection device.

[0033] In some embodiments, Figure 1 and Figure 2 As shown, the present invention provides a deep-sea heavy metal detection device, which includes: a second operational amplifier unit 200, a reference electrode RE, a counter electrode CE, a channel selection unit 300, an analog-to-digital conversion unit 400, a filtering unit 500 and at least one transimpedance amplifier 100. Among them, the inverting input end of the second operational amplifier unit 200 is connected to the reference electrode RE, the output end of the second operational amplifier unit 200 is connected to the counter electrode CE, and the second operational amplifier unit 200 is used to amplify the input signal and input it to the reference electrode RE; the channel selection unit 300 is respectively connected to the transimpedance amplifier 100 and the analog-to-digital conversion unit 400, and the channel selection unit 300 is used to access the second amplified voltage output by the transimpedance amplifier 100 and output the third amplified voltage to the analog-to-digital conversion unit 400; the analog-to-digital conversion unit 400 is connected to the filtering unit 500, and the analog-to-digital conversion unit 400 is used to convert the third amplified voltage into a digital signal and input it into the filtering unit 500; the filtering unit 500 is used to filter the digital signal and output it to obtain an output signal.

[0034] The transimpedance amplifier 100 includes: a working electrode WE for generating an input current, an integrator 110, a buffer 120, a feedback capacitor C F With the feedback resistor R F ; The feedback capacitor C F connected between the output terminal and the input terminal of the integrator 110; the feedback resistor R F It is connected between the output end of the buffer 120 and the input end of the integrator 110; the input end of the integrator 110 is connected to the working electrode WE, and the output end of the integrator 110 is connected to the input end of the buffer 120. The integrator 110 is used to amplify the input current and output a first amplified voltage to the buffer 120; the buffer 120 is used to amplify the received first amplified voltage and output a second amplified voltage.

[0035] Specifically, the working electrode WE on the transimpedance amplifier 100, the reference electrode RE and the counter electrode CE form an electrochemical reaction cell. When heavy metals in a solution are detected, the working electrode WE is electrically connected to the reference electrode RE and the counter electrode CE through the solution. Figure 2 The circuit model of the working electrode WE is a working electrode capacitor C WE With a working electrode resistor R WE The circuit model of the reference electrode RE is a reference electrode resistor R SR The circuit model of the electrode CE is a pair of electrode capacitors C CE With a counter electrode resistor R CE Parallel, R SW represents the solution impedance.

[0036] The second operational amplifier unit 200 can be connected to a specific input signal Ei, such as an adjustable triangle wave, such as Figure 3 As shown in a of FIG, and the adjustable differential pulse, such as Figure 3 As shown in b in the figure, the input signal can be amplified and transmitted to the reference electrode RE, and a fixed potential difference is formed between the reference electrode RE and the working electrode WE. The potential of the working electrode WE to the ground is constant. Therefore, by controlling the signal applied to the reference electrode RE, the signal applied to the working electrode WE can be accurately controlled, and will not be affected by the voltage drop caused by the current. It should be understood that when a voltage is applied to the working electrode WE, the heavy metal ions in the solution will undergo an oxidation-reduction reaction on the surface of the working electrode, thereby generating a current (i.e., the input current input to the integrator). When the current generated during the electrochemical reaction generates a voltage drop with the solution's own impedance, the generated voltage drop will not affect the voltage applied to the working electrode.

[0037] The working electrode WE is fixed at the reference potential through the negative feedback of the transimpedance amplifier 100, so the input current flowing into the inverting terminal of the transimpedance amplifier 100 can be expressed as: ; Among them, V WE is the potential difference of the working electrode, V RE is the potential difference of the reference electrode, R WE Represents the equivalent impedance of the working electrode itself, C WE Represents the equivalent capacitance of the working electrode itself, R SR Represents the equivalent impedance of the reference electrode, R SW represents the solution impedance and s represents the basic signal in the complex frequency domain.

[0038] The selection of feedback circuit architecture has a great influence on the performance of the transimpedance amplifier. This embodiment adopts a resistive continuous-time feedback architecture, and the feedback resistor is connected between the output end of the buffer 120 and the input end of the integrator 110. In a resistive transimpedance amplifier, the input current noise can be expressed as: ;in, is the feedback current noise, represents the transimpedance amplifier current noise; The feedback current noise can be expressed as: ; Among them, R F represents transresistance, T represents temperature, and k represents the Boltzmann constant.

[0039] From the above expression, it can be seen that a large transresistance can reduce the impact of the feedback resistor on the current noise. At the same time, the size of the transresistance also determines the gain of the transresistance amplifier. Because too large a transresistance will occupy a larger layout area, it will also reduce the equivalent bandwidth of the system. According to the electrochemical input model and signal characteristics, a transresistance of 257MΩ can be selected to better balance the performance requirements.

[0040] In some embodiments, the working electrode WE can be a titanium electrode, the size of which can be 75 μm×75 μm. The vertical integration technology is used to realize the integration of the on-chip titanium electrode and the transimpedance amplifier, which can reduce the traditional electrochemical reaction cell to an area of ​​1 mm², and realize multi-channel electrochemical experiments of different types at the same time. For example, four channels can be realized, and the layout size of the transimpedance amplifier is 1.255 mm×0.8 mm, which can contain four channels, and is made using a 0.18 μm CMOS manufacturing process. Each channel has the same transimpedance amplifier, and each channel can independently complete different types of electrochemical experiments without affecting each other. In specific implementation, after the pads of the transimpedance amplifier are bonded to the printed circuit board by gold wire, the chip is sealed around with epoxy resin to prevent the solution from corroding the chip and the gold wire. Since the electrode surface of the transimpedance amplifier is titanium and aluminum, the aluminum needs to be etched first, using type A aluminum etchant, etching at room temperature 25°C for 30 min, and the etching stops when the electrode surface changes from silver-white to black under the optical lens. After etching, it needs to be carefully washed three times with pure water to ensure that there is no aluminum etching solution residue. At the same time, the transimpedance amplifier is compatible with the daughter board of the transimpedance amplifier, which is used to connect the transimpedance amplifier die to the printed circuit board, thereby transmitting the signal through gold wire bonding and performing 0.9V shielding in a Faraday cage to reduce electromagnetic interference from the external environment and reduce system noise.

[0041] In some embodiments, the reference electrode RE can be a silver (Ag) electrode or a silver chloride (AgCl) electrode. Before detecting heavy metals, the surface of the working electrode needs to be modified with a mercury film. The mercury plating solution uses 0.02 M mercuric nitrate. By applying a constant negative potential of -0.3 V to the three-electrode system, the mercury plating time is 15 min. Under the optical lens, it can be observed that the electrode surface turns silver-gray, and a dense mercury film can be observed on the electrode surface using a scanning electron microscope.

[0042] In the above technical scheme, the transimpedance amplifier provided by the present invention integrates on-chip electrodes, that is, an integrated working electrode, so that the distance between the transimpedance amplifier and the electrochemical reaction cell can be reduced to hundreds of microns, reducing the capacitive effect of the electrochemical reaction and the parasitic capacitance of the input end. No wiring connection is required between the working electrode and the transimpedance amplifier, thereby reducing the noise level and effectively attenuating the noise in the high-frequency band, thereby realizing the quantitative detection of trace heavy metal concentrations in the deep sea.

[0043] In some embodiments, Figure 4 As shown, the integrator 110 includes: a first bias voltage providing unit 111, a first operational amplifier unit 112, an output amplifier unit 114 and a low-frequency noise optimization unit 113. The first bias voltage providing unit 111 is connected to the first operational amplifier unit 112, and is used to provide a first bias voltage for the first operational amplifier unit 112; the first operational amplifier unit 112 is connected to the working electrode, and is used to increase the gain of the integrator 110; the output amplifier unit 114 is respectively connected to the first operational amplifier unit 112 and the buffer 120, and the output amplifier unit 114 is used to increase the output swing of the first amplified voltage; the low-frequency noise optimization unit 113 is respectively connected to the first operational amplifier unit 112 and the output amplifier unit 114, and is used to reduce low-frequency noise.

[0044] In this embodiment, the first bias voltage providing unit 111 provides the first bias voltage for the first operational amplifier unit 112 by accessing the bias current. The first bias voltage provided by the first bias voltage providing unit 111 of the first operational amplifier unit 112 enables the integrator to have a higher gain, and can amplify the input current and output the first amplified voltage, and the output amplifier unit 114 can increase the swing of the first amplified voltage. The low-frequency noise optimization unit 113 is connected to the first operational amplifier unit 112 and the output amplifier unit 114, and can perform on-chip low-frequency noise optimization to reduce mismatch caused by process errors.

[0045] In some embodiments, Figure 4As shown, the first bias voltage providing unit 111 includes a first MOS transistor M1, a second MOS transistor M2, a third MOS transistor M3 and a fourth MOS transistor M4. The gate of the first MOS transistor M1 is connected to the gate of the second MOS transistor M2, the drain of the first MOS transistor M1 is connected to the bias current IBIAS, and the source of the first MOS transistor M1 is grounded to VSS; the common terminal of the gate of the first MOS transistor M1 and the gate of the second MOS transistor M2 is connected to the bias current IBIAS; the drain of the second MOS transistor M2 is respectively connected to the drain of the third MOS transistor M3 and the first operational amplifier unit 112, and the source of the second MOS transistor M2 is grounded; the gate of the third MOS transistor M3 is connected to the first operational amplifier unit 112, the source of the third MOS transistor M3 is respectively connected to the source of the fourth MOS transistor M4 and the gate of the fourth MOS transistor M4; the source of the fourth MOS transistor M4 is connected to the power supply voltage VDD.

[0046] Specifically, the first MOS transistor M1 is connected to the bias current IBIAS, and the fourth MOS transistor M4 is connected to the power supply voltage VDD, and when the first MOS transistor M1, the second MOS transistor M2, the third MOS transistor M3 and the fourth MOS transistor M4 are turned on, the first bias voltage can be provided for the first operational amplifier unit 112. The first MOS transistor M1 and the second MOS transistor M2 are PMOS transistors, and the third MOS transistor M3 and the fourth MOS transistor M4 are NMOS transistors.

[0047] In some embodiments, the first operational amplifier unit 112 includes a fifth MOS transistor M5 , a sixth MOS transistor M6 , a seventh MOS transistor M7 , an eighth MOS transistor M8 , and a ninth MOS transistor M9 . The source of the fifth MOS tube M5 is connected to the power supply voltage VDD, the gate of the fifth MOS tube M5 is respectively connected to the gate of the fourth MOS tube M4 and the output amplifying unit 114, and the drain of the fifth MOS tube M5 is respectively connected to the source of the sixth MOS tube M6 and the source of the seventh MOS tube M76; the gate of the sixth MOS tube M6 is connected to the first input terminal or the second input terminal of the integrator 110, and the drain of the sixth MOS tube M6 is connected to the source of the eighth MOS tube M8; the gate of the seventh MOS tube M7 is connected to the first input terminal or the second input terminal of the integrator 110, and the drain of the seventh MOS tube M7 is connected to the source of the ninth MOS tube M9; the gate of the eighth MOS tube M8 is connected to the gate of the ninth MOS tube M9, and the drain of the eighth MOS tube M8 is connected to the low-frequency noise optimization unit 113; the drain of the ninth MOS tube M9 is respectively connected to the low-frequency noise optimization unit 113 and the output amplifying unit 114.

[0048] Specifically, the fifth MOS transistor is connected to the power supply voltage VDD. The sixth MOS transistor M6 or the seventh MOS transistor M7 is connected to the input current. When the sixth MOS transistor M6 is connected to the input current, the seventh MOS transistor M7 is connected to the common mode voltage. When the seventh MOS transistor M7 is connected to the input current, the sixth MOS transistor M6 is connected to the common mode voltage. The sixth MOS transistor M6, the seventh MOS transistor M7, the eighth MOS transistor M8 and the ninth MOS transistor M9 constitute a sleeve-type common source and common gate operational amplifier, which ensures the high gain of the integrator 110. Among them, the fifth MOS transistor M5, the sixth MOS transistor M6, the seventh MOS transistor M7, the eighth MOS transistor M8 and the ninth MOS transistor M9 are NMOS transistors.

[0049] In some embodiments, Figure 4 As shown, the low-frequency noise optimization unit 113 includes: a tenth MOS tube M10, an eleventh MOS tube M11, a first resistor RS1 and a second resistor RS2. The gate of the tenth MOS tube M10 is connected to the gate of the eleventh MOS tube M11, the drain of the tenth MOS tube M10 is connected to the drain of the eighth MOS tube M8, the source of the tenth MOS tube M10 is connected to one end of the first resistor RS1, and the other end of the first resistor RS1 is grounded; the common end of the gate of the eleventh MOS tube M11 and the gate of the tenth MOS tube M10 is connected to the drain of the eighth MOS tube M8; the drain of the eleventh MOS tube M11 is respectively connected to the drain of the ninth MOS tube M9 and the output amplification unit 114, the source of the eleventh MOS tube M11 is connected to one end of the second resistor RS2, and the other end of the second resistor RS2 is grounded.

[0050] Specifically, the tenth MOS tube M10 and the eleventh MOS tube M11 are load MOS tubes (PMOS tubes), and the first resistor RS1 and the second resistor RS2 are source degeneration resistors. In order to reduce the noise of the integrator, the input transistor level (the first MOS tube M1 and the second MOS tube M2) is optimized. Considering the lower flicker noise of the PMOS input, its size can adopt a larger width-to-length ratio. The width W and length L of the channel can be 784μm and 240nm respectively, and the current efficiency g is high. m / Id and large gate area reduce noise and mismatch, g m represents transconductance, and Id represents current. The source degeneration resistor can reduce the equivalent transresistance g of the load transistor. m,eff , the initial output impedance r o Increase to (1+g m Rs)r o , where g mis the equivalent transconductance of the load transistor. Through the analysis of the small signal model, it can be deduced that the introduction of the source degeneration resistor will reduce the original equivalent transconductance g m Reduced to g m / (1+g m Rs), and the active load flicker current noise can be expressed as: ; Wherein, kp represents the flicker noise coefficient, Cox represents the gate oxide capacitance per unit area, f represents the frequency, Rs represents the resistance of the source degeneration resistor (i.e., the resistance of the first resistor RS1 and the second resistor RS2), g m It represents transconductance, W represents the width of the MOS channel, and L represents the length of the MOS channel.

[0051] The introduction of source degeneration resistance can reduce the flicker noise of the load MOS tube and adjust the stability of the integrator. The thermal noise of the detection device is expressed as follows: ;in, represents the thermal noise of the inspection device, γ is the thermal noise coefficient, which is related to the channel length. For long channel devices, γ=2 / 3, and for short channel devices, γ>1. Generally, γ=1 is taken; T represents temperature, k represents the Boltzmann constant, Rs represents the resistance of the source degeneration resistor (i.e., the resistance of the first resistor and the second resistor), g m Represents transconductance.

[0052] From the above expression, we can see that the attenuation of the equivalent transconductance of the active load MOS tube can optimize the thermal noise. At the same time, the resistor introduced by the source degeneration technology itself brings thermal noise. In order to avoid the source degeneration resistor becoming the main noise source, it is necessary to meet g m Rs is much smaller than 1 so that the detection device can obtain the optimal thermal noise level.

[0053] In some embodiments, Figure 4As shown, the output amplifying unit 114 includes: a twelfth MOS transistor M12, a thirteenth MOS transistor M13, a third resistor R3 and a first capacitor C1. The gate of the twelfth MOS tube M12 is connected to the common terminal of the gate of the fourth MOS tube M4 and the gate of the fifth MOS tube M5, the source of the twelfth MOS tube M12 is connected to the power supply voltage VDD, and the drain of the twelfth MOS tube M12 is connected to the drain of the thirteenth MOS tube M13; the common terminal of the twelfth MOS tube M12 and the thirteenth MOS tube M13 is the output terminal OUT of the integrator 110; the gate of the thirteenth MOS tube M13 is connected to the common terminal of the drain of the ninth MOS tube M9 and the drain of the eleventh MOS tube M11, and the source of the thirteenth MOS tube M13 is grounded; one end of the third resistor R3 is connected to the gate of the thirteenth MOS tube M13, and the other end of the third resistor R3 is connected to the drain of the thirteenth MOS tube M13; the first capacitor C1 is connected in series with the third resistor R3.

[0054] Specifically, the twelfth MOS tube M12 is connected to the power supply voltage VDD, and the thirteenth MOS tube M13 can increase the output swing of the first amplified voltage, thereby reducing the error caused by the virtual short circuit in the integrator. The twelfth MOS tube M12 is an NMOS tube, and the thirteenth MOS tube M13 is a PMOS tube.

[0055] In some embodiments, Figure 5 As shown, the buffer 120 includes: a second bias voltage providing unit 121, a fully differential amplifying unit 122 and a common mode feedback unit 123. The second bias voltage providing unit 121 is connected to the fully differential amplifying unit 122, and is used to provide a second bias voltage for the fully differential amplifying unit 122; the fully differential amplifying unit 122 is connected to the output end of the integrator 110, and is used to perform differential amplification processing on the first amplified voltage and output a second amplified voltage; the common mode feedback unit 123 is connected to the fully differential amplifying unit 122, and is used to provide a stable common mode point for the buffer 120 and adjust the gain of the buffer 120.

[0056] In this embodiment, the second bias voltage providing unit 121 provides a second bias voltage for the fully differential amplifier unit 122, and the fully differential amplifier unit 122 outputs a differential amplified voltage, i.e., a second amplified voltage, in a differential output manner. In this way, the transimpedance amplifier adopts a single-ended output of an integrator and a differential amplification output mode of a double-ended output of a buffer to achieve an equivalent double transimpedance gain, which can reduce the common-mode noise of the system and improve the anti-interference ability of the detection device. The common-mode feedback unit 123 can adjust the output gain and stabilize the common-mode operating point of the system. According to the transfer function of the detection device: ; Wherein, Vout represents the output voltage of the integrator, that is, the first amplified voltage, Represents the input current, R F Represents the resistance of the feedback resistor, CF represents the capacitance of the feedback capacitor, and s represents the basic signal in the complex frequency domain.

[0057] In this embodiment, the voltage gain multiple can be adjusted through the common-mode feedback unit 123. In this embodiment, 7 times is taken as an example. Then, a buffer with a voltage gain of 7 times can reduce the equivalent feedback capacitance by 7 times, achieving an equivalent on-chip capacitance of 7.14fF, thereby expanding the bandwidth by 7 times. To a certain extent, it can alleviate the problem of bandwidth reduction caused by the introduction of feedback capacitance, and can also ensure that the size of the feedback capacitance can be further reduced under the premise of system stability.

[0058] In some embodiments, Figure 2 and Figure 5 As shown, the second bias voltage providing unit 121 includes: a fourteenth MOS tube M14, a fifteenth MOS tube M15 and a sixteenth MOS tube M16. The gate of the fourteenth MOS tube M14 is connected to the gate of the fifteenth MOS tube M15, the drain of the fourteenth MOS tube M14 is connected to the bias current IBIAS, and the source of the fourteenth MOS tube M14 is grounded; the common terminal of the gate of the fourteenth MOS tube M14 and the gate of the fifteenth MOS tube M15 is connected to the bias current IBIAS; the drain of the fifteenth MOS tube M15 is connected to the drain and gate of the sixteenth MOS tube M16, and the source of the fifteenth MOS tube M15 is grounded VSS; the source of the sixteenth MOS tube M16 is connected to the power supply voltage VDD. The fourteenth MOS tube M14 and the fifteenth MOS tube M15 are PMOS tubes, and the sixteenth MOS tube M16 is an NMOS tube.

[0059] Further, the fully differential amplifier unit 122 includes: a seventeenth MOS tube M17, an eighteenth MOS tube M18, a nineteenth MOS tube M19, a twentieth MOS tube M20 and a twenty-first MOS tube M21. Among them, the gate of the seventeenth MOS tube M17 is connected to the gate of the sixteenth MOS tube M16, the drain of the seventeenth MOS tube M17 is connected to the common terminal of the source of the eighteenth MOS tube M18 and the source of the nineteenth MOS tube M19, and the source of the seventeenth MOS tube M17 is connected to the power supply voltage; the gate of the eighteenth MOS tube M18 is connected to the output of the integrator 110 or connected to the common mode voltage, the drain of the eighteenth MOS tube M18 is connected to the drain of the twentieth MOS tube M20 and the buffer The first output terminal OUT1 of the buffer 120 is connected; the gate of the nineteenth MOS tube M19 is connected to the output terminal of the integrator 110 or is connected to the common mode voltage, the drain of the nineteenth MOS tube M19 is connected to the drain of the twenty-first MOS tube M21 and the second output terminal OUT2 of the buffer 120; the gate of the 20th MOS tube M20 is connected to the gate of the twenty-first MOS tube M21, the source of the 20th MOS tube M20 is grounded; the source of the twenty-first MOS tube M21 is grounded VSS.

[0060] Specifically, the fourteenth MOS tube M14 is connected to the bias current IBIAS, the sixteenth MOS tube M16 is connected to the power supply voltage VDD, and the drain of the fifteenth MOS tube M15 is connected to the gate of the seventeenth MOS tube M17, so as to provide a second bias voltage for the fully differential amplifier unit 122. The gate of the eighteenth MOS tube M18 or the gate of the nineteenth MOS tube M19 is connected to the output end of the integrator 110. When the gate of the eighteenth MOS tube M18 is connected to the output end of the integrator 110, the gate of the nineteenth MOS tube M19 is connected to the common mode voltage. When the gate of the nineteenth MOS tube M19 is connected to the output end of the integrator 110, the gate of the eighteenth MOS tube M18 is connected to the common mode voltage. The seventeenth MOS tube M17, the eighteenth MOS tube M18, the nineteenth MOS tube M19, the twentieth MOS tube M20 and the twenty-first MOS tube M21 constitute a fully differential amplifier, having a first output terminal OUT1 and a second output terminal OUT2, to achieve differential output differential amplification voltage (VOUT+, VOUT-), so that the single-ended output of the integrator can be converted into the double-ended output of the buffer 120, thereby achieving an equivalent double transimpedance gain, while improving the anti-interference ability of the system. Among them, the seventeenth MOS tube M17, the eighteenth MOS tube M18 and the nineteenth MOS tube M19 are NMOS tubes, and the twenty-third MOS tube M20 and the twenty-first MOS tube M21 are PMOS tubes.

[0061] In some embodiments, Figure 5 As shown, the common mode feedback unit 123 includes: a common mode feedback device CMFB, a fourth resistor R4, a fifth resistor R5, a second capacitor C2 and a third capacitor C3. The first input end of the common mode feedback device CMFB is connected to the reference voltage VREF, the second input end of the common mode feedback device CMFB is connected to the common end of the fourth resistor R4 and the fifth resistor R5, the output end of the common mode feedback device CMFB is connected to the common end of the gate of the 20th MOS transistor M20 and the gate of the 21st MOS transistor M21; the second capacitor C2 is connected in parallel with the fourth resistor R4, and the third capacitor C3 is connected in parallel with the fifth resistor R5.

[0062] Specifically, the output end of the common mode feedback device CMFB is connected to the common end of the gate of the 20th MOS tube M20 and the gate of the 21st MOS tube M21, and the common mode operating point of the detection device can be stabilized through common mode feedback. The fourth resistor R4 and the fifth resistor R5 are common mode detection resistors, and stable gain can be achieved through the fourth resistor R4 and the fifth resistor R5. The gain multiple can be adjusted by adjusting the fourth resistor R4 and the fifth resistor R5. The second capacitor C2 is connected in parallel with the fourth resistor R4, and the third capacitor C3 is connected in parallel with the fifth resistor R5, which can reduce the impedance at high frequency and improve the stability of the common mode feedback unit.

[0063] In some embodiments, Figure 1 As shown, the transimpedance amplifier 100 further includes: a range selection unit 130, the range selection unit 130 and the feedback resistor R F In parallel, the range selection unit is used to switch gears according to the range of the input current.

[0064] Specifically, the range selection unit 130 is composed of a plurality of switch tubes SW and a plurality of sixth resistors R6. Each sixth resistor R6 is connected to the feedback resistor R F In parallel, the feedback resistor R is adjusted by connecting the sixth resistor R6 in parallel. F The system can automatically switch to a large range when the redox current is large (high concentration) during the electrochemical reaction; and automatically switch to a small range when the redox current is small (low concentration) during the electrochemical reaction.

[0065] In some embodiments, Figure 1As shown, the deep-sea heavy metal detection device also includes a capacitance compensation unit 600, which is connected between the working electrode WE and the inverting input terminal of the transimpedance amplifier. Specifically, due to the unique double-layer capacitance effect in the electrochemical reaction process, compensation through the capacitance compensation unit can improve the signal-to-noise ratio.

[0066] Figure 6 and Figure 7 The detection results of the detection device in artificially prepared seawater and seawater collected from a depth of 8448m in the Mariana Trench were demonstrated respectively, and differential pulse stripping voltammetry was used to detect lead and cadmium ions. Figure 6 As shown in the figure, the solution used is artificial seawater with 3.5% NaCl solution as the base liquid, Cd 2+ and Pb 2+ The standard solutions used were 100 μmol / ml and 1000 μmol / ml of cadmium nitrate and lead nitrate, respectively. The working electrode was the on-chip titanium electrode (75 μm×75 μm) integrated in the TIA, the reference electrode was Ag / AgCl, and the counter electrode was Pt. The input signal was a step-up square wave generated by MATLAB and provided to the PCB, which included three stages: enrichment, resting, and dissolution. The enrichment stage was an external application of a potential of -1.4 V for 400 s or 600 s. The resting stage was an external application of a potential of -0.9 V for 10 s. The dissolution stage started with a starting potential of -0.9 V, and a step-up square wave was continuously applied, with an end potential of -0.3 V. The analog-to-digital conversion unit was responsible for collecting the current values ​​of the input signal at high and low levels during the dissolution process, and two IV curves were obtained, as shown in Figure 6 a in Figure 6 As shown in b in the figure, the difference between the two currents is used to obtain the IV curve. Different concentrations correspond to different current values. Through the relationship between the current peak value of the dissolution peak and the concentration, a current-concentration standard curve can be drawn. The peak current measurement results of actual seawater are substituted into the standard curve to calculate the concentration. It should be noted that in the actual detection process, measurements are made from low concentration to high concentration to avoid affecting the accuracy of the recorded current due to inadequate cleaning. In order to quantify the peak height, the peak current is measured from the baseline. In order to ensure the accuracy of the results, each curve is tested repeatedly until the two measurements are repeated. Figure 7 As shown in the figure, the solution used is a seawater sample from the Mariana Trench, located at a depth of 8448 m, at 142.15717°E, 11.5698°W. The sample was stored in an environment of 3°C. During the detection process, five consecutive measurements were made and the average current was calculated. Finally, the Cd in the seawater of the Mariana Trench at 8448 m was obtained. 2+ The concentration of Pb was 0.859 μg / L. 2+The concentration is 0.921μg / L.

[0067] In summary, the transimpedance amplifier and deep-sea heavy metal detection device provided by the present invention have the following beneficial effects: The transimpedance amplifier is manufactured using CMOS technology and uses vertical integration technology to integrate on-chip electrodes on the surface of the transimpedance amplifier, shortening the distance between the electrochemical reaction cell and the TIA to hundreds of microns, breaking through the electrochemical noise limitations caused by human factors and wiring, thereby reducing the noise level and effectively attenuating the noise in the high-frequency band, thereby achieving quantitative detection of trace heavy metal concentrations in the deep sea.

[0068] The transimpedance amplifier adopts the differential amplification output mode of the integrator single-ended output and the buffer double-ended output to achieve the equivalent of twice the transimpedance gain, while improving the anti-interference ability of the detection device; The use of source degeneration technology for on-chip low-frequency noise optimization helps reduce mismatch caused by process errors; The circuit structure of the telescopic common-source common-gate operational amplifier and common-source output ensures the high gain and larger output swing of the amplifier to reduce the system gain error under the closed-loop connection of the amplifier. A stable gain is achieved through a common-mode detection resistor. A capacitor is added to the common-mode detection resistor to reduce impedance at high frequencies and improve the stability of the common-mode feedback circuit.

[0069] It should be understood that the application of the present invention is not limited to the above examples. For ordinary technicians in this field, improvements or changes can be made based on the above description. All these improvements and changes should fall within the scope of protection of the claims attached to the present invention.

Claims

1. A transimpedance amplifier, characterized in that: include: A working electrode, an integrator, a buffer, a feedback capacitor and a feedback resistor for generating an input current; The feedback capacitor is connected between the output terminal and the input terminal of the integrator; The feedback resistor is connected between the output terminal of the buffer and the input terminal of the integrator; The input end of the integrator is connected to the working electrode, the output end of the integrator is connected to the input end of the buffer, and the integrator is used to amplify the input current and output a first amplified voltage to the buffer; The buffer is used to amplify the received first amplified voltage and output a second amplified voltage.

2. The transimpedance amplifier according to claim 1, characterized in that: The integrator comprises: a first bias voltage providing unit, a first operational amplifier unit, an output amplifier unit and a low-frequency noise optimization unit; The first bias voltage providing unit is connected to the first operational amplifier unit and is used to provide a first bias voltage for the first operational amplifier unit; The first operational amplifier unit is connected to the working electrode and is used to increase the gain of the integrator; The output amplifying unit is connected to the first operational amplifying unit and the buffer respectively, and the output amplifying unit is used to increase the output swing of the first amplified voltage; The low-frequency noise optimization unit is connected to the first operational amplifier unit and the output amplifier unit respectively, and is used to reduce low-frequency noise.

3. The transimpedance amplifier according to claim 2, characterized in that: The first bias voltage providing unit includes a first MOS transistor, a second MOS transistor, a third MOS transistor and a fourth MOS transistor; wherein, The gate of the first MOS tube is connected to the gate of the second MOS tube, the drain of the first MOS tube is connected to the bias current, and the source of the first MOS tube is grounded; the common terminal of the gate of the first MOS tube and the gate of the second MOS tube is connected to the bias current; The drain of the second MOS tube is respectively connected to the drain of the third MOS tube and the first operational amplifier unit, and the source of the second MOS tube is grounded; The gate of the third MOS tube is connected to the first operational amplifier unit, and the source of the third MOS tube is connected to the source of the fourth MOS tube and the gate of the fourth MOS tube respectively; The source of the fourth MOS tube is connected to the power supply voltage.

4. The transimpedance amplifier according to claim 3, characterized in that: The first operational amplifier unit includes: a fifth MOS tube, a sixth MOS tube, a seventh MOS tube, an eighth MOS tube and a ninth MOS tube; wherein, The source of the fifth MOS tube is connected to the power supply voltage, the gate of the fifth MOS tube is respectively connected to the gate of the fourth MOS tube and the output amplification unit, and the drain of the fifth MOS tube is respectively connected to the source of the sixth MOS tube and the source of the seventh MOS tube; The gate of the sixth MOS tube is connected to the first input terminal or the second input terminal of the integrator, and the drain of the sixth MOS tube is connected to the source of the eighth MOS tube; The gate of the seventh MOS tube is connected to the first input terminal or the second input terminal of the integrator, and the drain of the seventh MOS tube is connected to the source of the ninth MOS tube; The gate of the eighth MOS tube is connected to the gate of the ninth MOS tube, and the drain of the eighth MOS tube is connected to the low-frequency noise optimization unit; The drain of the ninth MOS tube is connected to the low-frequency noise optimization unit and the output amplification unit respectively; The low-frequency noise optimization unit includes: a tenth MOS tube, an eleventh MOS tube, a first resistor and a second resistor; wherein, The gate of the tenth MOS tube is connected to the gate of the eleventh MOS tube, the drain of the tenth MOS tube is connected to the drain of the eighth MOS tube, the source of the tenth MOS tube is connected to one end of the first resistor, and the other end of the first resistor is grounded; The common terminal of the gate of the eleventh MOS tube and the gate of the tenth MOS tube is connected to the drain of the eighth MOS tube; The drain of the eleventh MOS tube is respectively connected to the drain of the ninth MOS tube and the output amplifying unit, the source of the eleventh MOS tube is connected to one end of the second resistor, and the other end of the second resistor is grounded.

5. The transimpedance amplifier according to claim 4, characterized in that: The output amplification unit includes: a twelfth MOS tube, a thirteenth MOS tube, a third resistor and a first capacitor; wherein, The gate of the twelfth MOS tube is connected to the common terminal of the gate of the fourth MOS tube and the gate of the fifth MOS tube, the source of the twelfth MOS tube is connected to the power supply voltage, and the drain of the twelfth MOS tube is connected to the drain of the thirteenth MOS tube; the common terminal of the twelfth MOS tube and the thirteenth MOS tube is the output terminal of the integrator; The gate of the thirteenth MOS tube is connected to the common terminal of the drain of the ninth MOS tube and the drain of the eleventh MOS tube, and the source of the thirteenth MOS tube is grounded; One end of the third resistor is connected to the gate of the thirteenth MOS transistor, and the other end of the third resistor is connected to the drain of the thirteenth MOS transistor; the first capacitor is connected in series with the third resistor.

6. The transimpedance amplifier according to claim 1, characterized in that: The buffer comprises: a second bias voltage providing unit, a fully differential amplifying unit and a common mode feedback unit; wherein, The second bias voltage providing unit is connected to the fully differential amplifying unit, and is used to provide a second bias voltage for the fully differential amplifying unit; The fully differential amplifying unit is connected to the output end of the integrator, and is used to perform differential amplification processing on the first amplified voltage and output a second amplified voltage; The common-mode feedback unit is connected to the fully differential amplification unit and is used to provide a stable common-mode point for the buffer and adjust the gain of the buffer.

7. The transimpedance amplifier according to claim 6, characterized in that: The second bias voltage providing unit includes: a fourteenth MOS tube, a fifteenth MOS tube and a sixteenth MOS tube; wherein, The gate of the fourteenth MOS tube is connected to the gate of the fifteenth MOS tube, the drain of the fourteenth MOS tube is connected to the bias current, and the source of the fourteenth MOS tube is grounded; the common terminal of the gate of the fourteenth MOS tube and the gate of the fifteenth MOS tube is connected to the bias current; The drain of the fifteenth MOS tube is connected to the drain and gate of the sixteenth MOS tube, and the source of the fifteenth MOS tube is grounded; The source of the sixteenth MOS tube is connected to the power supply voltage.

8. The transimpedance amplifier according to claim 7, characterized in that: The fully differential amplifying unit includes: a seventeenth MOS tube, an eighteenth MOS tube, a nineteenth MOS tube, a twentieth MOS tube and a twenty-first MOS tube; wherein, The gate of the seventeenth MOS tube is connected to the gate of the sixteenth MOS tube, the drain of the seventeenth MOS tube is connected to the common terminal of the source of the eighteenth MOS tube and the source of the nineteenth MOS tube, and the source of the seventeenth MOS tube is connected to the power supply voltage; The gate of the eighteenth MOS tube is connected to the output end of the integrator or connected to the common mode voltage, and the drain of the eighteenth MOS tube is connected to the drain of the twentieth MOS tube and the first output end of the buffer; The gate of the nineteenth MOS tube is connected to the output end of the integrator or connected to the common mode voltage, and the drain of the nineteenth MOS tube is connected to the drain of the twenty-first MOS tube and the second output end of the buffer; The gate of the 20th MOS tube is connected to the gate of the 21st MOS tube, and the source of the 20th MOS tube is grounded; The source of the twenty-first MOS tube is grounded.

9. The transimpedance amplifier according to claim 8, characterized in that: The common-mode feedback unit includes: a common-mode feedback device, a fourth resistor, a fifth resistor, a second capacitor and a third capacitor; wherein, The first input terminal of the common-mode feedback device is connected to the reference voltage, the second input terminal of the common-mode feedback device is connected to the common terminal of the fourth resistor and the fifth resistor, and the output terminal of the common-mode feedback device is connected to the common terminal of the gate of the 20th MOS transistor and the gate of the 21st MOS transistor; The second capacitor is connected in parallel with the fourth resistor, and the third capacitor is connected in parallel with the fifth resistor; It also includes: a range selection unit, which is connected in parallel with the feedback resistor and is used to switch gears according to the range of the input current.

10. A deep-sea heavy metal detection device, characterized in that: include: a second operational amplifier unit, a reference electrode, a counter electrode, a channel selection unit, an analog-to-digital conversion unit, a filtering unit, and at least one transimpedance amplifier according to any one of claims 1 to 9; The inverting input terminal of the second operational amplifier unit is connected to the reference electrode, the output terminal of the second operational amplifier unit is connected to the counter electrode, and the second operational amplifier unit is used to amplify the input signal and then input it to the reference electrode; The channel selection unit is connected to the transimpedance amplifier and the analog-to-digital conversion unit respectively, and the channel selection unit is used to access the second amplified voltage output by the transimpedance amplifier and output a third amplified voltage to the analog-to-digital conversion unit; The analog-to-digital conversion unit is connected to the filtering unit, and the analog-to-digital conversion unit is used to convert the third amplified voltage into a digital signal and input the digital signal into the filtering unit; The filtering unit is used to filter the digital signal and then output it.

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