All-digital TIADC time sequence mismatch calibration method based on reference channel

Through the fully digital TIADC timing mismatch calibration method based on the reference channel, the statistical laws and first-order Taylor series expansion method are used to solve the problem of timing mismatch calibration in TIADC, and the calibration effect of fast convergence and high stability is achieved.

CN119561550APending Publication Date: 2025-03-04SHENZHEN INSTITUTE OF INFORMATION TECHNOLOGY
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Patent Information

Application Number
CN202411709892.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-11-27
Publication Date
2025-03-04

AI Technical Summary

Technical Problem

The prior art is difficult to effectively calibrate the timing mismatch in TIADC, resulting in a decrease in signal-to-noise ratio and dynamic range, which cannot meet the requirements of high accuracy and high speed.

Method used

The fully digital TIADC timing mismatch calibration method based on the reference channel is used to estimate the timing mismatch by utilizing the statistical rules between each sub-channel and the reference channel, and compensate with the first-order Taylor series expansion.

Benefits of technology

Fast convergence and high stability timing mismatch calibration is achieved, avoiding the problem of degradation of accuracy at high frequencies in traditional methods, and is suitable for integration into commercial TIADC.

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Abstract

The invention discloses an all-digital TIADC (Time-Interleaved Analog to Digital Converter) time sequence mismatch calibration method based on a reference channel, which belongs to the technical field of digital signal processing and comprises the following steps: S1, an all-digital calibration structure estimates time sequence mismatch by utilizing cross-channel statistical characteristics, and S2, by comparing output differences between the reference channel and subchannels which are sampled at the same time, the time sequence mismatch is calibrated. The deviation of the differentiator can be calibrated; and S3, the two calibration results are combined to generate accurate final output. The time sequence mismatch compensation structure with the reference channel is provided, compared with a traditional method, the method has remarkable advantages in the aspects of area consumption and convergence speed, an excellent calibration result is achieved while the precision of the same level is kept, and the higher convergence speed and the wider effective bandwidth are provided.
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Description

Technical Field

[0001] The present invention relates to the technical field of digital signal processing, and in particular to a reference channel-based all-digital TIADC timing mismatch calibration method. Background Art

[0002] The analog-to-digital converter is a bridge used to convert analog signals into discrete signals. It is widely used in various fields, such as wireless communications, electronic radar, medical equipment, etc. With the advancement of the times, the demand for ADC is increasing. The basic standards of ADC are higher accuracy, higher speed, lower power consumption, etc. It is difficult for a single-structure ADC in the existing technology to take these three factors into account at the same time. Fortunately, TIADC can effectively solve this problem. TIADC can double the sampling rate of the entire ADC and can easily reach a sampling rate of 1 GS / s.

[0003] TIADC consists of M sub-channels. Due to factors such as manufacturing process, layout and wiring, temperature, voltage, etc., mismatches will occur between sub-channels, such as offset mismatch, gain mismatch and timing mismatch. In fact, the degradation of the signal-to-noise ratio (SNR) and spurious-free dynamic range (SFDR) of the output signal is likely to be related to these mismatches. Without these errors, the entire system cannot meet the requirements of high precision and high speed. The common calibration of offset and gain mismatch involves the accumulation and averaging of the input signal, which is then subtracted from the original signal. This method is simple and effective. Compared with other mismatches, the calibration of timing mismatch is the most challenging.

[0004] With the advancement of advanced processes, clock frequencies and channel counts continue to increase, and performance degradation caused by timing mismatch has become a major challenge. Calibration of timing mismatch can be accomplished by methods similar to those used in analog loop calibration. The analog loop calibration method mainly involves filtering the TIADC sampling clock and adjusting the clock phase by observing the output difference in the digital domain of each sub-ADC channel. This method estimates the magnitude of the mismatch through digital circuits and uses analog circuits with variable delay lines (VDLs) or delay loop locks to compensate and adjust the mismatch. However, analog circuits are less portable, and VDLs vary with manufacturing processes, temperature, and voltage variations. Summary of the invention

[0005] The invention provided by the present invention aims to provide a reference channel-based all-digital TIADC timing mismatch calibration method. The present invention proposes a four-channel TIADC all-digital calibration structure. It effectively solves the challenges related to frequency when compensating for timing mismatch calibration. Here, we propose a novel estimation method that uses the statistical laws between each sub-channel and the reference channel to accurately determine the time mismatch. The method provides a streamlined architecture with fast convergence speed and strong stability, making it very suitable for integration into commercial TIADC. In addition, the innovative compensation framework we proposed is based on the first-order Taylor series expansion. A differentiator auxiliary circuit is introduced to improve the accuracy of the differentiator and optimize the hardware consumption.

[0006] In order to achieve the above effect, the present invention provides the following technical solution: a full digital TIADC timing mismatch calibration method based on a reference channel, comprising the following steps: S1. The all-digital calibration structure uses statistical characteristics across channels to estimate timing mismatch.

[0007] S2. By comparing the output difference between the reference channel and the simultaneously sampled sub-channels, the deviation of the differentiator can be calibrated.

[0008] S3. Combining the two calibration results produces an accurate final output.

[0009] Further, the method includes the following steps: according to the operation steps in S1, the all-digital calibration structure is used to solve the timing mismatch, and the reference channel is used to suppress the timing mismatch in the time-interleaved analog-to-digital converter TIADC.

[0010] Further, the following steps are included: according to the operation steps in S1, the reference channel is used to extract the timing mismatch of each sub-channel, and the output of the reference channel is aligned with each sub-channel in turn, thereby achieving simultaneous sampling and conversion of the same input signal.

[0011] Further, the following steps are included: according to the operation steps in S1, the compensation circuit for the timing mismatch is formulated based on the expansion of the first-order Taylor series, the compensation circuit is based on an adaptive estimation method, the method uses the first-order statistics to solve the timing mismatch problem, the estimation model is based on a four-channel model, and an additional channel is added for reference, therefore, the first-order Taylor series is used for approximation. Timing mismatch compensation on the i-th subchannel The function is expressed as:

[0012] where y i ′(n) represents the differential value of the output of the i-th subchannel. During the differential operation, the deviation coefficient of the derivative exhibits a frequency-dependent change. Therefore, the deviation coefficient of the derivative depends only on the frequency. The output of the derivative (D i (n) ) and the ideal derivative ( yi′(n) ) can be expressed mathematically as: D i (n) = g D · yi′(n), An adaptive timing mismatch estimation method. This method uses first-order statistics to solve the timing mismatch problem. The estimation model is based on M channel models and an additional channel for reference. The sampling frequency of TIADC is f s The sampling frequency of the subchannel is f s / M. The sampling frequency of the reference channel is f s / (M+1). The sample values ​​of the reference channel are aligned with each sub-channel in turn.

[0013] In the present invention, the timing mismatch is estimated by the cross-correlation function between the sampled sub-channel and the reference channel:

[0014] Where E(·) represents the mathematical expectation. It is implemented by the modified moving average (MMA) filter:

[0015] Since the time mismatch is small relative to the period, the cross-correlation function is expanded by a first-order Taylor series approximation:

[0016] Similarly, the cross-correlation function between the signal output of the n-1th cycle and the reference channel output of the nth cycle is expressed as:

[0017] By combining the above formulas, the time mismatch can be obtained as:

[0018] Among them, R ’ xx (10T s ) is the derivative of the autocorrelation of the input signal, and its expression is:

[0019] Further, the method includes the following steps: according to the operation steps in S1, the structure of the four-channel model and a reference channel, the calculation of the timing mismatch needs to utilize the cross-correlation function between the sub-channel and the reference channel, and the cross-correlation function between the sub-channel and the reference channel after sampling is the mathematical expectation value of the multiplication of their corresponding signals.

[0020] Further, the method comprises the following steps: according to the operation steps in S2, the specific implementation method of the mathematical expectation value of the sub-channel and the reference channel signal is to adopt a modified moving average MMA filter.

[0021] Further, the following steps are included: according to the operation steps in S3, the recursive calculation representing the average output expected value y[n] depends on the linear superposition of the previous result y[n-1] and the current input item x[n].

[0022] , the y[n] and x[n] are the output and input, and μ represents a constant smoothing factor.

[0023] Further, the following steps are included: According to the operation steps in S3, in terms of hardware implementation, this structure selects 2 −k sampling period, where k is any positive integer, since multiplying the signal by µ can be done efficiently by appropriate arithmetic shifts of k bits.

[0024] Further, the following steps are included: according to the operation steps in S3, the cross-correlation function of the signal output of the subchannel in the n-1th period and the reference channel output in the n-1th period is calculated Py i (n-1)y ref_i (n-1) , then delay the output signal of the reference channel by one cycle and calculate the cross-correlation function between it and the output signal of the subchannel in the n-1th cycle Py i (n-1)y ref_i (n), The mismatch time is calculated based on the difference between the two expected values ​​being proportional to the mismatch time.

[0025] Further, the method includes the following steps: according to the operation steps in S3, an auxiliary circuit is introduced to enhance the output accuracy and performance.

[0026] The present invention provides a timing mismatch calibration method for a full-digital TIADC based on a reference channel, which has the following beneficial effects: The present invention proposes a timing mismatch compensation structure with a reference channel, which has significant advantages over traditional methods in terms of area consumption and convergence speed, and achieves excellent calibration results while maintaining the same level of accuracy, and has a faster convergence speed and a wider effective bandwidth. The present method can avoid the following disadvantages of implementing traditional methods. The proposed technology solves the problem that high-precision output cannot be maintained at high frequencies in traditional methods, which leads to a significant decrease in calibration performance. The calibration structure in the traditional method has limited effectiveness in multi-frequency signal calibration, and therefore imposes great restrictions on its practical application. The present invention utilizes a feedforward calibration structure to systematically enhance the stability of the calibration process and improve the overall performance. The structure has the characteristics of simplicity, low computational complexity, fast convergence speed, and superior performance. For systems with more than 8 channels in traditional methods, the hardware resource consumption of the estimation module and the matrix processing unit of the derivative multiphase filter will increase exponentially. The structure proposed by the present invention can be expanded to accommodate additional channels without generating any additional hardware consumption in the estimation module. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Picture 1 A calibration sampling timing diagram of a reference channel-based all-digital TIADC timing mismatch calibration method according to the present invention; Picture 2 A timing mismatch calibration system of a full digital TIADC timing mismatch calibration method based on a reference channel of the present invention and a schematic diagram of a differentiator deviation coefficient with a reference channel; Picture 3 A schematic diagram of the structure of a modified moving average MMA filter circuit of a full digital TIADC timing mismatch calibration method based on a reference channel of the present invention; Picture 4 A schematic diagram of a timing mismatch compensation structure of a full digital TIADC timing mismatch calibration method based on a reference channel of the present invention; Picture 5 The present invention is a flowchart of a method for calibrating timing mismatch of a fully digital TIADC based on a reference channel. DETAILED DESCRIPTION

[0028] In order to make the objectives, technical solutions and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with specific embodiments.

[0029] Embodiment 1 See also Picture 1-Picture 5, a reference channel based all-digital TIADC timing mismatch calibration method, comprising the following steps: Assuming that other mismatches (i.e., offset and gain mismatches) have been calibrated before, the present invention only needs to focus on the calibration of timing mismatch. Picture 1 As shown, a timing mismatch compensation structure is added to the 4-channel TIADC to form a fully digital calibration structure. Optionally, since a differentiator is introduced in the reference channel, a differentiator calibration structure can be added in parallel with the timing mismatch compensation structure to eliminate the error introduced by the differentiator.

[0030] Compared with the sampling period, the timing mismatch can be ignored. The present invention uses a first-order Taylor series for approximation. Timing mismatch compensation on the i-th subchannel The function is expressed as:

[0031] where y i ′(n) represents the differential value of the output of the i-th subchannel. During the differential operation, the deviation coefficient of the derivative exhibits a frequency-dependent change. Therefore, the deviation coefficient of the derivative depends only on the frequency. The output of the derivative ( D i (n) ) and the ideal derivative ( yi′(n) ) can be expressed mathematically as: D i (n) = g D · yi′(n), The deviation coefficient of the derivative depends only on the frequency. Figure 1 shows the implementation architecture of the timing mismatch calibration. The present invention focuses on the timing mismatch compensation structure.

[0032] An adaptive estimation method is proposed that uses first-order statistics to solve the timing mismatch problem. The estimation model is based on a four-channel model with an additional channel for reference. The sampling frequency of the TIADC is f s The sampling frequency of the subchannel is f s / 4. The sampling frequency of the reference channel is f s / 5. The sampling value of the reference channel is aligned with each sub-channel in turn. The sampling timing of each sub-channel ADC and the reference channel ADC is shown in Figure 2.

[0033] The specific sampling sequence is extracted by downsampling. The output sequence y of the i-th subchannel after downsampling i_d (n) is expressed as:

[0034] The above formula indicates that the output sequence of the i-th subchannel after downsampling is the output signal before downsampling after 5 times downsampling and after (5-i) T s After the reference channel signal is introduced, the output signal of the system has 20T s cycle.

[0035] where y ref (n) represents the output of the reference channel. Since its frequency is 5 times lower than the input signal, it has 5T s The period of is related to the input signal as follows:

[0036] The estimation of timing mismatch requires the use of the cross-correlation function between the sub-channel and the reference channel. P yi_d(n-1)yref(n-1) Expressed as y i_d (n-1) and y ref (n-1) The mathematical expectation after multiplication:

[0037] Where E(·) represents the mathematical expectation. It is achieved by using the modified moving average (MMA), such as Picture 3 The mathematical expression is:

[0038] Where y[n] and x[n] are the output and input, and μ is a constant smoothing factor. The recursive calculation of the average output y[n] depends on the previous result y[n-1] and the current input x[n]. xx (10T s i-∆t i ) represents x(n +Δt i ) and x(n + 10T s i) can be approximately expressed as follows through the first-order Taylor series approximation:

[0039] in is the derivative of the autocorrelation of the input signal and can be expressed as:

[0040] where y ref '(n) is the derivative of the reference channel signal. From the above formula, we can see that y i(n-1) and y ref_i (n-1) The cross-correlation value between is expressed as:

[0041] Correspondingly, the output signal of the reference channel is delayed by one cycle, then y i (n-1) and y ref_i (n) The cross-correlation value is expressed as:

[0042] Subtracting the above formula from the above formula together, we can get the time delay of the i-th channel as:

[0043] The timing mismatch compensation structure derived from the above formula is as follows: Picture 4 shown.

[0044] According to the above formula, the output signals of the four channels first pass through the frequency divider and then the frequency drops by 5 times, and the period of a single channel becomes 5T. s , the overall cycle of the four channels becomes 20T s .

[0045] According to the above formula, the signal after frequency reduction, y i (n) Through the D flip-flop with (5-i)Ts period delay, after passing through the multi-channel selector, the y after downconversion and delay of the i-th channel can be obtained. i_d (n) Signal.

[0046] According to the above formula, the reference channel output signal y ref (n) With 5T s , after passing through the 4-fold frequency divider, its period is extended to 20T s .

[0047] According to the above formula, for y i_d (n) signal and down-converted y ref (n) The signals are delayed by 1T through D flip-flops s cycle, get y i_d (n-1) and y ref (n-1)signal.

[0048] According to the above formula, y i_d (n-1) and y ref Cross-correlation function of (n-1) signals P yi_d(n-1)yref(n-1)It is achieved by passing two signals through a multiplier and then through a modified average line filter.

[0049] Similarly, according to the above formula, y i_d (n-1) and y ref (n) Cross-correlation function of the signal P yi_d(n-1)yref(n) It is achieved by passing two signals through a multiplier and then through a modified average line filter.

[0050] According to the above formula, R ’ xx (10T s ) is the derivative of the autocorrelation of the input signal, which is obtained by ref (n-2) signal and differential signal y ’ ref (n) After passing through the multiplier, it is realized by passing through the modified average line filter.

[0051] According to the above formula, the mismatch time of the i-th channel is estimated as two cross-correlation functions: P yi_d(n-1)yref(n) and P yi_d(n-1)yref(n-1) The difference, divided by R ’ xx (10T s ) is implemented. The specific circuit implementation method is: P yi_d(n-1)yref(n) and P yi_d(n-1)yref(n-1) The output signal obtained after the signal passes through the subtractor is then combined with R ’ xx (10T s ) signal is realized after passing through the divider.

[0052] Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the appended claims and their equivalents.

Claims

1. A fully digital TIADC timing mismatch calibration method based on a reference channel, characterized in that: The following steps are involved: S1, the all-digital calibration structure uses statistical characteristics across channels to estimate timing mismatch; S2, by comparing the output difference between the reference channel and the simultaneously sampled sub-channel, the deviation of the differentiator can be calibrated; S3. Combining the two calibration results produces an accurate final output.

2. The method for calibrating timing mismatch of a fully digital TIADC based on a reference channel according to claim 1, characterized in that: The following steps are involved: According to the operation steps in S1, the all-digital calibration structure is used to solve the timing mismatch and use the reference channel to suppress the timing mismatch in the time-interleaved analog-to-digital converter TIADC.

3. The method for calibrating timing mismatch of a fully digital TIADC based on a reference channel according to claim 2, characterized in that: The following steps are involved: According to the operation steps in S1, the reference channel is used to extract the timing mismatch of each sub-channel, and the output of the reference channel is aligned with each sub-channel in turn, thereby achieving simultaneous sampling and conversion of the same input signal.

4. The method for calibrating timing mismatch of a fully digital TIADC based on a reference channel according to claim 3, characterized in that: The following steps are involved: According to the operation steps in S1, the compensation circuit for the timing mismatch is formulated based on the expansion of the first-order Taylor series. The compensation circuit is based on an adaptive estimation method that uses first-order statistics to solve the timing mismatch problem. The estimation model is based on a four-channel model and an additional channel is used for reference.

5. The method for calibrating timing mismatch of a fully digital TIADC based on a reference channel according to claim 4, characterized in that: The following steps are involved: According to the operation steps in S1, the structure of the four-channel model and a reference channel requires the calculation of the timing mismatch using the cross-correlation function between the sub-channel and the reference channel. The cross-correlation function between the sub-channel and the reference channel after sampling is the mathematical expectation value of the multiplication of their corresponding signals.

6. The method for calibrating timing mismatch of a fully digital TIADC based on a reference channel according to claim 5, characterized in that: The following steps are involved: According to the operation steps in S2, the specific implementation method of the mathematical expectation value of the sub-channel and reference channel signals is to use a modified moving average MMA filter.

7. The method for calibrating timing mismatch of a fully digital TIADC based on a reference channel according to claim 6, characterized in that: The following steps are involved: According to the operation steps in S3, the recursive calculation representing the average output expected value y[n] depends on the linear superposition of the previous result y[n-1] and the current input item x[n], ; The y[n] and x[n] are the output and input, and μ represents a constant smoothing factor.

8. The method for calibrating timing mismatch of a fully digital TIADC based on a reference channel according to claim 7, characterized in that: The following steps are involved: According to the operation steps in S3, in terms of hardware implementation, this structure selects 2 −k sampling period, where k is any positive integer, since multiplying the signal by µ can be done efficiently by appropriate arithmetic shifts of k bits.

9. The method for calibrating timing mismatch of a fully digital TIADC based on a reference channel according to claim 8, characterized in that: The following steps are involved: According to the operation steps in S3, the cross-correlation function of the signal output of the subchannel in the n-1th period and the reference channel output in the n-1th period is calculated. Py i (n-1)y ref_i (n-1) , then delay the output signal of the reference channel by one cycle and calculate the cross-correlation function between it and the output signal of the subchannel in the n-1th cycle Py i (n-1)y ref_i (n), The mismatch time is calculated based on the difference between the two expected values ​​being proportional to the mismatch time.

10. The method for calibrating timing mismatch of a fully digital TIADC based on a reference channel according to claim 9, characterized in that: The following steps are involved: According to the operation steps in S3, an auxiliary circuit is introduced to enhance the output accuracy and performance.

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