Multi-path harmonic waveform output method and device, storage medium and output equipment

Abstract

The invention provides a multi-path harmonic waveform output method and device, a storage medium and output equipment, and relates to the technical field of harmonic power sources. The output method comprises the following steps: under the condition that a controller receives a waveform output signal, determining a period register value corresponding to a timer unit based on a waveform configuration parameter; determining a digital-to-analog conversion output value corresponding to each waveform point data of the harmonic waveform to obtain waveform point conversion information; and controlling the timer unit to start counting, and outputting a corresponding digital-to-analog conversion output value by the digital-to-analog conversion channel based on the to-be-output waveform point data and the waveform point conversion information under the condition that a counting value of the timer unit is matched with a period register value. The invention designs the waveform output equipment which can pass through the MCU and the digital-to-analog conversion chip, and provides a method capable of realizing synchronous output of multiple paths of harmonic waveforms, so that the hardware complexity of the waveform output equipment is reduced, and the cost of the waveform output equipment is reduced.

Description

Technical Field

[0001] The present application relates to the technical field of harmonic power sources, and in particular to a method and apparatus for outputting multi-channel harmonic waveforms, a storage medium, and an output device. Background Art

[0002] In the related art, the AC harmonic power source requires the harmonic output device to provide a standard waveform, and the standard waveform is output through the amplification circuit and the UI (voltage-current) conversion circuit to output the corresponding voltage and current signal. Among them, the waveform output accuracy of the waveform output device will have a direct impact on the accuracy of the output waveform of the AC harmonic power source.

[0003] The waveform output device is composed of a DSP (Digital Signal Processing), a FPGA (Field Programmable Gate Array) and a DAC (Digital-to-Analog Converter) chip, and has a complex hardware structure and high cost. Summary of the invention

[0004] The present application aims to solve at least one of the technical problems existing in the prior art or related art.

[0005] To this end, the first aspect of the present application proposes a method for outputting multi-channel harmonic waveforms.

[0006] A second aspect of the present application provides a device for outputting multi-channel harmonic waveforms.

[0007] A third aspect of the present application provides a device for outputting multi-channel harmonic waveforms.

[0008] A fourth aspect of the present application provides a readable storage medium.

[0009] A fifth aspect of the present application provides a waveform output device.

[0010] In view of this, the first aspect of the present application provides a method for outputting multiple harmonic waveforms. The output method is applied to a waveform output device, the waveform output device includes a controller and N digital-to-analog conversion channels, the digital-to-analog conversion channel is used to output one harmonic waveform, the controller includes a timer unit, and N is a positive integer; the output method includes: when the controller receives a waveform output signal, determining a period register value corresponding to the timer unit based on a waveform configuration parameter; determining a digital-to-analog conversion output value corresponding to each waveform point data of the harmonic waveform to obtain waveform point conversion information; controlling the timer unit to start counting, and when the count value of the timer unit matches the period register value, the digital-to-analog conversion channel outputs the corresponding digital-to-analog conversion output value based on the waveform point data to be output and the waveform point conversion information.

[0011] In this technical solution, the waveform output device includes a controller (Micro Controller Unit, MCU) and N digital-to-analog conversion channels. The waveform output device is realized by means of MCU+digital-to-analog conversion channels, which can reduce the number of hardware chips used, simplify the hardware structure, and reduce the cost of the waveform output device.

[0012] The waveform output device can output stable multi-channel harmonic waveforms, thereby providing a stable waveform for the AC harmonic power source. When the controller of the waveform output device receives the waveform output signal, the period register value of the timer unit is first determined and set. Before outputting the waveform, the synchronous output parameters of the multi-channel harmonic waveform are set. Specifically, the digital-to-analog conversion output value corresponding to each waveform point data of each harmonic waveform is determined.

[0013] The digital-to-analog conversion output value is the DA (Digital-to-Analog) value. The DA value is the voltage value output after the digital-to-analog converter converts the digital signal into an analog signal. Through this method, digital data can be converted into an analog signal and the corresponding harmonic waveform can be output.

[0014] After the waveform point conversion information is obtained, the timer unit is started and starts counting. When the count value meets the period register value, the N digital-to-analog conversion channels output the corresponding DA value according to the waveform point data to be output and the waveform point conversion information obtained in the above steps, thereby realizing the harmonic waveform output.

[0015] This application designs a waveform output device that can be used through an MCU+digital-to-analog conversion chip, and proposes a method that can achieve synchronous output of multiple harmonic waveforms, so that the waveform output device no longer relies on the structure of a DSP+FPGA+DAC chip, reduces the hardware complexity of the waveform output device, and thus reduces the cost of the waveform output device.

[0016] In addition, the method for outputting multi-channel harmonic waveforms in the above technical solution provided by the present application may also have the following additional technical features:

[0017] In some technical solutions of the present application, optionally, the timer unit includes a first timer unit, and the waveform configuration parameters include a fundamental frequency value and a discrete decimation ratio; determining a period register value corresponding to the timer unit based on the waveform configuration parameters includes: determining the period register value of the first timer unit by the following formula (1):

[0018]

[0019] Among them, Per TIM1 is the period register value, f clk_TIM1 is the counting clock frequency of the first timer unit, f 基波 is the fundamental frequency value, and K is the discrete decimation ratio.

[0020] In this technical solution, the timer unit specifically includes a first timer unit. Exemplarily, the function of the first timer unit is to control the basic frequency of the output waveform. The first timer unit uses the timer synchronization function inside the controller to automatically execute the comparison and matching function at specific intervals, thereby triggering each digital-to-analog conversion channel to output a waveform.

[0021] After receiving the waveform output signal, the period register value of the first timer is first calculated by the above formula (1). Among them, the counting clock frequency f of the first timer unit is clk_TIM1 The unit is Hz. The fundamental frequency value f 基波 The unit is Hz. The discrete decimation rate K is the discrete decimation rate of the continuous waveform, that is, the number of DA data in one cycle, and also the buffer length of a single RAM (Random Access Memory). For example, K is 2 m , m is an integer greater than 10.

[0022] In some technical solutions of the present application, optionally, the timer further includes a second timer unit, the second timer unit includes N signal channels, and the N signal channels are respectively communicatively connected to the N digital-to-analog conversion channels; when the count value of the timer unit matches the period register value, the digital-to-analog conversion channel outputs a corresponding digital-to-analog conversion output value based on the waveform point data to be output and the waveform point conversion information, including:

[0023] When the count value of the first timer unit matches the period register value, the second timer unit is reset; and after the second timer unit is reset, the second timer unit outputs trigger signals to N digital-to-analog conversion channels through N signal channels respectively; wherein the trigger signal is used to control the digital-to-analog conversion channel to output the digital-to-analog conversion output value.

[0024] In this technical solution, in addition to the first timer unit, the timer package also includes a second timer unit, the number of signal channels of the second timer unit is N, and the N signal channels are connected to the N digital-to-analog conversion channels in a one-to-one correspondence. Exemplarily, the second timer unit can be obtained by combining multiple different timer units. For example, when N=6, that is, including 6 digital-to-analog conversion channels, the second timer unit can include a timer unit TIM2 and a timer unit TIM3, wherein the timer unit TIM2 includes 3 signal channels and TIM3 includes 4 signal channels.

[0025] The function of the second timer unit is to output trigger signals to N digital-to-analog conversion channels through N signal channels, and control the digital-to-analog conversion channels to output a DA value through the trigger signals. After the first timer unit starts counting, when the count value of the first timer unit reaches the period register value determined in the above steps, the first timer unit resets the second timer unit.

[0026] After the second timer unit is reset, after a specific period of time, the second timer unit generates an internal trigger signal through a comparison matching function. The penalty signal drives the N digital-to-analog conversion channels to output DA values, forming a harmonic waveform output.

[0027] In some technical solutions of the present application, optionally, the digital-to-analog conversion channel includes a flash memory unit, a direct memory access channel, a serial peripheral interface and a digital-to-analog conversion chip, the flash memory unit is communicatively connected to the serial peripheral interface through the direct memory access channel, and the serial peripheral interface is communicatively connected to the digital-to-analog conversion chip; the digital-to-analog conversion channel outputs a corresponding digital-to-analog conversion output value based on the waveform point data to be output and the waveform point conversion information, including:

[0028] The flash memory unit sends the waveform point data to be output to the digital-to-analog conversion chip through the direct memory access channel and the serial peripheral interface; the digital-to-analog conversion chip outputs the digital-to-analog conversion output value according to the waveform point data to be output and the waveform point conversion information.

[0029] In this technical solution, a digital-to-analog conversion channel includes a flash memory unit (Random Access Memory, RAM), a direct memory access channel (Direct Memory Access, DMA), a serial peripheral interface (Serial Peripheral Interface, SPI), and a digital-to-analog conversion (DAC) chip. The serial peripheral interface accesses the flash memory unit through the direct memory access channel, and the digital-to-analog conversion chip is connected through the serial peripheral interface.

[0030] Taking the example of including 6 digital-to-analog conversion channels, and the second timer unit including the timer unit TIM2 and the timer unit TIM3, the first 3 signal channels of the timer unit TIM2 and the timer unit TIM3 are respectively connected to 3 of the 6 digital-to-analog conversion channels. When the count value of the first timer unit TIM1 reaches the period register value, the first timer unit TIM1 resets the count values ​​of the timer unit TIM2 and the timer unit TIM3. The first 3 signal channels of the timer unit TIM2 and the timer unit TIM3 use the comparison matching function to generate a trigger signal after a specific time after the count value is reset, so that the direct memory access channel in the 6 digital-to-analog conversion channels simultaneously reads the AD (analog to digital) data in the flash memory unit, and passes the AD data to the data register of the serial peripheral interface.

[0031] Exemplarily, the timer unit TIM3 also includes a signal channel 4, which uses a comparison matching function to maintain a low level output when the serial peripheral interface sends data to the digital-to-analog conversion chip, thereby enabling the chip selection function of all digital-to-analog conversion chips. After all serial peripheral interfaces complete the transmission of a waveform point data, the signal channel 4 of the timer unit TIM3 outputs a high level, triggering the digital-to-analog conversion chip to convert the output.

[0032] Among them, the timer unit TIM2 and the timer unit TIM3 are set to internal circuit at initialization, count up, the automatic reload register value is set to the maximum value, the cyclic working mode is used, the comparison match function of the first three signal channels is enabled, but the output pin is not configured.

[0033] The comparison value per1 of the first three signal channels of the timer unit TIM2 and the timer unit TIM3 can be set to a smaller number, such as 100. The signal channel 4 of the timer unit TIM3 also enables the comparison match function, but the corresponding output pin needs to be configured to output a low level after the timer unit TIM3 count is reset, and the comparison value is set to per2. After the count value reaches the comparison value per2, it is converted to an output high level. Among them, the comparison values ​​per1 and per2 satisfy the following relationship (2):

[0034]

[0035] Among them, f clk_TIM3 The counting clock frequency of the timer unit TIM3, in Hz. SPI The word length of the data sent by the serial peripheral interface, in bits, f clk_SPI is the clock frequency (baud rate) of the serial peripheral interface bus, in Hz (bit / s).

[0036] The data buffer of the flash memory unit is used to store the DA data value of one continuous cycle calculated before each output. In order to ensure the accuracy of the fundamental wave and harmonic wave of the final output waveform, the length of the buffer, that is, the number of DA data, is generally 2. m , m is an integer greater than 10.

[0037] The function of the memory direct access channel and the serial peripheral interface is to automatically transfer the waveform DA data that has been calculated and stored in the data buffer area of ​​the flash memory unit to the data register of the serial peripheral interface, and then send it to the digital-to-analog conversion chip through the serial peripheral interface bus, transferring the data of one waveform point each time. The memory direct access channel is initialized to a cyclic working mode, the data transfer direction is from memory to peripherals, the memory address is enabled to increment, the peripheral address is not enabled to increment, the data word length depends on the number of bits of the digital-to-analog conversion chip, and a specific channel is selected so that the comparison events of the first three channels of the timer unit TIM2 and the timer unit TIM3 can trigger the corresponding memory direct access channel to start data transfer.

[0038] After the above settings are completed, all memory direct access channels are started and the trigger signal of the timer is waited for. The serial peripheral interface bus is initialized to the two-line send-only master mode, the chip select line is in software mode, the word length depends on the number of bits of the digital-to-analog conversion chip, and the baud rate is reasonably set according to the needs so that it does not exceed the maximum communication rate of the digital-to-analog conversion chip, while ensuring that the DA data of two consecutive waveform points do not overlap.

[0039] The function of the digital-to-analog conversion chip is to convert the waveform point data sent through the serial peripheral interface bus into actual voltage value output according to the waveform point conversion information, and output a specific waveform during the continuous conversion process.

[0040] In some technical solutions of the present application, optionally, the digital-to-analog conversion output value corresponding to each waveform point data of the harmonic waveform is determined, including: determining the output value corresponding to the unit waveform amplitude according to the harmonic order and the harmonic proportional content value to be output; determining the amplitude of each waveform point according to the harmonic proportional content value and the radian phase value of the harmonic; determining the digital-to-analog conversion output value according to the amplitude of each waveform point and the output value corresponding to the unit waveform amplitude.

[0041] In this technical solution, the fundamental amplitude is defined as 1, and the values ​​of each harmonic content are proportional values ​​with reference to the fundamental amplitude, expressed as a percentage. Based on this premise, the output value corresponding to the unit waveform amplitude is determined according to the harmonic order and harmonic proportional content value to be output.

[0042] Then, the amplitude of each waveform point to be output is calculated. In this process, the fundamental wave and each harmonic need to be taken into account to obtain the final amplitude of each waveform point.

[0043] After obtaining the output value corresponding to the unit waveform amplitude and the amplitude of each waveform point, the DA value corresponding to each waveform point actually required to be output, that is, the above-mentioned digital-to-analog conversion output value, is calculated.

[0044] After the above calculation steps are completed, the timer unit is started. After the timer unit is started, it will follow f 基波 ×K frequency triggers the memory direct access channel to transfer data to the serial peripheral interface, and finally the digital-to-analog conversion chip outputs the completed waveform signal. 基波 is the fundamental frequency value, and K is the discrete decimation ratio.

[0045] In some technical solutions of the present application, optionally, determining the output value corresponding to the unit waveform amplitude according to the harmonic order and the harmonic proportion content value to be output includes: determining the output value corresponding to the unit waveform amplitude by the following formula (3):

[0046]

[0047] Where D is the output value corresponding to the unit waveform amplitude, n is the number of the output harmonic waveform, m is the maximum number of the output harmonic waveform, Har n is the harmonic proportion content value of the nth harmonic.

[0048] In this technical solution, the DA value corresponding to the unit waveform amplitude is calculated by the above formula (3). When the 16-bit digital-to-analog conversion chip outputs an AC signal, the DA value corresponding to its half-wave amplitude is 2 (16-1) -1=32767. In formula (3), n is the order of the harmonic waveform to be output, n=1 is the fundamental wave, n=2 is the second harmonic, and so on. m is the maximum value of the output harmonic order, for example, m=64. Har n is the harmonic proportion content value of the nth harmonic. For example, Har n =1.

[0049] In some technical solutions of the present application, optionally, the amplitude of each waveform point is determined according to the harmonic proportion content value and the radian phase value of the harmonic, including: determining the amplitude of each waveform point by the following formula (4):

[0050]

[0051] Among them, Amp i is the amplitude of the i-th waveform point, n is the order of the output harmonic waveform, m is the maximum value of the order of the output harmonic waveform, Har n is the harmonic proportion content value of the nth harmonic, f 基波 is the fundamental frequency value, J is the number of digital-to-analog conversion data in one cycle, is the radian phase value of the nth harmonic.

[0052] In this technical solution, the amplitude of each waveform point is calculated by the above formula (4), where J is the number of digital-to-analog conversion data in one cycle, that is, there are J DA data in one cycle, so for each waveform, the above formula (4) needs to be calculated J times in total. is the radian phase value of the nth harmonic, specifically the phase value relative to the fundamental wave of the waveform.

[0053] The amplitude Amp of each waveform point is calculated i Afterwards, the DA value that each digital-to-analog conversion channel needs to output, that is, the digital-to-analog conversion output value, is calculated. Exemplarily, the digital-to-analog conversion output value is calculated by the following formula (5):

[0054] DA i = Amp i ×D+32768; (5)

[0055] Among them, DA i is the digital-to-analog conversion output value of the i-th waveform point, Amp i is the amplitude of the i-th waveform point, and D is the output value corresponding to the unit waveform amplitude. i The value may be negative. In order to satisfy the requirement that the input of the direct memory access channel must be positive, the Amp i Adding 32768 to the ×D result can raise the final digital-to-analog conversion output value to the positive range as a whole.

[0056] A second aspect of the present application provides an output device for a multi-channel harmonic waveform, the output device is applied to a waveform output device, the waveform output device includes a controller and N digital-to-analog conversion channels, the digital-to-analog conversion channel is used to output a channel of harmonic waveform, the controller includes a timer unit, N is a positive integer; the output device includes: a determination module, which is used for the controller to determine the period register value corresponding to the timer unit based on the waveform configuration parameters when receiving a waveform output signal; and determine the digital-to-analog conversion output value corresponding to each waveform point data of the harmonic waveform to obtain waveform point conversion information; a control module, which is used to control the timer unit to start counting, and when the count value of the timer unit matches the period register value, the digital-to-analog conversion channel outputs the corresponding digital-to-analog conversion output value based on the waveform point data to be output and the waveform point conversion information.

[0057] In this technical solution, the waveform output device includes a controller (Micro Controller Unit, MCU) and N digital-to-analog conversion channels. The waveform output device is realized by means of MCU+digital-to-analog conversion channels, which can reduce the number of hardware chips used, simplify the hardware structure, and reduce the cost of the waveform output device.

[0058] The waveform output device can output stable multi-channel harmonic waveforms, thereby providing a stable waveform for the AC harmonic power source. When the controller of the waveform output device receives the waveform output signal, the period register value of the timer unit is first determined and set. Before outputting the waveform, the synchronous output parameters of the multi-channel harmonic waveform are set. Specifically, the digital-to-analog conversion output value corresponding to each waveform point data of each harmonic waveform is determined.

[0059] The digital-to-analog conversion output value is the DA (Digital-to-Analog) value. The DA value is the voltage value output after the digital-to-analog converter converts the digital signal into an analog signal. Through this method, digital data can be converted into an analog signal and the corresponding harmonic waveform can be output.

[0060] After the waveform point conversion information is obtained, the timer unit is started and starts counting. When the count value meets the period register value, the N digital-to-analog conversion channels output the corresponding DA value according to the waveform point data to be output and the waveform point conversion information obtained in the above steps, thereby realizing the harmonic waveform output.

[0061] This application designs a waveform output device that can be used through an MCU+digital-to-analog conversion chip, and proposes a method that can achieve synchronous output of multiple harmonic waveforms, so that the waveform output device no longer relies on the structure of a DSP+FPGA+DAC chip, reduces the hardware complexity of the waveform output device, and thus reduces the cost of the waveform output device.

[0062] The third aspect of the present application provides an output device for a multi-channel harmonic waveform, comprising: a memory for storing programs or instructions; a processor for implementing the steps of the output method for a multi-channel harmonic waveform provided in any of the above-mentioned technical solutions when executing the programs or instructions, thereby being able to achieve the same technical effect. To avoid repetition, it will not be repeated here.

[0063] The fourth aspect of the present application provides a readable storage medium on which a program or instruction is stored. When the program or instruction is executed by a processor, the steps of the output method of a multi-channel harmonic waveform provided in any of the above-mentioned technical solutions are implemented, and thus the same technical effect can be achieved. To avoid repetition, it will not be repeated here.

[0064] The fifth aspect of the present application provides a waveform output device, including an output device for a multi-channel harmonic waveform as provided in any of the above technical solutions; and / or a readable storage medium as provided in any of the above technical solutions, so that the same technical effect can be achieved. To avoid repetition, it will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0065] The above and / or additional aspects and advantages of the present application will become apparent and easily understood from the description of the embodiments in conjunction with the following drawings, in which:

[0066] Figure 1 A flow chart showing a method for outputting a multi-channel harmonic waveform in some embodiments of the present application is shown;

[0067] Figure 2 A schematic diagram of output logic of a waveform output device according to some embodiments of the present application is shown;

[0068] Figure 3 A flow chart showing a method for outputting a multi-channel harmonic waveform in some embodiments of the present application is shown;

[0069] Figure 4 A structural block diagram showing a device for outputting multi-channel harmonic waveforms in some embodiments of the present application is shown;

[0070] Figure 5 A structural block diagram of a device for outputting multi-channel harmonic waveforms according to some embodiments of the present application is shown. DETAILED DESCRIPTION

[0071] In order to more clearly understand the above-mentioned purposes, features and advantages of the present application, the present application is further described in detail below in conjunction with the accompanying drawings and specific implementation methods. It should be noted that the embodiments of the present application and the features in the embodiments can be combined with each other without conflict.

[0072] In the following description, many specific details are set forth to facilitate a full understanding of the present application. However, the present application may also be implemented in other ways different from those described herein. Therefore, the scope of protection of the present application is not limited to the specific embodiments disclosed below.

[0073] Refer to the following Figures 1 to 5 Describe the output method and apparatus, storage medium and output device of multi-channel harmonic waveforms provided according to some embodiments of the present application.

[0074] In some embodiments of the present application, a method for outputting multiple harmonic waveforms is provided. The output method is applied to a waveform output device. The waveform output device includes a controller and N digital-to-analog conversion channels. The digital-to-analog conversion channels are used to output one harmonic waveform. The controller includes a timer unit, and N is a positive integer.

[0075] Figure 1 A flowchart showing a method for outputting a multi-channel harmonic waveform in some embodiments of the present application is shown. Figure 1 As shown, the output methods include:

[0076] Step 102, when receiving the waveform output signal, the controller determines the period register value corresponding to the timer unit based on the waveform configuration parameters;

[0077] Step 104, determining the digital-to-analog conversion output value corresponding to each waveform point data of the harmonic waveform, and obtaining waveform point conversion information;

[0078] Step 106, controlling the timer unit to start counting, when the count value of the timer unit matches the period register value, the digital-to-analog conversion channel outputs the corresponding digital-to-analog conversion output value based on the waveform point data to be output and the waveform point conversion information.

[0079] In this embodiment, the waveform output device includes a controller (Micro Controller Unit, MCU) and N digital-to-analog conversion channels. The waveform output device is realized by MCU+digital-to-analog conversion channel, which can reduce the number of hardware chips used, simplify the hardware structure, and reduce the cost of the waveform output device.

[0080] The waveform output device can output stable multi-channel harmonic waveforms, thereby providing a stable waveform for the AC harmonic power source. When the controller of the waveform output device receives the waveform output signal, the period register value of the timer unit is first determined and set. Before outputting the waveform, the synchronous output parameters of the multi-channel harmonic waveform are set. Specifically, the digital-to-analog conversion output value corresponding to each waveform point data of each harmonic waveform is determined.

[0081] The digital-to-analog conversion output value is the DA (Digital-to-Analog) value. The DA value is the voltage value output after the digital-to-analog converter converts the digital signal into an analog signal. Through this method, digital data can be converted into an analog signal and the corresponding harmonic waveform can be output.

[0082] After the waveform point conversion information is obtained, the timer unit is started and starts counting. When the count value meets the period register value, the N digital-to-analog conversion channels output the corresponding DA value according to the waveform point data to be output and the waveform point conversion information obtained in the above steps, thereby realizing the harmonic waveform output.

[0083] This application designs a waveform output device that can be used through an MCU+digital-to-analog conversion chip, and proposes a method that can achieve synchronous output of multiple harmonic waveforms, so that the waveform output device no longer relies on the structure of a DSP+FPGA+DAC chip, reduces the hardware complexity of the waveform output device, and thus reduces the cost of the waveform output device.

[0084] In some embodiments of the present application, optionally, the timer unit includes a first timer unit, and the waveform configuration parameters include a fundamental frequency value and a discrete decimation ratio; determining a period register value corresponding to the timer unit based on the waveform configuration parameters includes: determining the period register value of the first timer unit by the following formula (1):

[0085]

[0086] Among them, Per TIM1 is the period register value, f clk_TIM1 is the counting clock frequency of the first timer unit, f 基波 is the fundamental frequency value, and K is the discrete decimation ratio.

[0087] In this embodiment, the timer unit specifically includes a first timer unit. Exemplarily, the function of the first timer unit is to control the basic frequency of the output waveform. The first timer unit uses the timer synchronization function inside the controller to automatically perform the comparison and matching function at specific intervals, thereby triggering each digital-to-analog conversion channel to output a waveform.

[0088] After receiving the waveform output signal, the period register value of the first timer is first calculated by the above formula (1). Among them, the counting clock frequency f of the first timer unit is clk_TIM1 The unit is Hz. The fundamental frequency value f 基波The unit is Hz. The discrete decimation rate K is the discrete decimation rate of the continuous waveform, that is, the number of DA data in one cycle, and also the buffer length of a single RAM (Random Access Memory). For example, K is 2 m , m is an integer greater than 10.

[0089] In some embodiments of the present application, optionally, the timer further includes a second timer unit, the second timer unit includes N signal channels, and the N signal channels are respectively communicatively connected to the N digital-to-analog conversion channels; when the count value of the timer unit matches the period register value, the digital-to-analog conversion channel outputs a corresponding digital-to-analog conversion output value based on the waveform point data to be output and the waveform point conversion information, including:

[0090] When the count value of the first timer unit matches the period register value, the second timer unit is reset; and after the second timer unit is reset, the second timer unit outputs trigger signals to N digital-to-analog conversion channels through N signal channels respectively; wherein the trigger signal is used to control the digital-to-analog conversion channel to output the digital-to-analog conversion output value.

[0091] In this embodiment, in addition to the first timer unit, the timer package also includes a second timer unit, the number of signal channels of the second timer unit is N, and the N signal channels are connected to the N digital-to-analog conversion channels in a one-to-one correspondence. Figure 2 The output logic diagram of the waveform output device of some embodiments of the present application is shown as follows: Figure 2 As shown, the second timer unit can be obtained by combining multiple different timer units. For example, when N=6, that is, including 6 digital-to-analog conversion channels, the second timer unit can include a timer unit TIM2 and a timer unit TIM3, wherein the timer unit TIM2 includes 3 signal channels, including CH1, CH2 and CH3. TIM3 includes 4 signal channels, including CH4, CH5, CH6 and CH7.

[0092] Among them, TIM1 is the first timer unit, TIM2 and TIM3 form the second timer unit. RAM1 to RAM6 represent the flash memory units corresponding to the six digital-to-analog conversion channels, DMA channel is the direct memory access channel, SPI1 to SPA6 represent six different serial peripheral interfaces, DAC1 to DAC6 represent six digital-to-analog conversion chips, and OUT1 to OUT6 represent the outputs of the six digital-to-analog conversion channels.

[0093] The function of the second timer unit is to output trigger signals to N digital-to-analog conversion channels through N signal channels, and control the digital-to-analog conversion channels to output a DA value through the trigger signals. After the first timer unit starts counting, when the count value of the first timer unit reaches the period register value determined in the above steps, the first timer unit resets the second timer unit.

[0094] After the second timer unit is reset, after a specific period of time, the second timer unit generates an internal trigger signal through a comparison matching function. The penalty signal drives the N digital-to-analog conversion channels to output DA values, forming a harmonic waveform output.

[0095] In some embodiments of the present application, optionally, the digital-to-analog conversion channel includes a flash memory unit, a direct memory access channel, a serial peripheral interface, and a digital-to-analog conversion chip, the flash memory unit is communicatively connected to the serial peripheral interface through the direct memory access channel, and the serial peripheral interface is communicatively connected to the digital-to-analog conversion chip; the digital-to-analog conversion channel outputs a corresponding digital-to-analog conversion output value based on the waveform point data to be output and the waveform point conversion information, including:

[0096] The flash memory unit sends the waveform point data to be output to the digital-to-analog conversion chip through the direct memory access channel and the serial peripheral interface; the digital-to-analog conversion chip outputs the digital-to-analog conversion output value according to the waveform point data to be output and the waveform point conversion information.

[0097] In this embodiment, a digital-to-analog conversion channel includes a flash memory unit (Random Access Memory, RAM), a direct memory access channel (Direct Memory Access, DMA), a serial peripheral interface (Serial Peripheral Interface, SPI), and a digital-to-analog conversion (DAC) chip. The serial peripheral interface accesses the flash memory unit through the direct memory access channel, and the digital-to-analog conversion chip is connected through the serial peripheral interface.

[0098] Taking the example of including 6 digital-to-analog conversion channels, and the second timer unit including the timer unit TIM2 and the timer unit TIM3, the first 3 signal channels of the timer unit TIM2 and the timer unit TIM3 are respectively connected to 3 of the 6 digital-to-analog conversion channels. When the count value of the first timer unit TIM1 reaches the period register value, the first timer unit TIM1 resets the count values ​​of the timer unit TIM2 and the timer unit TIM3. The first 3 signal channels of the timer unit TIM2 and the timer unit TIM3 use the comparison matching function to generate a trigger signal after a specific time after the count value is reset, so that the direct memory access channel in the 6 digital-to-analog conversion channels simultaneously reads the AD (analog to digital) data in the flash memory unit, and passes the AD data to the data register of the serial peripheral interface.

[0099] Exemplarily, the timer unit TIM3 also includes a signal channel 4, which uses a comparison matching function to maintain a low level output when the serial peripheral interface sends data to the digital-to-analog conversion chip, thereby enabling the chip selection function of all digital-to-analog conversion chips. After all serial peripheral interfaces complete the transmission of a waveform point data, the signal channel 4 of the timer unit TIM3 outputs a high level, triggering the digital-to-analog conversion chip to convert the output.

[0100] Among them, the timer unit TIM2 and the timer unit TIM3 are set to internal circuit at initialization, count up, the automatic reload register value is set to the maximum value, the cyclic working mode is used, the comparison match function of the first three signal channels is enabled, but the output pin is not configured.

[0101] The comparison value per1 of the first three signal channels of the timer unit TIM2 and the timer unit TIM3 can be set to a smaller number, such as 100. The signal channel 4 of the timer unit TIM3 also enables the comparison match function, but the corresponding output pin needs to be configured to output a low level after the timer unit TIM3 count is reset, and the comparison value is set to per2. After the count value reaches the comparison value per2, it is converted to an output high level. Among them, the comparison values ​​per1 and per2 satisfy the following relationship (2):

[0102]

[0103] Among them, f clk_TIM3 The counting clock frequency of the timer unit TIM3, in Hz. SPI The word length of the data sent by the serial peripheral interface, in bits, f clk_SPI is the clock frequency (baud rate) of the serial peripheral interface bus, in Hz (bit / s).

[0104] The data buffer of the flash memory unit is used to store the DA data value of one continuous cycle calculated before each output. In order to ensure the accuracy of the fundamental wave and harmonic wave of the final output waveform, the length of the buffer, that is, the number of DA data, is generally 2. m , m is an integer greater than 10.

[0105] The function of the memory direct access channel and the serial peripheral interface is to automatically transfer the waveform DA data that has been calculated and stored in the data buffer area of ​​the flash memory unit to the data register of the serial peripheral interface, and then send it to the digital-to-analog conversion chip through the serial peripheral interface bus, transferring the data of one waveform point each time. The memory direct access channel is initialized to a cyclic working mode, the data transfer direction is from memory to peripherals, the memory address is enabled to increment, the peripheral address is not enabled to increment, the data word length depends on the number of bits of the digital-to-analog conversion chip, and a specific channel is selected so that the comparison events of the first three channels of the timer unit TIM2 and the timer unit TIM3 can trigger the corresponding memory direct access channel to start data transfer.

[0106] After the above settings are completed, all memory direct access channels are started and the trigger signal of the timer is waited for. The serial peripheral interface bus is initialized to the two-line send-only master mode, the chip select line is in software mode, the word length depends on the number of bits of the digital-to-analog conversion chip, and the baud rate is reasonably set according to the needs so that it does not exceed the maximum communication rate of the digital-to-analog conversion chip, while ensuring that the DA data of two consecutive waveform points do not overlap.

[0107] The function of the digital-to-analog conversion chip is to convert the waveform point data sent through the serial peripheral interface bus into actual voltage value output according to the waveform point conversion information, and output a specific waveform during the continuous conversion process.

[0108] For example, Figure 3 A flowchart showing a method for outputting a multi-channel harmonic waveform in some embodiments of the present application is shown. Figure 3 As shown, the method includes:

[0109] Step 302, hardware initialization;

[0110] In this process, the timer unit, flash memory unit, direct memory access channel and serial peripheral interface are initialized, and the fundamental frequency of all channels, the phase of each channel relative to the first channel, and the harmonic content and phase of each channel are set.

[0111] Step 304, setting waveform parameters of each channel;

[0112] Step 306, determine whether to start output; if yes, go to step 308, otherwise repeat step 306;

[0113] Step 308, calculating the period register value of TIM1;

[0114] Step 310, calculating the waveform DA values ​​of all channels;

[0115] Step 312, start all timer units;

[0116] Step 314, TIM1 count overflows, triggering TIM2 and TIM3 to reset, and pulling down the chip select pins of all DAC chips;

[0117] Step 316, the first three channels of TIM2 and TIM3 have a comparison match time, triggering the six DMA channels to work and send the waveform DA value to SPI;

[0118] Step 318, SPI sends the waveform DA value to the corresponding DAC chip. After sending, the chip select pin is pulled high, and the DAC chip converts the output.

[0119] The waveform output device of the present application has a simple hardware structure, uses fewer types of chips, and saves costs. The waveform DA value is calculated according to the set waveform parameter value before output, and the parameter setting degree of freedom is relatively high. Using the automatic trigger function, after the waveform DA value calculation is completed, it no longer occupies the CPU's computing time, and the degree of automation is high.

[0120] In some embodiments of the present application, optionally, the digital-to-analog conversion output value corresponding to each waveform point data of the harmonic waveform is determined, including: determining the output value corresponding to the unit waveform amplitude based on the harmonic order and the harmonic proportional content value to be output; determining the amplitude of each waveform point based on the harmonic proportional content value and the radian phase value of the harmonic; determining the digital-to-analog conversion output value based on the amplitude of each waveform point and the output value corresponding to the unit waveform amplitude.

[0121] In this embodiment, the fundamental amplitude is defined as 1, and each harmonic content value is a proportional value with reference to the fundamental amplitude, expressed as a percentage. Based on this premise, the output value corresponding to the unit waveform amplitude is determined according to the harmonic order and harmonic proportional content value to be output.

[0122] Then, the amplitude of each waveform point to be output is calculated. In this process, the fundamental wave and each harmonic need to be taken into account to obtain the final amplitude of each waveform point.

[0123] After obtaining the output value corresponding to the unit waveform amplitude and the amplitude of each waveform point, the DA value corresponding to each waveform point actually required to be output, that is, the above-mentioned digital-to-analog conversion output value, is calculated.

[0124] After the above calculation steps are completed, the timer unit is started. After the timer unit is started, it will follow f 基波×K frequency triggers the memory direct access channel to transfer data to the serial peripheral interface, and finally the digital-to-analog conversion chip outputs the completed waveform signal. 基波 is the fundamental frequency value, and K is the discrete decimation ratio.

[0125] In some embodiments of the present application, optionally, determining the output value corresponding to the unit waveform amplitude according to the harmonic order and the harmonic proportion content value to be output includes: determining the output value corresponding to the unit waveform amplitude by the following formula (3):

[0126]

[0127] Where D is the output value corresponding to the unit waveform amplitude, n is the number of the output harmonic waveform, m is the maximum number of the output harmonic waveform, Har n is the harmonic proportion content value of the nth harmonic.

[0128] In this embodiment, the DA value corresponding to the unit waveform amplitude is calculated by the above formula (3). When the 16-bit digital-to-analog conversion chip outputs an AC signal, the DA value corresponding to its half-wave amplitude is 2 (16-1) -1=32767. In formula (3), n is the order of the harmonic waveform to be output, n=1 is the fundamental wave, n=2 is the second harmonic, and so on. m is the maximum value of the output harmonic order, for example, m=64. Har n is the harmonic proportion content value of the nth harmonic. For example, Har n =1.

[0129] In some embodiments of the present application, optionally, determining the amplitude of each waveform point according to the harmonic proportion content value and the radian phase value of the harmonic includes: determining the amplitude of each waveform point by the following formula (4):

[0130]

[0131] Among them, Amp i is the amplitude of the i-th waveform point, n is the order of the output harmonic waveform, m is the maximum value of the order of the output harmonic waveform, Har n is the harmonic proportion content value of the nth harmonic, f 基波 is the fundamental frequency value, J is the number of digital-to-analog conversion data in one cycle, is the radian phase value of the nth harmonic.

[0132] In this embodiment, the amplitude of each waveform point is calculated by the above formula (4), where J is the number of digital-to-analog conversion data in one cycle, that is, there are J DA data in one cycle, so for each waveform, the above formula (4) needs to be calculated J times in total. is the radian phase value of the nth harmonic, specifically the phase value relative to the fundamental wave of the waveform.

[0133] The amplitude Amp of each waveform point is calculated i Afterwards, the DA value that each digital-to-analog conversion channel needs to output, that is, the digital-to-analog conversion output value, is calculated. Exemplarily, the digital-to-analog conversion output value is calculated by the following formula (5):

[0134] DA i = Amp i ×D+32768; (5)

[0135] Among them, DA i is the digital-to-analog conversion output value of the i-th waveform point, Amp i is the amplitude of the i-th waveform point, and D is the output value corresponding to the unit waveform amplitude. i The value may be negative. In order to satisfy the requirement that the input of the direct memory access channel must be positive, the Amp i Adding 32768 to the ×D result can raise the final digital-to-analog conversion output value to the positive range as a whole.

[0136] In some embodiments of the present application, a device for outputting multiple harmonic waveforms is provided. The output device is applied to a waveform output device. The waveform output device includes a controller and N digital-to-analog conversion channels. The digital-to-analog conversion channels are used to output one harmonic waveform. The controller includes a timer unit, and N is a positive integer.

[0137] Figure 4 The structure block diagram of the output device of multi-channel harmonic waveform in some embodiments of the present application is shown as follows: Figure 4 As shown, the output device 400 includes: a determination module 402, which is used for the controller to determine the period register value corresponding to the timer unit based on the waveform configuration parameters when receiving the waveform output signal; and determine the digital-to-analog conversion output value corresponding to each waveform point data of the harmonic waveform to obtain waveform point conversion information; a control module 404, which is used to control the timer unit to start counting, and when the count value of the timer unit matches the period register value, the digital-to-analog conversion channel outputs the corresponding digital-to-analog conversion output value based on the waveform point data to be output and the waveform point conversion information.

[0138] In this embodiment, the waveform output device includes a controller (Micro Controller Unit, MCU) and N digital-to-analog conversion channels. The waveform output device is realized by MCU+digital-to-analog conversion channel, which can reduce the number of hardware chips used, simplify the hardware structure, and reduce the cost of the waveform output device.

[0139] The waveform output device can output stable multi-channel harmonic waveforms, thereby providing a stable waveform for the AC harmonic power source. When the controller of the waveform output device receives the waveform output signal, the period register value of the timer unit is first determined and set. Before outputting the waveform, the synchronous output parameters of the multi-channel harmonic waveform are set. Specifically, the digital-to-analog conversion output value corresponding to each waveform point data of each harmonic waveform is determined.

[0140] The digital-to-analog conversion output value is the DA (Digital-to-Analog) value. The DA value is the voltage value output after the digital-to-analog converter converts the digital signal into an analog signal. Through this method, digital data can be converted into an analog signal and the corresponding harmonic waveform can be output.

[0141] After the waveform point conversion information is obtained, the timer unit is started and starts counting. When the count value meets the period register value, the N digital-to-analog conversion channels output the corresponding DA value according to the waveform point data to be output and the waveform point conversion information obtained in the above steps, thereby realizing the harmonic waveform output.

[0142] This application designs a waveform output device that can be used through an MCU+digital-to-analog conversion chip, and proposes a method that can achieve synchronous output of multiple harmonic waveforms, so that the waveform output device no longer relies on the structure of a DSP+FPGA+DAC chip, reduces the hardware complexity of the waveform output device, and thus reduces the cost of the waveform output device.

[0143] In some embodiments of the present application, a device for outputting a multi-channel harmonic waveform is provided. Figure 5 The structure block diagram of the output device of multi-channel harmonic waveform in some embodiments of the present application is shown as follows: Figure 5 As shown, the output device 500 includes: a memory 502 for storing programs or instructions; a processor 504, for implementing the steps of the output method of the multi-channel harmonic waveform provided in any of the above embodiments when executing the programs or instructions, so that the same technical effect can be achieved. To avoid repetition, it will not be repeated here.

[0144] In some embodiments of the present application, a readable storage medium is provided, on which a program or instruction is stored. When the program or instruction is executed by a processor, the steps of the output method of a multi-channel harmonic waveform provided in any of the above embodiments are implemented, and thus the same technical effect can be achieved. To avoid repetition, it will not be repeated here.

[0145] In some embodiments of the present application, a waveform output device is provided, including an output device for a multi-channel harmonic waveform as provided in any of the above embodiments; and / or a readable storage medium as provided in any of the above embodiments, so that the same technical effect can be achieved. To avoid repetition, it will not be repeated here.

[0146] The methods may be implemented in various ways according to specific features and / or example applications. For example, the methods may be implemented by a combination of hardware, firmware, and / or software. For example, in a hardware implementation, the processor may be implemented in one or more application specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field programmable gate arrays (FPGAs), controllers, microcontrollers, microprocessors, electronic devices, other equipment units for performing the above functions, and / or combinations thereof.

[0147] A computer readable storage medium may be a tangible device that can retain and store instructions for use by an instruction execution device. A computer readable storage medium may be an electronic storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any suitable combination of the above devices, but is not limited thereto. A non-exhaustive list of more specific examples of computer readable storage media includes: a portable computer floppy disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM) or flash memory, a static random access memory (SRAM), a portable compact disc read-only memory (CD-ROM), a digital versatile disk (DVD), a memory card, a floppy disk, a coding mechanical device (such as a punch card or a groove with a raised structure with instructions recorded thereon), and any suitable combination of the above devices. The computer-readable storage medium used herein should not be understood as a transmission signal itself, such as radio waves or other freely propagating electromagnetic waves, electromagnetic waves propagated through wave guides or other transmission media, or electrical signals transmitted through wires.

[0148] In the description of this application, the term "plurality" refers to two or more than two. Unless otherwise clearly defined, the terms "upper" and "lower" indicate positions or positional relationships based on the positions or positional relationships described in the accompanying drawings. They are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation. Therefore, they cannot be understood as limitations on this application. The terms "connect", "install", "fixed", etc. should be understood in a broad sense. For example, "connection" can be a fixed connection, a detachable connection, or an integral connection; it can be directly connected or indirectly connected through an intermediate medium. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0149] In the description of the present application, the description of the terms "one embodiment", "some embodiments", "specific embodiments", etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In the present application, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments or examples in a suitable manner.

[0150] The above description is only the preferred embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A method for outputting multi-channel harmonic waveforms, characterized in that: The output method is applied to a waveform output device, the waveform output device includes a controller and N digital-to-analog conversion channels, the digital-to-analog conversion channels are used to output a harmonic waveform, the controller includes a timer unit, and N is a positive integer; the output method includes: The controller determines the period register value corresponding to the timer unit based on the waveform configuration parameter when receiving the waveform output signal; Determine the digital-to-analog conversion output value corresponding to each waveform point data of the harmonic waveform to obtain waveform point conversion information; The timer unit is controlled to start counting. When the count value of the timer unit matches the period register value, the digital-to-analog conversion channel outputs a corresponding digital-to-analog conversion output value based on the waveform point data to be output and the waveform point conversion information.

2. The output method according to claim 1, characterized in that: The timer unit includes a first timer unit, and the waveform configuration parameters include a fundamental frequency value and a discrete decimation ratio; The step of determining a period register value corresponding to the timer unit based on a waveform configuration parameter includes: The period register value of the first timer unit is determined by the following formula: Among them, Per TIM1 is the period register value, f clk_TIM1 is the counting clock frequency of the first timer unit, f 基波 is the fundamental frequency value, and K is the discrete decimation ratio.

3. The output method according to claim 2, characterized in that: The timer further includes a second timer unit, the second timer unit includes N signal channels, and the N signal channels are respectively communicatively connected with the N digital-to-analog conversion channels; When the count value of the timer unit matches the period register value, the digital-to-analog conversion channel outputs a corresponding digital-to-analog conversion output value based on the waveform point data to be output and the waveform point conversion information, including: When the count value of the first timer unit matches the period register value, resetting the second timer unit; and After the second timer unit is reset, the second timer unit outputs a trigger signal to the N digital-to-analog conversion channels respectively through the N signal channels; wherein the trigger signal is used to control the digital-to-analog conversion channel to output the digital-to-analog conversion output value.

4. The output method according to any one of claims 1 to 3, characterized in that: The digital-to-analog conversion channel includes a flash memory unit, a direct memory access channel, a serial peripheral interface and a digital-to-analog conversion chip, the flash memory unit is communicatively connected to the serial peripheral interface via the direct memory access channel, and the serial peripheral interface is communicatively connected to the digital-to-analog conversion chip; The digital-to-analog conversion channel outputs a corresponding digital-to-analog conversion output value based on the waveform point data to be output and the waveform point conversion information, including: The flash memory unit sends the waveform point data to be output to the digital-to-analog conversion chip through the direct memory access channel and the serial peripheral interface; The digital-to-analog conversion chip outputs the digital-to-analog conversion output value according to the waveform point data to be output and the waveform point conversion information.

5. The output method according to any one of claims 1 to 3, characterized in that: The step of determining the digital-to-analog conversion output value corresponding to each waveform point data of the harmonic waveform includes: Determine the output value corresponding to the unit waveform amplitude according to the harmonic order and harmonic proportion content value to be output; Determine the amplitude of each waveform point according to the harmonic proportion content value and the radian phase value of the harmonic; The digital-to-analog conversion output value is determined according to the amplitude of each waveform point and the output value corresponding to the unit waveform amplitude.

6. The output method according to claim 5, characterized in that: Determining the output value corresponding to the unit waveform amplitude according to the harmonic order to be output and the harmonic proportion content value includes: The output value corresponding to the unit waveform amplitude is determined by the following formula: Wherein, D is the output value corresponding to the unit waveform amplitude, n is the order of the output harmonic waveform, m is the maximum value of the order of the output harmonic waveform, Har n is the harmonic proportion content value of the nth harmonic.

7. The output method according to claim 5, characterized in that: Determining the amplitude of each waveform point according to the harmonic proportion content value and the radian phase value of the harmonic includes: The amplitude of each waveform point is determined by the following formula: Among them, Amp i is the amplitude of the i-th waveform point, n is the order of the output harmonic waveform, m is the maximum value of the order of the output harmonic waveform, Har n is the harmonic proportion content value of the nth harmonic, f 基波 is the fundamental frequency value, J is the number of digital-to-analog conversion data in one cycle, is the radian phase value of the nth harmonic.

8. A device for outputting multi-channel harmonic waveforms, characterized in that: The output device is applied to a waveform output device, the waveform output device includes a controller and N digital-to-analog conversion channels, the digital-to-analog conversion channels are used to output a harmonic waveform, the controller includes a timer unit, N is a positive integer; the output device includes: a determination module, configured for the controller to determine a period register value corresponding to the timer unit based on a waveform configuration parameter when the waveform output signal is received; and Determine the digital-to-analog conversion output value corresponding to each waveform point data of the harmonic waveform to obtain waveform point conversion information; The control module is used to control the timer unit to start counting. When the count value of the timer unit matches the period register value, the digital-to-analog conversion channel outputs the corresponding digital-to-analog conversion output value based on the waveform point data to be output and the waveform point conversion information.

9. A device for outputting multi-channel harmonic waveforms, characterized in that: include: Memory, used to store programs or instructions; A processor, configured to implement the steps of the method for outputting a multi-channel harmonic waveform as described in any one of claims 1 to 7 when executing the program or instruction.

10. A readable storage medium having a program or instruction stored thereon, characterized in that: When the program or instruction is executed by a processor, the steps of the method for outputting a multi-channel harmonic waveform as claimed in any one of claims 1 to 7 are implemented.

11. A waveform output device, characterized in that: include: The output device of multi-channel harmonic waveform as claimed in claim 8 or 9; and / or The readable storage medium as claimed in claim 10.

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