Semiconductor photonic crystal light-emitting structure and preparation method thereof
By introducing a passivation protective layer into the photonic crystal layer of the semiconductor photonic crystal luminescent structure, the material of the second semiconductor layer is prevented from growing in the groove, and the problem of insufficient light field mode regulation capability in the prior art is solved, and more efficient light field mode regulation and laser performance improvement are achieved.
Patent Information
- Application Number
- CN202510134531.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-02-07
- Publication Date
- 2025-03-07
- Estimated Expiration
- 2045-02-07
AI Technical Summary
The existing semiconductor photonic crystal luminescent structures have shortcomings in the light field mode regulation capabilities, which affects their performance.
By introducing a passivation protective layer into the photonic crystal layer, the material of the second semiconductor layer is prevented from growing in the groove, thereby increasing the duty cycle of the groove and enhancing the light field mode regulation capability.
The light field mode regulation capability of the semiconductor photonic crystal luminescent structure is improved, the wavelength concentration of its emitted light is enhanced, and the lasing performance is improved.
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Figure CN119581993A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of semiconductor technology, and in particular to a semiconductor photonic crystal light-emitting structure and a preparation method thereof. Background Art
[0002] Semiconductor lasers are widely used in the modern optoelectronics industry. Introducing embedded periodic photonic crystals into semiconductor lasers is a general method to effectively control the light field mode and manufacture various high-performance semiconductor lasers. The light output performance (mode, divergence angle, slope efficiency, etc.) of semiconductor lasers with photonic crystals is often closely related to the processing quality of the photonic crystals. Producing photonic crystals that meet theoretical design requirements (morphology, size, and roughness) is the top priority for exerting the photonic crystal effect and achieving high-performance lasing. Summary of the invention
[0003] Therefore, the technical problem to be solved by the present invention is how to improve the light field mode control capability of a semiconductor photonic crystal light-emitting structure, thereby providing a semiconductor photonic crystal light-emitting structure and a preparation method thereof.
[0004] The present application provides a semiconductor photonic crystal light-emitting structure, comprising: a semiconductor substrate layer; an active layer located on one side of the semiconductor substrate layer; a photonic crystal layer located on the side of the active layer away from the semiconductor substrate layer, wherein the photonic crystal layer comprises a first semiconductor layer, a second semiconductor layer and a passivation protection layer, wherein the first semiconductor layer has a groove, wherein the groove extends from a surface of the first semiconductor layer on a side away from the active layer to the first semiconductor layer, wherein the passivation protection layer is located on an inner wall of the groove, and wherein the second semiconductor layer is located on a surface of the first semiconductor layer on a side away from the active layer between adjacent grooves and does not extend into the groove.
[0005] Optionally, a semiconductor protection layer is further included, wherein the passivation protection layer is located on a side of the semiconductor protection layer away from the first semiconductor layer.
[0006] Optionally, the material of the passivation protection layer is insulating oxide or insulating nitride.
[0007] Optionally, the semiconductor protection layer is a phosphide semiconductor material, a selenide semiconductor material or a sulfide semiconductor material.
[0008] Optionally, the thickness of the passivation protection layer is 1 nm-50 nm.
[0009] Optionally, the thickness of the semiconductor protection layer is 1nm-50nm.
[0010] Optionally, the second semiconductor layer includes: a first part and a second part, the first part is located on a side of the groove facing away from the semiconductor substrate layer, and the second part is located on a side of the first semiconductor layer between adjacent grooves facing away from the semiconductor substrate layer; wherein a surface of the first part facing the groove is recessed into the first part relative to a surface of the second part facing the first semiconductor layer.
[0011] Optionally, a region of the groove surrounded by a surface of the passivation protection layer facing away from the first semiconductor layer is rectangular in shape along a cross section perpendicular to the semiconductor substrate layer.
[0012] Optionally, the area of the groove surrounded by the surface of the passivation protection layer facing away from the first semiconductor layer has a first end facing away from the semiconductor substrate layer and a second end facing the semiconductor substrate layer, and the width of the first end along a direction parallel to the semiconductor substrate layer is smaller than the width of the second end along a direction parallel to the semiconductor substrate layer.
[0013] Optionally, a region of the groove surrounded by a surface of the passivation protection layer facing away from the first semiconductor layer has a right trapezoidal shape along a cross section perpendicular to the semiconductor substrate layer.
[0014] Optionally, an area of the groove surrounded by a surface of the passivation protection layer facing away from the first semiconductor layer increases first and then decreases along a direction parallel to the width of the semiconductor substrate layer from the semiconductor substrate layer to the active layer.
[0015] Optionally, it also includes: a Bragg reflector located on the side of the photonic crystal layer away from the active layer; a carrier transport layer located between the semiconductor substrate layer and the active layer, the doping type of the carrier transport layer is opposite to the doping type of the Bragg reflector.
[0016] The present application also provides a method for preparing a semiconductor photonic crystal light-emitting structure, comprising: forming an active layer on one side of a semiconductor substrate layer; forming a photonic crystal layer on a side of the active layer away from the semiconductor substrate layer; wherein the step of forming the photonic crystal comprises: forming a first semiconductor layer on a side of the active layer away from the semiconductor substrate layer; forming a groove, wherein the groove extends from a surface of the first semiconductor layer away from the active layer to the first semiconductor layer; forming a passivation protection layer on an inner wall of the groove; and forming a second semiconductor layer on a surface of the first semiconductor layer away from the active layer between adjacent grooves, wherein the second semiconductor layer does not extend into the groove.
[0017] Optionally, the step of forming a passivation protection layer on the inner wall of the groove includes: forming an initial passivation protection layer on the inner wall of the groove and on the side of the first semiconductor layer between adjacent grooves facing away from the semiconductor substrate layer; forming a mask layer covering the initial passivation protection layer in the groove, the mask layer exposing the initial passivation protection layer on the side of the first semiconductor layer between adjacent grooves facing away from the semiconductor substrate layer; after etching away the initial passivation protection layer on the side of the first semiconductor layer between adjacent grooves facing away from the semiconductor substrate layer using the mask layer as a mask, removing the mask layer.
[0018] Optionally, it also includes: before forming the initial passivation protection layer, forming an initial semiconductor protection layer on the inner wall surface of the groove and the surface of the first semiconductor layer between adjacent grooves facing away from the semiconductor substrate layer; after using the mask layer as a mask to etch and remove the initial passivation protection layer on the side of the first semiconductor layer between adjacent grooves facing away from the semiconductor substrate layer, using the mask layer as a mask to etch and remove the initial semiconductor protection layer on the side of the first semiconductor layer between adjacent grooves facing away from the semiconductor substrate layer, the initial semiconductor protection layer on the inner wall of the groove forms a semiconductor protection layer.
[0019] The technical solution of the present invention has the following beneficial effects: In the semiconductor photonic crystal light-emitting structure provided by the technical solution of the present invention, the passivation protective layer is not a semiconductor material. The passivation protective layer is used to protect the inner wall of the groove and prevent the material of the second semiconductor layer from growing in the groove. In this way, the area of the groove surrounded by the surface of the passivation protective layer away from the first semiconductor layer has a larger occupancy rate, thereby improving the light field mode control capability of the semiconductor photonic crystal light-emitting structure. BRIEF DESCRIPTION OF THE DRAWINGS
[0020] In order to more clearly illustrate the specific implementation methods of the present invention or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.
[0021] Figure 1 This is a schematic structural diagram of a semiconductor photonic crystal light-emitting structure according to an embodiment of the present application; Figure 2 A schematic structural diagram of a semiconductor photonic crystal light-emitting structure according to another embodiment of the present application; Figure 3 A schematic structural diagram of a semiconductor photonic crystal light-emitting structure according to another embodiment of the present application; Figures 4 to 13It is a structural schematic diagram of the preparation process of the semiconductor photonic crystal light-emitting structure in one embodiment of the present application. DETAILED DESCRIPTION
[0022] Photonic crystal lasers can achieve high output power and narrow beam divergence angle simultaneously by using the two-dimensional resonance of two-dimensional photonic crystal singularities. Its main principle is to form a periodically arranged two-dimensional photonic crystal structure in the photonic crystal layer through etching and secondary epitaxy to achieve the limitation and regulation of the light field mode.
[0023] A method for preparing a photonic crystal laser includes: forming a carrier transport layer on one side of a semiconductor substrate layer; forming an active layer on the side of the carrier transport layer facing away from the semiconductor substrate layer; forming a photonic crystal layer on the side of the active layer facing away from the carrier transport layer; and forming a Bragg reflector on the side of the photonic crystal layer facing away from the active layer. Forming the photonic crystal layer includes: forming a first semiconductor layer on the side of the active layer facing away from the semiconductor substrate layer; forming periodically arranged grooves, the grooves extending from the surface of the first semiconductor layer facing away from the active layer to the first semiconductor layer; forming a second semiconductor layer on the surface of the first semiconductor layer facing away from the active layer in the grooves and between adjacent grooves.
[0024] However, since the second semiconductor layer is formed by an epitaxial growth process, in the process of forming the second semiconductor layer on the surface of the first semiconductor layer between adjacent grooves that is away from the active layer, the second semiconductor layer is also formed in the grooves. As a result, the duty cycle of the gaps inside the second semiconductor layer is small, and the controllable light field mode capability of the photonic crystal layer is limited, which greatly affects the performance of the photonic crystal laser.
[0025] On this basis, the present invention provides a semiconductor photonic crystal light-emitting structure and a preparation method thereof, which improves the light field mode control capability of the semiconductor photonic crystal light-emitting structure.
[0026] The technical solution of the present invention will be described clearly and completely below in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.
[0027] In the description of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention. In addition, the terms "first", "second", and "third" are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance.
[0028] In addition, the technical features involved in the different embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.
[0029] An embodiment of the present invention provides a semiconductor photonic crystal light emitting structure, referring to Figure 1 , Figure 2 and Figure 3 ,include: Semiconductor substrate layer 100; An active layer 120 located on one side of the semiconductor substrate layer 100; A photonic crystal layer 130 is located on the side of the active layer 120 away from the semiconductor substrate layer 100, and the photonic crystal layer 130 includes a first semiconductor layer 1300, a second semiconductor layer 1302 and a passivation protection layer 200a. The first semiconductor layer 1300 has a groove, and the groove extends from the side surface of the first semiconductor layer 1300 away from the active layer 120 to the first semiconductor layer 1300, and the passivation protection layer 200a is located on the inner wall of the groove, and the second semiconductor layer 1302 is located on the side surface of the first semiconductor layer 1300 away from the active layer 120 between adjacent grooves and does not extend into the groove.
[0030] In this embodiment, the passivation protection layer 200a is not a semiconductor material. The passivation protection layer 200a is used to protect the inner wall of the groove and prevent the material of the second semiconductor layer 1302 from growing in the groove. In this way, the area of the groove surrounded by the passivation protection layer 200a away from the surface of the first semiconductor layer 1300 has a larger occupancy rate, thereby improving the light field mode control capability of the semiconductor photonic crystal light-emitting structure.
[0031] For example, semiconductor photonic crystal light-emitting structures have more fundamental modes and fewer high-order modes.
[0032] In this embodiment, the semiconductor photonic crystal light emitting structure includes a surface emitting semiconductor laser.
[0033] In one embodiment, the photonic crystal layer 130 includes a first semiconductor layer 1300 and a second semiconductor layer 1302. The material of the first semiconductor layer 1300 includes a III-V compound semiconductor. The material of the first semiconductor layer 1300 includes, but is not limited to, GaAs, GaSb, GaN, InP, silicon or sapphire.
[0034] In one embodiment, the material of the first semiconductor layer 1300 includes GaAs, and the material of the second semiconductor layer 1302 includes Al x1 Ga 1-x1 As.
[0035] In some embodiments, the refractive index of the second semiconductor layer 1302 is lower than the refractive index of the first semiconductor layer 1300. In other embodiments, there is no limitation on the magnitude relationship between the refractive index of the second semiconductor layer 1302 and the refractive index of the first semiconductor layer 1300.
[0036] In one embodiment, the first semiconductor layer 1300 and the second semiconductor layer 1302 are not doped with conductive ions.
[0037] In one embodiment, the area of the groove surrounded by the surface of the passivation protection layer 200a facing away from the first semiconductor layer 1300 is called a gap, and a plurality of gaps are periodically arranged in a direction parallel to the surface of the semiconductor substrate layer 100. The gaps are used to transmit light of specific wavelengths, so that the wavelength of the light emitted by the semiconductor photonic crystal light-emitting structure is more concentrated.
[0038] If the thickness of the passivation protective layer 200a is too large, the degree of improvement in the ability of the photonic crystal layer 130 to control the light field is reduced. If the thickness of the passivation protective layer 200a is too small, the thickness uniformity of the passivation protective layer 200a is poor. Preferably, in one embodiment, the thickness of the passivation protective layer 200a is 1nm-50nm, for example, 1nm, 5nm, 10nm, 20nm, 30nm, 40nm or 50nm.
[0039] In one embodiment, the material of the passivation protection layer 200a is, for example, an insulating oxide or an insulating nitride. The insulating oxide is, for example, aluminum oxide or silicon oxide. The insulating nitride is, for example, silicon nitride.
[0040] In one embodiment, the semiconductor photonic crystal light-emitting structure further includes: a semiconductor protective layer, and a passivation protective layer 200a is located on the side of the semiconductor protective layer away from the first semiconductor layer 1300. The semiconductor protective layer and the passivation protective layer 200a are made of different materials. The lattice constant of the semiconductor protective layer is similar to the lattice constant of the first semiconductor layer 1300, and the semiconductor protective layer and the first semiconductor layer 1300 are lattice matched, which can reduce the defects on the surface of the first semiconductor layer 1300 facing the passivation protective layer, and reduce the carrier recombination on the surface of the first semiconductor layer 1300 facing the passivation protective layer. The passivation protective layer 200a prevents the material of the second semiconductor layer 1302 from growing in the groove. Multiple protections are provided by combining semiconductor protective layers and passivation protective layers 200a of different properties.
[0041] In one embodiment, the material of the semiconductor protection layer is, for example, a phosphide semiconductor material, a selenide semiconductor material or a sulfide semiconductor material, the phosphide semiconductor material being, for example, gallium phosphide, the selenide semiconductor material being, for example, zinc selenide, the sulfide semiconductor material being, for example, cadmium sulfide or zinc sulfide.
[0042] In one embodiment, the thickness of the semiconductor protection layer is 1 nm-50 nm, for example, 1 nm, 5 nm, 10 nm, 20 nm, 30 nm, 40 nm or 50 nm.
[0043] In one embodiment, the second semiconductor layer 1302 includes: a first portion and a second portion, wherein the first portion is located on a side of the groove away from the semiconductor substrate layer 100, and the second portion is located on a side of the first semiconductor layer 1300 between adjacent grooves away from the semiconductor substrate layer 100; wherein the surface of the first portion facing the groove is recessed into the first portion relative to the surface of the second portion facing the first semiconductor layer 1300. In this way, the second semiconductor layer 1302 is further away from the groove, and the second semiconductor layer 1302 does not extend into the groove. The position of the second semiconductor layer 1302 can be better controlled in terms of process.
[0044] In one embodiment, reference Figure 1 The area of the groove surrounded by the surface of the passivation protection layer 200 a facing away from the first semiconductor layer 1300 is rectangular in shape along a cross section perpendicular to the semiconductor substrate layer 100 .
[0045] In one embodiment, reference Figure 2The area of the groove surrounded by the surface of the passivation protection layer 200a away from the first semiconductor layer 1300 has a first end away from the semiconductor substrate layer 100 and a second end toward the semiconductor substrate layer 100, and the width of the first end along the parallel to the semiconductor substrate layer is smaller than the width of the second end along the parallel to the semiconductor substrate layer. In this way, it is more difficult for the second semiconductor layer 1302 to enter the groove, and the second semiconductor layer 1302 around the groove is continuous on the side of the groove away from the semiconductor substrate layer. The position of the second semiconductor layer 1302 can be better controlled in the process.
[0046] In one embodiment, reference Figure 2 The area of the groove surrounded by the surface of the passivation protection layer 200 a facing away from the first semiconductor layer 1300 is in a right trapezoidal shape along a cross section perpendicular to the semiconductor substrate layer 100 .
[0047] In one embodiment, reference Figure 3 , the area of the groove surrounded by the surface of the passivation protection layer 200a away from the first semiconductor layer 1300 increases first and then decreases along the width parallel to the semiconductor substrate layer from the semiconductor substrate layer 100 to the active layer 120. The area of the groove surrounded by the surface of the passivation protection layer 200a away from the first semiconductor layer 1300 has a first end away from the semiconductor substrate layer 100 and a second end toward the semiconductor substrate layer 100. The first end is smaller along the width parallel to the semiconductor substrate layer. In this way, the second semiconductor layer 1302 is less likely to enter the groove, and the second semiconductor layer 1302 around the groove is continuous on the side of the groove away from the semiconductor substrate layer. The position of the second semiconductor layer 1302 can be better controlled in the process.
[0048] In one embodiment, the semiconductor photonic crystal light emitting structure further includes: a Bragg reflector 150 located on the side of the photonic crystal layer 130 away from the active layer 120; and a carrier transport layer 110 located between the semiconductor substrate layer 100 and the active layer 120, wherein the doping type of the carrier transport layer 110 is opposite to the doping type of the Bragg reflector 150. For example, the doping type of the Bragg reflector 150 is P-type, and the doping type of the carrier transport layer 110 is N-type.
[0049] In one embodiment, there is no Bragg reflector between the semiconductor substrate layer 100 and the active layer 120. The light emitted by the active layer 120 is transmitted to the Bragg reflector 150 and reflected by the Bragg reflector 150, and then emitted from the semiconductor substrate layer 100 to the side of the semiconductor substrate layer 100 away from the active layer 120, and the photonic crystal layer 130 selects the wavelength of the light.
[0050] In one embodiment, the semiconductor photonic crystal light emitting structure further includes: a bottom Bragg reflector located between the semiconductor substrate layer and the active layer, wherein the reflectivity of the bottom Bragg reflector is greater than the reflectivity of the Bragg reflector.
[0051] The present application also provides a method for preparing a semiconductor photonic crystal light-emitting structure, comprising: forming an active layer on one side of a semiconductor substrate layer; forming a photonic crystal layer on a side of the active layer away from the semiconductor substrate layer; wherein the step of forming the photonic crystal comprises: forming a first semiconductor layer on a side of the active layer away from the semiconductor substrate layer; forming a groove, wherein the groove extends from a surface of the first semiconductor layer away from the active layer to the first semiconductor layer; forming a passivation protection layer on an inner wall of the groove; and forming a second semiconductor layer on a surface of the first semiconductor layer away from the active layer between adjacent grooves, wherein the second semiconductor layer does not extend into the groove.
[0052] Among them, the step of forming a passivation protection layer on the inner wall of the groove includes: forming an initial passivation protection layer on the inner wall of the groove and on the side of the first semiconductor layer between adjacent grooves away from the semiconductor substrate layer; after forming the initial passivation protection layer, forming a mask layer covering the initial passivation protection layer in the groove, the mask layer exposing the initial passivation protection layer on the side of the first semiconductor layer between adjacent grooves away from the semiconductor substrate layer; after etching and removing the initial passivation protection layer on the side of the first semiconductor layer between adjacent grooves away from the semiconductor substrate layer using the mask layer as a mask, removing the mask layer.
[0053] Reference below Figures 4 to 13 The preparation process of forming semiconductor photonic crystal structure is introduced.
[0054] refer to Figure 4 , a carrier transport layer 110 is formed on one side of the semiconductor substrate layer 100 ; and an active layer 120 is formed on a side of the carrier transport layer 110 that is away from the semiconductor substrate layer 100 .
[0055] In this embodiment, it also includes: forming a photonic crystal layer on the side of the active layer away from the semiconductor substrate layer; wherein the step of forming the photonic crystal includes: forming a first semiconductor layer on the side of the active layer away from the semiconductor substrate layer; forming a groove, the groove extending from the surface of the first semiconductor layer on the side away from the active layer to the first semiconductor layer; forming a passivation protection layer on the inner wall of the groove; forming a second semiconductor layer on the surface of the first semiconductor layer on the side away from the active layer between adjacent grooves, the second semiconductor layer not extending into the groove.
[0056] refer to Figure 5A first semiconductor layer 1300 is formed on a side of the active layer 120 away from the semiconductor substrate layer 100 .
[0057] In one embodiment, the process of forming the first semiconductor layer 1300 is a deposition process, such as an organic metal chemical vapor deposition process. The material of the first semiconductor layer 1300 is as described in the above embodiment.
[0058] refer to Figure 6 , forming a groove 1301, wherein the groove 1301 extends from a surface of the first semiconductor layer 1300 facing away from the active layer 120 to the first semiconductor layer 1300.
[0059] In one embodiment, the process of forming the groove 1301 is an etching process.
[0060] In this embodiment, the groove 1301 is rectangular in shape along a cross section perpendicular to the semiconductor substrate layer 100 .
[0061] In other embodiments, the groove has a first end facing away from the semiconductor substrate layer 100 and a second end facing the semiconductor substrate layer 100, and the width of the first end along the direction parallel to the semiconductor substrate layer is smaller than the width of the second end along the direction parallel to the semiconductor substrate layer. Exemplarily, the cross-sectional shape of the groove along the direction perpendicular to the semiconductor substrate layer 100 is a regular trapezoid.
[0062] In other embodiments, the width of the groove increases first and then decreases along a direction parallel to the semiconductor substrate layer from the semiconductor substrate layer 100 to the active layer 120 .
[0063] refer to Figure 7 An initial passivation protection layer 200 is formed on the surface of the groove 1301 and on the side of the first semiconductor layer 1300 between adjacent grooves 1301 facing away from the semiconductor substrate layer 100 .
[0064] In one embodiment, the process of forming the initial passivation protection layer 200 is a deposition process, and the deposition process includes a combination of one or more of an atomic layer deposition process, a physical vapor deposition process, and a chemical vapor deposition process.
[0065] The thickness and material of the initial passivation protection layer 200 refer to the thickness and material of the passivation protection layer in the previous embodiment.
[0066] In one embodiment, the temperature for depositing the initial passivation protection layer 200 is 150° C. to 200° C., so that the initial passivation protection layer 200 with better film uniformity and lower stress can be obtained.
[0067] Combined with reference Figures 8 to 11A mask layer 210 a covering the initial passivation protection layer 200 is formed in the groove 1301 , and the mask layer 210 a exposes the initial passivation protection layer 200 on a side of the first semiconductor layer 1300 between adjacent grooves 1301 away from the semiconductor substrate layer 100 .
[0068] refer to Figure 8 An initial mask layer 210 covering the initial passivation protection layer 200 is formed on a side of the first semiconductor layer 1300 facing away from the semiconductor substrate layer 100 in the grooves 1301 and between adjacent grooves 1301 .
[0069] The material of the initial mask layer 210 includes photoresist, and the process of forming the initial mask layer 210 includes a spin coating process.
[0070] refer to Fig. 9 , the initial mask layer 210 on the side of the first semiconductor layer 1300 facing away from the semiconductor substrate layer 100 between adjacent grooves 1301 is removed, and the initial mask layer 210 in the grooves 1301 forms a mask layer 210a.
[0071] refer to Fig.10 The initial passivation protection layer 200 on the side of the first semiconductor layer 1300 facing away from the semiconductor substrate layer 100 between adjacent grooves 1301 is etched away using the mask layer 210a as a mask, wherein the initial passivation protection layer 200 on the sidewall of the groove 1301 forms a passivation protection layer 200a.
[0072] The process of using the mask layer 210a as a mask to etch and remove the initial passivation protection layer 200 on the side of the first semiconductor layer 1300 between adjacent grooves 1301 away from the semiconductor substrate layer 100 includes an anisotropic dry etching process.
[0073] The description of the passivation protection layer 200 a refers to the description of the above-mentioned embodiment and will not be described in detail again.
[0074] The description of the area of the groove surrounded by the surface of the passivation protection layer 200 a facing away from the first semiconductor layer 1300 is made with reference to the above-mentioned embodiment.
[0075] refer to Fig.11 After the initial passivation protection layer 200 on the side of the first semiconductor layer 1300 facing away from the semiconductor substrate layer 100 between adjacent grooves 1301 is etched away using the mask layer 210a as a mask, the mask layer 210a is removed.
[0076] In one embodiment, acetone or N-methylpyrrolidone is used to remove the mask layer 210a.
[0077] refer to Fig.12A second semiconductor layer 1302 is formed on a surface of the first semiconductor layer 1300 between adjacent grooves 1301 , which is away from the active layer 120 , and the second semiconductor layer 1302 does not extend into the grooves 1301 .
[0078] The material of the second semiconductor layer 1302 refers to the above-mentioned embodiment.
[0079] In one embodiment, the process of forming the second semiconductor layer 1302 includes an epitaxial growth process. In one embodiment, the process of forming the second semiconductor layer 1302 is, for example, an organic metal chemical vapor deposition process. The material of the second semiconductor layer 1302 is described in the above embodiment.
[0080] In this embodiment, during the process of forming the second semiconductor layer 1302, the first semiconductor layer 1300 is used as a substrate for epitaxially growing the second semiconductor layer 1302. Since the inside of the groove 1301 has a passivation protection layer 200a, and the passivation protection layer 200a is not a semiconductor material, the passivation protection layer 200a cannot serve as a substrate for epitaxially growing the second semiconductor layer 1302, and therefore the second semiconductor layer 1302 does not extend into the groove 1301. In this way, the duty ratio of the area of the groove 1301 surrounded by the passivation protection layer 200a away from the surface of the first semiconductor layer 1300 is large.
[0081] Since the interior of the groove 1301 has the passivation protection layer 200 a , the passivation protection layer 200 a can protect the inner wall surface of the groove 1301 from being damaged.
[0082] refer to Fig.13 A Bragg reflector 150 is formed on the side of the photonic crystal layer 130 away from the active layer 120. The material of the Bragg reflector 150 is as described in the above embodiment.
[0083] Another embodiment of the present application also provides a method for preparing a semiconductor photonic crystal light-emitting structure. The difference between the preparation methods of this embodiment and the above-mentioned embodiments is that: before forming the initial passivation protection layer, an initial semiconductor protection layer is formed on the inner wall surface of the groove and on the surface of the side of the first semiconductor layer between adjacent grooves that is away from the semiconductor substrate layer; after etching away the initial passivation protection layer on the side of the first semiconductor layer between adjacent grooves that is away from the semiconductor substrate layer using the mask layer as a mask, the initial semiconductor protection layer on the inner wall of the groove forms a semiconductor protection layer; thereafter, the mask layer is removed.
[0084] In one embodiment, the process of forming the initial semiconductor protection layer is a deposition process, and the deposition process includes a combination of one or more of an atomic layer deposition process, a physical vapor deposition process, and a chemical vapor deposition process.
[0085] The description of the material and thickness of the semiconductor protection layer refers to the description of the above embodiment.
[0086] Obviously, the above embodiments are merely examples for the purpose of clear explanation, and are not intended to limit the implementation methods. For those skilled in the art, other different forms of changes or modifications can be made based on the above description. It is not necessary and impossible to list all the implementation methods here. The obvious changes or modifications derived therefrom are still within the scope of protection of the invention.
Claims
1. A semiconductor photonic crystal light-emitting structure, characterized in that: include: Semiconductor substrate layer; an active layer located on one side of the semiconductor substrate layer; A photonic crystal layer is located on the side of the active layer away from the semiconductor substrate layer, the photonic crystal layer includes a first semiconductor layer, a second semiconductor layer and a passivation protection layer, the first semiconductor layer has a groove, the groove extends from the surface of the first semiconductor layer on the side away from the active layer to the first semiconductor layer, the passivation protection layer is located on the inner wall of the groove, and the second semiconductor layer is located on the surface of the first semiconductor layer on the side away from the active layer between adjacent grooves and does not extend into the groove.
2. The semiconductor photonic crystal light-emitting structure according to claim 1, characterized in that: It also includes a semiconductor protection layer, wherein the passivation protection layer is located on a side of the semiconductor protection layer away from the first semiconductor layer. 3 . The semiconductor photonic crystal light-emitting structure according to claim 1 , wherein the material of the passivation protection layer is an insulating oxide or an insulating nitride. 4 . The semiconductor photonic crystal light-emitting structure according to claim 2 , wherein the semiconductor protective layer is a phosphide semiconductor material, a selenide semiconductor material or a sulfide semiconductor material.
5. The semiconductor photonic crystal light-emitting structure according to claim 1, characterized in that: The thickness of the passivation protection layer is 1nm-50nm.
6. The semiconductor photonic crystal light-emitting structure according to claim 2, characterized in that: The thickness of the semiconductor protection layer is 1nm-50nm.
7. The semiconductor photonic crystal light-emitting structure according to claim 1, characterized in that: The second semiconductor layer comprises: a first portion and a second portion, the first portion is located at a side of the groove away from the semiconductor substrate layer, and the second portion is located at a side of the first semiconductor layer between adjacent grooves away from the semiconductor substrate layer; Wherein, a surface of the first portion facing the groove is recessed into the first portion relative to a surface of the second portion facing the first semiconductor layer.
8. The semiconductor photonic crystal light-emitting structure according to claim 1, characterized in that: The region of the groove surrounded by the surface of the passivation protection layer facing away from the first semiconductor layer is rectangular in shape along a cross section perpendicular to the semiconductor substrate layer.
9. The semiconductor photonic crystal light-emitting structure according to claim 1, characterized in that: The area of the groove surrounded by the surface of the passivation protection layer facing away from the first semiconductor layer has a first end facing away from the semiconductor substrate layer and a second end facing the semiconductor substrate layer, and the width of the first end along a direction parallel to the semiconductor substrate layer is smaller than the width of the second end along a direction parallel to the semiconductor substrate layer.
10. The semiconductor photonic crystal light-emitting structure according to claim 9, characterized in that: The region of the groove surrounded by the surface of the passivation protection layer facing away from the first semiconductor layer has a right trapezoidal shape along a cross section perpendicular to the semiconductor substrate layer.
11. The semiconductor photonic crystal light-emitting structure according to claim 1, characterized in that: An area of the groove surrounded by a surface of the passivation protection layer facing away from the first semiconductor layer increases first and then decreases along a direction parallel to the width of the semiconductor substrate layer from the semiconductor substrate layer to the active layer.
12. The semiconductor photonic crystal light-emitting structure according to claim 1, characterized in that: Also includes: a Bragg reflector located on a side of the photonic crystal layer away from the active layer; The carrier transport layer is located between the semiconductor substrate layer and the active layer, and the doping type of the carrier transport layer is opposite to the doping type of the Bragg reflector.
13. A method for preparing a semiconductor photonic crystal light-emitting structure, characterized in that: include: forming an active layer on one side of the semiconductor substrate layer; forming a photonic crystal layer on a side of the active layer away from the semiconductor substrate layer; Among them, the steps of forming the photonic crystal include: forming a first semiconductor layer on the side of the active layer away from the semiconductor substrate layer; forming a groove, the groove extending from the surface of the first semiconductor layer on the side away from the active layer to the first semiconductor layer; forming a passivation protection layer on the inner wall of the groove; forming a second semiconductor layer on the surface of the first semiconductor layer on the side away from the active layer between adjacent grooves, the second semiconductor layer not extending into the groove.
14. The method for preparing a semiconductor photonic crystal light-emitting structure according to claim 13, characterized in that: The step of forming a passivation protection layer on the inner wall of the groove comprises: forming an initial passivation protection layer on the inner wall of the groove and on the side of the first semiconductor layer between adjacent grooves facing away from the semiconductor substrate layer; forming a mask layer covering the initial passivation protection layer in the grooves, wherein the mask layer exposes the initial passivation protection layer on a side of the first semiconductor layer between adjacent grooves away from the semiconductor substrate layer; After the initial passivation protection layer on the side of the first semiconductor layer facing away from the semiconductor substrate layer between adjacent grooves is removed by etching using the mask layer as a mask, the mask layer is removed.
15. The method for preparing a semiconductor photonic crystal light-emitting structure according to claim 14, characterized in that: Also includes: Before forming the initial passivation protection layer, an initial semiconductor protection layer is formed on the inner wall surface of the groove and on the surface of the first semiconductor layer between adjacent grooves facing away from the semiconductor substrate layer; After the initial passivation protection layer on the side of the first semiconductor layer between adjacent grooves facing away from the semiconductor substrate layer is etched away using the mask layer as a mask, the initial semiconductor protection layer on the inner wall of the groove is etched away using the mask layer as a mask to form a semiconductor protection layer.
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