Control circuit for clamping potential and increasing conversion rate

Abstract

The invention belongs to the field of chips, and provides a potential clamping and conversion rate increasing control circuit which is applied to an amplifier in a chip and comprises a clamping and speed increasing circuit which comprises a plurality of MOS (Metal Oxide Semiconductor) tubes and divider resistors and is used for accessing positive end and negative end input signals of the amplifier, input signals at the positive end and the negative end of the amplifier are enabled to be within a preset withstand voltage range through on-off control of a plurality of MOS (Metal Oxide Semiconductor) tubes and proportional allocation of a plurality of divider resistors; the rapid conversion circuit comprises a first conversion module composed of low-voltage elements and a second conversion module composed of high-voltage elements, each of the first conversion module and the second conversion module comprises two groups of MOS (Metal Oxide Semiconductor) tubes with drain electrodes and source electrodes connected, the source electrodes of the two groups of MOS tubes are jointly connected to a source electrode current, and a differential pressure resistor is connected between the source electrode of each group of MOS tubes and a block body. A bias current source is input into the end points of the block body, so that a fixed voltage difference is formed between the two end points; the amplifying circuit consists of a common-source amplifier and a common-gate amplifier and is used for playing an amplifying role; according to the invention, the problems of poor matching performance and poor conversion rate caused by the fact that a high-voltage element is selected when the voltage range of an amplifier in a chip exceeds 5V in the prior art can be solved.

Description

Technical Field

[0001] The invention relates to the field of chips, and in particular to a control circuit for potential clamping and increasing conversion rate. Background Art

[0002] The amplifier used for display is generally used to input reference voltage at the positive terminal (V+) of the amplifier, and the output is divided by resistors and negatively fed back to the negative terminal (V-) of the amplifier. The connection method is shown in the figure. Figure 1 As shown in the figure. In amplifiers used for full-scale voltage operation, a single component is generally selected during design. If the voltage range exceeds 5V, a high-voltage component is selected. However, the matching of high-voltage components is poor and the conversion rate is not good. Summary of the invention

[0003] In view of the above technical problems, the present invention provides a potential clamping and conversion rate increasing control circuit to solve the problem that the amplifier inside the chip in the prior art uses high-voltage components when the voltage range exceeds 5V, resulting in poor matching and poor conversion rate.

[0004] Other features and advantages of the present disclosure will become apparent from the following detailed description, or may be learned in part by the practice of the present disclosure.

[0005] The present invention discloses a potential clamping and conversion rate increasing control circuit, which is characterized in that it is applied to an amplifier inside a chip, and the circuit comprises:

[0006] A clamping and speed-up circuit, comprising a plurality of MOS tubes and a voltage-dividing resistor, for accessing the positive and negative input signals of the amplifier, and controlling the switches of the plurality of MOS tubes and adjusting the proportions of the plurality of voltage-dividing resistors so that the positive and negative input signals of the amplifier are within a preset withstand voltage range;

[0007] A fast conversion circuit, the fast conversion circuit comprising a first conversion module composed of low-voltage components and a second conversion module composed of high-voltage components, the first conversion module and the second conversion module each comprising two groups of MOS tubes with drains and sources connected, the sources of the two groups of MOS tubes being connected to a source current, and a voltage difference resistor being connected between the source and the block of each group of MOS tubes, and a bias current source being input to the end points of the block so that a fixed voltage difference is formed at the two end points;

[0008] The amplifier circuit is composed of a common-source amplifier and a common-gate amplifier and is used for amplification.

[0009] Furthermore, the clamping and speed-up circuit specifically includes an M-type MOS tube and a P-type MOS tube, the gates of the P-type MOS tube and the M-type MOS tube are connected to a first voltage-dividing resistor, the first voltage-dividing resistor is connected to the positive input signal of the amplifier, the drain of the P-type MOS tube is connected to a second voltage-dividing resistor, the second voltage-dividing resistor is connected to a voltage power supply, the source of the M-type MOS tube is connected to a third voltage-dividing resistor, the third voltage-dividing resistor is connected to another voltage power supply, the drain of the M-type MOS tube and the source of the P-type MOS tube are connected to a fourth voltage-dividing resistor, and the fourth voltage-dividing resistor is connected to the negative input signal of the amplifier.

[0010] The technical solution disclosed in this disclosure has the following beneficial effects:

[0011] When the circuit of the present invention is switched, the components can effectively work in different potential intervals, realize rapid linear conversion, and then control the components to operate within the required voltage operating range, effectively avoiding excessive aging of the components, thereby preventing product damage. At the same time, the use of high-voltage components is reduced, the chip area is greatly reduced to reduce costs, and the good matching characteristics of low-voltage components are utilized to reduce the overall error and improve the accuracy of the amplifier. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figure 1 A schematic diagram of an amplifier in the background technology of this specification;

[0013] Figure 2 It is a schematic diagram of a control circuit for potential clamping and increasing conversion rate in an embodiment of this specification;

[0014] Figure 3 It is a schematic diagram of the clamping and speed-increasing circuit in the embodiment of this specification;

[0015] Figure 4 It is a schematic diagram of the clamping and speed-increasing circuit in the embodiment of this specification;

[0016] Figure 5 is a schematic diagram of a fast switching circuit in an embodiment of this specification;

[0017] Figure 6 is an equivalent diagram of the fast switching of the control circuit in the embodiment of this specification;

[0018] Figure 7 It is an equivalent diagram of the fast switching of the control circuit in the embodiment of this specification. DETAILED DESCRIPTION

[0019] Example embodiments will now be described more fully with reference to the accompanying drawings. However, example embodiments can be implemented in a variety of forms and should not be construed as being limited to the examples set forth herein; on the contrary, these embodiments are provided so that the present disclosure will be more comprehensive and complete, and the concepts of the example embodiments are fully conveyed to those skilled in the art. The described features, structures, or characteristics may be combined in one or more embodiments in any suitable manner. In the following description, many specific details are provided to provide a full understanding of the embodiments of the present disclosure. However, those skilled in the art will appreciate that the technical solutions of the present disclosure may be practiced while omitting one or more of the specific details, or other methods, components, devices, steps, etc. may be adopted. In other cases, known technical solutions are not shown or described in detail to avoid obscuring various aspects of the present disclosure.

[0020] like Figure 2 As shown, the embodiment of this specification provides a potential clamping and conversion rate increasing control circuit, which is characterized in that it is applied to an amplifier inside a chip, and the circuit includes:

[0021] The clamping and speed-up circuit 1 includes a plurality of MOS tubes and voltage-dividing resistors, and is used to access the positive and negative input signals of the amplifier. By controlling the switches of the plurality of MOS tubes and adjusting the proportions of the plurality of voltage-dividing resistors, the positive and negative input signals of the amplifier are within a preset withstand voltage range.

[0022] A fast conversion circuit 2, comprising a first conversion module composed of low-voltage components and a second conversion module composed of high-voltage components, wherein the first conversion module and the second conversion module each comprise two groups of MOS tubes with drains and sources connected, the sources of the two groups of MOS tubes being connected to a source current, and a voltage difference resistor being connected between the source and the block of each group of MOS tubes, and a bias current source being input to the end points of the block so that a fixed voltage difference is formed at the two end points;

[0023] The amplifier circuit 3 is composed of a common-source amplifier and a common-gate amplifier, and is used for amplification.

[0024] Among them, this embodiment uses integrated high and low voltage components, and can achieve better symmetry when matching low voltage components in layout and process. However, the characteristic of low voltage components is that the clamping voltage between each node must be less than 5V, so the potential of each node must be processed before entering the low voltage component. This embodiment will focus on the voltage clamping method of the input pair, as follows:

[0025] like Figure 3As shown, the clamping and speed-up circuit specifically includes an M-type MOS tube MN_HV and a P-type MOS tube MP_HV, the gates of the P-type MOS tube MP_HV and the M-type MOS tube MN_HV are connected to a first voltage-dividing resistor in common, the first voltage-dividing resistor is connected to the positive input signal AVP of the amplifier, the drain of the P-type MOS tube MP_HV is connected to a second voltage-dividing resistor R3, the second voltage-dividing resistor R3 is connected to a voltage power supply, the source of the M-type MOS tube MN_HV is connected to a third voltage-dividing resistor R4, the third voltage-dividing resistor R4 is connected to another voltage power supply VIN, the drain of the M-type MOS tube MN_HV and the source of the P-type MOS tube MP_HV are connected to a fourth voltage-dividing resistor R5 in common, and the fourth voltage-dividing resistor R5 is connected to the negative input signal AVN of the amplifier.

[0026] Specifically, Figure 4 As shown, the positive input signal AVP and the input signal AV_PI divided by the first voltage divider resistor are used to detect different voltage ranges by switching the MN_HV or MP_HV switch to form different voltage division ratios. When the voltage vgs_mnhv is greater than the threshold voltage of mnhv, the mn_hv switch is turned on and the mp_hv switch is turned off, forming path (1). The voltage division formula generated by AV_NI is as follows:

[0027]

[0028] When the voltage vsg_mphv is greater than the absolute value of the threshold voltage of mphv, the mp_hv switch is turned on and the mn_hv switch is turned off, forming path (2). The voltage division formula generated by AV_NI is as follows:

[0029]

[0030] Therefore, the resistor ratio can be adjusted according to different requirements to achieve a voltage difference within the component withstand voltage range.

[0031] like Figure 5 As shown in the figure, for the voltage difference between the bulk and other terminals, a resistor element R of appropriate size is inserted between the source and bulk of the device. BSP and R BSN , and add a current source IBN of appropriate size at the end of the block, so that a fixed voltage difference is formed at the two ends, which is smaller than the voltage value that the component can withstand. The following describes the mechanism of rapid potential conversion:

[0032] like Figure 6 As shown, in order to make the potential of the application circuit change quickly, I SP and I SN The current factors such as Ptail and Ntail are integrated. When the AVP voltage changes from low voltage to high voltage, it starts Figure 6 Mechanism, in ISN Inject current to make the main input quickly respond to AVN to AVP potential. Similarly, when the voltage changes from high to low, the start Figure 7 The mechanism makes the ISP input current react quickly to the AVN of the main input to the AVP potential; when the AVN potential almost reaches AVP, the current source of the circuit mechanism reaches equilibrium, turning off the Ntail or Ptail element, thereby stopping the instantaneous consumption of a large amount of current.

[0033] In the above embodiment, two sets of circuits are used to control the amplifier input pair to the required voltage domain with low voltage components, and the circuit can respond quickly to convert the operating potential, thereby improving the overall performance of the overall amplifier, reducing the overall amplifier area, increasing accuracy, reducing costs and increasing chip performance.

[0034] Beneficial effects:

[0035] By using circuit switching, components can effectively work in different potential intervals, realize rapid linear conversion, and then control the components to operate within the required voltage operating range. The circuit control mechanism in this case can effectively prevent components from aging too quickly, thereby preventing product damage. At the same time, the use of high-voltage components is reduced, the chip area is greatly reduced to reduce costs, and the good matching characteristics of low-voltage components are used to reduce overall errors and improve the accuracy of the amplifier.

[0036] Those skilled in the art will readily appreciate other embodiments of the present disclosure after considering the specification and practicing the invention disclosed herein. This application is intended to cover any variations, uses, or adaptations of the present disclosure that follow the general principles of the present disclosure and include common knowledge or customary technical means in the art that are not disclosed in the present disclosure. The specification and embodiments are to be considered exemplary only, and the true scope and spirit of the present disclosure are indicated by the claims.

Claims

1. A potential clamping and conversion rate increasing control circuit, characterized in that: Applied to an amplifier inside a chip, the circuit comprises: A clamping and speed-up circuit, comprising a plurality of MOS tubes and a voltage-dividing resistor, for accessing the positive and negative input signals of the amplifier, and controlling the switches of the plurality of MOS tubes and adjusting the proportions of the plurality of voltage-dividing resistors so that the positive and negative input signals of the amplifier are within a preset withstand voltage range; A fast conversion circuit, the fast conversion circuit comprising a first conversion module composed of low-voltage components and a second conversion module composed of high-voltage components, the first conversion module and the second conversion module each comprising two groups of MOS tubes with drains and sources connected, the sources of the two groups of MOS tubes being connected to a source current, and a voltage difference resistor being connected between the source and the block of each group of MOS tubes, and a bias current source being input to the end points of the block so that a fixed voltage difference is formed at the two end points; The amplifier circuit is composed of a common-source amplifier and a common-gate amplifier and is used for amplification.

2. A potential clamping and conversion rate increasing control circuit according to claim 1, characterized in that: The clamping and speed-up circuit specifically includes an M-type MOS tube and a P-type MOS tube, the gates of the P-type MOS tube and the M-type MOS tube are connected to a first voltage-dividing resistor, the first voltage-dividing resistor is connected to a positive input signal of an amplifier, the drain of the P-type MOS tube is connected to a second voltage-dividing resistor, the second voltage-dividing resistor is connected to a voltage power supply, the source of the M-type MOS tube is connected to a third voltage-dividing resistor, the third voltage-dividing resistor is connected to another voltage power supply, the drain of the M-type MOS tube and the source of the P-type MOS tube are connected to a fourth voltage-dividing resistor, and the fourth voltage-dividing resistor is connected to a negative input signal of the amplifier.

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