Data sampling device of control system, control system and data sampling method

Abstract

The invention provides a data sampling device of a control system, the control system and a data sampling method, and the system comprises a sampling module which comprises a plurality of sampling channels; the control module is used for sequentially triggering the plurality of sampling channels to start sampling in each triggering period; the trigger time delay between the adjacent triggered sampling channels is less than the sampling period of the sampling channels. The method comprises the following steps: in each triggering period, sequentially triggering a plurality of sampling channels to start sampling; wherein the trigger time delay between the adjacent triggered sampling channels is smaller than the sampling period of the sampling channels; and sequentially receiving data output by the plurality of sampling channels. According to the technical scheme, the sampling delay is reduced through parallel interval sampling of the multiple sampling channels, the method can be applied to a high-frequency control system, and the control effect is improved.

Description

Technical Field

[0001] The present invention relates to the technical field of control systems, and in particular to a data sampling module of a control system, a control system and a data sampling method. Background Art

[0002] The cycle of sampling-calculation-wave generation-control device-sampling... is the working logic of real-time control systems such as motors, energy, and power supplies. In order to improve the response speed of the control system, the existing methods generally start from the calculation link and improve the response speed by increasing the calculation speed, while the sampling link is less considered.

[0003] For the sampling link, sampling is generally performed through SAR-ADC or Sigma-Delta ADC. In some motor control scenarios with very high sampling accuracy requirements, the on-chip SAR-ADC cannot meet the high sampling accuracy requirements. At this time, off-chip Sigma-Delta ADC sampling is usually used. The chip entrance uses the SDFM module to perform SINC filtering and downsampling on the received data to obtain high-precision sampling values. For the high-precision sampling method of off-chip Sigma-Delta ADC+SDFM, its sampling bandwidth is small and the sampling speed is slow, which affects the loop bandwidth and response delay, and also affects the control effect of high-bandwidth real-time control systems. Summary of the invention

[0004] The present invention provides a data sampling device for a control system, a control system and a data sampling method, so as to solve the problem that the prior art is not applicable to high-frequency control systems and affects the control effect.

[0005] In order to solve the above technical problems, the present invention is achieved through the following technical solutions:

[0006] According to a first aspect of the present invention, there is provided a data sampling device for a control system, comprising:

[0007] A sampling module, which includes a plurality of sampling channels;

[0008] The control module is used to sequentially trigger the plurality of sampling channels to start sampling in each triggering cycle; the triggering time delay between adjacent triggered sampling channels is less than the sampling cycle of the sampling channel.

[0009] Optionally, the sampling channel includes: an SDFM module.

[0010] Optionally, the control module includes: a pulse width modulator, which is used to sequentially trigger the plurality of sampling channels to start sampling in each trigger cycle;

[0011] The pulse width modulator stores a plurality of time comparison values, and the time comparison values ​​correspond to the sampling channels one by one; each time a time comparison value is reached, a sampling channel is triggered to start sampling.

[0012] Optionally, the trigger period is smaller than the sampling period.

[0013] Optionally, in each trigger cycle, except for the first triggered sampling channel, the trigger time delay between each triggered sampling channel and the last triggered sampling channel is the same.

[0014] According to a second aspect of the present invention, there is provided a control system, comprising a data sampling device as described in any one of the above items.

[0015] According to a third aspect of the present invention, there is provided a data sampling method for a control system, comprising:

[0016] In each triggering cycle, multiple sampling channels are triggered in sequence to start sampling; wherein the triggering time delay between adjacent triggered sampling channels is less than the sampling cycle of the sampling channels;

[0017] The data output by the plurality of sampling channels are received in sequence.

[0018] Optionally, in each trigger cycle, except for the first triggered sampling channel, the trigger time delay between each triggered sampling channel and the last triggered sampling channel is the same.

[0019] According to a fourth aspect of the present invention, there is provided an electronic device, comprising:

[0020] processor;

[0021] and, a memory for storing processor-executable instructions;

[0022] The processor implements the steps in the above method by running the executable instructions.

[0023] According to a fifth aspect of the present invention, there is provided a storage medium having a computer program stored thereon, wherein the computer program implements the steps in the above-mentioned method when executed by a processor.

[0024] The data sampling device and method of the control system provided by the present invention starts sampling by sequentially triggering multiple sampling channels, and the triggering interval is smaller than the sampling period of the sampling channel. Therefore, except for the first data, the interval between subsequent sampling data is the triggering interval, which is smaller than the sampling period of a single sampling channel, thereby reducing the sampling delay and being suitable for high-frequency control system applications. Moreover, since the sampling delay is reduced, that is, the sampling rate is high, the system control time is reduced, thereby increasing the system bandwidth and improving the control effect.

[0025] In the existing control system, in order to improve the control effect, the calculation algorithm is basically improved to increase the calculation speed, but the improvement of the sampling speed is not realized. The present invention finds that the improvement of the sampling speed is also crucial. If the sampling speed is not increased, even if the calculation speed is fast enough, the control effect will still be affected, because the calculation module must receive the data sampled by the sampling module before calculation. If the sampling delay is relatively long, the calculation is completed but no sampling data is received, and the final delay of the wave will still be relatively large, thereby affecting the control effect.

[0026] In an optional solution of the present invention, the sampling channel adopts the SDFM sampling module, which retains the sampling accuracy of SDFM, and multiple channels are triggered in sequence to reduce the sampling delay, while satisfying the sampling accuracy and sampling speed, and the control effect is better.

[0027] In an optional scheme of the present invention, in each trigger cycle, except for the first triggered sampling channel, the trigger time delay between each triggered sampling channel and the previously triggered sampling channel is the same, that is, the starting sampling intervals between adjacent sampling channels are the same, and the sampling speed is uniform, which further improves the control effect. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0029] Figure 1 A schematic diagram of a data sampling device of a control system according to an embodiment of the present invention;

[0030] Figure 2 A data sampling schematic diagram of a control system according to an embodiment of the present invention;

[0031] Figure 3 A flow chart of a data sampling method for a control system according to an embodiment of the present invention;

[0032] Figure 4 is a schematic diagram of an electronic device according to an embodiment of the present invention;

[0033] Description of reference numerals:

[0034] 11- Sampling module,

[0035] 111-sampling channel;

[0036] 12- control module;

[0037] 21- Processor,

[0038] 22-internal bus,

[0039] 23- Network interface,

[0040] 24-Memory,

[0041] 25-Memory. DETAILED DESCRIPTION

[0042] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0043] In the description of the specification of the present invention, it is necessary to understand that the orientation or position relationship indicated by the terms "upper part", "lower part", "upper end", "lower end", "lower surface", "upper surface", etc. is based on the orientation or position relationship shown in the drawings, and is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention.

[0044] In the description of the present specification, the terms "first" and "second" are used for descriptive purposes only and are not to be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features.

[0045] In the description of the present invention, "plurality" means a plurality, such as two, three, four, etc., unless otherwise clearly and specifically defined.

[0046] In the description of the present invention, unless otherwise clearly specified and limited, the term "connection" and other terms should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection, an electrical connection, or mutual communication; it can be directly connected or indirectly connected through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0047] The technical solution of the present invention is described in detail with specific embodiments below. The following specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described in detail in some embodiments.

[0048] In one embodiment, a data sampling device for a control system is provided, comprising:

[0049] A sampling module 11, comprising a plurality of sampling channels 111;

[0050] The control module 12 is used to sequentially trigger the plurality of sampling channels 111 to start sampling in each triggering cycle; the triggering time delay between adjacent triggered sampling channels is less than the sampling cycle of the sampling channel.

[0051] In one sampling cycle, the sampling channel outputs one result. When a single sampling channel is used, the sampling cycle is the sampling delay T of the sampling module. In the above embodiment, multiple sampling channels are set to be triggered in parallel with intervals, and the trigger time delay between adjacent triggered sampling channels is less than the sampling cycle of the sampling channel, that is, when the first triggered sampling channel has not yet output data, at least one subsequent sampling channel has been triggered; in this way, except for the time delay of receiving data for the first time being T, the time delay of receiving data subsequently is less than T, which reduces the sampling delay.

[0052] As an implementation method, the control module 12 may be implemented by software.

[0053] As another implementation, the control module 12 may also be implemented in hardware.

[0054] In practice, the control module 12 can be implemented by a pulse width modulator, such as EPWM, which can be connected to the sampling channel by hardware wiring. The pulse width modulator stores multiple time comparison values ​​CMPx, which can be stored by registers. The time comparison values ​​correspond to the sampling channels one by one. CTR and CMPx are compared in sequence. Every time a time comparison value is reached, that is, CTR=CMPx, a synchronization pulse is output, the flag is pulled high, and a sampling channel is triggered to start sampling, which effectively reduces the sampling interval between adjacent sampling channels and allows more sampling channels to be sampled within the same PWM cycle (that is, the trigger cycle described above).

[0055] In one embodiment, the sampling channel includes: an SDFM module, through which sampling is implemented with high sampling accuracy, and the high delay of SDFM sampling is compensated by parallel sampling at intervals of multiple sampling channels, thereby ensuring that multiple sampling results exist within the original sampling delay T and reducing the sampling delay.

[0056] In one embodiment, the trigger cycle is shorter than the sampling cycle. Assume that a trigger cycle includes M sampling channels, and when all the M sampling channels are triggered, the first triggered sampling channel has not yet output data.

[0057] In practice, within a sampling period, the sampling channel samples data multiple times (assuming N), that is, each time the data is sampled N times, a result is output, and the time spent sampling N times is the sampling delay (assuming T). If there is only a single sampling channel, then the sampling delay of the sampling system is T. In the above embodiment, each trigger period includes multiple sampling channels that are triggered in sequence, and when the trigger period is less than the sampling period, the first triggered sampling channel has not yet output data, and the M sampling channels have all completed the triggering. Please refer to Figure 2 As shown in the figure, except for the time delay of the first data received being T, the time delay of the subsequent data received becomes T / M, which reduces the sampling delay. The larger M is, the smaller the sampling delay is. The appropriate M can be determined according to the required sampling rate.

[0058] When the sampling channel uses the SDFM module, Figure 2 The input can refer to the SINC filter input, and the output result can refer to the SINC filter output result; sampling channel 1, sampling channel 2, sampling channel 3, and sampling channel M can refer to the SINC filter 1 input, SINC filter 2 input, SINC filter 3 input, and SINC filter M input.

[0059] In one embodiment, in each trigger cycle, except for the first triggered sampling channel, the trigger time delay between each triggered sampling channel and the previously triggered sampling channel is the same, that is, the sampling interval is the same, and multiple sampling results exist evenly within the original sampling delay T, the sampling results are evenly distributed, and the control effect is more ideal.

[0060] In one embodiment, a control system is further provided, which includes the data sampling device described in any of the above embodiments.

[0061] Practically, the control system may be a motor, an inverter, a power supply system, etc.

[0062] In one embodiment, a data acquisition method of a control system is also provided, please refer to Figure 1 , which includes:

[0063] S11: in each triggering cycle, triggering a plurality of sampling channels in sequence to start sampling; wherein the triggering time delay between adjacent triggered sampling channels is less than the sampling cycle of the sampling channel;

[0064] S12: receiving data output by multiple sampling channels in sequence.

[0065] In one embodiment, the trigger period is smaller than the sampling period.

[0066] In one embodiment, in each trigger cycle, except for the first triggered sampling channel, the trigger time delay between each triggered sampling channel and the last triggered sampling channel is the same.

[0067] In one embodiment, an electronic device is also provided, please refer to Figure 4 . At the hardware level, the device includes a processor 21, an internal bus 22, a network interface 23, a memory 24 and a storage 25, and may also include hardware required for other services. One or more embodiments of the present invention may be implemented based on software, such as the processor 21 reading the corresponding computer program from the storage 25 into the memory 24 and then running it. Of course, in addition to software implementation, one or more embodiments of the present invention do not exclude other implementation methods, such as logic devices or a combination of software and hardware, etc., that is, the execution subject of the following processing flow is not limited to each logic unit, but may also be hardware or logic devices.

[0068] The systems, devices, modules or units described in the above embodiments may be implemented by computer chips or entities, or by products with certain functions. A typical implementation device is a computer, which may be in the form of a personal computer, a laptop computer, a cellular phone, a camera phone, a smart phone, a personal digital assistant, a media player, a navigation device, an email transceiver, a game console, a tablet computer, a wearable device or a combination of any of these devices.

[0069] In a typical configuration, a computer includes one or more processors (CPU), input / output interfaces, network interfaces, and memory.

[0070] The memory may include non-permanent storage in a computer-readable medium, random access memory (RAM) and / or non-volatile memory in the form of read-only memory (ROM) or flash RAM. The memory is an example of a computer-readable medium.

[0071] Computer-readable media include permanent and non-permanent, removable and non-removable media that can be used to store information by any method or technology. Information can be computer-readable instructions, data structures, program modules or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technology, compact disc read-only memory (CD-ROM), digital versatile disc (DVD) or other optical storage, magnetic cassettes, disk storage, quantum memory, graphene-based storage media or other magnetic storage devices or any other non-transmission media that can be used to store information that can be accessed by a computing device. As defined herein, computer-readable media does not include temporary computer-readable media (transitory media), such as modulated data signals and carrier waves.

[0072] The above describes specific embodiments of the present invention. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recorded in the claims can be performed in an order different from that in the embodiments and still achieve the desired results. In addition, the processes depicted in the accompanying drawings do not necessarily require the specific order or continuous order shown to achieve the desired results. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.

[0073] In the description of this specification, the description with reference to the terms "an implementation", "an example", "a specific implementation process", "an example", etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments or examples in a suitable manner.

[0074] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A data sampling device for a control system, characterized in that: include: A sampling module, comprising a plurality of sampling channels; A control module, used for sequentially triggering the plurality of sampling channels to start sampling in each trigger cycle; The trigger time delay between adjacent triggered sampling channels is smaller than the sampling period of the sampling channels.

2. The data sampling device according to claim 1, characterized in that: The sampling channel includes: an SDFM module.

3. The data sampling device according to claim 1, characterized in that: The control module comprises: a pulse width modulator, which is used to sequentially trigger the plurality of sampling channels to start sampling in each trigger cycle; The pulse width modulator stores a plurality of time comparison values, and the time comparison values ​​correspond to the sampling channels one by one; each time a time comparison value is reached, a sampling channel is triggered to start sampling.

4. The data sampling device according to claim 1, characterized in that: The trigger period is shorter than the sampling period.

5. The data sampling device according to any one of claims 1 to 4, characterized in that: In each trigger cycle, except for the first triggered sampling channel, the trigger time delay between each triggered sampling channel and the last triggered sampling channel is the same.

6. A control system, characterized in that: include: The data sampling device according to any one of claims 1 to 5.

7. A data sampling method for a control system, characterized in that: include: In each triggering cycle, multiple sampling channels are triggered in sequence to start sampling; wherein the triggering time delay between adjacent triggered sampling channels is less than the sampling cycle of the sampling channels; The data output by the plurality of sampling channels are received in sequence.

8. The data sampling method according to claim 7, characterized in that: In each trigger cycle, except for the first triggered sampling channel, the trigger time delay between each triggered sampling channel and the last triggered sampling channel is the same.

9. An electronic device, characterized in that: include: processor; and, a memory for storing processor-executable instructions; The processor implements the steps in the method of claim 7 or 8 by running the executable instructions.

10. A computer-readable storage medium, characterized in that: A computer program is stored thereon, and when the computer program is executed by a processor, the steps in the method according to claim 7 or 8 are implemented.

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