Low-voltage gallium nitride power amplifier based on second harmonic suppression

Abstract

The invention discloses a low-voltage gallium nitride power amplifier based on second harmonic suppression. The low-voltage gallium nitride power amplifier is used for solving the technical problem that the overall efficiency of a radio frequency system is low due to an existing radio frequency power amplifier. The amplifier comprises an input stage circuit, an input stage low-voltage gallium nitride transistor, an intermediate stage circuit, an intermediate stage low-voltage gallium nitride transistor, an output stage circuit, an output stage low-voltage gallium nitride transistor group, a drain bias capacitor, a drain bias voltage port and a secondary harmonic suppression output matching network, by arranging an input-stage low-voltage gallium nitride transistor, an intermediate-stage low-voltage gallium nitride transistor, an output-stage low-voltage gallium nitride transistor group, a secondary harmonic suppression output matching network and a corresponding connection relationship, the secondary harmonic suppression output matching network can be used for suppressing a low-voltage gallium nitride transistor on the basis of a low-voltage gallium nitride process technology. Harmonic suppression is directly carried out on the second harmonic, so that the output power and the power additional efficiency of the radio frequency power amplifier are improved, and the overall efficiency of a radio frequency system is improved.

Description

Technical Field

[0001] The present invention relates to the technical field of radio frequency integrated circuits, and in particular to a low-voltage gallium nitride power amplifier based on second harmonic suppression. Background Art

[0002] At present, 5G has spawned a large number of application scenarios for RF front-end systems, such as high-definition live broadcast, remote control, unmanned driving, smart cities, wireless communications, broadcasting, satellites, medical and radar systems, etc. Different application scenarios have their specific requirements. Even for the same application scenario, the required performance for different customer platforms is different. This is undoubtedly a huge workload and cost consumption for the RF front-end system.

[0003] RF power amplifier refers to a component used in RF systems to enhance signal strength, ensuring that the signal is not excessively attenuated during transmission, so as to facilitate signal transmission in the communication system. It amplifies low-power input signals to high-power outputs, and its key parameters include gain, efficiency, and linearity.

[0004] The commonly used harmonic suppression method in the design of existing RF power amplifiers is harmonic filters, but this method requires too large an area, which increases the wafer area and introduces certain losses, resulting in low overall efficiency of the RF system. Summary of the invention

[0005] The present invention provides a low-voltage gallium nitride power amplifier based on second harmonic suppression, which is used to solve the technical problem that the overall efficiency of a radio frequency system is low due to the existing radio frequency power amplifier.

[0006] The present invention provides a low-voltage gallium nitride power amplifier based on second harmonic suppression, comprising an input stage circuit, an input stage low-voltage gallium nitride transistor, an intermediate stage circuit, an intermediate stage low-voltage gallium nitride transistor, an output stage circuit, an output stage low-voltage gallium nitride transistor group, a drain bias capacitor, a drain bias voltage port, and a second harmonic suppression output matching network;

[0007] The input stage circuit is connected to the gate of the input stage low voltage gallium nitride transistor, and the drain of the input stage low voltage gallium nitride transistor is connected to one end of the intermediate stage circuit;

[0008] The source of the input-stage low-voltage gallium nitride transistor is grounded;

[0009] The other end of the intermediate stage circuit is connected to the gate of the intermediate stage low voltage gallium nitride transistor, and the drain of the intermediate stage low voltage gallium nitride transistor is connected to one end of the output stage circuit;

[0010] The source of the intermediate low-voltage gallium nitride transistor is grounded;

[0011] The other end of the output stage circuit is connected to one end of the output stage low voltage gallium nitride transistor group, and the other end of the output stage low voltage gallium nitride transistor group is connected to the second harmonic suppression output matching network;

[0012] One end of the drain bias capacitor is respectively connected to the intermediate stage circuit, the output stage circuit, the second harmonic suppression output matching network, and the drain bias voltage port, and the other end of the drain bias capacitor is grounded.

[0013] Optionally, the input stage circuit includes an input port, a first capacitor, a second capacitor, a third capacitor, a first inductor, a second inductor, a first resistor, a second resistor, and a first gate bias voltage port;

[0014] The input port is connected to one end of the first capacitor, and the other end of the first capacitor is connected to one end of the second capacitor and one end of the first inductor respectively;

[0015] The other end of the second capacitor is grounded;

[0016] The other end of the first inductor is connected to one end of the first resistor and one end of the second resistor respectively;

[0017] The other end of the first resistor is connected to one end of the second inductor, and the other end of the second inductor is connected to one end of the third capacitor and the first gate bias voltage port respectively;

[0018] The other end of the third capacitor is grounded;

[0019] The other end of the second resistor is connected to the gate of the input-stage low-voltage gallium nitride transistor.

[0020] Optionally, the intermediate stage circuit includes a fourth capacitor, a fifth capacitor, a sixth capacitor, a third inductor, a fourth inductor, a third resistor, a fourth resistor and a second gate bias voltage port;

[0021] The drain of the input-stage low-voltage gallium nitride transistor is respectively connected to one end of the fourth capacitor and one end of the third inductor, and the other end of the third inductor is connected to one end of the drain bias capacitor;

[0022] The other end of the fourth capacitor is respectively connected to one end of the third resistor and one end of the fifth capacitor, and the gate of the intermediate low-voltage gallium nitride transistor is respectively connected to the other end of the third resistor, the other end of the fifth capacitor, and one end of the fourth resistor;

[0023] The other end of the fourth resistor is connected to one end of the fourth inductor, and the other end of the fourth inductor is connected to one end of the sixth capacitor and the second gate bias voltage port respectively;

[0024] The other end of the sixth capacitor is grounded.

[0025] Optionally, the output stage circuit includes a seventh capacitor, an eighth capacitor, a ninth capacitor, a tenth capacitor, an eleventh capacitor, a fifth inductor, a sixth inductor, a seventh inductor, a fifth resistor, a sixth resistor, a seventh resistor and a third gate bias voltage port;

[0026] The drain of the intermediate low-voltage gallium nitride transistor is respectively connected to one end of the seventh capacitor and one end of the fifth inductor, and the other end of the fifth inductor is connected to one end of the drain bias capacitor;

[0027] The other end of the seventh capacitor is respectively connected to one end of the eighth capacitor and one end of the sixth inductor, and the other end of the eighth capacitor is grounded;

[0028] The other end of the sixth inductor is respectively connected to one end of the fifth resistor, one end of the sixth resistor, one end of the seventh resistor, one end of the tenth capacitor, and one end of the eleventh capacitor;

[0029] The other end of the fifth resistor is connected to one end of the seventh inductor, and the other end of the seventh inductor is connected to the third gate bias voltage port and one end of the ninth capacitor respectively;

[0030] The other end of the nine capacitors is grounded;

[0031] The other end of the sixth resistor, the other end of the seventh resistor, the other end of the tenth capacitor, and the other end of the eleventh capacitor are all connected to the output-stage low-voltage gallium nitride transistor group.

[0032] Optionally, the output-stage low-voltage gallium nitride transistor group includes a first output-stage low-voltage gallium nitride transistor, a second output-stage low-voltage gallium nitride transistor, a third output-stage low-voltage gallium nitride transistor, a fourth output-stage low-voltage gallium nitride transistor, a fifth output-stage low-voltage gallium nitride transistor, and a sixth output-stage low-voltage gallium nitride transistor;

[0033] The source of the first output-stage low-voltage gallium nitride transistor, the source of the second output-stage low-voltage gallium nitride transistor, the source of the third output-stage low-voltage gallium nitride transistor, the source of the fourth output-stage low-voltage gallium nitride transistor, the source of the fifth output-stage low-voltage gallium nitride transistor, and the source of the sixth output-stage low-voltage gallium nitride transistor are all grounded;

[0034] The drain of the first output-stage low-voltage gallium nitride transistor, the drain of the second output-stage low-voltage gallium nitride transistor, the drain of the third output-stage low-voltage gallium nitride transistor, the drain of the fourth output-stage low-voltage gallium nitride transistor, the drain of the fifth output-stage low-voltage gallium nitride transistor, and the drain of the sixth output-stage low-voltage gallium nitride transistor are all connected to the second harmonic suppression output matching network;

[0035] The gate of the first output-stage low-voltage gallium nitride transistor, the gate of the second output-stage low-voltage gallium nitride transistor, and the gate of the third output-stage low-voltage gallium nitride transistor are all connected to a connection point between the other end of the sixth resistor and the other end of the tenth capacitor;

[0036] The gate of the fourth output-stage low-voltage gallium nitride transistor, the gate of the fifth output-stage low-voltage gallium nitride transistor, and the gate of the sixth output-stage low-voltage gallium nitride transistor are all connected to a connection point between the other end of the seventh resistor and the other end of the eleventh capacitor.

[0037] Optionally, the second harmonic suppression output matching network includes an eighth inductor, a ninth inductor, a tenth inductor, an eleventh inductor, a twelfth capacitor, a thirteenth capacitor, a fourteenth capacitor, a fifteenth capacitor, a sixteenth capacitor and an output port;

[0038] One end of the eighth inductor is respectively connected to the drain of the first output-stage low-voltage gallium nitride transistor, the drain of the second output-stage low-voltage gallium nitride transistor, the drain of the third output-stage low-voltage gallium nitride transistor, the drain of the fourth output-stage low-voltage gallium nitride transistor, the drain of the fifth output-stage low-voltage gallium nitride transistor, the drain of the sixth output-stage low-voltage gallium nitride transistor, one end of the twelfth capacitor, and one end of the thirteenth capacitor;

[0039] The other end of the eighth inductor and the drain bias capacitor, and the other end of the twelfth capacitor are grounded;

[0040] The other end of the thirteenth capacitor is connected to one end of the ninth inductor, and the other end of the ninth inductor is respectively connected to one end of the fourteenth capacitor, one end of the fifteenth capacitor, one end of the tenth inductor, and one end of the eleventh inductor;

[0041] The other end of the fourteenth capacitor and the other end of the tenth inductor are both grounded;

[0042] The other end of the fifteenth capacitor and the other end of the eleventh inductor are both connected to one end of the sixteenth capacitor, and the other end of the sixteenth capacitor is connected to the output port.

[0043] Optionally, the first capacitor, the first inductor and the second capacitor constitute an input matching network;

[0044] The second inductor, the first resistor, the third capacitor and the second resistor form a gate bias network of the input stage.

[0045] Optionally, the third inductor and the fourth capacitor constitute an inter-stage matching network between the input stage and the intermediate stage;

[0046] The third resistor and the fifth capacitor form a stabilizing network of the intermediate stage;

[0047] The fourth inductor, the fourth resistor and the sixth capacitor form a gate bias network of the output stage.

[0048] Optionally, the fifth inductor, the seventh capacitor, the eighth capacitor and the sixth inductor constitute an inter-stage matching network between the intermediate stage and the output stage;

[0049] The seventh inductor, the fifth resistor and the ninth capacitor constitute a gate bias network of the output stage;

[0050] The sixth resistor, the tenth capacitor, the seventh resistor and the eleventh capacitor form a stabilizing network of two output stage units.

[0051] Optionally, the thirteenth capacitor and the ninth inductor form a series resonance;

[0052] The fourteenth capacitor and the tenth inductor form a parallel resonance;

[0053] The fifteenth capacitor and the eleventh inductor form a parallel resonance.

[0054] It can be seen from the above technical solutions that the present invention has the following advantages:

[0055] The above technical solution of the present invention provides a low-voltage gallium nitride power amplifier based on second harmonic suppression, and the power amplifier includes an input stage circuit, an input stage low-voltage gallium nitride transistor, an intermediate stage circuit, an intermediate stage low-voltage gallium nitride transistor, an output stage circuit, an output stage low-voltage gallium nitride transistor group, a drain bias capacitor, a drain bias voltage port, and a second harmonic suppression output matching network; wherein the input stage circuit is connected to the gate of the input stage low-voltage gallium nitride transistor, and the drain of the input stage low-voltage gallium nitride transistor is connected to one end of the intermediate stage circuit; the source of the input stage low-voltage gallium nitride transistor is grounded; the other end of the intermediate stage circuit is connected to the gate of the intermediate stage low-voltage gallium nitride transistor, and the drain of the intermediate stage low-voltage gallium nitride transistor is connected to one end of the output stage circuit; the source of the intermediate stage low-voltage gallium nitride transistor is grounded; The other end of the output stage circuit is connected to one end of the output stage low-voltage gallium nitride transistor group, and the other end of the output stage low-voltage gallium nitride transistor group is connected to the second harmonic suppression output matching network; one end of the drain bias capacitor is respectively connected to the intermediate stage circuit, the output stage circuit and the second harmonic suppression output matching network, and the drain bias voltage port, and the other end of the drain bias capacitor is grounded; based on the above scheme, the present invention arranges an input stage low-voltage gallium nitride transistor, an intermediate stage low-voltage gallium nitride transistor, an output stage low-voltage gallium nitride transistor group and a second harmonic suppression output matching network, so that the second harmonic suppression output matching network can directly suppress the second harmonic on the basis of the low-voltage gallium nitride process technology, thereby improving the output power and power added efficiency of the radio frequency power amplifier, and further improving the overall efficiency of the radio frequency system. BRIEF DESCRIPTION OF THE DRAWINGS

[0056] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0057] Figure 1 A schematic diagram of a topological structure of a low-voltage gallium nitride power amplifier based on second harmonic suppression provided by an embodiment of the present invention;

[0058] Figure 2 A diagram showing the structure of a low-voltage gallium nitride power amplifier based on second harmonic suppression provided by an embodiment of the present invention;

[0059] Figure 3 A schematic diagram of the structure of a traditional three-stage power amplifier provided in an embodiment of the present invention;

[0060] Figure 4A schematic diagram comparing the output power (Pout, Power output) of a conventional RF power amplifier and an improved RF power amplifier provided in an embodiment of the present invention;

[0061] Figure 5 A schematic diagram showing a comparison of the power added efficiency (PAE) of a conventional radio frequency power amplifier provided by an embodiment of the present invention;

[0062] Figure 6 A schematic diagram showing a comparison of the power added efficiency (PAE) of the improved radio frequency power amplifier (b) provided in an embodiment of the present invention;

[0063] Figure 7 A comparison diagram of input return loss (S11) between a conventional three-stage power amplifier and a low-voltage gallium nitride power amplifier based on second harmonic suppression provided by an embodiment of the present invention;

[0064] Figure 8 A comparison diagram of output return loss (S22) of a conventional three-stage power amplifier and a low-voltage gallium nitride power amplifier based on second harmonic suppression provided by an embodiment of the present invention;

[0065] Fig. 9 A comparison diagram of the small signal gain (S21) of a conventional three-stage power amplifier and a low-voltage gallium nitride power amplifier based on second harmonic suppression provided by an embodiment of the present invention;

[0066] Fig.10 A schematic diagram of the structure of a common framework (single-stage PA) of a radio frequency power amplifier provided in an embodiment of the present invention;

[0067] Fig.11 A schematic diagram of an LC parallel resonance structure provided in an embodiment of the present invention;

[0068] Fig.12 A schematic diagram of an LC series resonance structure provided in an embodiment of the present invention.

[0069] The meanings of the reference numerals are as follows:

[0070] 1. Input stage circuit; 2. Intermediate stage circuit; 3. Output stage circuit; 4. Output stage low voltage GaN transistor group; 5. Second harmonic suppression output matching network. DETAILED DESCRIPTION

[0071] The embodiment of the present invention provides a low-voltage gallium nitride power amplifier based on second harmonic suppression, which is used to solve the technical problem that the overall efficiency of the radio frequency system is low due to the existing radio frequency power amplifier.

[0072] In order to make the purpose, features and advantages of the present invention more obvious and easy to understand, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the embodiments described below are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0073] 1. Impedance matching

[0074] 1. Input matching

[0075] The main function of the input matching circuit is to adjust the input impedance of the RF power amplifier to match the impedance of the signal source, thereby maximizing power transmission efficiency and reducing signal reflection. By designing a suitable matching network (usually including inductors, capacitors, and resistors), the input matching circuit can ensure that the signal strength received by the amplifier reaches the optimal level while reducing power loss and system instability caused by impedance mismatch.

[0076] 2. Output matching

[0077] The main function of the output matching circuit is to adjust the output impedance of the RF power amplifier to match the impedance of the load (such as an antenna) to maximize power transfer and reduce reflection loss. By designing a suitable matching network (usually containing inductors, capacitors, and resistors), the output matching circuit ensures that the output signal of the amplifier can be effectively delivered to the load while minimizing the power loss and signal distortion caused by impedance mismatch.

[0078] 2. Performance parameters

[0079] 1. Output power

[0080] Output power is the signal power that the RF power amplifier can provide to the load when it is in operation, usually in watts (W) or milliwatts (mW). It represents the actual power level after the RF power amplifier amplifies the input signal, and determines the signal strength and coverage of the system. The output power directly affects the effective transmission distance of the signal and the overall performance of the system.

[0081] 2. Power added efficiency

[0082] Power added efficiency is a key performance indicator of RF power amplifiers, indicating the efficiency of RF power amplifiers in converting input DC power into RF output power during the amplification process. It is calculated as the ratio between the difference between the output power of the RF power amplifier and the input power and the DC power, usually expressed as a percentage. High power added efficiency indicates that the RF power amplifier can use power more efficiently when increasing signal power, reduce energy waste and heat, and improve the overall energy efficiency and economy of the system.

[0083] 3. S parameters

[0084] S parameters are used to describe the signal transmission and reflection characteristics of high-frequency circuits. S11 represents the reflection coefficient of the input port, which shows the degree to which the input signal is reflected back and reflects the input matching situation; S22 is the reflection coefficient of the output port, which indicates the reflection of the output signal and evaluates the output matching degree; S21 is the transmission coefficient from input to output, which reflects the transmission efficiency of the signal and is usually used to measure the gain; S12 is the transmission coefficient from output to input, which measures the return flow capacity of the signal and is often used to evaluate the isolation. The smaller the values ​​of S11 and S22, the better the input and output matching of the circuit, the smaller the signal loss, and the higher the efficiency of the entire transmission link.

[0085] 3. Brief description of power amplifier classification

[0086] RF power amplifiers have multiple key parameters, including gain, linearity, efficiency, and bandwidth. These indicators need to be considered comprehensively during design to ensure signal quality and system performance. According to the working mode, RF power amplifiers can be divided into two categories: linear and switching. Linear power amplifiers are named because their output signals maintain a certain linear change as the input signals change. According to their working conduction angles, they can be divided into Class A, Class B, Class AB, and Class C. The conduction angles from Class A to Class C gradually decrease, and the power amplification capacity also decreases, but the efficiency continues to increase. The theoretical efficiencies of the above four types of linear power amplifiers are about 50%, 78.5%, 50%-78.5%, and 90%, respectively.

[0087] Switching power amplifiers are roughly divided into Class D. Switching power amplifiers are electronic devices that use switching elements (such as transistors) to work in a switching state to achieve high-efficiency signal amplification. Unlike traditional linear power amplifiers, switching power amplifiers only switch between full-on or full-off states when working, so there is almost no heat loss during the signal amplification process, which makes them very superior in efficiency. There are usually several main types of switching power amplifiers, including Class D, Class E, and Class F. They convert the input analog signal into a digital signal through technologies such as pulse width modulation (PWM) or pulse frequency modulation (PFM), and then control the output power through the rapid switching of switching elements.

[0088] See also Figure 1 , Figure 1 A schematic diagram of a topological structure of a low-voltage gallium nitride power amplifier based on second harmonic suppression provided by an embodiment of the present invention.

[0089] A low-voltage gallium nitride power amplifier based on second harmonic suppression provided by the present invention comprises an input stage circuit 1, an input stage low-voltage gallium nitride transistor, an intermediate stage circuit 2, an intermediate stage low-voltage gallium nitride transistor, an output stage circuit 3, an output stage low-voltage gallium nitride transistor group 4, a drain bias capacitor, a drain bias voltage port, and a second harmonic suppression output matching network 5;

[0090] The input stage circuit 1 is connected to the gate of the input stage low voltage gallium nitride transistor, and the drain of the input stage low voltage gallium nitride transistor is connected to one end of the intermediate stage circuit 2;

[0091] The source of the input stage low voltage GaN transistor is grounded;

[0092] The other end of the intermediate stage circuit 2 is connected to the gate of the intermediate stage low voltage gallium nitride transistor, and the drain of the intermediate stage low voltage gallium nitride transistor is connected to one end of the output stage circuit 3;

[0093] The source of the intermediate low-voltage GaN transistor is grounded;

[0094] The other end of the output stage circuit 3 is connected to one end of the output stage low voltage gallium nitride transistor group 4, and the other end of the output stage low voltage gallium nitride transistor group 4 is connected to the second harmonic suppression output matching network 5;

[0095] One end of the drain bias capacitor is connected to the intermediate stage circuit 2, the output stage circuit 3, the second harmonic suppression output matching network 5, and the drain bias voltage port respectively, and the other end of the drain bias capacitor is grounded.

[0096] The input-stage low-voltage gallium nitride transistor, the intermediate-stage low-voltage gallium nitride transistor, and the output-stage low-voltage gallium nitride transistor group 4 are all GaN-based low-voltage high electron mobility transistors (High Electron Mobility Transistor), that is, low-voltage gallium nitride transistors.

[0097] It should be noted that M1 is an input stage transistor (input stage low-voltage gallium nitride transistor), M2 is an intermediate stage transistor (intermediate stage low-voltage gallium nitride transistor), transistors M3, M4, M5 and transistors M6, M7, M8 are two power stage units respectively, which together constitute the output stage, i.e., the output stage low-voltage gallium nitride transistor group 4; wherein the transistor bias voltage is jointly determined by the gate bias and the drain bias.

[0098] For further information, see Figure 2The overall circuit of the power amplifier proposed in the present invention is composed of three-stage amplifiers, namely, input stage, intermediate stage and output stage. In addition, it also includes an input matching network, an inter-stage matching network, an output matching network, a stabilization network and a bias circuit, wherein the bias circuit is divided into a gate bias and a drain bias; wherein the gate bias supply voltage is a first gate bias voltage port VG1, a second gate bias voltage port VG2, and a third gate bias voltage port VG3, and the drain bias supply voltage is a drain bias voltage port VDD. The gate bias and the drain bias determine the static operating point of the transistor, so that the RF power amplifier is biased in a deep class AB operating state.

[0099] As a further improvement, the input stage circuit 1 includes an input port, a first capacitor, a second capacitor, a third capacitor, a first inductor, a second inductor, a first resistor, a second resistor, and a first gate bias voltage port;

[0100] The input port is connected to one end of the first capacitor, and the other end of the first capacitor is connected to one end of the second capacitor and one end of the first inductor respectively;

[0101] The other end of the second capacitor is grounded;

[0102] The other end of the first inductor is connected to one end of the first resistor and one end of the second resistor respectively;

[0103] The other end of the first resistor is connected to one end of the second inductor, and the other end of the second inductor is connected to one end of the third capacitor and the first gate bias voltage port respectively;

[0104] The other end of the third capacitor is grounded;

[0105] The other end of the second resistor is connected to the gate of the input-stage low-voltage gallium nitride transistor.

[0106] Optionally, the first capacitor, the first inductor and the second capacitor form an input matching network;

[0107] The second inductor, the first resistor, the third capacitor and the second resistor form a gate bias network of the input stage.

[0108] It should be noted that the first capacitor C0, the first inductor L0, and the second capacitor C1 constitute an input matching network, which conjugate matches the optimal input impedance of the transistor to 50 Ω; the second inductor L1, the first resistor R0, the third capacitor C2, and the second resistor R1 together constitute a gate bias network of the input stage.

[0109] As a further improvement, the intermediate stage circuit 2 includes a fourth capacitor, a fifth capacitor, a sixth capacitor, a third inductor, a fourth inductor, a third resistor, a fourth resistor and a second gate bias voltage port;

[0110] The drain of the input-stage low-voltage gallium nitride transistor is respectively connected to one end of the fourth capacitor and one end of the third inductor, and the other end of the third inductor is connected to one end of the drain bias capacitor;

[0111] The other end of the fourth capacitor is respectively connected to one end of the third resistor and one end of the fifth capacitor, and the gate of the intermediate low-voltage gallium nitride transistor is respectively connected to the other end of the third resistor, the other end of the fifth capacitor, and one end of the fourth resistor;

[0112] The other end of the fourth resistor is connected to one end of the fourth inductor, and the other end of the fourth inductor is connected to one end of the sixth capacitor and the second gate bias voltage port respectively;

[0113] The other end of the sixth capacitor is grounded.

[0114] Optionally, the third inductor and the fourth capacitor form an inter-stage matching network between the input stage and the intermediate stage;

[0115] The third resistor and the fifth capacitor form a stabilizing network of the intermediate stage;

[0116] The fourth inductor, the fourth resistor and the sixth capacitor form a gate bias network of the output stage.

[0117] It should be noted that the third inductor L2 and the fourth capacitor C3 constitute an inter-stage matching network between the input stage and the intermediate stage; the third resistor R2 and the fifth capacitor C4 constitute a stabilizing network of the intermediate stage; the fourth inductor L3, the fourth resistor R3, and the sixth capacitor C5 together constitute a gate bias network of the intermediate stage.

[0118] As a further improvement, the output stage circuit 3 includes a seventh capacitor, an eighth capacitor, a ninth capacitor, a tenth capacitor, an eleventh capacitor, a fifth inductor, a sixth inductor, a seventh inductor, a fifth resistor, a sixth resistor, a seventh resistor and a third gate bias voltage port;

[0119] The drain of the intermediate low-voltage gallium nitride transistor is respectively connected to one end of the seventh capacitor and one end of the fifth inductor, and the other end of the fifth inductor is connected to one end of the drain bias capacitor;

[0120] The other end of the seventh capacitor is connected to one end of the eighth capacitor and one end of the sixth inductor respectively, and the other end of the eighth capacitor is grounded;

[0121] The other end of the sixth inductor is respectively connected to one end of the fifth resistor, one end of the sixth resistor, one end of the seventh resistor, one end of the tenth capacitor, and one end of the eleventh capacitor;

[0122] The other end of the fifth resistor is connected to one end of the seventh inductor, and the other end of the seventh inductor is connected to the third gate bias voltage port and one end of the ninth capacitor respectively;

[0123] The other end of the nine capacitors is grounded;

[0124] The other end of the sixth resistor, the other end of the seventh resistor, the other end of the tenth capacitor, and the other end of the eleventh capacitor are all connected to the output-stage low-voltage gallium nitride transistor group.

[0125] Optionally, the fifth inductor, the seventh capacitor, the eighth capacitor and the sixth inductor constitute an inter-stage matching network between the intermediate stage and the output stage;

[0126] The seventh inductor, the fifth resistor and the ninth capacitor form a gate bias network of the output stage;

[0127] The sixth resistor, the tenth capacitor, the seventh resistor and the eleventh capacitor form a stabilizing network of two output stage units.

[0128] It should be noted that the fifth inductor L4, the seventh capacitor C6, the eighth capacitor C7, and the sixth inductor L5 together constitute an inter-stage matching network of the intermediate stage and the output stage; the seventh inductor L6, the fifth resistor R4, and the ninth capacitor C8 together constitute a gate bias network of the output stage; the sixth resistor R5, the tenth capacitor C9, the seventh resistor R6, and the eleventh capacitor C10 constitute a stabilizing network of the two output stage units.

[0129] As a further improvement, the output-stage low-voltage gallium nitride transistor group includes a first output-stage low-voltage gallium nitride transistor, a second output-stage low-voltage gallium nitride transistor, a third output-stage low-voltage gallium nitride transistor, a fourth output-stage low-voltage gallium nitride transistor, a fifth output-stage low-voltage gallium nitride transistor, and a sixth output-stage low-voltage gallium nitride transistor;

[0130] The source of the first output-stage low-voltage gallium nitride transistor, the source of the second output-stage low-voltage gallium nitride transistor, the source of the third output-stage low-voltage gallium nitride transistor, the source of the fourth output-stage low-voltage gallium nitride transistor, the source of the fifth output-stage low-voltage gallium nitride transistor, and the source of the sixth output-stage low-voltage gallium nitride transistor are all grounded;

[0131] The drain of the first output-stage low-voltage gallium nitride transistor, the drain of the second output-stage low-voltage gallium nitride transistor, the drain of the third output-stage low-voltage gallium nitride transistor, the drain of the fourth output-stage low-voltage gallium nitride transistor, the drain of the fifth output-stage low-voltage gallium nitride transistor, and the drain of the sixth output-stage low-voltage gallium nitride transistor are all connected to the second harmonic suppression output matching network;

[0132] The gate of the first output-stage low-voltage gallium nitride transistor, the gate of the second output-stage low-voltage gallium nitride transistor, and the gate of the third output-stage low-voltage gallium nitride transistor are all connected to a connection point between the other end of the sixth resistor and the other end of the tenth capacitor;

[0133] The gate of the fourth output-stage low-voltage gallium nitride transistor, the gate of the fifth output-stage low-voltage gallium nitride transistor, and the gate of the sixth output-stage low-voltage gallium nitride transistor are all connected to a connection point between the other end of the seventh resistor and the other end of the eleventh capacitor.

[0134] It should be noted that the first output-stage low-voltage gallium nitride transistor M3, the second output-stage low-voltage gallium nitride transistor M4, the third output-stage low-voltage gallium nitride transistor M5, the fourth output-stage low-voltage gallium nitride transistor M6, the fifth output-stage low-voltage gallium nitride transistor M7, and the sixth output-stage low-voltage gallium nitride transistor M8 are respectively two power stage units, which together constitute the output stage.

[0135] As a further improvement, the second harmonic suppression output matching network includes an eighth inductor, a ninth inductor, a tenth inductor, an eleventh inductor, a twelfth capacitor, a thirteenth capacitor, a fourteenth capacitor, a fifteenth capacitor, a sixteenth capacitor and an output port;

[0136] One end of the eighth inductor is respectively connected to the drain of the first output-stage low-voltage gallium nitride transistor, the drain of the second output-stage low-voltage gallium nitride transistor, the drain of the third output-stage low-voltage gallium nitride transistor, the drain of the fourth output-stage low-voltage gallium nitride transistor, the drain of the fifth output-stage low-voltage gallium nitride transistor, the drain of the sixth output-stage low-voltage gallium nitride transistor, one end of the twelfth capacitor, and one end of the thirteenth capacitor;

[0137] The other end of the eighth inductor is connected to the drain bias capacitor, and the other end of the twelfth capacitor is grounded;

[0138] The other end of the thirteenth capacitor is connected to one end of the ninth inductor, and the other end of the ninth inductor is respectively connected to one end of the fourteenth capacitor, one end of the fifteenth capacitor, one end of the tenth inductor, and one end of the eleventh inductor;

[0139] The other end of the fourteenth capacitor and the other end of the tenth inductor are both grounded;

[0140] The other end of the fifteenth capacitor and the other end of the eleventh inductor are both connected to one end of the sixteenth capacitor, and the other end of the sixteenth capacitor is connected to the output port.

[0141] Optionally, the thirteenth capacitor and the ninth inductor form a series resonance;

[0142] The fourteenth capacitor and the tenth inductor form parallel resonance;

[0143] The fifteenth capacitor and the eleventh inductor form parallel resonance.

[0144] It should be noted that the eighth inductor L7, the twelfth capacitor C12, the thirteenth capacitor C13, the ninth inductor L8, the fourteenth capacitor C14, the tenth inductor L9, the fifteenth capacitor C15, the eleventh inductor L10, and the sixteenth capacitor C16 together constitute an output matching network, which conjugate matches 50Ω to the optimal output impedance of the transistor to achieve optimal power transmission; the thirteenth capacitor C13 and the ninth inductor L8 are series resonance, the fourteenth capacitor C14 and the tenth inductor L9 are parallel resonance, and the fifteenth capacitor C15 and the eleventh inductor L10 are parallel resonance. Since they participate in output matching, they can also resonate at the second harmonic and short-circuit the second harmonic to the ground. The output matching network, as a key circuit of the present invention, simultaneously realizes harmonic suppression and optimal load impedance matching, and maximizes the high efficiency characteristics of the low-voltage gallium nitride process technology.

[0145] It is worth mentioning that the third inductor L2 and the drain bias capacitor C11 constitute the drain bias network of the input stage; the fifth inductor L4 and the drain bias capacitor C11 constitute the drain bias network of the intermediate stage; the eighth inductor L7 and the drain bias capacitor C11 constitute the drain bias network of the output stage.

[0146] See also Figure 3 Compared with traditional RF power amplifiers, which either do not consider the influence of harmonics or cannot significantly improve the power added efficiency of multi-stage power amplifiers, the present invention is based on introducing a harmonic suppression network into the output matching network of the traditional RF power amplifier.

[0147] For further information, see Figure 4-Figure 6 The present invention makes the most intuitive comparison of the simulation performance of the three-stage power amplifiers of these two structures, wherein the common three-stage power amplifier is called the traditional type, and the low-voltage gallium nitride power amplifier based on second harmonic suppression proposed by the present invention is called the improved type; the present invention is intended to work in the 2GHz frequency band, Figure 4-Figure 6 It is not difficult to see that compared with the traditional three-stage power amplifier, the improved power amplifier has improved performance in output power and power added efficiency. When the input power (Pin) is 0dBm, the output power of the improved power amplifier reaches 40dBm, and the output power of the traditional power amplifier is 39.2dBm. At this time, the power added efficiency of the improved power amplifier is significantly improved compared with the traditional power amplifier (about 10% PAE improvement).

[0148] For further information, see Figure 7-Figure 8It can be seen that the addition of the second harmonic suppression network does not have a significant impact on the original input matching network, and S22 is not greatly affected near 2GHz, while the reflection coefficient near 5.2GHz is significantly optimized, which means that the second harmonic suppression network has a certain promoting effect on the output matching of the power amplifier. It can be seen that the second harmonic suppression network has the advantages of easy use and strong stability.

[0149] For further information, see Fig. 9 , it can be seen that at the center frequency f 0 (2GHz) second harmonic 2f 0 At (4 GHz), the small signal gain is significantly suppressed, which reflects the harmonic suppression effect of the second harmonic suppression network.

[0150] As a comparison of technical effects, we can refer to existing technologies. Traditional RF power amplifiers have different disadvantages. Silicon-based amplifiers usually have mature technology and low costs, but may be limited in efficiency and frequency response. Although gallium arsenide has high electron mobility, it is expensive and has a complex manufacturing process and is easily affected by the environment. Silicon carbide performs well in high-temperature and high-power applications, but its manufacturing difficulty and high material cost limit its large-scale application.

[0151] As a representative of the third generation of wide bandgap semiconductors, gallium nitride (GaN) has the advantages of wide bandgap, high electron mobility and high breakdown field strength, and the device power density far exceeds that of Si and GaAs. Due to its excellent high-frequency characteristics, high power, high efficiency, high temperature resistance, and radiation resistance, GaN monolithic microwave integrated circuits (MMICs) can be widely used in cutting-edge military equipment, satellite communication systems, and civil communication base stations in the Sub6G and 5G millimeter wave frequency bands, and have great development prospects.

[0152] Therefore, the present invention uses a GaN-based low-voltage high electron mobility transistor (High Electron Mobility Transistor), that is, a low-voltage gallium nitride transistor to design an RF power amplifier. Compared with traditional gallium nitride transistors, low-voltage gallium nitride transistors have higher efficiency, can achieve better power output at low voltage, and reduce heat loss. At the same time, the low-voltage power supply feature also facilitates the design of power management chips in mobile communication systems. Secondly, it has a fast switching speed, is suitable for high-frequency applications, and can improve the overall performance of the system.

[0153] Furthermore, high-efficiency power amplifiers are crucial in RF communication systems, mainly in the following aspects:

[0154] (1) Energy saving: High efficiency means less electricity is consumed when transmitting the same power, which helps reduce operating costs and extend the service life of equipment.

[0155] (2) Thermal Management: Higher efficiency reduces heat generation and lowers cooling requirements, thereby simplifying system design and improving reliability.

[0156] (3) Signal quality: High-efficiency power amplifiers can better maintain signal integrity and reduce distortion, thereby improving communication quality and coverage.

[0157] (4) Miniaturized design: Due to the reduction in heat and power consumption, smaller systems can be designed to meet the compact requirements of mobile devices.

[0158] (5) Network capacity: Improving the efficiency of power amplifiers can support more users to access the network simultaneously, thereby improving the overall capacity and performance of the network.

[0159] The role of suppressing the second harmonic of the power amplifier during design:

[0160] (1) Improve signal quality: Second harmonics can cause distortion in the output signal, affecting the reception quality of the communication system. By suppressing harmonics, the purity and integrity of the signal can be ensured, thereby improving demodulation performance.

[0161] (2) Reduce interference: In a multi-channel system, harmonics may cause intermodulation interference and affect the transmission of other signals. By controlling the second harmonic, the interference to other channels can be reduced and the stability of the system can be improved.

[0162] (3) Meeting standards: Many wireless communication standards (such as FCC or ETSI) have strict limits on harmonic emissions. Suppressing second harmonics can ensure that the device complies with these regulations and avoid fines or bans due to exceeding the standards.

[0163] (4) Improve efficiency: Harmonics will cause power loss and heat increase. By effectively suppressing second harmonics, the efficiency of the power amplifier can be improved and unnecessary energy loss can be reduced.

[0164] (5) Extending equipment life: Excessive heat and electrical stress can accelerate the aging of electronic components. Harmonic suppression helps reduce these burdens, thereby extending the service life of power amplifiers and other related components.

[0165] See also Fig.10, common RF power amplifiers are generally composed of the following parts: transistors, bias circuits, stabilization network input matching circuits, inter-stage matching circuits (if it is a multi-stage PA) and output matching circuits; among them, the transistor is the core component of the RF power amplifier, responsible for amplifying the input RF signal. Its working principle is based on the current control characteristics of semiconductor materials, and the output signal is amplified by adjusting the current of the input signal. The bias circuit provides the required DC voltage and current for the transistor to put it in a proper working state. Correct biasing can ensure that the transistor amplifies at its optimal operating point, thereby improving the performance of the amplifier. The design of the bias circuit should take into account the operating characteristics of the transistor, such as gate voltage, drain voltage, etc., while ensuring stability and reliability. The stabilization network is used to prevent the RF power amplifier from self-oscillation or instability during operation, which may cause signal distortion or amplifier damage. The stabilization network ensures the stability of the amplifier and reduces the instability caused by feedback. The stabilization network usually includes matching capacitors, inductors and other components, and the stability and frequency response of the amplifier are controlled by adjusting the values ​​of these components.

[0166] The input matching circuit is used to match the impedance of the input signal with the input impedance of the amplifier to maximize the signal transmission efficiency and reduce signal reflection. Impedance matching can ensure that the loss of the signal is minimized when it enters the amplifier. The input matching circuit is usually designed using components such as inductors and capacitors to ensure impedance matching within the required frequency range.

[0167] In a multi-stage amplifier, inter-stage matching circuits are used to optimize the impedance matching between each stage of the amplifier. This helps maximize the power transfer and gain between each stage of the amplifier while reducing mutual interference. The design of inter-stage matching circuits usually involves complex network analysis and optimization to ensure that the performance of each stage of the amplifier matches the requirements of the overall system.

[0168] The output matching circuit is used to match the output signal impedance of the amplifier with the impedance of the load (such as an antenna) to ensure effective signal transmission, reduce reflection loss, and optimize power transfer efficiency. The output matching circuit usually includes components such as matching networks, capacitors, and inductors. The actual impedance of the load and the signal frequency need to be considered during design to ensure the best match.

[0169] These parts work together to ensure that the RF power amplifier can efficiently and stably amplify the RF signal to meet the needs of wireless communication systems. The existing technology usually adds a series resonant circuit to the output network to suppress the second and third harmonics or introduces a λ / 2 wavelength short-circuit transmission line in the output matching network to reduce the even harmonic components, but these methods can usually only recover part of the harmonic components, and cause large power loss in the design of multi-stage power amplifiers, reduce power added efficiency, and still have certain limitations in the suppression effect of higher harmonics.

[0170] At the same time, in the design of existing RF power amplifiers, output power and power added efficiency (PAE) are important indicators for measuring the performance of power amplifiers. Among them, the power added efficiency is calculated by subtracting the input power from the output power and then dividing it by the DC power consumption. How to maintain a sufficiently high power added efficiency when the output power continues to increase is a technical issue that deserves the attention of researchers. If the output power is too high and the power added efficiency is insufficient, the excessive loss will be converted into heat and dissipated in the entire circuit system, thus causing damage to the equipment.

[0171] For further information, see Figure 11-Figure 12 , commonly used harmonic suppression methods are harmonic filters, negative feedback technology, and harmonic trap technology. Among them, the disadvantage of harmonic filters is that the required area is too large, which leads to an increase in the wafer area and high cost. At the same time, it may introduce certain losses and reduce the overall efficiency of the system; the disadvantage of negative feedback technology is that it will reduce the gain of the RF power amplifier and reduce the overall performance of the system; the disadvantage of harmonic trap technology is that it can only target specific harmonic frequencies. At the same time, harmonic traps will have a greater impact on the matching circuit of the RF power amplifier and may even cause the RF power amplifier to oscillate. Oscillation is the most dangerous phenomenon in RF power amplifiers. This means that the design is not stable enough, which will cause the entire system to fail. The common method of using harmonic trap technology is to connect a series LC parallel structure in the matching circuit (such as Fig.11 ), or in a matching circuit with a parallel LC series resonant structure (such as Fig.12 ).

[0172] In view of the above problems, the present invention proposes a low-voltage gallium nitride power amplifier based on second harmonic suppression, which designs the resonance point based on the traditional LC matching through the second harmonic suppression output matching network, and the signal loss caused is very low. Under low drain voltage power supply, the output power and power added efficiency of the design can be effectively improved. Specifically, the second harmonic suppression output matching network is composed of two capacitors, an LC series resonance and two LC parallel resonances, which can significantly suppress the second harmonic, specifically manifested in the high impedance characteristics of the second harmonic, thereby preventing high-order harmonic signals from passing through, and providing a low-impedance path in the loop to guide the high-order harmonic signal to the ground, reducing the impact of high-order harmonics, thereby improving the output power and power added efficiency of the RF power amplifier within the working frequency band, especially at the center frequency.

[0173] It should be noted that the second harmonic suppression network is directly involved in the matching of the output end of the RF signal path, and has a significant efficiency improvement effect when applied to low-voltage GaN power amplifiers. Therefore, the main method to improve power added efficiency is harmonic suppression, which effectively suppresses high-frequency harmonics and significantly reduces power loss, thereby improving overall efficiency.

[0174] In an embodiment of the present invention, the present invention provides a low-voltage gallium nitride power amplifier based on second harmonic suppression, the power amplifier comprising an input stage circuit, an input stage low-voltage gallium nitride transistor, an intermediate stage circuit, an intermediate stage low-voltage gallium nitride transistor, an output stage circuit, an output stage low-voltage gallium nitride transistor group, a drain bias capacitor, a drain bias voltage port, and a second harmonic suppression output matching network; wherein the input stage circuit is connected to the gate of the input stage low-voltage gallium nitride transistor, the drain of the input stage low-voltage gallium nitride transistor is connected to one end of the intermediate stage circuit; the source of the input stage low-voltage gallium nitride transistor is grounded; the other end of the intermediate stage circuit is connected to the gate of the intermediate stage low-voltage gallium nitride transistor, the drain of the intermediate stage low-voltage gallium nitride transistor is connected to one end of the output stage circuit; the source of the intermediate stage low-voltage gallium nitride transistor is grounded; The other end of the output stage circuit is connected to one end of the output stage low-voltage gallium nitride transistor group, and the other end of the output stage low-voltage gallium nitride transistor group is connected to the second harmonic suppression output matching network; one end of the drain bias capacitor is respectively connected to the intermediate stage circuit, the output stage circuit and the second harmonic suppression output matching network, and the drain bias voltage port, and the other end of the drain bias capacitor is grounded; based on the above scheme, the present invention arranges an input stage low-voltage gallium nitride transistor, an intermediate stage low-voltage gallium nitride transistor, an output stage low-voltage gallium nitride transistor group and a second harmonic suppression output matching network, so that the second harmonic suppression output matching network can directly suppress the second harmonic on the basis of the low-voltage gallium nitride process technology, thereby improving the output power and power added efficiency of the radio frequency power amplifier, and further improving the overall efficiency of the radio frequency system.

[0175] As described above, the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features thereof may be replaced by equivalents. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A low voltage gallium nitride power amplifier based on second harmonic suppression, characterized in that: Including input stage circuit, input stage low voltage GaN transistor, intermediate stage circuit, intermediate stage low voltage GaN transistor, output stage circuit, output stage low voltage GaN transistor group, drain bias capacitor, drain bias voltage port, second harmonic suppression output matching network; The input stage circuit is connected to the gate of the input stage low voltage gallium nitride transistor, and the drain of the input stage low voltage gallium nitride transistor is connected to one end of the intermediate stage circuit; The source of the input-stage low-voltage gallium nitride transistor is grounded; The other end of the intermediate stage circuit is connected to the gate of the intermediate stage low voltage gallium nitride transistor, and the drain of the intermediate stage low voltage gallium nitride transistor is connected to one end of the output stage circuit; The source of the intermediate low-voltage gallium nitride transistor is grounded; The other end of the output stage circuit is connected to one end of the output stage low voltage gallium nitride transistor group, and the other end of the output stage low voltage gallium nitride transistor group is connected to the second harmonic suppression output matching network; One end of the drain bias capacitor is respectively connected to the intermediate stage circuit, the output stage circuit, the second harmonic suppression output matching network, and the drain bias voltage port, and the other end of the drain bias capacitor is grounded.

2. The low voltage gallium nitride power amplifier based on second harmonic suppression according to claim 1, characterized in that: The input stage circuit comprises an input port, a first capacitor, a second capacitor, a third capacitor, a first inductor, a second inductor, a first resistor, a second resistor, and a first gate bias voltage port; The input port is connected to one end of the first capacitor, and the other end of the first capacitor is connected to one end of the second capacitor and one end of the first inductor respectively; The other end of the second capacitor is grounded; The other end of the first inductor is connected to one end of the first resistor and one end of the second resistor respectively; The other end of the first resistor is connected to one end of the second inductor, and the other end of the second inductor is connected to one end of the third capacitor and the first gate bias voltage port respectively; The other end of the third capacitor is grounded; The other end of the second resistor is connected to the gate of the input-stage low-voltage gallium nitride transistor.

3. The low voltage gallium nitride power amplifier based on second harmonic suppression according to claim 1, characterized in that: The intermediate stage circuit includes a fourth capacitor, a fifth capacitor, a sixth capacitor, a third inductor, a fourth inductor, a third resistor, a fourth resistor and a second gate bias voltage port; The drain of the input-stage low-voltage gallium nitride transistor is respectively connected to one end of the fourth capacitor and one end of the third inductor, and the other end of the third inductor is connected to one end of the drain bias capacitor; The other end of the fourth capacitor is respectively connected to one end of the third resistor and one end of the fifth capacitor, and the gate of the intermediate low-voltage gallium nitride transistor is respectively connected to the other end of the third resistor, the other end of the fifth capacitor, and one end of the fourth resistor; The other end of the fourth resistor is connected to one end of the fourth inductor, and the other end of the fourth inductor is connected to one end of the sixth capacitor and the second gate bias voltage port respectively; The other end of the sixth capacitor is grounded.

4. The low voltage gallium nitride power amplifier based on second harmonic suppression according to claim 1, characterized in that: The output stage circuit includes a seventh capacitor, an eighth capacitor, a ninth capacitor, a tenth capacitor, an eleventh capacitor, a fifth inductor, a sixth inductor, a seventh inductor, a fifth resistor, a sixth resistor, a seventh resistor and a third gate bias voltage port; The drain of the intermediate low-voltage gallium nitride transistor is respectively connected to one end of the seventh capacitor and one end of the fifth inductor, and the other end of the fifth inductor is connected to one end of the drain bias capacitor; The other end of the seventh capacitor is respectively connected to one end of the eighth capacitor and one end of the sixth inductor, and the other end of the eighth capacitor is grounded; The other end of the sixth inductor is respectively connected to one end of the fifth resistor, one end of the sixth resistor, one end of the seventh resistor, one end of the tenth capacitor, and one end of the eleventh capacitor; The other end of the fifth resistor is connected to one end of the seventh inductor, and the other end of the seventh inductor is connected to the third gate bias voltage port and one end of the ninth capacitor respectively; The other end of the nine capacitors is grounded; The other end of the sixth resistor, the other end of the seventh resistor, the other end of the tenth capacitor, and the other end of the eleventh capacitor are all connected to the output-stage low-voltage gallium nitride transistor group.

5. The low voltage gallium nitride power amplifier based on second harmonic suppression according to claim 4, characterized in that: The output-stage low-voltage gallium nitride transistor group includes a first output-stage low-voltage gallium nitride transistor, a second output-stage low-voltage gallium nitride transistor, a third output-stage low-voltage gallium nitride transistor, a fourth output-stage low-voltage gallium nitride transistor, a fifth output-stage low-voltage gallium nitride transistor, and a sixth output-stage low-voltage gallium nitride transistor; The source of the first output-stage low-voltage gallium nitride transistor, the source of the second output-stage low-voltage gallium nitride transistor, the source of the third output-stage low-voltage gallium nitride transistor, the source of the fourth output-stage low-voltage gallium nitride transistor, the source of the fifth output-stage low-voltage gallium nitride transistor, and the source of the sixth output-stage low-voltage gallium nitride transistor are all grounded; The drain of the first output-stage low-voltage gallium nitride transistor, the drain of the second output-stage low-voltage gallium nitride transistor, the drain of the third output-stage low-voltage gallium nitride transistor, the drain of the fourth output-stage low-voltage gallium nitride transistor, the drain of the fifth output-stage low-voltage gallium nitride transistor, and the drain of the sixth output-stage low-voltage gallium nitride transistor are all connected to the second harmonic suppression output matching network; The gate of the first output-stage low-voltage gallium nitride transistor, the gate of the second output-stage low-voltage gallium nitride transistor, and the gate of the third output-stage low-voltage gallium nitride transistor are all connected to a connection point between the other end of the sixth resistor and the other end of the tenth capacitor; The gate of the fourth output-stage low-voltage gallium nitride transistor, the gate of the fifth output-stage low-voltage gallium nitride transistor, and the gate of the sixth output-stage low-voltage gallium nitride transistor are all connected to a connection point between the other end of the seventh resistor and the other end of the eleventh capacitor.

6. The low voltage gallium nitride power amplifier based on second harmonic suppression according to claim 5, characterized in that: The second harmonic suppression output matching network includes an eighth inductor, a ninth inductor, a tenth inductor, an eleventh inductor, a twelfth capacitor, a thirteenth capacitor, a fourteenth capacitor, a fifteenth capacitor, a sixteenth capacitor and an output port; One end of the eighth inductor is respectively connected to the drain of the first output-stage low-voltage gallium nitride transistor, the drain of the second output-stage low-voltage gallium nitride transistor, the drain of the third output-stage low-voltage gallium nitride transistor, the drain of the fourth output-stage low-voltage gallium nitride transistor, the drain of the fifth output-stage low-voltage gallium nitride transistor, the drain of the sixth output-stage low-voltage gallium nitride transistor, one end of the twelfth capacitor, and one end of the thirteenth capacitor; The other end of the eighth inductor and the drain bias capacitor, and the other end of the twelfth capacitor are grounded; The other end of the thirteenth capacitor is connected to one end of the ninth inductor, and the other end of the ninth inductor is respectively connected to one end of the fourteenth capacitor, one end of the fifteenth capacitor, one end of the tenth inductor, and one end of the eleventh inductor; The other end of the fourteenth capacitor and the other end of the tenth inductor are both grounded; The other end of the fifteenth capacitor and the other end of the eleventh inductor are both connected to one end of the sixteenth capacitor, and the other end of the sixteenth capacitor is connected to the output port.

7. The low voltage gallium nitride power amplifier based on second harmonic suppression according to claim 2, characterized in that: The first capacitor, the first inductor and the second capacitor constitute an input matching network; The second inductor, the first resistor, the third capacitor and the second resistor form a gate bias network of the input stage.

8. The low voltage gallium nitride power amplifier based on second harmonic suppression according to claim 3, characterized in that: The third inductor and the fourth capacitor constitute an inter-stage matching network between the input stage and the intermediate stage; The third resistor and the fifth capacitor form a stabilizing network of the intermediate stage; The fourth inductor, the fourth resistor and the sixth capacitor form a gate bias network of the output stage.

9. The low voltage gallium nitride power amplifier based on second harmonic suppression according to claim 4, characterized in that: The fifth inductor, the seventh capacitor, the eighth capacitor and the sixth inductor constitute an inter-stage matching network of the intermediate stage and the output stage; The seventh inductor, the fifth resistor and the ninth capacitor constitute a gate bias network of the output stage; The sixth resistor, the tenth capacitor, the seventh resistor and the eleventh capacitor form a stabilizing network of two output stage units.

10. The low voltage gallium nitride power amplifier based on second harmonic suppression according to claim 6, characterized in that: The thirteenth capacitor and the ninth inductor form a series resonance; The fourteenth capacitor and the tenth inductor form a parallel resonance; The fifteenth capacitor and the eleventh inductor form a parallel resonance.

Images