IBC solar cell

Abstract

The invention provides an IBC solar cell. The IBC solar cell comprises a silicon substrate; the tunneling oxide layer comprises a first tunneling oxide layer formed on the front surface of the silicon substrate and a second tunneling oxide layer formed on the back surface of the silicon substrate; the doped silicon-containing film layer is arranged on one side, opposite to the silicon substrate, of the second tunneling oxide layer; wherein the number of defects in the first tunneling oxide layer tends to zero or is zero, the second tunneling oxide layer comprises defects, the defects are pits and / or pinholes, and the pinholes penetrate through the tunneling oxide layer. The battery efficiency of the IBC solar battery provided by the embodiment of the invention is further improved.

Description

Technical Field

[0001] The present application relates to the technical field of solar cells, and in particular to an IBC solar cell. Background Art

[0002] In recent years, solar cells have become a new research hotspot. At present, the demand for high-efficiency cells by client component manufacturers continues to be strong. Interdigitated Back Contact (IBC) solar cells in high-efficiency cell structures have the advantages of high conversion efficiency, unobstructed front, beautiful appearance, and simple and diverse component packaging. They are gradually becoming a new hot cell structure in solar cell research and development. However, people still hope to further improve the efficiency of IBC solar cells.

[0003] Therefore, a new IBC solar cell is urgently needed. Summary of the invention

[0004] The first aspect of the present application provides an IBC solar cell, comprising:

[0005] Silicon substrate;

[0006] The tunneling oxide layer comprises a first tunneling oxide layer formed on the front side of the silicon substrate and a second tunneling oxide layer formed on the back side of the silicon substrate;

[0007] A doped silicon-containing film layer is disposed on a side of the second tunnel oxide layer facing away from the silicon substrate;

[0008] The number of defects in the first tunnel oxide layer approaches zero or is zero, and the second tunnel oxide layer contains defects, which are pits and / or pinholes, and the pinholes penetrate the tunnel oxide layer.

[0009] In some optional embodiments of the present application, the defect density in the second tunnel oxide layer differs from the defect density in the first tunnel oxide layer by an order of magnitude X, where X is greater than or equal to 7.

[0010] In some optional embodiments of the present application, the defect density in the second tunnel oxide layer differs from the defect density in the first tunnel oxide layer by an order of magnitude X, 7≤X≤10.

[0011] In some optional embodiments of the present application, 8≤X≤9.

[0012] In some optional embodiments of the present application, X is 8.

[0013] In some optional embodiments of the present application, the defect density in the second tunnel oxide layer is on the order of magnitude Y, where Y is greater than or equal to 7.

[0014] In some optional embodiments of the present application, the defect density in the second tunnel oxide layer is on the order of magnitude Y, 7≤Y≤10.

[0015] In some optional embodiments of the present application, the defect density in the second tunnel oxide layer is on the order of magnitude Y, 8≤Y≤9.

[0016] In some optional embodiments of the present application, the defect density in the second tunnel oxide layer is on the order of magnitude Y, where Y is 8.

[0017] In some optional embodiments of the present application, the defect density in the second tunnel oxide layer is 7.0×10 7 cm -2 ~2.0×10 9 cm -2 .

[0018] In some optional embodiments of the present application, the defect density is 3.0×10 7 cm -2 ~7.0×10 8 cm -2 .

[0019] In some optional embodiments of the present application, the defect density is 7.0×10 8 cm -2 .

[0020] In some optional embodiments of the present application, the thickness of the first tunnel oxide layer and the thickness of the second tunnel oxide layer are both in the range of 0.7 nm to 2.5 nm.

[0021] In some optional embodiments of the present application, the thickness of the second tunnel oxide layer ranges from 1.0 nm to 2.0 nm.

[0022] In some optional embodiments of the present application, the thickness of the second tunnel oxide layer ranges from 1.5 nm to 2.0 nm.

[0023] In some optional embodiments of the present application, the size of the defect is nanometer scale.

[0024] In some optional embodiments of the present application, the size of the pinhole in the defect is 2nm to 10nm.

[0025] In some optional embodiments of the present application, the size of the pinhole in the defect is 5nm to 7nm.

[0026] In some optional embodiments of the present application, the backlight side of the IBC solar cell is formed with alternately arranged P regions and N regions.

[0027] The second tunneling oxide layer is continuously laid on the back side of the silicon substrate and is arranged corresponding to each P region and each N region.

[0028] In some optional embodiments of the present application, a continuously laid first doped polysilicon layer is provided on the side of the second tunneling oxide layer facing away from the silicon substrate, the portion of the first doped polysilicon layer in the P region is doped with P-type material, and the portion of the first doped polysilicon layer in the N region is doped with N-type material.

[0029] In some optional embodiments of the present application, a doped polysilicon layer is provided on the side of the second tunneling oxide layer facing away from the silicon substrate, and the doped polysilicon layer includes multiple N-type doped polysilicon sublayers and multiple P-type doped polysilicon silicon sublayers, the multiple N-type doped polysilicon sublayers are arranged in one-to-one correspondence with the multiple N regions, and the multiple P-type doped polysilicon silicon sublayers are arranged in one-to-one correspondence with the multiple P regions.

[0030] In some optional embodiments of the present application, the backlight side of the IBC solar cell is formed with alternately arranged P regions and N regions.

[0031] A second tunnel oxide layer is formed in any one of the P region and the N region, and the second tunnel oxide layer is formed toward the silicon substrate to form a doped polysilicon layer.

[0032] In some optional embodiments of the present application, an intrinsic silicon-containing film layer and a doped silicon-containing film layer are sequentially formed on the backlight surface of the silicon substrate in the other of the P region and the N region.

[0033] Beneficial effect: The number of defects in the tunneling oxide layer provided on the front of the IBC solar cell provided in the embodiment of the present application approaches zero, and the number of defects is equal to zero. The surface recombination is reduced to ensure the passivation effect on the front of the IBC solar cell, protect the IBC solar cell from oxidation and corrosion, and prevent short circuits and leakage inside the battery, thereby extending the service life of the photovoltaic cell. The tunneling oxide layer provided on the back of the IBC solar cell provided in the embodiment of the present application includes defects, and the charge carriers are transmitted not only through tunneling but also through defect-mediated transmission, and the defects are, for example, pinholes and / or pits. The cell efficiency of the IBC solar cell provided in the embodiment of the present application is further improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] Figure 1 This is a schematic diagram of a microstructure of the second tunneling oxide layer in the IBC solar cell provided in an embodiment of the present application;

[0035] Figure 2 is another microscopic structural diagram of the second tunneling oxide layer in the IBC solar cell provided in an embodiment of the present application;

[0036] Figure 3 is a schematic diagram of a partial layer structure of an IBC solar cell provided in an embodiment of the present application;

[0037] Figure 4It is a schematic diagram of a partial layer structure of another IBC solar cell provided in an embodiment of the present application.

[0038] Description of reference numerals:

[0039] IBC solar cell-1; silicon substrate-101; second tunneling oxide layer-102; P region-103; N region-104; metal layer-105; first tunneling oxide layer-106; first doped polysilicon layer-107; intrinsic silicon-containing film layer-108; doped silicon-containing film layer-109;

[0040] Pits-1021; Pinholes-1022. DETAILED DESCRIPTION

[0041] The following will be combined with the attached Figures 1 to 4 The technical solution of this application is described in detail.

[0042] like Figure 1 and Figure 2 As shown, the first aspect of the present application provides an IBC solar cell 1, comprising:

[0043] Silicon substrate 101;

[0044] The tunneling oxide layer includes a first tunneling oxide layer 106 formed on the front surface of the silicon substrate 101 and a second tunneling oxide layer 102 formed on the back surface of the silicon substrate 101;

[0045] A doped silicon-containing film layer is disposed on the side of the second tunnel oxide layer 102 facing away from the silicon substrate 101;

[0046] The number of defects in the first tunnel oxide layer 106 approaches zero or is zero, and the second tunnel oxide layer 102 includes defects, which are pits 1021 and / or pinholes 1022 , and the pinholes 1022 penetrate the tunnel oxide layer.

[0047] In some optional embodiments of the present application, the pit 1021 can be observed by TEM characterization means, and the size of the pit 1021 is nanometer-scale. The nanometer-scale pit 1021 is a portion where the second tunneling oxide layer 102 is thinner and concave compared to the local area of ​​the main body where the thickness does not change significantly.

[0048] In some optional embodiments of the present application, the defect density in the second tunnel oxide layer 102 differs from the defect density in the first tunnel oxide layer 106 by an order of magnitude X, where X is greater than or equal to 7.

[0049] In these embodiments, the order of magnitude refers to a number with base 10 in scientific notation. For example, if the order of magnitude X is 1, assuming that the defect density in the second tunnel oxide layer 102 is 10 1The defect density in the first tunnel oxide layer 106 is about 10 0 quantity level.

[0050] For example, the phase difference order of magnitude X is 7, assuming that the defect density in the second tunnel oxide layer 102 is 10 7+a The defect density in the first tunnel oxide layer 106 is about 10 a The difference between 7+a and a is 7.

[0051] The transport mechanisms of charge carriers in the passivation structure including the tunneling oxide layer include the carrier-dependent quantum tunneling effect and the direct transport mechanism of carriers mediated by defects. Pure tunneling transport cannot provide sufficient transmission channels, limiting the penetration of current, thereby resulting in high series resistance (Rs) and poor FF (fill factor). With the introduction of transmission through defects such as pinholes 1022 in the tunneling oxide layer, Rs is reduced and FF is increased.

[0052] In the IBC cell, since there is no metal electrode layer on the front side of the solar cell, the carrier transport and extraction aspects can be weakened, and the number of defects in the first tunneling oxide layer 106 is controlled to be zero, thereby ensuring the compactness of the first tunneling oxide layer 106 and improving the passivation and protection of the IBC solar cell 1.

[0053] In some optional embodiments of the present application, the defect density in the second tunnel oxide layer 102 differs from the defect density in the first tunnel oxide layer 106 by an order of magnitude X, 7≤X≤10.

[0054] In some optional embodiments of the present application, 8≤X≤9.

[0055] In some optional embodiments of the present application, X is 8.

[0056] In some optional embodiments of the present application, the defect density in the second tunnel oxide layer 102 is on the order of magnitude Y, where Y is greater than or equal to 7.

[0057] In some optional embodiments of the present application, the defect density in the second tunnel oxide layer 102 is on the order of magnitude Y, 7≤Y≤10.

[0058] In some optional embodiments of the present application, the defect density in the second tunnel oxide layer 102 is on the order of magnitude Y, 8≤Y≤9.

[0059] In some optional embodiments of the present application, the defect density in the second tunnel oxide layer 102 is on the order of magnitude Y, where Y is 8.

[0060] In some optional embodiments of the present application, the defect density in the second tunnel oxide layer 102 is 7.0×10 7 cm-2 ~2.0×10 9 cm -2 .

[0061] In some optional embodiments of the present application, the defect density in the second tunnel oxide layer 102 falls within 7.0×10 7 cm -2 , 7.1×10 7 cm -2 , 7.2×10 7 cm -2 , 7.3×10 7 cm -2 , 7.4×10 7 cm -2 , 7.5×10 7 cm -2 , 7.6×10 7 cm -2 , 7.7×10 7 cm -2 , 7.8×10 7 cm -2 and 7.9×10 7 cm -2 The defect density range formed by any two of them is within the range.

[0062] In some optional embodiments of the present application, the defect density is 3.0×10 8 cm -2 ~7.0×10 8 cm -2 .

[0063] In some optional embodiments of the present application, the defect density in the second tunnel oxide layer 102 falls within 3.0×10 8 cm -2 , 3.1×10 8 cm -2 , 3.2×10 8 cm -2 , 3.3×10 8 cm -2 , 3.4×10 8 cm -2 , 3.5×10 8 cm -2 , 3.6×10 8 cm -2 , 3.7×10 8 cm -2 , 3.8×10 8 cm -2 and 3.9×10 7 cm -2The defect density range formed by any two of them is within the range.

[0064] In some optional embodiments of the present application, the defect density in the second tunnel oxide layer 102 falls within 7.0×10 8 cm -2 , 7.1×10 8 cm -2 , 7.2×10 8 cm -2 , 7.3×10 8 cm -2 , 7.4×10 8 cm -2 , 7.5×10 8 cm -2 , 7.6×10 8 cm -2 , 7.7×10 8 cm -2 , 7.8×10 8 cm -2 and 7.9×10 8 cm -2 The defect density range formed by any two of them is within the range.

[0065] In some optional embodiments of the present application, the defect density is 7.0×10 8 cm -2 .

[0066] In some examples, TEM characterization can be used to obtain local cross-sectional information in the tunnel oxide layer to view the formation of pits 1021 and pinholes 1022, etc. The defect density, such as the density of pinholes 1022, is usually determined by the statistical structure of a large area, and the density of pinholes 1022 can be obtained by using the cAFM method.

[0067] In some optional embodiments of the present application, the defect density can be adjusted by the mechanism of pinholes 1022 caused by thermal expansion stress, for example, the density of pits 1021 and / or pinholes 1022. During the high-temperature annealing process, the tensile stress generated by the difference in thermal expansion coefficients between the thin film (for example, the silicon substrate 101) in contact with the tunneling oxide layer in the solar cell produces initial gaps or thinning. In general, the stress deformation caused by the mismatch in thermal expansion coefficients drives the formation of pinholes 1022. Or in the preparation of the tunneling oxide layer, metal particles are placed on the surface of the tunneling oxide layer as anchor points. The accumulation of metal particles makes the tunneling oxide layer thinner, thereby forming defects (including pits 1021 and / or pinholes 1022).

[0068] In another example, the defect density can be controlled by controlling the annealing temperature, wherein the annealing temperature is between 750°C and 950°C.

[0069] In some optional embodiments, the annealing temperature is controlled within an annealing temperature range formed by any two of 750°C, 760°C, 770°C, 780°C, 790°C, 800°C, 810°C, 820°C, 830°C, 840°C, 850°C, 860°C, 870°C, 880°C, 890°C, 900°C, 910°C, 920°C, 930°C, 940°C and 950°C.

[0070] In some optional embodiments, in addition to controlling the annealing temperature, the density of the pinholes 1022 may also be controlled by controlling the heating rate and / or cooling rate during the annealing process.

[0071] In some optional embodiments of the present application, the thickness of the first tunnel oxide layer 106 and the thickness of the second tunnel oxide layer 102 are both in the range of 0.7 nm to 2.5 nm.

[0072] In some optional embodiments of the present application, the thickness of the second tunnel oxide layer 102 is in the range of 1.0 nm to 2.0 nm. In these embodiments, the second tunnel oxide layer 102 is in a relatively thick range, which in some cases tends to adopt a defect-mediated transport mechanism.

[0073] In some optional embodiments of the present application, the thickness of the second tunnel oxide layer 102 ranges from 1.5 nm to 2.0 nm.

[0074] In some optional embodiments, the thickness of the second tunnel oxide layer 102 is in a thickness range formed by any two of 1.5 nm, 1.6 nm, 1.7 nm, 1.8 nm, 1.9 nm and 2.0 nm.

[0075] In some optional embodiments, the thickness of the second tunnel oxide layer 102 is any one of 1.5 nm, 1.6 nm, 1.7 nm, 1.8 nm, 1.9 nm and 2.0 nm.

[0076] In some optional embodiments of the present application, the size of the defect is nanometer scale.

[0077] In some optional embodiments of the present application, the size of the pinhole 1022 in the defect is 2 nm to 10 nm.

[0078] In some optional embodiments of the present application, the size of the pinhole 1022 in the defect is 5 nm to 7 nm. Increasing the size of the pinhole 1022 is beneficial to the transmission of charge carriers through the pinhole 1022.

[0079] In some embodiments of the present application, the size of the pinhole 1022 is 5nm~7nm and the thickness of the second tunneling oxide layer 102 is 1.7nm~1.8nm, and the transport mechanism in the second tunneling oxide layer 102 tends to be defect-mediated, especially pinhole 1022-mediated battery carrier transport mechanism.

[0080] In some embodiments of the present application, the tunnel oxide layer is made of SiO 2 、SiO X Any one of them is formed.

[0081] In some embodiments of the present application, the tunnel oxide layer can be formed using an ozone oxidation process, which involves immersing the wafer in a bath containing ozone suspended in deionized water. The ozone oxidation process is performed in situ (i.e., loaded once in the same equipment), including a step of thinning the wafer. For example, the wafer may first be wet etched using potassium hydroxide to thin the wafer, followed by a rinse cleaning cycle, and then an ozone oxidation process to form a tunnel oxide layer in the same equipment. During the ozone oxidation process, a layer of tunnel oxide grows on both sides of the wafer. Of course, thermal oxidation can also be used: this method involves placing the silicon wafer in a high temperature environment, typically between 580°C and 610°C, and introducing oxygen into the reactor tube. The direction of oxygen introduction is perpendicular to the thickness direction of the silicon wafer until the pressure in the reactor tube reaches 0.9 to 0.95 atmospheres, and the oxygen is stopped, and the temperature is maintained for 4 to 15 minutes to grow a tunnel oxide layer on the silicon wafer. The tunnel oxide layer can be formed using a PECVD method. High-quality silicon oxide (SiOx) tunneling layer was prepared by thermal nitric acid oxidation. The relationship between its thickness and solution temperature and preparation time was studied, so as to accurately control the thickness of the tunneling oxide layer.

[0082] like Figure 3 As shown, in some optional embodiments of the present application, the backlight side of the IBC solar cell 1 forms an alternately arranged P region 103 and an N region 104,

[0083] The second tunnel oxide layer 102 is continuously laid on the back side of the silicon substrate 101 , and is disposed corresponding to each P region 103 and each N region 104 .

[0084] In some optional embodiments of the present application, a first doped polysilicon layer 107 is continuously laid on the side of the second tunnel oxide layer 102 facing away from the silicon substrate 101, and the first doped polysilicon layer 107 is doped with a P-type material in the P region 103, and the first doped polysilicon layer 107 is doped with an N-type material in the N region 104. The first doped polysilicon layer 107 can be doped to have a P-type and an N-type region, and the P-type region and the N-type region are arranged in succession at intervals, and each adjacent N-type region and n-type region forms a pn junction of a solar cell. In these embodiments, the back contact solar cell is formed with a TOPCON passivation structure (Tunnel Oxide Passivated Contact). The back contact solar cell is also provided with a metal layer 105, which includes multiple first electrodes and multiple second electrodes with different electrical properties. In the P-type region, the first electrode is electrically connected to the first doped polysilicon layer 107 in the P region 103, and in the N-type region, the first electrode is electrically connected to the first doped polysilicon layer 107 in the PN region 104.

[0085] In some optional embodiments, the first doped polysilicon layer 107 can be formed by in-situ doping or ex-situ doping. In-situ doping means that the polysilicon layer deposition and the polysilicon layer phosphorus doping are completed in the same process step; ex-situ doping means that after the polysilicon layer is deposited, phosphorus doping is performed by diffusion furnace or ion implantation.

[0086] In some optional embodiments of the present application, a doped polysilicon layer is provided on the side of the second tunneling oxide layer 102 facing away from the silicon substrate 101, and the doped polysilicon layer includes multiple N-type doped polysilicon sublayers and multiple P-type doped polysilicon silicon sublayers, and the multiple N-type doped polysilicon sublayers are arranged in one-to-one correspondence with the multiple N regions 104, and the multiple P-type doped polysilicon silicon sublayers are arranged in one-to-one correspondence with the multiple P regions 103.

[0087] In some examples of these embodiments, the P region 103 and the N region 104 are arranged in a spaced relationship. In these embodiments, the IBC solar cell 1 forms a TOPCON passivation structure on the backlight side.

[0088] In some optional embodiments of the present application, the backlight side of the IBC solar cell 1 is formed with alternately arranged P regions 103 and N regions 104.

[0089] The second tunnel oxide layer 102 is formed in any one of the P region 103 and the N region 104, and the second tunnel oxide layer 102 forms a doped polysilicon layer facing away from the silicon substrate 101. In these embodiments, the IBC solar cell 1 has a TOPCON passivation structure in one of the doped regions, and the other doped region is provided with a doped passivation structure according to actual needs.

[0090] like Figure 4As shown, in some optional embodiments of the present application, an intrinsic silicon-containing film layer 108 and a doped silicon-containing film layer 109 are sequentially formed on the backlight surface of the silicon substrate 101 in the other of the P region 103 and the N region 104. In these embodiments, the IBC solar cell 1 has a TOPCON passivation structure in one of the doping regions, and the IBC solar cell 1 forms a HIT passivation structure (heterojunction passivation structure) in the other doping region.

[0091] The front side of the IBC solar cell 1 provided in the embodiment of the present application is provided with a tunneling oxide layer having defects that tend to zero to obtain a defect number equal to zero, reducing surface recombination to ensure the passivation effect on the front side of the IBC solar cell 1, protecting the IBC solar cell 1 from oxidation and corrosion, and preventing short circuits and leakage inside the battery, thereby extending the service life of the photovoltaic cell. The back side of the IBC solar cell 1 provided in the embodiment of the present application is provided with a tunneling oxide layer that includes defects, and charge carriers are transmitted through defects in addition to tunneling, and defects such as pinholes 1022 and / or pits 1021. The cell efficiency of the IBC solar cell 1 provided in the embodiment of the present application is further improved.

[0092] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any changes or substitutions that can be easily thought of by a person skilled in the art within the technical scope disclosed in the present application should be included in the protection scope of the present application. Therefore, the protection scope of the present application shall be based on the protection scope of the claims.

Claims

1. An IBC solar cell, characterized in that: include: Silicon substrate; A tunneling oxide layer, comprising a first tunneling oxide layer formed on the front side of the silicon substrate and a second tunneling oxide layer formed on the back side of the silicon substrate; A doped silicon-containing film layer is disposed on a side of the second tunnel oxide layer facing away from the silicon substrate; The number of defects in the first tunneling oxide layer approaches zero or is zero, and the second tunneling oxide layer contains defects, wherein the defects are pits and / or pinholes, and the pinholes penetrate the tunneling oxide layer.

2. The IBC solar cell according to claim 1, characterized in that: The defect density in the second tunnel oxide layer differs from the defect density in the first tunnel oxide layer by an order of magnitude X, where X is greater than or equal to 7.

3. The IBC solar cell according to claim 2, characterized in that: The defect density in the second tunneling oxide layer differs from the defect density in the first tunneling oxide layer by an order of magnitude X, 7≤X≤10; Preferably, 8≤X≤9; Preferably, X is 8.

4. The IBC solar cell according to claim 1, characterized in that: The defect density in the second tunnel oxide layer is of order Y, where Y is greater than or equal to 7; Preferably, the defect density in the second tunneling oxide layer is of order of magnitude Y, 7≤Y≤10; Preferably, the defect density in the second tunneling oxide layer is of order of magnitude Y, 8≤Y≤9; Preferably, the defect density in the second tunnel oxide layer is on the order of magnitude Y, where Y is 8.

5. The IBC solar cell according to claim 4, characterized in that: The defect density in the second tunneling oxide layer is 7.0×10 7 cm -2 ~2.0×10 9 cm -2 ; Preferably, the defect density is 3.0×10 8 cm -2 ~7.0×10 8 cm -2 ; Preferably, the defect density is 7.0×10 8 cm -2 .

6. The IBC solar cell according to claim 1, characterized in that: The thickness of the first tunneling oxide layer and the thickness of the second tunneling oxide layer are both in the range of 0.7 nm to 2.5 nm; Preferably, the thickness of the second tunneling oxide layer is in the range of 1.0 nm to 2.0 nm; Preferably, the thickness of the second tunneling oxide layer ranges from 1.5 nm to 2.0 nm.

7. The IBC solar cell according to claim 1, characterized in that: The size of the defect is nanometer scale; Preferably, the size of the pinhole in the defect is 2nm to 10nm; Preferably, the size of the pinhole in the defect is 5nm to 7nm.

8. The IBC solar cell according to claim 1, characterized in that: The backlight side of the IBC solar cell forms an alternate arrangement of P regions and N regions. The second tunneling oxide layer is continuously laid on the back side of the silicon substrate and is arranged corresponding to each of the P regions and each of the N regions.

9. The IBC solar cell according to claim 8, characterized in that: A first doped polysilicon layer is continuously laid on a side of the second tunnel oxide layer facing away from the silicon substrate, wherein a portion of the first doped polysilicon layer in the P region is doped with a P-type material, and a portion of the first doped polysilicon layer in the N region is doped with an N-type material; Preferably, a doped polysilicon layer is provided on the side of the second tunneling oxide layer facing away from the silicon substrate, and the doped polysilicon layer includes a plurality of N-type doped polysilicon sublayers and a plurality of P-type doped polysilicon silicon sublayers, the plurality of N-type doped polysilicon sublayers are arranged in one-to-one correspondence with the plurality of N regions, and the plurality of P-type doped polysilicon silicon sublayers are arranged in one-to-one correspondence with the plurality of P regions.

10. The IBC solar cell according to claim 1, characterized in that: The backlight side of the IBC solar cell forms an alternate arrangement of P regions and N regions. The second tunneling oxide layer is formed in any one of the P region and the N region, and the second tunneling oxide layer is formed into a doped polysilicon layer facing away from the silicon substrate; Preferably, an intrinsic silicon-containing film layer and a doped silicon-containing film layer are sequentially formed on the backlight surface of the silicon substrate in the other of the P region and the N region.

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