Plasma processing apparatus and electrostatic chuck

Abstract

The present invention provides a technique capable of controlling an incident angle of ions at an edge portion of a substrate in plasma processing, and capable of suppressing variations in plasma processing results when the incident angle of ions is controlled. The plasma processing apparatus includes: a chamber; the substrate supporting part is configured in the chamber, the substrate supporting part is provided with a conductive base, an electrostatic chuck, an edge ring, a substrate bias electrode and an edge ring bias electrode, and the edge ring bias electrode extends to the edge part of the substrate supporting surface in a plan view and is provided with an annular overlapping part partially overlapped with the substrate bias electrode; the annular overlapping part has a radial width of 9 mm to 11 mm; an upper electrode; an RF generator; a first voltage pulse generator electrically connected to the substrate bias electrode and configured to be capable of generating a sequence of first voltage pulses; and a second voltage pulse generator electrically connected to the edge ring bias electrode and configured to be capable of generating a sequence of second voltage pulses.

Description

Technical Field

[0001] Exemplary embodiments of the present invention relate to a plasma processing apparatus and an electrostatic chuck. Background Art

[0002] As a technology for alleviating the influence of the phase difference between the electric bias for the substrate and the electric bias for the edge ring on the plasma processing in a plasma processing apparatus, there is a technology described in Patent Document 1.

[0003] Prior art literature

[0004] Patent Literature

[0005] Patent Document 1: Japanese Patent Application Publication No. 2021-158134 Summary of the invention

[0006] Technical problem to be solved by the invention

[0007] The present invention provides a technology capable of controlling the incident angle (tilt angle) of ions at the edge portion of a substrate (hereinafter also referred to as "ion incident angle") during plasma processing, and capable of suppressing changes in plasma processing results when the ion incident angle is controlled.

[0008] Technical solutions for solving technical problems

[0009] A plasma processing apparatus in an exemplary embodiment of the present invention includes: a chamber; a substrate support portion arranged in the chamber, the substrate support portion including: a conductive base; an electrostatic chuck, which is arranged on the conductive base and has a substrate support surface and an edge ring support surface; an edge ring, which is arranged on the edge ring support surface in a manner of surrounding a substrate arranged on the substrate support surface; a substrate bias electrode, which is arranged below the substrate support surface in the electrostatic chuck; and an edge ring bias electrode, which is arranged below the edge ring support surface in the electrostatic chuck and extends to an edge portion of the substrate support surface when viewed from above, and the edge ring bias electrode The edge ring bias electrode has an annular overlapping portion that overlaps with the substrate bias electrode when viewed from above, and the annular overlapping portion has a radial width of 9mm to 11mm; an upper electrode arranged above the substrate support portion; an RF generator, which is electrically connected to the conductive base and is configured to generate an RF signal; a first voltage pulse generator, which is electrically connected to the substrate bias electrode and is configured to generate a first voltage pulse sequence having a first voltage level; and a second voltage pulse generator, which is electrically connected to the edge ring bias electrode and is configured to generate a sequence of second voltage pulses having a second voltage level.

[0010] Effects of the Invention

[0011] According to an exemplary embodiment of the present invention, it is possible to provide a technique that can control the incident angle of ions at the edge of a substrate during plasma processing and can suppress variations in plasma processing results when the ion incident angle is controlled. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figure 1 This is an explanatory diagram schematically showing an example of a plasma processing apparatus.

[0013] Figure 2 It is an explanatory diagram showing a structural example of electrodes in a substrate supporting portion.

[0014] Figure 3 It is an explanatory diagram showing a configuration example of a bias electrode of a substrate supporting portion in a plan view.

[0015] Figure 4 An example of the waveform of the first pulsed DC signal DC1 and the second pulsed DC signal DC2 is shown.

[0016] Figure 5 It is an explanatory diagram showing the change of the plasma sheath on the edge portion of the substrate.

[0017] Figure 6 This is a graph showing the relationship between the width of the annular overlapping portion and the amount of change in the ion incident angle within the substrate surface during etching.

[0018] Fig. 7A It is a graph showing the relationship between the potential difference ΔV applied to the substrate bias electrode and the edge ring bias electrode and the etching rate within the substrate surface when the width of the annular overlap portion is 0 mm.

[0019] Figure 7B It is a graph showing the relationship between the potential difference ΔV applied to the substrate bias electrode and the edge ring bias electrode and the etching rate in the substrate surface when the width of the annular overlap portion is 10 mm.

[0020] Figure 7C It is a graph showing the relationship between the potential difference ΔV applied to the substrate bias electrode and the edge ring bias electrode and the etching rate in the substrate surface when the width of the annular overlap portion is 24.5 mm.

[0021] Fig. 8A It is a graph showing the roundness of the membrane holes formed on the substrate when the width of the annular overlapping portion is 0 mm and the potential difference ΔV applied to the substrate bias electrode and the edge ring bias electrode is 0 V and 150 V.

[0022] Figure 8BIt is a graph showing the roundness of the membrane holes formed on the substrate when the width of the annular overlapping portion is 10 mm and the potential difference ΔV applied to the substrate bias electrode and the edge ring bias electrode is 0 V and 150 V.

[0023] Figure 8C It is a graph showing the roundness of the membrane holes formed on the substrate when the width of the annular overlapping portion is set to 24.5 mm and the potential difference ΔV applied to the substrate bias electrode and the edge ring bias electrode is set to 0 V and 150 V.

[0024] Fig. 9 This is a schematic diagram showing another example of a structure for supplying a DC signal to a bias electrode in a substrate supporting portion. DETAILED DESCRIPTION

[0025] Hereinafter, each embodiment of the present invention will be described.

[0026] In an exemplary embodiment, a plasma processing apparatus is provided, comprising: a chamber; a substrate support portion disposed in the chamber, the substrate support portion comprising: a conductive base; an electrostatic chuck disposed on the conductive base and having a substrate support surface and an edge ring support surface; an edge ring disposed on the edge ring support surface in a manner of surrounding a substrate disposed on the substrate support surface; a substrate bias electrode disposed below the substrate support surface in the electrostatic chuck; and an edge ring bias electrode disposed below the edge ring support surface in the electrostatic chuck and extending to an edge portion of the substrate support surface when viewed from above. , the edge ring bias electrode has an annular overlapping portion overlapping with the substrate bias electrode when viewed from above, and the annular overlapping portion has a radial width of 9mm to 11mm; an upper electrode arranged above the substrate support portion; an RF generator, which is electrically connected to the conductive base and is configured to generate an RF signal; a first voltage pulse generator, which is electrically connected to the substrate bias electrode and is configured to generate a first voltage pulse sequence having a first voltage level; and a second voltage pulse generator, which is electrically connected to the edge ring bias electrode and is configured to generate a sequence of second voltage pulses having a second voltage level.

[0027] In an exemplary embodiment, the longitudinal distance between the substrate bias electrode and the edge ring bias electrode is 9 mm to 11 mm.

[0028] In an exemplary embodiment, the substrate supporting portion further includes a substrate chuck electrode disposed between the substrate supporting surface and the substrate bias electrode.

[0029] In an exemplary embodiment, the substrate support further includes at least one edge ring chuck electrode disposed between the edge ring support surface and the edge ring bias electrode.

[0030] In an exemplary embodiment, at least one edge ring suction cup electrode includes an inner edge ring suction cup electrode and an outer edge ring suction cup electrode, and is configured to absorb the edge ring to the edge ring support surface using a potential difference between the inner edge ring suction cup electrode and the outer edge ring suction cup electrode.

[0031] In an exemplary embodiment, the first voltage level has a negative polarity and the second voltage level has a negative polarity.

[0032] In an exemplary embodiment, the first voltage level is different from the second voltage level.

[0033] In an exemplary embodiment, an absolute value of the first voltage level is less than an absolute value of the second voltage level.

[0034] In an exemplary embodiment, the first voltage level is 0V to -15kV.

[0035] In an exemplary embodiment, the second voltage level is 0V to -16.5 kV.

[0036] In an exemplary embodiment, the plasma processing apparatus further includes a first DC power supply configured to generate a first DC (Direct Current) signal having a first voltage level, and a first voltage pulse generator configured to generate a sequence of first voltage pulses from the first DC signal.

[0037] In an exemplary embodiment, the plasma processing apparatus further includes a second DC power supply configured to generate a second DC signal having a second voltage level, and a second voltage pulse generator configured to generate a sequence of second voltage pulses from the second DC signal.

[0038] In an exemplary embodiment, the plasma processing apparatus further comprises a second DC power supply generating a second DC signal having a third voltage level having a negative polarity, and the second voltage pulse generator is configured to generate a sequence of second voltage pulses from the first DC signal and the second DC signal.

[0039] In an exemplary embodiment, an absolute value of the third voltage level is smaller than an absolute value of the first voltage level.

[0040] In an exemplary embodiment, the third voltage level is 0V to -1.5 kV.

[0041] In an exemplary embodiment, a plasma processing apparatus is provided, comprising: a plasma processing chamber; a substrate support portion disposed in the plasma processing chamber, the substrate support portion comprising: a conductive base; an electrostatic chuck disposed on the conductive base and having a substrate support surface and an edge ring support surface; an edge ring disposed on the edge ring support surface in a manner of surrounding a substrate disposed on the substrate support surface; a substrate bias electrode disposed below the substrate support surface in the electrostatic chuck; and an edge ring bias electrode disposed below the edge ring support surface in the electrostatic chuck and extending to an edge portion of the substrate support surface when viewed from above, the edge ring bias electrode having an annular overlapping portion overlapping with the substrate bias electrode when viewed from above, the annular overlapping portion having a radial width of 9 mm to 11 mm; a first voltage pulse generator electrically connected to the substrate bias electrode and configured to generate a sequence of first voltage pulses having a first voltage level; and a second voltage pulse generator electrically connected to the edge ring bias electrode and configured to generate a sequence of second voltage pulses having a second voltage level.

[0042] In an exemplary embodiment, an electrostatic chuck is provided, comprising: an electrostatic chuck body having a substrate supporting surface and an edge ring supporting surface; a substrate bias electrode disposed in the electrostatic chuck body below the substrate supporting surface; an edge ring bias electrode disposed in the electrostatic chuck body below the edge ring supporting surface and extending to an edge portion of the substrate supporting surface when viewed from above, the edge ring bias electrode having an annular overlapping portion overlapping with the substrate bias electrode when viewed from above, the annular overlapping portion having a radial width of 9 mm to 11 mm; a substrate chuck electrode disposed between the substrate supporting surface and the substrate bias electrode; and at least one edge ring chuck electrode disposed between the edge ring supporting surface and the edge ring bias electrode.

[0043] Hereinafter, various embodiments of the present invention will be described in detail with reference to the accompanying drawings. In addition, in each of the drawings, the same reference numerals are used for the same or similar elements, and repeated descriptions are omitted. Unless otherwise specified, the positional relationships such as up, down, left, and right are described based on the positional relationships shown in the drawings. The dimensional ratios in the drawings do not represent actual ratios, and the actual ratios are not limited to the ratios shown in the drawings.

[0044] <An Example of Plasma Processing Apparatus 1>

[0045] Hereinafter, a configuration example of a plasma processing system will be described. Figure 1 1 is a diagram for explaining a configuration example of a capacitive coupling type plasma processing apparatus. A plasma processing apparatus 1 according to an exemplary embodiment performs a plasma processing method for performing plasma processing on a substrate.

[0046] The plasma processing system includes a capacitively coupled plasma processing device 1 and a control unit 2. The capacitively coupled plasma processing device 1 includes a plasma processing chamber (also referred to as a "chamber") 10, a gas supply unit 20, a power supply 30, and an exhaust system 40. In addition, the plasma processing device 1 includes a substrate support unit (substrate support) 11 and a gas introduction unit. The gas introduction unit introduces at least one processing gas into the plasma processing chamber 10. The gas introduction unit includes a shower head 13. The substrate support unit 11 is arranged in the plasma processing chamber 10. The shower head 13 is arranged above the substrate support unit 11. In one embodiment, the shower head 13 constitutes at least a portion of the ceiling of the plasma processing chamber 10. The plasma processing chamber 10 has a plasma processing space (substrate processing space) 10s defined by the shower head 13, the side wall 10a of the plasma processing chamber 10, and the substrate support unit 11. The plasma processing chamber 10 has at least one gas supply port for supplying at least one processing gas to the plasma processing space 10s, and at least one gas exhaust port for exhausting gas from the plasma processing space. The plasma processing chamber 10 is grounded. The showerhead 13 and the substrate support 11 are electrically insulated from the plasma processing chamber 10.

[0047] The substrate support portion 11 includes a main body 50 and an edge ring 51. The main body 50 has a central region 50a for supporting a substrate W and an annular region 50b for supporting the edge ring 51. A wafer is an example of a substrate W. The annular region 50b of the main body 50 surrounds the central region 50a of the main body 50 when viewed from above. The substrate W is arranged on the central region 50a of the main body 50, and the edge ring 51 is arranged on the annular region 50b of the main body 50 in a manner of surrounding the substrate W on the central region 50a of the main body 50. Therefore, the central region 50a is also referred to as a substrate support surface for supporting the substrate W, and the annular region 50b is also referred to as an edge ring support surface for supporting the edge ring 51. In one embodiment, the central region 50a can support a substrate W having a diameter of 300 mm. The central region 50a may have a diameter smaller than the diameter of the substrate W.

[0048] In one embodiment, the main body 50 includes a base 60 and an electrostatic chuck 61. The base 60 includes a conductive component. The conductive component of the base 60 can function as a lower electrode. The electrostatic chuck 61 is arranged on the base 60. The electrostatic chuck 61 includes a ceramic component (electrostatic chuck body) 61a and electrostatic electrodes (substrate chuck electrode and edge ring chuck electrode) described later arranged in the ceramic component 61a. The ceramic component 61a has a central area 50a. In one embodiment, the ceramic component 61a also has an annular area 50b. In addition, other components surrounding the electrostatic chuck 61 such as an annular electrostatic chuck and an annular insulating component may also have an annular area 50b. In this case, the edge ring 51 may be arranged on the annular electrostatic chuck or the annular insulating component, or on both the electrostatic chuck 61 and the annular insulating component. In addition, an RF or DC electrode may also be arranged in the ceramic component 61a, in which case the RF or DC electrode functions as a lower electrode. When a bias RF signal or DC signal described later is connected to the RF or DC electrode, the RF or DC electrode is also referred to as a bias electrode. In addition, both the conductive member of the susceptor 60 and the RF or DC electrode can also function as two lower electrodes.

[0049] The edge ring 51 includes one or more annular components. In one embodiment, the one or more annular components include one or more edge ring portions and at least one cover ring. The edge ring portion is formed of a conductive material or an insulating material, and the cover ring is formed of an insulating material.

[0050] In addition, the substrate support portion 11 may also include a temperature regulating module configured to adjust at least one of the electrostatic chuck 61, the edge ring 51 and the substrate to a target temperature. The temperature regulating module may include a heater, a heat transfer medium, a flow path 60a, or a combination thereof. A heat transfer fluid such as brine or gas flows in the flow path 60a. In one embodiment, the flow path 60a is formed in the base 60, and one or more heaters are arranged in the ceramic component 61a of the electrostatic chuck 61. In addition, the substrate support portion 11 may also include a heat transfer gas supply portion configured to supply a heat transfer gas between the back side of the substrate W and the central area 50a.

[0051] The substrate support portion 11 is provided with an elevator (elevator pin) not shown. In one embodiment, the elevator is arranged in a plurality of through holes that penetrate the substrate support portion 11 in the vertical direction, and is moved in the vertical direction in the through holes by a driving device not shown. In one embodiment, a transport arm not shown is used to transport the substrate W into and out of the chamber 10. The elevator can support and lift the substrate W on the substrate support portion 11, exchange the substrate W with the transport arm, and place the substrate W on the substrate support portion 11.

[0052] The shower head 13 is configured to be able to introduce at least one processing gas from the gas supply unit 20 into the plasma processing space 10s. The shower head 13 has at least one gas supply port 13a, at least one gas diffusion chamber 13b and a plurality of gas introduction ports 13c. The processing gas supplied to the gas supply port 13a is introduced into the plasma processing space 10s from the plurality of gas introduction ports 13c through the gas diffusion chamber 13b. In addition, the shower head 13 includes an upper electrode. In addition, the gas introduction unit may include, in addition to the shower head 13, one or more side gas injection units (SGI: Side Gas Injector) installed in one or more openings formed in the side wall 10a.

[0053] The gas supply unit 20 may also include at least one gas source 21 and at least one flow controller 22. In one embodiment, the gas supply unit 20 is configured to supply at least one processing gas from the gas source 21 corresponding thereto to the shower head 13 via the flow controller 22 corresponding thereto. Each flow controller 22 may also include, for example, a mass flow controller or a pressure-controlled flow controller. Furthermore, the gas supply unit 20 may also include one or more flow modulation devices for modulating or pulsing the flow of at least one processing gas.

[0054] The power supply 30 includes an RF power supply 31 coupled to the plasma processing chamber 10 via at least one impedance matching circuit. The RF power supply 31 is configured to supply at least one RF signal (RF power) such as a source RF signal and a bias RF signal to at least one lower electrode and / or at least one upper electrode. Thus, plasma is formed from at least one processing gas supplied to the plasma processing space 10s. Therefore, the RF power supply 31 can function as at least a part of a plasma generating unit configured to generate plasma from one or more processing gases in the plasma processing chamber 10. In addition, by supplying a bias RF signal to at least one lower electrode, a bias potential can be generated on the substrate W, and ion components in the formed plasma can be attracted to the substrate W.

[0055] In one embodiment, the RF power supply 31 includes a first RF generating unit 31a and a second RF generating unit 31b. The first RF generating unit 31a is coupled to at least one lower electrode and / or at least one upper electrode via at least one impedance matching circuit, and is configured to generate a generating source RF signal (generating source RF power) for plasma generation. In one embodiment, the generating source RF signal has a frequency in the range of 10 MHz to 150 MHz. In one embodiment, the first RF generating unit 31a may also be configured to generate a plurality of generating source RF signals having different frequencies. The generated one or more generating source RF signals are supplied to at least one lower electrode and / or at least one upper electrode. In one embodiment, the first RF generating unit 31a is an example of an RF generator.

[0056] The second RF generating unit 31b is coupled to at least one lower electrode via at least one impedance matching circuit, and is configured to generate a bias RF signal (bias RF power). The frequency of the bias RF signal may be the same as or different from the frequency of the generating source RF signal. In one embodiment, the bias RF signal has a frequency lower than the frequency of the generating source RF signal. In one embodiment, the bias RF signal has a frequency in the range of 100kHz to 60MHz. In one embodiment, the second RF generating unit 31b may also be configured to generate a plurality of bias RF signals having different frequencies. The generated one or more bias RF signals are supplied to at least one lower electrode. In addition, in various embodiments, at least one of the generating source RF signal and the bias RF signal may also be pulsed.

[0057] In addition, the power supply 30 may also include a DC power supply 32 coupled to the plasma processing chamber 10. The DC power supply 32 includes a first DC generating unit 32a and a second DC generating unit 32b. In one embodiment, the first DC generating unit 32a is connected to at least one lower electrode and is configured to generate a first DC signal. The generated first bias DC signal is applied to at least one lower electrode. In one embodiment, the second DC generating unit 32b is connected to at least one upper electrode and is configured to generate a second DC signal. The generated second DC signal is applied to at least one upper electrode.

[0058] In various embodiments, at least one of the first and second DC signals may also be pulsed. In this case, a sequence of DC-based voltage pulses is applied to at least one lower electrode and / or at least one upper electrode. The voltage pulse may have a pulse waveform of a rectangle, a trapezoid, a triangle, or a combination thereof. In one embodiment, a waveform generator for generating a sequence of voltage pulses from a DC signal is connected between the first DC generator 32a and at least one lower electrode. Therefore, the first DC generator 32a and the waveform generator constitute a voltage pulse generator. In the case where the second DC generator 32b and the waveform generator constitute a voltage pulse generator, the voltage pulse generator is connected to at least one upper electrode. The voltage pulse may have a positive polarity or a negative polarity. In addition, the sequence of voltage pulses may also include one or more positive polarity voltage pulses and one or more negative polarity voltage pulses in one cycle. In addition, the first and second DC generators 32a, 32b may be provided in addition to the RF power supply 31, or the first DC generator 32a may be provided in place of the second RF generator 31b. The first DC generator 32a may include the first DC power supply 111 and the second DC power supply 121 described later.

[0059] The exhaust system 40 can be connected to the gas exhaust port 10e provided at the bottom of the plasma processing chamber 10, for example. The exhaust system 40 can also include a pressure regulating valve and a vacuum pump. The pressure in the plasma processing space 10s can be adjusted by the pressure regulating valve. The vacuum pump can include a turbomolecular pump, a dry pump, or a combination thereof.

[0060] The control unit 2 processes computer executable commands that cause the plasma processing device 1 to perform various steps described in the present invention. The control unit 2 can be configured to control the various elements of the plasma processing device 1 to perform the various steps (plasma processing) described herein. The control unit 2 can control the power supply 30, the exhaust system 40, the first voltage pulse generator 110 described later, the first DC power supply 111, the second voltage pulse generator 120, the second DC power supply 121, etc. to perform plasma processing. In one embodiment, a part or all of the control unit 2 can be included in the plasma processing device 1. The control unit 2 can also include a computer 2a, for example. The computer 2a can also include a processing unit (CPU: Central Processing Unit) 2a1, a storage unit 2a2, and a communication interface 2a3. The processing unit 2a1 can be configured to perform various control operations by reading a program from the storage unit 2a2 and executing the read program. The program can be stored in the storage unit 2a2 in advance, or it can be obtained via a medium when necessary. The acquired program is stored in the storage unit 2a2, and is read and executed by the processing unit 2a1 from the storage unit 2a2. The medium may be various storage media readable by the computer 2a, or a communication line connected to the communication interface 2a3. The storage unit 2a2 may include RAM (Random Access Memory), ROM (Read Only Memory), HDD (Hard Disk Drive), SSD (Solid State Drive), or a combination thereof. The communication interface 2a3 may communicate with the plasma processing device 1 via a communication line such as a LAN (Local Area Network).

[0061] Figure 2 It is an explanatory diagram of a longitudinal section showing a configuration example of a bias electrode and a chuck electrode included in the substrate supporting portion 11 . Figure 3 1 is an explanatory diagram showing an example of the structure of the bias electrode of the substrate support portion 11 when viewed from above. Figure 2 As shown, in one embodiment, the substrate support portion 11 includes a substrate bias electrode 100 and an edge ring bias electrode 101 .

[0062] In one embodiment, the substrate bias electrode 100 is disposed below the central region 50a that serves as the substrate support surface in the electrostatic chuck 61. Figure 3 As shown in FIG. 1 , in one embodiment, the substrate bias electrode 100 has a circular shape. The substrate bias electrode 100 is arranged coaxially in such a manner that the center coincides with the central region 50a when viewed from above. In one embodiment, the substrate bias electrode 100 has a smaller diameter than the central region 50a. Figure 2As shown, in one embodiment, the substrate bias electrode 100 is electrically connected to a first voltage pulse generator 110 and a first DC power supply 111. The first DC power supply 111 can generate a first continuous DC signal having a first voltage level. The first voltage pulse generator 110 can generate a first pulsed DC signal from the first continuous DC signal generated by the first DC power supply 111, and apply the first pulsed DC signal to the substrate bias electrode 100. The first pulsed DC signal includes a sequence of first voltage pulses having a first voltage level. By applying the first pulsed DC signal to the substrate bias electrode 100, ion components in the plasma formed on the substrate on the substrate support surface can be attracted to the substrate W.

[0063] In one embodiment, the edge ring bias electrode 101 is disposed within the electrostatic chuck 61 below the annular region 50b that serves as the edge ring support surface. Figure 3 As shown, in one embodiment, the edge ring bias electrode 101 has a circular ring shape. In one embodiment, the edge ring bias electrode 101 is arranged on the same axis in a manner that the center coincides with the central area 50a and the annular area 50b when viewed from above. Figure 2 and Figure 3 As shown, the edge ring bias electrode 101 extends from the annular region 50b to the edge portion of the central region 50a when viewed from above. In addition, the edge ring bias electrode 101 has an annular overlapping portion 101a that partially overlaps with the substrate bias electrode 100 when viewed from above. The annular overlapping portion 101a has a radial width (overlapping width) D1 of 9 mm to 11 mm. Figure 2 As shown, the longitudinal interval L1 between the edge ring bias electrode 101 and the substrate bias electrode 100 at the annular overlapping portion 101a is 9 mm to 11 mm.

[0064] In one embodiment, substrate W has a diameter of 300 mm.

[0065] like Figure 2 As shown, in one embodiment, the edge ring bias electrode 101 is electrically connected to the second voltage pulse generator 120 and the second DC power supply 121. The second DC power supply 121 can generate a second continuous DC signal having a second voltage level. The second voltage pulse generator 120 can generate a second pulsed DC signal from the second continuous DC signal generated by the second DC power supply 121, and apply the second pulsed DC signal to the edge ring bias electrode 101. The second pulsed DC signal includes a sequence of second voltage pulses having a second voltage level. By applying the second pulsed DC signal to the edge ring bias electrode 101, ion components in the plasma formed on the edge portion of the substrate W can be attracted to the edge portion of the substrate W.

[0066] Figure 4An example of waveforms of the first pulsed DC signal DC1 generated by the first voltage pulse generator 110 and the second pulsed DC signal DC2 generated by the second voltage pulse generator 120 is shown. The first pulsed DC signal DC1 may have a sequence of first voltage pulses of a first voltage level V1 during a first state S1 within a repetition period T, and a certain reference voltage level V during a second state S2 within a repetition period T. ref . Reference voltage level V ref The absolute value of the reference voltage level V is smaller than the absolute value of the first voltage level V1. In one embodiment, the first voltage level V1 has a negative polarity. In one embodiment, the reference voltage level V ref The first voltage level V1 is 0V to -15kV. The sequence of first voltage pulses has a pulse frequency of 100kHz to 2MHz. The repetition period T has a repetition frequency of 1kHz to 50kHz. The second pulsed DC signal DC2 may have a sequence of second voltage pulses having a second voltage level V2 during the first state S1 and having a certain reference voltage level V during the second state S2. ref . Reference voltage level V ref The absolute value of the second voltage level V2 is smaller than the absolute value of the second voltage level V2. In one embodiment, the first voltage level V2 has a negative polarity. In one embodiment, the absolute value of the second voltage level V2 is the same as the absolute value of the first voltage level V1. In one embodiment, the absolute value of the second voltage level V2 is greater than the absolute value of the first voltage level V1. In this case, a potential difference ΔV(V2-V1) is generated between the first voltage level V1 and the second voltage level V2. In one embodiment, the second voltage level V2 is 0V to -16.5kV. In one embodiment, the sequence of second voltage pulses has a pulse frequency of 100kHz to 2MHz.

[0067] like Figure 2 As shown, in one embodiment, the substrate support portion 11 can include a substrate chuck electrode 150 and at least one edge ring chuck electrode 151 as electrostatic electrodes.

[0068] In one embodiment, the substrate chuck electrode 150 may be disposed between the substrate support surface and the substrate bias electrode 100 in the electrostatic chuck 61. In one embodiment, the substrate chuck electrode 150 is connected to a direct current (DC) power supply 150p via a switch 150s. When a DC voltage from the direct current (DC) power supply 150p is applied to the substrate chuck electrode 150, an electrostatic attraction (Coulomb force) is generated between the substrate chuck electrode 150 and the substrate W. The substrate W is attracted to the electrostatic chuck 61 by the electrostatic attraction and is adsorbed and held on the substrate support surface.

[0069] In one embodiment, at least one edge ring chuck electrode 151 may be disposed between the edge ring support surface and the edge ring bias electrode 101 in the electrostatic chuck 61. In one embodiment, at least one edge ring chuck electrode 151 includes an inner chuck electrode 170 and an outer chuck electrode 171. In one embodiment, the inner chuck electrode 170 is connected to a DC power source 170p via a switch 170s. In one embodiment, the outer chuck electrode 171 is connected to a DC power source 171p via a switch 171s. In one embodiment, the edge ring chuck electrode 151 generates a potential difference between the inner chuck electrode 170 and the outer chuck electrode 171, and the edge ring 51 is adsorbed and held on the edge ring support surface by the potential difference. In one embodiment, the polarity of the DC voltage applied to the inner chuck electrode 170 is different from the polarity of the DC voltage applied to the outer chuck electrode 171.

[0070] <An Example of Plasma Treatment Method>

[0071] The plasma processing method includes an etching process for etching a film on the substrate W using plasma. In one embodiment, the plasma processing method is performed by the control unit 2 in the plasma processing apparatus 1 .

[0072] First, the substrate W is transported into the chamber 10 by the transport arm and placed on the substrate support 11 by the lifter. Figure 1 The substrate is shown being held by suction on the substrate support 11 .

[0073] Next, the processing gas is supplied to the shower head 13 by the gas supply unit 20, and is supplied to the plasma processing space 10s from the shower head 13. The processing gas supplied at this time contains a gas for generating active species required for etching the substrate W.

[0074] One or more RF signals are supplied to the upper electrode and / or the lower electrode from the RF power supply 31. The atmosphere in the plasma processing space 10s may be exhausted from the gas exhaust port 10e, and the interior of the plasma processing space 10s may be decompressed. Thus, plasma is generated on the substrate support portion 11 of the plasma processing space 10s, and the substrate W is etched.

[0075] When the plasma is generated, Figure 2The first pulsed DC signal DC1 is supplied to the substrate bias electrode 100 by the first voltage pulse generator 110 shown, and the second pulsed DC signal DC2 is supplied to the edge ring bias electrode 101 by the second voltage pulse generator 120. As a result, a bias potential is generated between the substrate W and the edge ring 51, and the ion components in the plasma on the substrate W are attracted to the substrate W side. At this time, in one embodiment, the control unit 2 controls the first voltage level V1 in the first pulsed DC signal DC1 supplied to the substrate bias electrode 100 and the second voltage level V2 in the second pulsed DC signal DC2 supplied to the edge ring bias electrode 101, as shown in FIG. Figure 5 As shown, the plasma sheath formed above the edge ring 51 is made approximately parallel (horizontal) to the substrate W. Thus, at the edge of the substrate W, the angle at which the ion components of the plasma enter the substrate W (ion incident angle) is approximately perpendicular to the substrate W.

[0076] According to the embodiment of this example, the substrate support portion 11 has a substrate bias electrode 100 disposed below the substrate support surface in the electrostatic chuck 61 and an edge ring bias electrode 101 disposed below the edge ring support surface in the electrostatic chuck 61. The edge ring bias electrode 101 has an annular overlapping portion 101a extending to the edge portion of the substrate support surface when viewed from above and partially overlapping with the substrate bias electrode 100 when viewed from above, and the radial width D1 of the annular overlapping portion 101a is 9 mm to 11 mm. Thus, the ion incident angle at the edge portion of the substrate W can be controlled during plasma processing, and changes in the plasma processing results when the ion incident angle is controlled can be suppressed.

[0077] Figure 6 The results of verifying the relationship between the width D1 of the annular overlap portion 101a and the amount of change in the ion incident angle in the substrate surface during etching processing are shown. This verification was performed using a substrate that is a sample of a DRAM. This verification was performed for the case where the width D1 of the annular overlap portion 101a was 0 mm, the case where the width D1 of the annular overlap portion 101a was 10 mm, and the case where the width D1 of the annular overlap portion 101a was 24.5 mm. In this verification, the ion incident angle in the substrate surface when plasma etching processing was performed with the potential difference ΔV between the first voltage level V1 applied to the substrate bias electrode 100 and the voltage level V2 applied to the edge ring bias electrode 101 being 150 V (the ion incident angle in condition 1) and the ion incident angle in the substrate surface when plasma processing was performed with the potential difference ΔV between the first voltage level V1 and the second voltage level V2 being 0 V (no potential difference ΔV) (the ion incident angle in condition 2) were measured. Figure 6 The vertical axis represents the ion incident angle difference ΔTi obtained by subtracting the ion incident angle under condition 2 from the ion incident angle under condition 1. Figure 6The horizontal axis represents the position within the substrate plane. Figure 6 The left side of the horizontal axis is the center of the substrate W, and the right side is the edge of the substrate W. Through this verification, it can be confirmed that the larger the width D1 of the annular overlapping portion 101a, the greater the variation of the ion incident angle at the edge of the substrate W when the potential difference ΔV is applied (the higher the controllability of the ion incident angle).

[0078] Fig. 7A , Figure 7B , Figure 7C The figure shows the results of verifying the relationship between the potential difference ΔV applied to the substrate bias electrode 100 and the edge ring bias electrode 101 and the etching rate in the substrate surface during etching processing for the width D1 (0mm, 10mm, 24.5mm) of the three annular overlapping parts 101a. In each verification, the substrate with the film was plasma treated with a plurality of set potential differences ΔV (0V, 150V, 300V, 500V), and the etching rate in the substrate surface was measured. FIG. 7A to FIG. 7C It was confirmed that when the width D1 of the annular overlapping portion 101 a was set to 10 mm, the variation in the etching rate within the substrate surface when the potential difference ΔV was changed was small.

[0079] Fig. 8A , Figure 8B , Figure 8C The figure shows the results of verifying the roundness of the film hole of the etched film formed on the substrate W when the potential difference ΔV applied to the substrate bias electrode 100 and the edge ring bias electrode 101 is 0 V and 150 V for the width D1 (0 mm, 10 mm, and 24.5 mm) of the three annular overlapping parts 101a. In each verification, the roundness of the film hole in the edge part of the substrate W in the depth direction was measured. FIG. 8A to FIG. 8C The vertical axis is the distance from the bottom of the hole. FIG. 8A to FIG. 8C The horizontal axis of represents the circularity of the membrane hole. When the width D1 of the annular overlapping portion 101a is set to 10 mm, it can be confirmed that the change in the circularity of the membrane hole due to the application of the potential difference ΔV is small.

[0080] According to the above verification, by setting the width D1 of the annular overlap portion 101a to the optimal range of 10 mm ± 1 mm (9 mm to 11 mm), the ion incident angle at the edge portion of the substrate can be appropriately controlled by using the potential difference ΔV applied to the substrate bias electrode 100 and the edge ring bias electrode 101, and when the ion incident angle is controlled by using the potential difference ΔV, the plasma processing results such as the etching rate and the roundness of the film hole can be suppressed from fluctuating. As a result, even if the edge ring 51 is consumed and the potential difference ΔV needs to be adjusted to control the ion incident angle, a stable plasma processing result can be obtained.

[0081] Fig. 91 is an explanatory diagram of another example of a structure for applying a DC signal to a bias electrode in a substrate support portion 11. In one embodiment, a second DC power supply 121 generates a third continuous DC signal having a third voltage level V3. In one embodiment, the third voltage level V3 has a negative polarity. In one embodiment, the second voltage pulse generator 120 is configured to generate a second pulsed DC signal from a first continuous DC signal and a third continuous DC signal. The second pulsed DC signal includes a sequence of second voltage pulses having a second voltage level. In one embodiment, an absolute value of the third voltage level V3 is less than an absolute value of the first voltage level V1. In one embodiment, the third voltage level V3 is 0V to -1.5kV.

[0082] As an example, the case where the third voltage level V3 is -1.5 kV and the first voltage level V1 is -10 kV is described. In this case, the first voltage pulse generator 110 applies the first continuous DC signal of -10 kV having the first voltage level V1 to the second voltage pulse generator 120. The second voltage pulse generator 120 adds -1.5 kV as the third voltage level V3 and -10 kV as the first voltage level V1 to generate a second pulsed DC signal DC2 including a sequence of second voltage pulses having -11.5 kV. The second voltage pulse generator 120 applies the second pulsed DC signal DC2 to the edge ring bias electrode 101. The first voltage pulse generator 110 applies the first pulsed DC signal DC1 including a sequence of first voltage pulses having -10 kV as the first voltage level V1 to the substrate bias electrode 100. In this case, the potential difference ΔV applied to the substrate bias electrode 100 and the edge ring bias electrode 101 is 150 V. In addition, when the third voltage level V3 is 0 V, the first pulsed DC signal DC1 including a sequence of voltage pulses having the first voltage level V1 is applied to both the substrate bias electrode 100 and the edge ring bias electrode 101.

[0083] In the above-described exemplary embodiments, the plasma processing apparatus can be modified in various ways without departing from the scope and spirit of the present invention. For example, within the scope of the ordinary creative ability of those skilled in the art, some of the components in a certain embodiment can be added to other embodiments. In addition, some of the components in a certain embodiment can be replaced with corresponding components in other embodiments.

[0084] The plasma processing apparatus may be a plasma processing apparatus using any plasma source such as inductively coupled plasma, microwave plasma, etc. in addition to a capacitively coupled plasma processing apparatus. The plasma processing apparatus may not have an upper electrode and an RF generator. The embodiments of the present invention also include the following aspects.

[0085] (Note 1)

[0086] A plasma processing device, comprising:

[0087] Chamber;

[0088] A substrate support portion disposed in the chamber, the substrate support portion comprising: a conductive base; an electrostatic chuck disposed on the conductive base and having a substrate support surface and an edge ring support surface; an edge ring disposed on the edge ring support surface in a manner of surrounding the substrate disposed on the substrate support surface; a substrate bias electrode disposed below the substrate support surface in the electrostatic chuck; and an edge ring bias electrode disposed below the edge ring support surface in the electrostatic chuck and extending to an edge portion of the substrate support surface when viewed from above, the edge ring bias electrode having an annular overlapping portion overlapping with the substrate bias electrode when viewed from above, the annular overlapping portion having a radial width of 9 mm to 11 mm;

[0089] an upper electrode disposed above the substrate support portion;

[0090] an RF generator electrically connected to the conductive base and configured to generate an RF signal;

[0091] a first voltage pulse generator electrically connected to the substrate bias electrode and configured to generate a first voltage pulse sequence having a first voltage level; and

[0092] A second voltage pulse generator is electrically connected to the edge ring bias electrode and is configured to generate a sequence of second voltage pulses having a second voltage level.

[0093] (Note 2)

[0094] The plasma processing apparatus according to Supplementary Note 1, wherein:

[0095] The longitudinal distance between the substrate bias electrode and the edge ring bias electrode is 9 mm to 11 mm.

[0096] (Note 3)

[0097] The plasma processing apparatus according to Appendix 1 or Appendix 2, wherein:

[0098] The substrate supporting portion further includes a substrate chuck electrode disposed between the substrate supporting surface and the substrate bias electrode.

[0099] (Note 4)

[0100] The plasma processing device according to any one of Supplement 1 to Supplement 3, wherein:

[0101] The substrate support further includes at least one edge ring chuck electrode disposed between the edge ring support surface and the edge ring bias electrode.

[0102] (Note 5)

[0103] A plasma processing apparatus according to Appendix 4, wherein:

[0104] The at least one edge ring suction cup electrode includes an inner edge ring suction cup electrode and an outer edge ring suction cup electrode, and is configured to absorb the edge ring to the edge ring supporting surface by utilizing a potential difference between the inner edge ring suction cup electrode and the outer edge ring suction cup electrode.

[0105] (Note 6)

[0106] The plasma processing device according to any one of Supplement 1 to Supplement 6, wherein:

[0107] The first voltage level has a negative polarity,

[0108] The second voltage level has a negative polarity.

[0109] (Note 7)

[0110] The plasma processing device according to any one of Supplement 1 to Supplement 6, wherein:

[0111] The first voltage level is different from the second voltage level.

[0112] (Note 8)

[0113] The plasma processing device according to any one of Supplement 1 to Supplement 6, wherein:

[0114] An absolute value of the first voltage level is less than or equal to an absolute value of the second voltage level.

[0115] (Note 9)

[0116] The plasma processing device according to any one of Supplement 1 to Supplement 8, wherein:

[0117] The above-mentioned first voltage level is 0V~-15kV.

[0118] (Note 10)

[0119] The plasma processing device according to any one of Supplement 1 to Supplement 9, wherein:

[0120] The second voltage level is 0V to -16.5kV.

[0121] (Note 11)

[0122] The plasma processing device according to any one of Supplementary Notes 1 to 10, wherein:

[0123] Also included is a first DC power supply configured to generate a first DC signal having the first voltage level,

[0124] The first voltage pulse generator is configured to generate the sequence of the first voltage pulses from the first DC signal.

[0125] (Note 12)

[0126] The plasma processing apparatus according to Appendix 11, wherein:

[0127] further comprising a second DC power supply configured to generate a second DC signal having the second voltage level,

[0128] The second voltage pulse generator is configured to generate the sequence of second voltage pulses from the second DC signal.

[0129] (Note 13)

[0130] The plasma processing apparatus according to Appendix 11, wherein:

[0131] further comprising a second DC power supply generating a second DC signal having a third voltage level, the third voltage level having a negative polarity,

[0132] The second voltage pulse generator is configured to generate a sequence of the second voltage pulses from the first DC signal and the second DC signal.

[0133] (Note 14)

[0134] A plasma processing apparatus according to Appendix 13, wherein:

[0135] An absolute value of the third voltage level is smaller than an absolute value of the first voltage level.

[0136] (Note 15)

[0137] The plasma processing apparatus according to Supplement 13 or Supplement 14, wherein:

[0138] The third voltage level is 0V to -1.5kV.

[0139] (Note 16)

[0140] A plasma processing device, comprising:

[0141] a plasma processing chamber; and

[0142] A substrate support portion disposed in the plasma processing chamber, the substrate support portion comprising: a conductive base; an electrostatic chuck disposed on the conductive base and having a substrate support surface and an edge ring support surface; an edge ring disposed on the edge ring support surface in a manner of surrounding a substrate disposed on the substrate support surface; a substrate bias electrode disposed below the substrate support surface in the electrostatic chuck; and an edge ring bias electrode disposed below the edge ring support surface in the electrostatic chuck and extending to an edge portion of the substrate support surface when viewed from above, the edge ring bias electrode having an annular overlapping portion overlapping with the substrate bias electrode when viewed from above, the annular overlapping portion having a radial width of 9 mm to 11 mm;

[0143] a first voltage pulse generator electrically connected to the substrate bias electrode and configured to generate a sequence of first voltage pulses having a first voltage level; and

[0144] A second voltage pulse generator is electrically connected to the edge ring bias electrode and is configured to generate a sequence of second voltage pulses having a second voltage level.

[0145] (Note 17)

[0146] An electrostatic chuck, comprising:

[0147] an electrostatic chuck body having a substrate supporting surface and an edge ring supporting surface;

[0148] a substrate bias electrode disposed in the electrostatic chuck body below the substrate support surface;

[0149] an edge ring bias electrode disposed in the electrostatic chuck body below the edge ring support surface and extending to an edge portion of the substrate support surface when viewed from above, the edge ring bias electrode having an annular overlapping portion overlapping the substrate bias electrode when viewed from above, the annular overlapping portion having a radial width of 9 mm to 11 mm;

[0150] a substrate chuck electrode disposed between the substrate support surface and the substrate bias electrode; and

[0151] At least one edge ring chuck electrode is disposed between the edge ring support surface and the edge ring bias electrode.

[0152] Description of Reference Numerals

[0153] 1... plasma processing device, 10... chamber, 11... substrate supporting portion, 61... electrostatic chuck, 100... substrate bias electrode, 101... edge ring bias electrode, 101a... annular overlapping portion, 150... substrate chuck electrode, 151... edge ring chuck electrode, 110... first voltage pulse generator, 111... first DC power supply, 120... second voltage pulse generator, 121... second DC power supply, W... substrate.

Claims

1. A plasma processing device, characterized in that: include: Chamber; A substrate support portion disposed in the chamber, the substrate support portion comprising: a conductive base; an electrostatic chuck disposed on the conductive base and having a substrate support surface and an edge ring support surface; an edge ring disposed on the edge ring support surface in a manner of surrounding a substrate disposed on the substrate support surface; a substrate bias electrode disposed below the substrate support surface in the electrostatic chuck; and an edge ring bias electrode disposed below the edge ring support surface in the electrostatic chuck and extending to an edge portion of the substrate support surface when viewed from above, the edge ring bias electrode having an annular overlapping portion overlapping with the substrate bias electrode when viewed from above, the annular overlapping portion having a radial width of 9 mm to 11 mm; an upper electrode disposed above the substrate support portion; an RF generator electrically connected to the conductive base and configured to generate an RF signal; a first voltage pulse generator electrically connected to the substrate bias electrode and configured to generate a first voltage pulse sequence having a first voltage level; and A second voltage pulse generator is electrically connected to the edge ring bias electrode and is configured to generate a sequence of second voltage pulses having a second voltage level.

2. The plasma processing device according to claim 1, characterized in that: The longitudinal distance between the substrate bias electrode and the edge ring bias electrode is 9 mm to 11 mm.

3. The plasma processing device according to claim 1, characterized in that: The substrate supporting portion further includes a substrate chuck electrode disposed between the substrate supporting surface and the substrate bias electrode.

4. The plasma processing device according to claim 3, characterized in that: The substrate support also includes at least one edge ring chuck electrode disposed between the edge ring support surface and the edge ring bias electrode.

5. The plasma processing device according to claim 4, characterized in that: The at least one edge ring suction cup electrode includes an inner edge ring suction cup electrode and an outer edge ring suction cup electrode, and is configured to absorb the edge ring to the edge ring supporting surface by utilizing a potential difference between the inner edge ring suction cup electrode and the outer edge ring suction cup electrode.

6. The plasma processing device according to claim 1, characterized in that: The first voltage level has a negative polarity, The second voltage level has a negative polarity.

7. The plasma processing device according to claim 6, characterized in that: The first voltage level is different from the second voltage level.

8. The plasma processing device according to claim 6, characterized in that: The absolute value of the first voltage level is less than the absolute value of the second voltage level.

9. The plasma processing device according to claim 8, characterized in that: The first voltage level is 0V to -15kV.

10. The plasma processing device according to claim 9, characterized in that: The second voltage level is 0V to -16.5kV.

11. The plasma processing device according to claim 1, characterized in that: Also included is a first DC power supply configured to generate a first DC signal having the first voltage level, The first voltage pulse generator is configured to generate the sequence of the first voltage pulses from the first DC signal.

12. The plasma processing device according to claim 11, characterized in that: further comprising a second DC power supply configured to generate a second DC signal having the second voltage level, The second voltage pulse generator is configured to generate a sequence of second voltage pulses from the second DC signal.

13. The plasma processing device according to claim 11, characterized in that: Also included is a second DC power supply that generates a second DC signal having a third voltage level, the third voltage level having a negative polarity, The second voltage pulse generator is configured to generate a sequence of second voltage pulses from the first DC signal and the second DC signal.

14. The plasma processing device according to claim 13, characterized in that: An absolute value of the third voltage level is smaller than an absolute value of the first voltage level.

15. The plasma processing device according to claim 14, characterized in that: The third voltage level is 0V to -1.5kV.

16. A plasma processing device, characterized in that: include: a plasma processing chamber; A substrate support portion disposed in the plasma processing chamber, the substrate support portion comprising: a conductive base; an electrostatic chuck disposed on the conductive base and having a substrate support surface and an edge ring support surface; an edge ring disposed on the edge ring support surface in a manner of surrounding a substrate disposed on the substrate support surface; a substrate bias electrode disposed below the substrate support surface in the electrostatic chuck; and an edge ring bias electrode disposed below the edge ring support surface in the electrostatic chuck and extending to an edge portion of the substrate support surface when viewed from above, the edge ring bias electrode having an annular overlapping portion overlapping with the substrate bias electrode when viewed from above, the annular overlapping portion having a radial width of 9 mm to 11 mm; a first voltage pulse generator electrically connected to the substrate bias electrode and configured to generate a sequence of first voltage pulses having a first voltage level; and A second voltage pulse generator is electrically connected to the edge ring bias electrode and is configured to generate a sequence of second voltage pulses having a second voltage level.

17. An electrostatic chuck, characterized in that: include: an electrostatic chuck body having a substrate supporting surface and an edge ring supporting surface; a substrate bias electrode disposed in the electrostatic chuck body below the substrate support surface; an edge ring bias electrode disposed in the electrostatic chuck body below the edge ring support surface and extending to an edge portion of the substrate support surface when viewed from above, the edge ring bias electrode having an annular overlapping portion overlapping the substrate bias electrode when viewed from above, the annular overlapping portion having a radial width of 9 mm to 11 mm; a substrate chuck electrode disposed between the substrate support surface and the substrate bias electrode; and At least one edge ring chuck electrode is disposed between the edge ring supporting surface and the edge ring bias electrode.

Images