Control circuit, method and electronic device

Abstract

The present application discloses a control circuit, method, and electronic device for a mobile industry processor interface, belonging to the field of radio frequency front-end technology. The control circuit includes: multiple register groups, corresponding one-to-one to multiple MIPI slave devices, with the output end of each register group connected to the corresponding slave device; an extension unit, one end of which is connected to the MIPI master device and the other end is connected to the input end of each register group in the multiple register groups, and is used to receive a write instruction sent by the master device, store the target instruction contained in the write instruction in the target register group, and receive a read instruction sent by the master device, read the target instruction from the target register group, and send the target instruction to the target slave device through the output end of the target register group; wherein the target instruction is the instruction sent by the master device to the target slave device, and the target register group is the register group connected to the target slave device.

Description

Technical Field

[0001] The present application belongs to the field of radio frequency front-end technology, and specifically relates to a control circuit, method and electronic device for a mobile industry processor interface. Background Art

[0002] Currently, RFFE (Radio Frequency Front-End) and MIPI (Mobile Industry Processor Interface) are widely used in communication terminals due to their high performance, low power consumption, and low cost. As terminal devices grow larger, especially with the advent of foldable devices, RF components are likely to be distributed in various locations, and the corresponding RFFE MIPI control signal lines are also increasing in length. Due to inherent parasitic effects in these lines, signals at the far end may not meet quality requirements, leading to uncontrolled components. Summary of the Invention

[0003] The purpose of the embodiments of the present application is to provide a control circuit, method and electronic device for a mobile industry processor interface, which can solve the problems in the related art.

[0004] In a first aspect, an embodiment of the present application provides a control circuit for a mobile industry processor interface, comprising:

[0005] Multiple register groups correspond one-to-one to multiple slave devices of the mobile industry processor interface MIPI, and the output end of each register group is connected to the corresponding slave device;

[0006] An extension unit, one end of which is connected to the MIPI master device, and the other end of which is respectively connected to the input end of each register group of the multiple register groups, and is used to receive a write instruction sent by the master device, store the target instruction contained in the write instruction in the target register group, and receive a read instruction sent by the master device, read the target instruction from the target register group, and send the target instruction to the target slave device through the output end of the target register group;

[0007] The target instruction is an instruction sent by the master device to the target slave device, and the target register group is a register group connected to the target slave device.

[0008] In a second aspect, an embodiment of the present application provides an electronic device, comprising the control circuit as described in the first aspect above.

[0009] In a third aspect, an embodiment of the present application provides a method for controlling a mobile industry processor interface, including:

[0010] Receive an instruction for a target slave device sent by a MIPI master device, where the target slave device is one of multiple MIPI slave devices, and the multiple slave devices are numbered based on the alignment with the master device;

[0011] Comparing the serial number of the target slave device with a preset serial number;

[0012] When the number of the target slave device is greater than the preset number, sending the instruction to the intermediate slave device, and reading the instruction from the intermediate slave device, so that the target slave device performs a corresponding operation after receiving the instruction read from the intermediate slave device;

[0013] The intermediate slave device is a slave device corresponding to the preset number among the multiple slave devices.

[0014] In a fourth aspect, an embodiment of the present application provides an electronic device comprising a processor, a memory, and a computer program stored in the memory and executable on the processor, wherein the computer program, when executed by the processor, implements the steps of the method described in the third aspect above.

[0015] In a fifth aspect, an embodiment of the present application provides a readable storage medium, on which a program or instruction is stored. When the program or instruction is executed by a processor, the steps of the method described in the third aspect are implemented.

[0016] In a sixth aspect, an embodiment of the present application provides a computer program product, which is stored in a storage medium and is executed by at least one processor to implement the method described in the third aspect.

[0017] In an embodiment of the present application, multiple register groups correspond one-to-one to multiple slave devices of MIPI, the output end of each register group is connected to the corresponding slave device, one end of the extension unit is connected to the MIPI master device, and the other end is connected to the input end of each register group in the multiple register groups, for receiving a write instruction sent by the master device, storing the target instruction contained in the write instruction in the target register group, and receiving a read instruction sent by the master device, reading the target instruction from the target register group, and sending the target instruction to the target slave device through the output end of the target register group. Since the target instruction is pre-stored in the target register group, the target instruction received by the target slave device is issued by the target register group. This method greatly shortens the response time of the slave device, improves the quality of the signal received by the slave device, and especially enhances the communication effect with the remote slave device. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 This is a schematic diagram of a MIPI control circuit structure provided by an embodiment of the present application;

[0019] Figure 2 This is a schematic diagram of another MIPI control circuit structure provided in an embodiment of the present application;

[0020] Figure 3 This is a flow chart of a MIPI control method provided by an embodiment of the present application;

[0021] Figure 4 This is a schematic structural diagram of a MIPI control device provided in an embodiment of the present application;

[0022] Figure 5 This is a schematic diagram of the structure of an electronic device provided in an embodiment of the present application;

[0023] Figure 6 It is a structural diagram of another electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0024] The following will be combined with the accompanying drawings in the embodiments of the present application to clearly describe the technical solutions in the embodiments of the present application. Obviously, the embodiments described are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field are within the scope of protection of this application.

[0025] The terms "first," "second," and the like in the specification and claims of this application are used to distinguish similar objects, and are not used to describe a specific order or precedence. It should be understood that the terms used in this manner are interchangeable where appropriate, so that the embodiments of this application can be implemented in an order other than that illustrated or described herein, and that the objects distinguished by "first," "second," and the like are generally of the same type, and do not limit the number of objects; for example, the first object can be one or more. In addition, the term "and / or" in the specification and claims refers to at least one of the connected objects, and the character " / " generally indicates that the objects connected are in an "or" relationship.

[0026] The electronic device and display control method provided by the embodiments of the present application are described in detail below with reference to the accompanying drawings through specific embodiments and their application scenarios.

[0027] Figure 1 A control circuit of a mobile industry processor interface provided by an embodiment of the present application is shown. Figure 1 As shown, the control circuit 10 includes: a plurality of register groups 11 and an extension unit 12.

[0028] The plurality of register groups 11 correspond one-to-one to the plurality of slave devices of the mobile industry processor interface MIPI, and the output end of each register group is connected to the corresponding slave device.

[0029] The extension unit 12 has one end connected to the MIPI master device and the other end connected to the input end of each register group 11 in the multiple register groups 11, and is used to receive a write instruction sent by the master device, store the target instruction contained in the write instruction in the target register group, and receive a read instruction sent by the master device, read the target instruction from the target register group, and send the target instruction to the target slave device through the output end of the target register group.

[0030] The target instruction is an instruction sent by the master device to the target slave device, and the target register group 11 is a register group 11 connected to the target slave device.

[0031] Embodiments of the present application relate to MIPI master and slave devices. A master device is a master device, and a slave device is a slave device. The master device has the function of transmitting and receiving signals and can control slave devices to perform read and write operations through instructions. After receiving instructions from the master device, the slave device can respond to the instructions to complete register read and write operations.

[0032] In the embodiments of the present application, the slave device may be of various types, including but not limited to: LNA (Low Noise Amplifier), PA (Power Amplifier), antenna switch, antenna tuner, DC / DC converter, filter or sensor, etc.

[0033] In the embodiments of the present application, a register group may be composed of one or more registers, typically including multiple registers. The register group may store one or more instructions. The multiple instructions may be multiple instructions for a single slave device or multiple instructions for multiple slave devices, without limitation.

[0034] For example, register group 1 stores three instructions from device 1. For another example, register group 4 stores one instruction from device 4, and register group 5 stores one instruction from device 5.

[0035] In the embodiments of the present application, the instructions sent by the master device include two types: read instructions and write instructions. The instructions sent by the master device generally include a command frame and an information frame. The type of instruction can be specified in the instruction form field of the instruction frame. The instructions sent by the master device can be as shown in Table 1.

[0036] Table 1

[0037]

[0038] The slave device identifier included in the instruction frame is used to specify the slave device that responds to the instruction. The register address is the storage location of the data to be read, or the location where the data will be stored. The register operation data represents the data to be written to the register, or the data to be read from the register.

[0039] For example, the master device sends an instruction, where the instruction format in the instruction frame is write, USID=5, the register address is add, and the register operation data in the information frame is xxx. Then the instruction requires the slave device 5 to write the data xxx into the register with the address add.

[0040] In the embodiment of the present application, when the master device sends a read instruction, the instruction only includes a command frame, wherein the instruction format is read, the slave device identifier is the identifier of the target slave device on which the read instruction is to be executed, and the register address is the register address of the data to be read. After the read instruction is issued, the target slave device receives the read instruction and responds to it, reading the data from the corresponding register and sending it to the master device, that is, sending an information frame to the master device, thereby completing the read operation.

[0041] In the embodiment of the present application, the extension unit 12 can be specifically used for:

[0042] Receive a write command from the master device, obtain the address of the target register group from the command frame of the write command, and obtain the target instruction from the information frame of the write command; store the target instruction in the target register group according to the address of the target register group. The target instruction includes the identifier of the target slave device, which is the slave device connected to the target register group.

[0043] The following uses Tables 2 and 3 as examples. Table 2 shows instruction 1 sent by the master device. The instruction format in the instruction frame is "write", the device identifier is identifier a of extension unit 12, the register bank address is the address of register bank 2, and the content of the information frame is target instruction 1.

[0044] Table 2

[0045]

[0046] The master device sends the aforementioned instruction 1, specifically requesting extension unit 12 to perform a write operation. After receiving instruction 1, extension unit 12 obtains the address of register bank 2 from the instruction frame, obtains target instruction 1 from the information frame, and writes target instruction 1 to register bank 2 based on the address. Target instruction 1 is shown in Table 3.

[0047] Table 3

[0048]

[0049] Target instruction 1 is a command that requires a response from slave device 2. The instruction frame includes a write instruction format, a slave device identifier (USID = 2), and a register address. The information frame includes register operation data. This instruction requires slave device 2 to write the register operation data to the corresponding register based on the register address.

[0050] In an embodiment of the present application, if the master device needs to save multiple instructions in the register group, it can send multiple write instructions. Every time the extension unit 12 receives a write instruction, it stores the corresponding target instruction in the corresponding register group, thereby enabling the register group to store multiple target instructions.

[0051] For example, after completing writing the target instruction 1 into the register group 2 according to Table 2 and Table 3, the master device may further send a write instruction to complete writing the target instruction 2 into the register group 3.

[0052] The following describes this in detail with reference to Tables 4 and 5. Table 4 shows instruction 2 sent by the master device. The instruction format in the instruction frame is "write," the device identifier is identifier a of extension unit 12, the register bank address is the address of register bank 3, and the content of the information frame is target instruction 2.

[0053] Table 4

[0054]

[0055] The master device sends the aforementioned instruction 2, specifically requesting extension unit 12 to perform a write operation. After receiving instruction 2, extension unit 12 obtains the address of register bank 3 from the instruction frame, obtains target instruction 2 from the information frame, and writes target instruction 2 into register bank 3 based on the address. Target instruction 2 is shown in Table 5.

[0056] Table 5

[0057]

[0058] Target instruction 2 is a command that requires a response from slave device 3. The instruction frame includes a write instruction format, a slave device identifier (USID=3), and a register address. The information frame includes register operation data. This instruction requires slave device 3 to write the register operation data to the corresponding register based on the register address.

[0059] In combination with Tables 2 to 5 above, the master device can store target instruction 1 in register group 2 and target instruction 2 in register group 3 by sending instruction 1 and instruction 2, thereby completing the pre-storage of multiple instructions.

[0060] In the embodiment of the present application, the extension unit 12 can be specifically used for:

[0061] Receive the read instruction sent by the master device, obtain the identifier of the target register group from the instruction frame of the read instruction, read the target instruction from the target register group according to the identifier, so that the target register group sends the target instruction to the connected target slave device through the output end.

[0062] In an embodiment of the present application, the response of the slave device to the instruction of the master device is usually completed within a response time window. Among them, the response time window includes two types: a long response time window and a short response time window. The long response time window refers to a response window with a response time greater than a preset threshold, and the short response time window refers to a response window with a response time less than or equal to a preset threshold. That is, the length of the long response time window is greater than the length of the short response time window. In the long response time window, the slave device can have more time to respond to the instruction, and in the short response time window, the slave device is required to have a higher response speed. Specifically, the length of the time window corresponding to these two types is specified by the protocol, or the preset threshold is specified by the protocol, and no further explanation is given here.

[0063] In an embodiment of the present application, the master device sends a write instruction with the device identifier being the identifier of the extension unit, and a read instruction with the device identifier being the identifier of the extension unit, both of which are sent in a scenario with a short response time window. In this way, the master device can pre-store the target instruction in the register group, and when the target slave device needs to respond to the target instruction, the register group will send the pre-stored target instruction. Since the register group is directly connected to the slave device, it is closer to the slave device than the master device. Therefore, the target slave device can receive the target instruction more quickly, greatly shortening the response time of the target slave device and improving the communication quality and effect in the short response time window scenario.

[0064] In one embodiment, in a short response time window scenario, the master device sends a write instruction at a first moment and sends a read instruction at a second moment, wherein the second moment is the moment when the target slave device needs to respond to the target instruction, and the first moment is earlier than the second moment.

[0065] The short response time window is a response window in which the response time is less than or equal to a preset threshold. The specific value of the time interval between the first moment and the second moment is not limited. For example, the first moment is 2ms or 5ms earlier than the second moment.

[0066] In the embodiment of the present application, the extension unit 12 can be specifically used for:

[0067] If the instruction frame of the read instruction includes the identifiers of multiple target register groups, the target instructions stored in each of the multiple target register groups are read synchronously according to the identifiers of the multiple target register groups, so that each target register group sends the read target instructions to the target slave device connected to it through its own output end.

[0068] The following further illustrates the examples in Tables 2 through 5. The master device sends instructions 1 and 2 sequentially at a first moment, and then sends instruction 3 at a second moment when responses from slaves 2 and 3 are required. Instruction 3 may be as shown in Table 6.

[0069] Table 6

[0070]

[0071] Table 6 shows command 3 sent by the master device. The command frame includes a read command, a device identifier a of extension unit 12, and register group identifiers for register groups 2 and 3. The master device sends command 3, requesting extension unit 12 to perform a read operation. After receiving command 3, extension unit 12 obtains the register group identifiers, i.e., the identifiers of register group 2 and register group 3, from the command frame. Extension unit 12 then reads target command 2 from register group 2 and target command 3 from register group 3, respectively. Target command 2 is sent to slave device 2 via the output of register group 2. Slave device 2 responds and performs the corresponding operation after receiving target command 2. Target command 3 is sent to slave device 3 via the output of register group 3. Slave device 3 responds and performs the corresponding operation after receiving target command 3. This process ensures that target commands 2 and 3 are sent simultaneously, eliminating the need for serial queued command transmission. Slave devices 2 and 3 can respond simultaneously. This parallel processing significantly shortens the slave device's response time, meeting the system's response time window requirements and improving communication efficiency and quality.

[0072] In the embodiment of the present application, the control circuit may further include:

[0073] The replication unit has one end connected to the master device and the other end connected to each of the multiple slave devices, and is used to receive a first instruction sent by the master device. If the identifier in the first instruction is the identifier of the extension unit, it is in a closed state; if the identifier in the first instruction is the identifier of the first slave device, it is in an open state, and the first instruction is synchronously sent to the multiple slave devices so that the first slave device responds to the first instruction.

[0074] The first slave device is any one of the multiple slave devices mentioned above, and is not specifically limited.

[0075] In one implementation, in scenarios with a long response time window, the master device sends a first instruction containing the identifier of the first slave device. This approach eliminates the need for the extension unit to pre-store instructions in the register bank. Instructions sent by the master device can be sent synchronously to multiple slave devices via the replication unit. Target slave devices no longer need to wait serially for instructions and can receive and respond to instructions promptly, significantly reducing response time and improving communication efficiency and quality.

[0076] For example, as shown in Table 7, the master device sends a command in a long response time window scenario. The command frame includes: the command format is read or write, the slave device identifier is USID = 6, and the register address. The information frame includes register operation data. In the write scenario, the register operation data is the data to be written to the register, and the information frame is sent by the master device to the slave device. In the read scenario, the register operation data is the data to be read from the register, and the information frame is sent by the slave device to the master device.

[0077] Table 7

[0078]

[0079] After the master device sends the command shown in Table 7, the replication unit is in the open state and sends the command to multiple slave devices synchronously. The multiple slave devices can all receive the command in time, but only slave device 6 responds to the command and performs the corresponding read or write operation.

[0080] Figure 2 FIG. 1 shows another MIPI control circuit structure diagram provided by an embodiment of the present application. Figure 2 As shown, the input of the control circuit 10 is connected to a master device 20, and the output is connected to multiple slave devices 30. There are n slave devices, including slave 1 through slave n, with corresponding IDs USID 1 through USID n. The control circuit 10 includes multiple register banks 11, an extension unit 12, and a replication unit 13. There are also n register banks 11, including register bank 1 through register bank n. Each register bank 11 is connected to a corresponding slave device 30 via its output. Both the extension unit 12 and the replication unit 13 are connected to the master device via their inputs. The other end of the replication unit 13 is connected to slave devices 1 through n, respectively. The other end of the extension unit 12 is connected to register banks 1 through n, respectively. With this circuit structure, the master device can first store the target instruction in the target register bank and then read the target instruction from the target register bank, allowing the target slave device to receive the target instruction and execute the corresponding operation. This can shorten the response time of the slave device and enhance communication between the master and slave devices.

[0081] In the above-mentioned control circuit provided in the embodiment of the present application, multiple register groups correspond one-to-one to multiple slave devices of MIPI, and the output end of each register group is connected to the corresponding slave device. One end of the extension unit is connected to the MIPI master device, and the other end is connected to the input end of each register group in the multiple register groups. It is used to receive the write instruction sent by the master device, store the target instruction contained in the write instruction in the target register group, and receive the read instruction sent by the master device, read the target instruction from the target register group, and send the target instruction to the target slave device through the output end of the target register group. Since the target instruction is pre-stored in the target register group, the target instruction received by the target slave device is issued by the target register group. This method greatly shortens the response time of the slave device, improves the quality of the signal received by the slave device, and especially enhances the communication effect with the remote slave device, and can overcome the parasitic effects of the wiring itself.

[0082] An embodiment of the present application also provides an electronic device, including a control circuit of the mobile industry processor interface as described in the above embodiment. The functions of the control circuit are detailed in the description of the above embodiment and have the same beneficial effects, which will not be repeated here.

[0083] Figure 3 A control method for a mobile industry processor interface provided by an embodiment of the present application is shown. Figure 3 As shown, the method includes the following steps.

[0084] S302: Receive an instruction for a target slave device sent by a MIPI master device, where the target slave device is one of multiple MIPI slave devices, and the multiple slave devices are numbered based on a line with the master device.

[0085] S304: Compare the number of the target slave device with the preset number.

[0086] S306: When the number of the target slave device is greater than the preset number, send an instruction to the intermediate slave device, and read the instruction from the intermediate slave device, so that the target slave device performs a corresponding operation after receiving the instruction read from the intermediate slave device.

[0087] The intermediate slave device is a slave device corresponding to a preset number among the multiple slave devices.

[0088] In an embodiment of the present application, when the number of the target slave device is greater than the preset number, it means that the distance between the target slave device and the master device has exceeded the threshold, and it can be regarded as a remote device. Directly sending instructions will be affected by the parasitic effects of the wiring itself, so forwarding is required. Storing and reading instructions through the intermediate slave device is equivalent to the intermediate slave device repeating the instructions, which can enable the target slave device to receive instructions faster and respond in time, shorten the response time, and improve the communication efficiency and quality between the master device and the target slave device.

[0089] In an embodiment of the present application, when the number of the target slave device is less than or equal to the preset number, it means that the distance between the target slave device and the master device does not exceed the threshold, and it can be regarded as a proximal device. Therefore, there is no need to consider the influence of the parasitic effects of the wiring itself, and instructions can be sent directly to the target slave device, and the target slave device can respond in a timely manner.

[0090] In the embodiment of the present application, in the above step S306, sending the instruction to the intermediate slave device and reading the instruction from the intermediate slave device may include:

[0091] Send instructions to the redundant register of the intermediate slave device and read instructions from the redundant register.

[0092] Among them, some or all of the multiple slave devices of MIPI can be configured with redundant registers. One slave device can be configured with at least one redundant register, and the number of redundant registers is not specifically limited.

[0093] In one embodiment, the above step S302 may further include:

[0094] Multiple slave devices are numbered in advance from small to large according to their distance from the master device from near to far; a slave device whose distance to the master device is greater than a first threshold and is closest to the master device is defined as an intermediate slave device, and the number of the intermediate slave device is defined as a preset number.

[0095] In an embodiment of the present application, multiple slave devices can be numbered according to the layout and routing of the slave devices on the main board, from near to far from the master device: #1, #2...#m...#n. Among them, the slave device numbered #m is the slave device that is closer to the master device than the first threshold and is the closest, and is defined as the middle slave device, and the number #m is the preset number. The first threshold can be set as needed, and the specific value is not limited. For example, the first threshold can be set to 100mm or 150mm, and the first slave device that is more than 100mm or 150mm away from the master device from near to far is defined as the middle slave device, and its number is #m.

[0096] In another embodiment, the above step S302 may further include:

[0097] A plurality of slave devices are numbered in ascending order according to the parasitic capacitance of the line between them and the master device; a slave device having a parasitic capacitance between it and the master device greater than a second threshold and having the smallest parasitic capacitance is defined as an intermediate slave device, and the number of the intermediate slave device is defined as a preset number.

[0098] In an embodiment of the present application, multiple slave devices can be numbered from small to large according to the parasitic capacitance of the line between the slave device and the master device: #1, #2...#m...#n. Among them, the slave device numbered #m is the slave device whose parasitic capacitance of the line between the slave device and the master device is greater than the second threshold and the parasitic capacitance is the smallest, and is defined as an intermediate slave device, and the number #m is the preset number. The second threshold can be set as needed, and the specific value is not limited. For example, the second threshold can be set to 15pF, and the slave device whose parasitic capacitance of the line between the slave device and the master device first exceeds 15pF is defined as an intermediate slave device, and its number is #m.

[0099] The above method provided in the embodiment of the present application receives an instruction for a target slave device sent by a MIPI master device, where the target slave device is one of multiple slave devices of MIPI, and multiple slave devices are numbered based on the wiring with the master device. The number of the target slave device is compared with a preset number. When the number of the target slave device is greater than the preset number, an instruction is sent to an intermediate slave device, and an instruction is read from the intermediate slave device so that the target slave device performs a corresponding operation after receiving the instruction read from the intermediate slave device. The intermediate slave device is a slave device corresponding to the preset number among multiple slave devices. The above process can ensure that the target slave device receives the instruction faster and responds in time, shortens the response time, improves the communication efficiency and quality between the master device and the target slave device, especially enhances the communication effect with the remote slave device, and can overcome the parasitic effects of the wiring itself.

[0100] Figure 4 A control device for a mobile industry processor interface provided by an embodiment of the present application is shown. Figure 4 As shown, the device 400 includes the following modules: a generating module 401 , a comparing module 402 and a controlling module 403 .

[0101] The receiving module 401 is configured to receive an instruction sent by a MIPI master device to a target slave device, where the target slave device is one of multiple MIPI slave devices, and the multiple slave devices are numbered based on the lines connected to the master device.

[0102] The comparison module 402 is configured to compare the serial number of the target slave device with a preset serial number.

[0103] The control module 403 is used to send the instruction to the intermediate slave device when the number of the target slave device is greater than the preset number, and read the instruction from the intermediate slave device, so that the target slave device performs the corresponding operation after receiving the instruction read from the intermediate slave device.

[0104] The intermediate slave device is a slave device corresponding to a preset number among multiple slave devices.

[0105] In the embodiment of the present application, the control module 403 is used to: send instructions to the redundant register of the intermediate slave device, and read instructions from the redundant register.

[0106] In one embodiment, the above device may further include:

[0107] The first preprocessing module is used to pre-number multiple slave devices from small to large according to the distance between them and the master device from near to far, and define the slave device whose distance to the master device is greater than a first threshold and is closest to the master device as an intermediate slave device, and define the number of the intermediate slave device as a preset number.

[0108] In another embodiment, the above device may further include:

[0109] The second preprocessing module is used to pre-number multiple slave devices from small to large according to the parasitic capacitance of the line between them and the master device, and define the slave device with the parasitic capacitance of the line between them and the master device greater than the second threshold and the smallest parasitic capacitance as an intermediate slave device, and define the number of the intermediate slave device as a preset number.

[0110] The above-mentioned device provided by the embodiment of the present application receives the instructions for the target slave device sent by the MIPI master device through the receiving module, the target slave device is one of the multiple slave devices of MIPI, the multiple slave devices are numbered based on the wiring with the master device, the comparison module compares the number of the target slave device with the preset number, and the control module sends the instruction to the intermediate slave device when the number of the target slave device is greater than the preset number, and reads the instruction from the intermediate slave device so that the target slave device performs the corresponding operation after receiving the instruction read from the intermediate slave device. The intermediate slave device is the slave device corresponding to the preset number among the multiple slave devices, which can ensure that the target slave device receives the instruction faster and responds in time, shortens the response time, improves the communication efficiency and quality between the master device and the target slave device, especially enhances the communication effect with the remote slave device, and can overcome the parasitic effects of the wiring itself.

[0111] The control device of the mobile industry processor interface in the embodiment of the present application can be an electronic device or a component in the electronic device, such as an integrated circuit or chip. The electronic device can be a terminal or other device other than a terminal. For example, the electronic device can be a mobile phone, a tablet computer, a laptop computer, a PDA, an in-vehicle electronic device, a mobile internet device (MID), an augmented reality (AR) / virtual reality (VR) device, a robot, a wearable device, an ultra-mobile personal computer (UMPC), a netbook or a personal digital assistant (PDA), etc. It can also be a server, a network attached storage (NAS), a personal computer (PC), a television (TV), a teller machine or a self-service machine, etc., and the embodiment of the present application does not specifically limit it.

[0112] The control device of the mobile industry processor interface in the embodiment of the present application can be a device having an operating system. The operating system can be an Android operating system, an iOS operating system, or other possible operating systems, which are not specifically limited in the embodiment of the present application.

[0113] The control device of the mobile industry processor interface provided by the embodiment of the present application can achieve Figure 3 To avoid repetition, the various processes implemented in the method embodiment are not described here.

[0114] Alternatively, as Figure 5 As shown, an embodiment of the present application also provides an electronic device 500, including a processor 501 and a memory 502, wherein the memory 502 stores a program or instruction that can be run on the processor 501, and when the program or instruction is executed by the processor 501, the various steps of the above-mentioned method embodiments are implemented and the same technical effect can be achieved. To avoid repetition, they are not described here.

[0115] It should be noted that the electronic devices in the embodiments of the present application include the mobile electronic devices and non-mobile electronic devices mentioned above.

[0116] Figure 6 A schematic diagram of the hardware structure of an electronic device implementing an embodiment of the present application.

[0117] The electronic device 600 includes but is not limited to components such as a radio frequency unit 601 , a network module 602 , an audio output unit 603 , an input unit 604 , a sensor 605 , a display unit 606 , a user input unit 607 , an interface unit 608 , a memory 609 , and a processor 610 .

[0118] Those skilled in the art will understand that the electronic device 600 may also include a power supply (such as a battery) to power each component. The power supply can be logically connected to the processor 610 through a power management system, so that functions such as charging, discharging, and power consumption management can be managed through the power management system. Figure 6 The electronic device structure shown in the figure does not constitute a limitation on the electronic device. The electronic device may include more or fewer components than shown in the figure, or combine certain components, or arrange the components differently, which will not be repeated here.

[0119] Among them, the processor 610 is used to receive an instruction sent by the MIPI master device to a target slave device, where the target slave device is one of multiple slave devices of MIPI, and the multiple slave devices are numbered based on the routing with the master device; compare the number of the target slave device with a preset number; when the number of the target slave device is greater than the preset number, send the instruction to the intermediate slave device, and read the instruction from the intermediate slave device, so that the target slave device performs a corresponding operation after receiving the instruction read from the intermediate slave device; wherein the intermediate slave device is a slave device corresponding to the preset number among the multiple slave devices.

[0120] The above-mentioned electronic device provided in the embodiment of the present application receives an instruction for a target slave device sent by a MIPI master device, where the target slave device is one of multiple slave devices of MIPI, and multiple slave devices are numbered based on the wiring with the master device. The number of the target slave device is compared with a preset number. When the number of the target slave device is greater than the preset number, an instruction is sent to an intermediate slave device, and an instruction is read from the intermediate slave device so that the target slave device performs a corresponding operation after receiving the instruction read from the intermediate slave device. The intermediate slave device is a slave device corresponding to the preset number among multiple slave devices. The above process can ensure that the target slave device receives the instruction faster and responds in time, shortens the response time, improves the communication efficiency and quality between the master device and the target slave device, especially enhances the communication effect with the remote slave device, and can overcome the parasitic effects of the wiring itself.

[0121] It should be understood that in this embodiment of the present application, the input unit 604 may include a graphics processing unit (GPU) 6041 and a microphone 6042. The GPU 6041 processes image data of still images or videos captured by an image capture device (e.g., a camera) in video capture mode or image capture mode. The display unit 606 may include a display panel 6061, which may be configured in the form of a liquid crystal display, an organic light-emitting diode, or the like. The user input unit 607 includes a touch panel 6071 or at least one of other input devices 6072. The touch panel 6071, also known as a touch screen, may include a touch detection device and a touch controller. Other input devices 6072 may include, but are not limited to, a physical keyboard, function keys (such as volume control keys, on / off keys, etc.), a trackball, a mouse, and a joystick, which are not described in detail here.

[0122] Memory 609 can be used to store software programs and various data. Memory 609 may primarily include a first storage area for storing programs or instructions and a second storage area for storing data. The first storage area may store an operating system, applications or instructions required for at least one function (such as a sound playback function, an image playback function, etc.). Furthermore, memory 609 may include volatile memory or non-volatile memory, or both. Non-volatile memory may be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), or flash memory. The volatile memory may be a random access memory (RAM), a static random access memory (SRAM), a dynamic random access memory (DRAM), a synchronous dynamic random access memory (SDRAM), a double data rate synchronous dynamic random access memory (DDRSDRAM), an enhanced synchronous dynamic random access memory (ESDRAM), a synchronous link dynamic random access memory (SLDRAM), and a direct memory bus random access memory (DRRAM). The memory 609 in the embodiment of the present application includes but is not limited to these and any other suitable types of memory.

[0123] Processor 610 may include one or more processing units. Optionally, processor 610 integrates an application processor and a modem processor. The application processor primarily handles operations related to the operating system, user interface, and application programs, while the modem processor primarily processes wireless communication signals, such as a baseband processor. It is understood that the modem processor may not be integrated into processor 610.

[0124] An embodiment of the present application also provides a readable storage medium, on which a program or instruction is stored. When the program or instruction is executed by a processor, the various processes of the above-mentioned method embodiments are implemented and the same technical effect can be achieved. To avoid repetition, it will not be repeated here.

[0125] The processor is the processor in the electronic device described in the above embodiment. The readable storage medium includes a computer-readable storage medium, such as a computer read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk.

[0126] An embodiment of the present application further provides a chip, which includes a processor and a communication interface, wherein the communication interface is coupled to the processor, and the processor is used to run programs or instructions to implement the various processes of the above-mentioned method embodiments and achieve the same technical effects. To avoid repetition, they will not be described here.

[0127] It should be understood that the chip mentioned in the embodiments of the present application can also be called a system-level chip, a system chip, a chip system or a system-on-chip chip, etc.

[0128] An embodiment of the present application provides a computer program product, which is stored in a storage medium. The program product is executed by at least one processor to implement the various processes of the above-mentioned method embodiments and can achieve the same technical effects. To avoid repetition, it will not be repeated here.

[0129] It should be noted that, in this article, the terms "comprise", "include" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the statement "comprises a ..." does not exclude the presence of other identical elements in the process, method, article or device comprising the element. In addition, it should be noted that the scope of the methods and devices in the embodiments of the present application is not limited to performing functions in the order shown or discussed, and may also include performing functions in a substantially simultaneous manner or in the opposite order according to the functions involved. For example, the described method may be performed in an order different from that described, and various steps may also be added, omitted, or combined. In addition, the features described with reference to certain examples may be combined in other examples.

[0130] Through the description of the above embodiments, those skilled in the art can clearly understand that the above-mentioned embodiment methods can be implemented by means of software plus the necessary general hardware platform. Of course, they can also be implemented by hardware, but in many cases the former is a better embodiment. Based on this understanding, the technical solution of this application, or the part that contributes to the existing technology, can be embodied in the form of a computer software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk), and includes a number of instructions for enabling a terminal (which can be a mobile phone, computer, server, or network device, etc.) to execute the methods described in each embodiment of this application.

[0131] The embodiments of the present application are described above in conjunction with the accompanying drawings, but the present application is not limited to the above-mentioned specific implementation methods. The above-mentioned specific implementation methods are merely illustrative and not restrictive. Under the guidance of this application, ordinary technicians in this field can also make many forms without departing from the purpose of this application and the scope of protection of the claims, all of which are within the protection of this application.

Claims

1. A control circuit for a mobile industry processor interface (MIPI), characterized in that: include: Multiple register groups correspond one-to-one to multiple slave devices of the mobile industry processor interface MIPI, and the output end of each register group is connected to the corresponding slave device; An extension unit, one end of which is connected to the MIPI master device, and the other end of which is respectively connected to the input end of each register group of the multiple register groups, and is used to receive a write instruction sent by the master device, store the target instruction contained in the write instruction in the target register group, and receive a read instruction sent by the master device, read the target instruction from the target register group, and send the target instruction to the target slave device through the output end of the target register group; The target instruction is an instruction sent by the master device to the target slave device, and the target register group is a register group connected to the target slave device.

2. The control circuit according to claim 1, wherein: The extension unit is used for: receiving a write instruction sent by the master device, obtaining an address of a target register group from an instruction frame of the write instruction, and obtaining a target instruction from an information frame of the write instruction; storing the target instruction in the target register group according to the address of the target register group; The target instruction includes an identifier of a target slave device, and the target slave device is a slave device connected to the target register group.

3. The control circuit according to claim 1, wherein: The extension unit is used for: receiving a read instruction sent by the master device, and obtaining an identifier of a target register group from an instruction frame of the read instruction; The target instruction is read from the target register group according to the identifier, so that the target register group sends the target instruction to the connected target slave device through the output end.

4. The control circuit according to claim 3, characterized in that: The extension unit is used for: If the instruction frame of the read instruction includes identifiers of multiple target register groups, the target instructions stored in each of the multiple target register groups are synchronously read from the multiple target register groups according to the identifiers of the multiple target register groups, so that each target register group sends the read target instruction to the target slave device connected to it through its own output terminal.

5. The control circuit according to any one of claims 1 to 4, characterized in that: In a scenario with a short response time window, the master device sends the write instruction at a first moment and sends the read instruction at a second moment, where the second moment is a moment when the target slave device is required to respond to the target instruction, and the first moment is earlier than the second moment; The short response time window is a response window whose response time is less than or equal to a preset threshold.

6. The control circuit according to claim 1, wherein: Also includes: A replication unit, one end of which is connected to the master device and the other end of which is respectively connected to each of the multiple slave devices, is used to receive a first instruction sent by the master device. If the identifier in the first instruction is the identifier of the extension unit, the replication unit is in a closed state; if the identifier in the first instruction is the identifier of the first slave device, the replication unit is in an open state, and the first instruction is synchronously sent to the multiple slave devices so that the first slave device responds to the first instruction.

7. An electronic device, characterized in that: The method comprises the control circuit according to any one of claims 1 to 6.

8. A control method for a mobile industry processor interface MIPI, characterized in that: include: Receive an instruction for a target slave device sent by a MIPI master device, where the target slave device is one of multiple MIPI slave devices, and the multiple slave devices are numbered based on the alignment with the master device; Comparing the serial number of the target slave device with a preset serial number; When the number of the target slave device is greater than the preset number, sending the instruction to the intermediate slave device, and reading the instruction from the intermediate slave device, so that the target slave device performs a corresponding operation after receiving the instruction read from the intermediate slave device; Among them, the intermediate slave device is a slave device corresponding to the preset number among the multiple slave devices, and the multiple slave devices are numbered from small to large according to the distance from the master device from near to far, or numbered from small to large according to the parasitic capacitance of the wiring between them and the master device from small to large.

9. The method according to claim 8, characterized in that The sending the instruction to the intermediate slave device and reading the instruction from the intermediate slave device includes: The instruction is sent to a redundant register of an intermediate slave device, and the instruction is read from the redundant register.

10. An electronic device, characterized in that: The invention comprises a processor, a memory and a computer program stored in the memory and executable on the processor, wherein when the computer program is executed by the processor, the steps of the method for controlling the mobile industry processor interface as claimed in claim 8 or 9 are implemented.

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