High-precision accelerometer signal pseudo-differential digital conversion circuit and working method

Abstract

The invention relates to a high-precision accelerometer signal pseudo-differential digital conversion circuit and a working method. The circuit comprises an I-V conversion circuit, a pseudo-differential amplification circuit and an AD conversion circuit. The I-V conversion circuit is used for converting a current signal output by an accelerometer into a voltage signal, filtering high-frequency interference and realizing impedance matching with the pseudo-differential amplification circuit so as to reduce signal distortion; the pseudo-differential amplification circuit is used for differentiating the ground and an input signal so as to reduce the influence of common-mode interference on the detection precision of the circuit, and adjusting the amplitude of an input voltage signal at the same time; and the AD conversion circuit is used for performing high-precision digital conversion on the input pseudo-differential voltage signal. According to the invention, I-V conversion with high common-mode noise suppression is realized, and high-precision voltage signal digital conversion is also realized.

Description

Technical Field

[0001] The present invention relates to the technical field of signal conditioning and digital conversion, and in particular to a high-precision accelerometer signal pseudo-differential digital conversion circuit and a working method. Background Art

[0002] The conventional accelerometer signal digital conversion circuit converts the current signal output by the accelerometer into a voltage signal through a sampling resistor and then directly performs digital conversion by an AD converter. Since the current signal output by the accelerometer has limited load capacity, after conversion by the sampling resistor, it will affect the output current accuracy, resulting in a decrease in circuit measurement accuracy. At the same time, due to the common mode interference and ground interference of the system, it will affect the signal integrity and the reference voltage accuracy of the AD converter, resulting in a decrease in digital conversion accuracy.

[0003] Therefore, a high-precision accelerometer signal pseudo-differential digital conversion circuit and working method are needed. Summary of the invention

[0004] The purpose of the present invention is to provide a high-precision accelerometer signal pseudo-differential digital conversion circuit and working method, which can solve the shortcomings of the prior art. By setting an IV conversion circuit, a pseudo-differential amplifier circuit and an AD conversion circuit, not only IV conversion with high common-mode noise suppression is achieved, but also high-precision pseudo-differential voltage signal digital conversion is achieved.

[0005] To achieve the above object, the present invention adopts the following technical solutions:

[0006] A high-precision accelerometer signal pseudo-differential digital conversion circuit comprises an IV conversion circuit, a pseudo-differential amplifier circuit and an AD conversion circuit.

[0007] The IV conversion circuit is used to convert the current signal output by the accelerometer into a voltage signal, and at the same time filter out high-frequency interference and achieve impedance matching with the pseudo-differential amplifier circuit to reduce signal distortion.

[0008] The pseudo differential amplifier circuit is used to differentiate the ground and the input signal to reduce the influence of common mode interference on the circuit detection accuracy, and at the same time adjust the amplitude of the input voltage signal.

[0009] The AD conversion circuit is used to perform high-precision digital conversion on the input pseudo differential voltage signal.

[0010] As a further improvement of the above technical solution, the IV conversion circuit includes: an operational amplifier N1, a resistor R1, a resistor R2, a resistor R3, a capacitor C1 and a capacitor C2; the resistor R2 is a sampling resistor; one end of the resistor R1 is connected to the inverting input terminal of the operational amplifier N1, and the other end of the resistor R1 is connected to the output terminal of the operational amplifier N1 via the capacitor C1; the resistor R2 is connected in parallel to the two ends of the series-connected resistor R1 and capacitor C1; one end of the resistor R3 is connected to the non-inverting input terminal of the operational amplifier N1, and the other end of the resistor R3 is grounded; the capacitor C2 is connected in parallel to the two ends of the resistor R3.

[0011] As a further improvement of the above technical solution, the pseudo differential amplifier circuit includes: an operational amplifier N2, an operational amplifier N3, a resistor R4, a resistor R5, a resistor R6, a resistor R7, a resistor R8, a resistor R9 and capacitors C3, C4, C5 and C6. One end of the resistor R4 is connected to the non-inverting input terminal of the operational amplifier N2, and the other end of the resistor R4 is connected to the non-inverting input terminal of the operational amplifier N3 via the capacitor C3 and the resistor R5; one end of the resistor R6 is connected to the inverting input terminal of the operational amplifier N2 and is connected to the output terminal of the operational amplifier N2 via the resistor R7, and the other end of the resistor R6 is grounded and connected to the non-inverting input terminal of the operational amplifier N2 via the capacitor C4; one end of the resistor R8 is connected to the output terminal of the operational amplifier N2, and the other end of the resistor R8 is connected to the output terminal of the operational amplifier N3 via the capacitor C5 and the resistor R9; one end of the capacitor C6 is connected to the non-inverting input terminal of the operational amplifier N3, and the other end of the capacitor C6 is grounded; the inverting input terminal of the operational amplifier N3 is connected to its output terminal.

[0012] As a further improvement of the above technical solution, the AD conversion circuit includes: a voltage reference source N4, an AD converter N5, a capacitor C7, a capacitor C8, a capacitor C9, a capacitor C10, a capacitor C11, a capacitor C12, a capacitor C13 and a resistor R10. One end of the capacitor C7 and the capacitor C8 are respectively connected to the input end and the output end of the voltage reference source N4, and the other end of the capacitor C7 and the capacitor C8 are both connected to a -2.5V power supply; one end of the capacitor C9, the capacitor C10, the capacitor C11, and the capacitor C12 are respectively connected to the analog power supply end, the analog ground and the negative reference voltage end, the digital power supply end, and the bypass clock source end of the AD converter N5, and the other end is connected to the ground; one end of the capacitor C13 is connected to the positive reference voltage end of the AD converter N5, and the other end is connected to the -2.5V power supply.

[0013] As a further improvement of the above technical solution, the current signal Iacc output by the accelerometer is connected to the inverting input terminal of the operational amplifier N1, and passes through the sampling resistor R2 to obtain a voltage signal proportional to the input current signal Iacc at the output terminal of the operational amplifier N1; the resistor R1 and the capacitor C1 are connected in series and then in parallel at both ends of the sampling resistor R2 to form an inverting input first-order low-pass filter for filtering out high-frequency noise in the current signal Iacc; the resistor R3 and the capacitor C2 are used to balance the offset current at the input terminal to minimize the DC error.

[0014] As a further improvement of the above technical solution, the AD conversion circuit adopts a 5V bandgap reference source N4 as an external reference, and the -2.5V and 5V power supplies are connected to the ground and power supply terminals of the reference source N4. The reference voltage VREF output by the reference source N4 is a 2.5V reference voltage.

[0015] The present invention also includes a working method of the above-mentioned high-precision accelerometer signal pseudo-differential digital conversion circuit, the method comprising the following steps:

[0016] S1. Use the IV conversion circuit to convert the current signal output by the accelerometer into a voltage signal, filter out high-frequency interference and achieve impedance matching with the pseudo-differential amplifier circuit to reduce signal distortion.

[0017] S2. Use a pseudo differential amplifier circuit to differentiate the voltage signal output by the ground and IV conversion circuit to reduce the impact of common mode interference on the circuit detection accuracy, and adjust the input voltage signal amplitude at the same time.

[0018] S3. Using an AD conversion circuit to perform digital conversion on the pseudo differential voltage signal output by the pseudo differential amplifier circuit.

[0019] As a further improvement of the above technical solution, in step S1, the current signal output by the accelerometer is converted into a voltage signal by using an IV conversion circuit, and high-frequency interference is filtered out and impedance matching with the pseudo-differential amplifier circuit is achieved to reduce signal distortion, including:

[0020] S11. The current signal Iacc output by the accelerometer is connected to the inverting input terminal of the operational amplifier N1. After being converted by the sampling resistor R2, a voltage signal proportional to the input current signal Iacc is obtained at the output terminal of the operational amplifier N1.

[0021] S12, the resistor R1 and the capacitor C1 are connected in series and then in parallel at both ends of the resistor R2. The resistor R1, the resistor R2, the capacitor C1 and the operational amplifier N1 form a first-order low-pass filter, and the first-order low-pass filter is used to filter out high-frequency noise in the current signal Iacc.

[0022] S13. Use resistor R3 and capacitor C2 to balance the offset current at the input to minimize the DC error.

[0023] As a further improvement of the above technical solution, in step S2, the voltage signal output by the ground and the IV conversion circuit is differentiated by using a pseudo differential amplifier circuit to reduce the influence of common mode interference on the circuit detection accuracy, and the amplitude of the input voltage signal is adjusted, including:

[0024] S21. The voltage signal output by the IV conversion circuit enters the first RC filter composed of the resistor R4 and the capacitor C4 in the pseudo differential amplifier circuit, and the noise is eliminated by the first RC filter.

[0025] S22, after the voltage signal passes through the first RC filter, it is amplified by the in-phase proportional operational amplifier composed of the operational amplifier N2 and the resistors R6 and R7, and the operational amplifier N2 outputs the amplified voltage signal.

[0026] S23, analogly outputs a reference level signal through a second RC filter composed of a resistor R5 and a capacitor C6 and a voltage follower composed of an operational amplifier N3, and the reference level signal and the voltage signal output by the operational amplifier N2 are input to an impedance matching network composed of a resistor R8, a resistor R9 and a capacitor C5, and the impedance matching network filters out high-frequency interference and common-mode noise in the signal, and realizes impedance matching of the output signal.

[0027] As a further improvement of the above technical solution, in step S3, the step of using the AD conversion circuit to digitally convert the pseudo differential voltage signal output by the pseudo differential amplifier circuit includes:

[0028] S31. Use a 5V bandgap reference source N4 as an external reference for the AD converter N5. Connect the -2.5V power supply and the 5V power supply to the ground and power supply terminals of the reference source N4 respectively. The reference voltage VREF output by the reference source N4 is a 2.5V reference voltage.

[0029] S32, connect the -2.5V power supply and the 2.5V reference voltage to the negative reference voltage terminal and the positive reference voltage terminal of the AD converter respectively, and the AD converter N5 collects signals in the range of -2.5V to 2.5V.

[0030] Compared with the prior art, the advantages of the present invention are:

[0031] (1) In the high-precision accelerometer signal pseudo-differential digital conversion circuit described in the present invention, considering that the current signal Iacc output by the accelerometer has high precision and limited load capacity, the signal is directly connected to the inverting input terminal of the operational amplifier N1 in the IV conversion circuit; since the voltage at the inverting input terminal of the operational amplifier is close to 0V, the IV conversion circuit will hardly absorb any energy of the input current signal Iacc, and the input current signal Iacc can be converted into a voltage signal with high precision through the IV conversion circuit, and the input current signal Iacc will not produce signal attenuation distortion.

[0032] (2) The high-precision accelerometer signal pseudo-differential digital conversion circuit described in the present invention can simultaneously amplify, filter and impedance match the voltage signal output by the IV conversion circuit and the analog ground through a pseudo-differential amplifier circuit, and connect them to the differential signal input terminal of the AD converter, thereby effectively avoiding the influence of common-mode interference generated by the external system on the circuit detection accuracy and improving the anti-interference ability of the circuit.

[0033] (3) In the high-precision pseudo-differential digital conversion circuit for accelerometer signals described in the present invention, the voltage reference and the AD converter in the AD conversion circuit do not use the ground that is easily interfered with as the reference level, but use a -2.5V power supply with strong anti-interference ability as the reference level. This design can effectively avoid the influence of the circuit's ground line being interfered with by the external system on the circuit's digital conversion accuracy, further improving the circuit's anti-interference ability.

[0034] (4) The high-precision accelerometer signal pseudo-differential digital conversion circuit described in the present invention can filter out high-frequency and common-mode noise in each signal processing circuit itself and outside the circuit, and at the same time achieve impedance matching of signals between two adjacent circuits to avoid distortion by providing a first-order low-pass filter in the IV conversion circuit, an RC filter at the input end of the pseudo-differential amplifier circuit, and an impedance matching network at the output end of the pseudo-differential amplifier circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] Figure 1 It is a topological diagram of the high-precision accelerometer signal pseudo-differential digital conversion circuit in the present invention;

[0036] Figure 2 It is a schematic diagram of the principle of the IV conversion circuit in the present invention;

[0037] Figure 3 It is a schematic diagram of the principle of the pseudo differential amplifier circuit in the present invention;

[0038] Figure 4 It is a schematic diagram of the AD conversion circuit principle in the present invention;

[0039] Figure 5 It is a schematic diagram of the high-precision accelerometer signal pseudo-differential digital conversion circuit of the present invention being specifically applied to an inertial navigation system.

[0040] in:

[0041] 1. IV conversion circuit, 2. Pseudo differential amplifier circuit, 3. AD conversion circuit, 4. Accelerometer head, 5. Accelerometer servo circuit, 6. High-precision accelerometer signal pseudo differential digital conversion circuit, 7. FPGA acquisition circuit. DETAILED DESCRIPTION

[0042] The present invention will be further described below in conjunction with the accompanying drawings:

[0043] like Figure 1 The high-precision accelerometer signal pseudo-differential digital conversion circuit shown includes an IV conversion circuit 1, a pseudo-differential amplifier circuit 2 and an AD conversion circuit 3.

[0044] The IV conversion circuit 1 is used to convert the current signal output by the accelerometer into a voltage signal without loss or distortion, while filtering out high-frequency noise and achieving impedance matching with the pseudo-differential amplifier circuit 2 to reduce signal distortion and improve the circuit's detection accuracy for the current signal; the pseudo-differential amplifier circuit 2 is used to differentiate the ground and the input signal (i.e., the voltage signal output by the IV conversion circuit) to reduce the influence of common-mode interference on the circuit detection accuracy, and at the same time adjust the amplitude of the input voltage signal; the AD conversion circuit 3 is used to perform high-precision digital conversion on the pseudo-differential voltage signal output by the pseudo-differential amplifier circuit.

[0045] like Figure 2 As shown, the IV conversion circuit 1 includes an operational amplifier N1, a resistor R1, a resistor R2, a resistor R3, and a capacitor C1 and a capacitor C2. One end of the resistor R1 is connected to the inverting input end of the operational amplifier N1, and the other end of the resistor R1 is connected to the output end of the operational amplifier N1 through the capacitor C1; the resistor R2 is connected in parallel to the two ends of the series connection of the resistor R1 and the capacitor C1; one end of the resistor R3 is connected to the in-phase input end of the operational amplifier N1, and the other end of the resistor R3 is grounded; the capacitor C2 is connected in parallel to the two ends of the resistor R3. The IV conversion circuit 1 can not only convert the current signal output by the accelerometer into a voltage signal that can be collected by the AD conversion circuit without loss, and reduce the circuit's requirements for the accelerometer current signal carrying capacity, but also can achieve impedance matching with the input end of the subsequent circuit, improve the output signal carrying capacity, and reduce the signal distortion in the subsequent circuit. Preferably, the model of the operational amplifier N1 is HRA2277.

[0046] Specifically, the IV conversion circuit 1 adopts a current negative feedback amplifier circuit to convert the current signal output by the accelerometer into a voltage signal through the sampling resistor R2, and uses a first-order low-pass filter to filter out high-frequency noise in the current signal. In the IV conversion circuit 1, the current signal Iacc output by the accelerometer is connected to the inverting input terminal of the operational amplifier N1. After conversion by the sampling resistor R2, a voltage signal proportional to the input current signal Iacc is obtained at the output terminal of the operational amplifier N1; since the voltage at the inverting input terminal of the operational amplifier is close to 0V, the IV conversion circuit will hardly absorb any energy of the input current signal Iacc, and the input current signal Iacc can be converted into a voltage signal with high precision through the IV conversion circuit, and the input current signal Iacc will not produce signal attenuation distortion; the resistor R1 and the capacitor C1 are connected in series and then connected in parallel at both ends of the sampling resistor R2, and the resistor R1, the resistor R2, the capacitor C1 and the operational amplifier N1 constitute a first-order low-pass filter, and the first-order low-pass filter can effectively filter out high-frequency noise in the current signal Iacc. The role of resistor R3 and capacitor C2 is to balance the offset current at the input and minimize the DC error. By building a first-order low-pass filter (resistor R1, resistor R2, capacitor C1 and operational amplifier N1) in the IV conversion circuit, the high-frequency noise in the current signal can be effectively filtered out. By building a compensation network (resistor R3 and capacitor C2) in the IV conversion circuit, the offset current at the input can be balanced to minimize the DC error.

[0047] like Figure 3As shown, the pseudo differential amplifier circuit 2 includes an operational amplifier N2, an operational amplifier N3, a resistor R4, a resistor R5, a resistor R6, a resistor R7, a resistor R8, a resistor R9 and a capacitor C3, a capacitor C4, a capacitor C5 and a capacitor C6. One end of the resistor R4 is connected to the non-inverting input terminal of the operational amplifier N2, and the other end of the resistor R4 is connected to the non-inverting input terminal of the operational amplifier N3 via the capacitor C3 and the resistor R5; one end of the resistor R6 is connected to the inverting input terminal of the operational amplifier N2 and is connected to the output terminal of the operational amplifier N2 via the resistor R7, and the other end of the resistor R6 is grounded and connected to the non-inverting input terminal of the operational amplifier N2 via the capacitor C4; one end of the resistor R8 is connected to the output terminal of the operational amplifier N2, and the other end of the resistor R8 is connected to the output terminal of the operational amplifier N3 via the capacitor C5 and the resistor R9; one end of the capacitor C6 is connected to the non-inverting input terminal of the operational amplifier N3, and the other end of the capacitor C6 is grounded; the inverting input terminal of the operational amplifier N3 is connected to its output terminal. The pseudo-differential amplifier circuit 2 realizes pseudo-differential signal transmission of the circuit by connecting the ground and the input signal to two operational amplifiers at the same time. It not only solves the influence of common-mode interference on the circuit detection accuracy, but also avoids the increase in circuit scale and complexity caused by dual signal differential. It also further filters out the high-frequency interference and common-mode noise of the signal by constructing a filter and an impedance matching network, and realizes impedance matching of the output signal.

[0048] Specifically, in pseudo differential amplifier circuit 2, the voltage signal and ground output by IV conversion circuit are connected to the in-phase input terminal of operational amplifier N2 and operational amplifier N3 through resistor R4 and resistor R5 respectively, to achieve the pseudo differential effect of signal. Such design not only solves the influence of common mode interference on circuit detection accuracy, but also avoids the increase of circuit scale and complexity brought by dual signal differential. Resistor R4 and capacitor C4 constitute the first RC filter, and resistor R5 and capacitor C6 constitute the second RC filter, by selecting suitable resistance and capacitance value, the cut-off frequency of two RC filters is 15kHz, while not affecting the circuit bandwidth, further filtering out high-frequency signal interference, reducing the burden of post-stage circuit processing. By selecting the resistance value of resistor R6 and resistor R7, adjusting the circuit amplification factor, the pseudo differential voltage signal output by pseudo differential amplifier circuit 2 is matched with the signal conversion range of AD conversion circuit 3. Resistor R8, resistor R9 and capacitor C5 constitute Π type network, which can also filter out common mode noise while realizing output signal impedance matching.

[0049] like Figure 4As shown, the AD conversion circuit 3 includes a voltage reference source N4, an AD converter N5, a capacitor C7, a capacitor C8, a capacitor C9, a capacitor C10, a capacitor C11, a capacitor C12, a capacitor C13 and a resistor R10. One end of the capacitor C7 and the capacitor C8 are respectively connected to the input end and the output end of the voltage reference source N4, and the other end of the capacitor C7 and the capacitor C8 are both connected to a -2.5V power supply; one end of the capacitor C9, the capacitor C10, the capacitor C11, and the capacitor C12 are respectively connected to the analog power supply end, the analog ground and the negative reference voltage end, the digital power supply end, and the bypass clock source end of the AD converter N5, and the other end is connected to the ground; one end of the capacitor C13 is connected to the positive reference voltage end of the AD converter N5, and the other end is connected to the -2.5V power supply. The AD conversion circuit 3 connects -2.5V and 5V to the ground and power supply terminals of the reference source N4, the reference source N4 outputs a 2.5V high-precision reference voltage, the -2.5V power supply and the 2.5V reference voltage are respectively connected to the negative reference voltage terminal and the positive reference voltage terminal of the AD converter, and the AD converter N5 can collect signals within the range of -2.5V to 2.5V. Since the voltage reference and the AD converter in the AD conversion circuit do not use the ground that is easily interfered with as the reference level, but use the -2.5V power supply with strong anti-interference ability as the reference level, it can effectively avoid the influence of the circuit digital conversion accuracy when the circuit ground line is interfered by the external system, and further improve the anti-interference ability of the circuit.

[0050] Specifically, a 5V bandgap reference source N4 is used as an external reference of the AD converter. The -2.5V power supply and the 5V power supply are connected to the ground and power supply terminals of the reference source N4 respectively. The reference voltage VREF output by the reference source N4 is a 2.5V reference voltage, which can ensure that the voltage difference accuracy from -2.5V to 2.5V is not affected by the ground line. The two are connected to the negative reference voltage terminal and the positive reference voltage terminal of the AD converter N5 respectively. The AD converter N5 can realize high-precision acquisition of signals in the range of -2.5V to 2.5V, reducing the influence of ground line interference on acquisition accuracy.

[0051] The working principle of the high-precision accelerometer signal pseudo-differential digital conversion circuit described in the present invention is:

[0052] The current signal Iacc output by the accelerometer passes through Figure 2 The resistor R2 connected between the inverting input terminal and the output terminal of the operational amplifier N1 in the IV conversion circuit 1 shown converts the current signal into a voltage signal;

[0053] The voltage signal is outputted through the output terminal of the operational amplifier N1, and at the same time, a first-order low-pass filter composed of the resistor R1, the resistor R2, the capacitor C1 and the operational amplifier N1 is passed to filter out high-frequency noise in the current signal.

[0054] The transfer function of the IV conversion circuit 1 is:

[0055]

[0056] Among them, A u (s) represents a transfer function of the IV conversion circuit, and s represents a complex domain.

[0057] When there is only a DC signal, that is, s = 0, the voltage V at the output of the operational amplifier N1 is o 1 is:

[0058] V o 1=-Iacc·R2

[0059] According to the input current signal Iacc and the voltage acquisition range of the AD conversion circuit 3, the resistance value of the resistor R2 is reasonably set so that the output voltage V o 1 Cover the voltage acquisition range of the AD conversion circuit as much as possible, thereby improving the accuracy of the pseudo-differential digital conversion of the acceleration signal.

[0060] The passband cutoff frequency f0 of the first-order low-pass filter constructed by resistor R1, resistor R2, capacitor C1 and operational amplifier N1 is:

[0061]

[0062] According to the need to filter out the high-frequency noise in the specified frequency band of the current signal Iacc, since the resistor R2 is related to the DC amplification factor, the cut-off frequency f0 of the first-order low-pass filter is generally adjusted by selecting a suitable capacitor C1.

[0063] The voltage at the inverting input terminal of the operational amplifier N1 in the IV conversion circuit is equal to the voltage at the non-inverting input terminal, which is close to 0V. Therefore, the IV conversion circuit will hardly absorb any energy from the input current signal Iacc. The input current signal Iacc can be converted into a voltage signal with high precision through the IV conversion circuit, and the input current signal Iacc will not produce signal attenuation distortion.

[0064] In the IV conversion circuit 1 , the resistor R3 and the capacitor C2 form a compensation network, which is used to balance the offset current at the input end to minimize the DC error.

[0065] The voltage signal output by the IV conversion circuit enters the Figure 3 The first RC filter composed of resistors R4 and C4 in the pseudo differential amplifier circuit shown further eliminates noise through the first RC filter. The passband cutoff frequency of the first RC filter is shown in the following formula:

[0066]

[0067] After passing through the first RC filter, the voltage signal is amplified by an in-phase proportional operational amplifier composed of an operational amplifier N2 and resistors R6 and R7. The output voltage signal Vo2 of the operational amplifier N2 is shown in the following formula:

[0068]

[0069] Among them, V O 1 is the output signal of the operational amplifier N1, and is also the input signal of the operational amplifier N2.

[0070] Similar to the voltage signal processing method, the reference level signal V is outputted through the second RC filter composed of resistor R5 and capacitor C6 and the voltage follower composed of operational amplifier N3. gnd After that, the reference level signal V gnd With signal V O 2 A Π-type impedance matching network is formed by resistor R8, resistor R9 and capacitor C5, and the impedance matching network is used to further filter out the high-frequency interference and common-mode noise of the signal, and realize impedance matching of the output signal.

[0071] exist Figure 4 In the AD conversion circuit shown, the ground terminal of the 5V voltage reference source N4 is connected to the -2.5V power supply, and the power supply terminal is connected to the 5V power supply. Then the output terminal of the voltage reference source N4 will output a high-precision 2.5V reference voltage VREF of 5V relative to -2.5V (2.5V relative to the ground). This reference voltage closely follows the -2.5V power supply, maintains a precise 5V voltage difference, and will not change due to ground interference. The 2.5V reference voltage VREF and the -2.5V power supply are respectively connected to the positive reference voltage terminal and the negative reference voltage terminal of the AD converter N5, which can realize high-precision digital conversion of differential voltage signals in the range of -2.5V to 2.5V, and reduce the influence of ground interference on conversion accuracy.

[0072] The present invention also includes a working method of the above-mentioned high-precision accelerometer signal pseudo-differential digital conversion circuit, the method comprising the following steps:

[0073] S1. Use the IV conversion circuit to convert the current signal output by the accelerometer into a voltage signal, filter out high-frequency interference and achieve impedance matching with the pseudo-differential amplifier circuit to reduce signal distortion.

[0074] S2. Use a pseudo differential amplifier circuit to differentiate the voltage signal output by the ground and IV conversion circuit to reduce the impact of common mode interference on the circuit detection accuracy, and adjust the input voltage signal amplitude at the same time.

[0075] S3. Using an AD conversion circuit to perform digital conversion on the pseudo differential voltage signal output by the pseudo differential amplifier circuit.

[0076] As a further improvement of the above technical solution, in step S1, the current signal output by the accelerometer is converted into a voltage signal by using an IV conversion circuit, and high-frequency interference is filtered out and impedance matching with the pseudo-differential amplifier circuit is achieved to reduce signal distortion, including:

[0077] S11. The current signal Iacc output by the accelerometer is connected to the inverting input terminal of the operational amplifier N1. After being converted by the sampling resistor R2, a voltage signal proportional to the input current signal Iacc is obtained at the output terminal of the operational amplifier N2.

[0078] S12, the resistor R1 and the capacitor C1 are connected in series and then in parallel at both ends of the resistor R2. The resistor R1, the resistor R2, the capacitor C1 and the operational amplifier N1 form a first-order low-pass filter, and the first-order low-pass filter is used to filter out high-frequency noise in the current signal Iacc.

[0079] S13. Use resistor R3 and capacitor C2 to balance the offset current at the input to minimize the DC error.

[0080] As a further improvement of the above technical solution, in step S2, the voltage signal output by the ground and the IV conversion circuit is differentiated by using a pseudo differential amplifier circuit to reduce the influence of common mode interference on the circuit detection accuracy, and the amplitude of the input voltage signal is adjusted, including:

[0081] S21. The voltage signal output by the IV conversion circuit enters the first RC filter composed of the resistor R4 and the capacitor C4 in the pseudo differential amplifier circuit, and the noise is eliminated by the first RC filter.

[0082] S22, after the voltage signal passes through the first RC filter, it is amplified by the in-phase proportional operational amplifier composed of the operational amplifier N2 and the resistors R6 and R7, and the operational amplifier N2 outputs the amplified voltage signal.

[0083] S23, analogly outputs a reference level signal through a second RC filter composed of a resistor R5 and a capacitor C6 and a voltage follower composed of an operational amplifier N3, and the reference level signal and the voltage signal output by the operational amplifier N2 are input to an impedance matching network composed of a resistor R8, a resistor R9 and a capacitor C5, and the impedance matching network filters out high-frequency interference and common-mode noise in the signal, and realizes impedance matching of the output signal.

[0084] As a further improvement of the above technical solution, in step S3, the step of using the AD conversion circuit to digitally convert the pseudo differential voltage signal output by the pseudo differential amplifier circuit includes:

[0085] S31. Use a 5V bandgap reference source N4 as an external reference for the AD converter N5. Connect the -2.5V power supply and the 5V power supply to the ground and power supply terminals of the reference source N4 respectively. The reference voltage VREF output by the reference source N4 is a 2.5V reference voltage.

[0086] S32, connect the -2.5V power supply and the 2.5V reference voltage to the negative reference voltage terminal and the positive reference voltage terminal of the AD converter respectively, and the AD converter N5 collects signals in the range of -2.5V to 2.5V.

[0087] Figure 5 FIG. 1 is a schematic diagram of the high-precision accelerometer signal pseudo-differential digital conversion circuit of the present invention being specifically applied to an inertial navigation system. Figure 5 As shown, the inertial navigation system includes an accelerometer meter head 4, an accelerometer servo circuit 5, a high-precision accelerometer signal pseudo-differential digital conversion circuit 6 described in the present invention, and an FPGA acquisition circuit 7. The accelerometer meter head 1 converts the inertial acceleration into a change ΔC of the differential capacitance, and the accelerometer servo circuit 2 converts the change ΔC of the differential capacitance into a change ΔIacc of the output current signal. The driving capacity of the current is limited, and direct IV conversion through a sampling resistor will cause the accuracy of the output current Iacc to decrease due to excessive load. In addition, since a set of inertial navigation systems closely includes three accelerometer subsystems and three gyroscope subsystems, signal crosstalk and interference are caused between the subsystems through ground wires and space radiation, which will have a serious impact on the inertial navigation system with a detection accuracy of 0.1μV. Therefore, the use of the high-precision accelerometer signal pseudo-differential digital conversion circuit 6 described in the present invention can make the current signal output by the accelerometer servo circuit 2 almost power-free and the current signal will not be distorted. The pseudo-differential amplifier circuit 2 in the present invention can reduce the common-mode interference introduced by the complex inertial navigation system; because the AD conversion circuit 3 does not use the ground that is easily interfered with as the reference level, the digital conversion accuracy and anti-interference ability are improved. The high-precision accelerometer signal pseudo-differential digital conversion circuit described in the present invention is distributed with multiple filters and impedance matching networks, which can effectively filter out the interference of other subsystems in the inertial navigation system. The AD conversion circuit 3 in the high-precision accelerometer signal pseudo-differential digital conversion circuit described in the present invention is connected to the FPGA acquisition circuit 7 of the navigation system through the SPI serial bus interface to realize information interaction and perform acceleration signal resolution.

[0088] The embodiments described above are merely descriptions of preferred implementation modes of the present invention and are not intended to limit the scope of the present invention. Without departing from the design spirit of the present invention, various modifications and improvements made to the technical solutions of the present invention by ordinary technicians in this field should all fall within the protection scope determined by the claims of the present invention.

Claims

1. A high-precision accelerometer signal pseudo-differential digital conversion circuit, characterized in that: The circuit comprises an IV conversion circuit (1), a pseudo differential amplifier circuit (2) and an AD conversion circuit (3); The IV conversion circuit (1) is used to convert the current signal output by the accelerometer into a voltage signal, while filtering out high-frequency interference and achieving impedance matching with the pseudo-differential amplifier circuit (2) to reduce signal distortion; The pseudo differential amplifier circuit (2) is used to differentiate the voltage signal output by the ground and IV conversion circuit (1) to reduce the influence of common mode interference on the circuit detection accuracy and adjust the amplitude of the input voltage signal; The AD conversion circuit (3) is used to perform digital conversion on the pseudo differential voltage signal output by the pseudo differential amplifier circuit (2).

2. The high-precision accelerometer signal pseudo-differential digital conversion circuit according to claim 1, characterized in that: The IV conversion circuit (1) comprises: an operational amplifier N1, a resistor R1, a resistor R2, a resistor R3, a capacitor C1 and a capacitor C2; the resistor R2 is a sampling resistor; One end of the resistor R1 is connected to the inverting input terminal of the operational amplifier N1, and the other end of the resistor R1 is connected to the output terminal of the operational amplifier N1 via the capacitor C1; the resistor R2 is connected in parallel to the two ends of the resistor R1 and the capacitor C1 connected in series; one end of the resistor R3 is connected to the non-inverting input terminal of the operational amplifier N1, and the other end of the resistor R3 is grounded; the capacitor C2 is connected in parallel to the two ends of the resistor R3.

3. The high-precision accelerometer signal pseudo-differential digital conversion circuit according to claim 2, characterized in that: The pseudo differential amplifier circuit (2) comprises: an operational amplifier N2, an operational amplifier N3, a resistor R4, a resistor R5, a resistor R6, a resistor R7, a resistor R8, a resistor R9 and a capacitor C3, a capacitor C4, a capacitor C5 and a capacitor C6; One end of the resistor R4 is connected to the non-inverting input terminal of the operational amplifier N2, and the other end of the resistor R4 is connected to the non-inverting input terminal of the operational amplifier N3 via the capacitor C3 and the resistor R5; one end of the resistor R6 is connected to the inverting input terminal of the operational amplifier N2 and is connected to the output terminal of the operational amplifier N2 via the resistor R7, and the other end of the resistor R6 is grounded and connected to the non-inverting input terminal of the operational amplifier N2 via the capacitor C4; one end of the resistor R8 is connected to the output terminal of the operational amplifier N2, and the other end of the resistor R8 is connected to the output terminal of the operational amplifier N3 via the capacitor C5 and the resistor R9; one end of the capacitor C6 is connected to the non-inverting input terminal of the operational amplifier N3, and the other end of the capacitor C6 is grounded; the inverting input terminal of the operational amplifier N3 is connected to its output terminal.

4. The high-precision accelerometer signal pseudo-differential digital conversion circuit according to claim 3, characterized in that: The AD conversion circuit (3) comprises: a voltage reference source N4, an AD converter N5, a capacitor C7, a capacitor C8, a capacitor C9, a capacitor C10, a capacitor C11, a capacitor C12, a capacitor C13 and a resistor R10; One end of the capacitor C7 and the capacitor C8 are respectively connected to the input end and the output end of the voltage reference source N4, and the other end of the capacitor C7 and the capacitor C8 are both connected to a -2.5V power supply; one end of the capacitor C9, the capacitor C10, the capacitor C11, and the capacitor C12 are respectively connected to the analog power supply end, the analog ground and the negative reference voltage end, the digital power supply end, and the bypass clock source end of the AD converter N5, and the other end are all connected to the ground; one end of the capacitor C13 is connected to the positive reference voltage end of the AD converter N5, and the other end is connected to the -2.5V power supply.

5. The high-precision accelerometer signal pseudo-differential digital conversion circuit according to claim 4, characterized in that: The current signal Iacc output by the accelerometer is connected to the inverting input terminal of the operational amplifier N1, and passes through the sampling resistor R2 to obtain a voltage signal proportional to the input current signal Iacc at the output terminal of the operational amplifier N2; the resistor R1 and the capacitor C1 are connected in series and then in parallel at both ends of the sampling resistor R2 to form an inverting input first-order low-pass filter for filtering out high-frequency noise in the current signal Iacc; the resistor R3 and the capacitor C2 are used to balance the offset current at the input terminal to minimize the DC error.

6. The high-precision accelerometer signal pseudo-differential digital conversion circuit according to claim 4, characterized in that: The AD conversion circuit (3) uses a 5V bandgap reference source N4 as an external reference, and connects -2.5V and 5V power supplies to the ground and power supply terminals of the reference source N4. The reference voltage VREF output by the reference source N4 is a 2.5V reference voltage.

7. The working method of the high-precision accelerometer signal pseudo-differential digital conversion circuit according to any one of claims 1 to 6, characterized in that: The method comprises the following steps: S1, using the IV conversion circuit (1) to convert the current signal output by the accelerometer into a voltage signal, while filtering out high-frequency interference and achieving impedance matching with the pseudo-differential amplifier circuit (2) to reduce signal distortion; S2, using a pseudo differential amplifier circuit (2) to differentiate the voltage signal output by the ground and the IV conversion circuit (1) to reduce the influence of common mode interference on the circuit detection accuracy, and at the same time adjust the amplitude of the input voltage signal; S3. Using the AD conversion circuit (3) to perform digital conversion on the pseudo differential voltage signal output by the pseudo differential amplifier circuit (2).

8. The working method of the high-precision accelerometer signal pseudo-differential digital conversion circuit according to claim 7, characterized in that: In step S1, the current signal output by the accelerometer is converted into a voltage signal by using an IV conversion circuit (1), high-frequency interference is filtered out, and impedance matching with the pseudo-differential amplifier circuit (2) is achieved to reduce signal distortion, including: S11, the current signal Iacc output by the accelerometer is connected to the inverting input terminal of the operational amplifier N1, and after conversion by the sampling resistor R2, a voltage signal proportional to the input current signal Iacc is obtained at the output terminal of the operational amplifier N1; S12, the resistor R1 and the capacitor C1 are connected in series and then in parallel at both ends of the resistor R2, the resistor R1, the resistor R2, the capacitor C1 and the operational amplifier N1 form a first-order low-pass filter, and the first-order low-pass filter is used to filter out high-frequency noise in the current signal Iacc; S13. Use resistor R3 and capacitor C2 to balance the offset current at the input to minimize the DC error.

9. The working method of the high-precision accelerometer signal pseudo-differential digital conversion circuit according to claim 8, characterized in that: In step S2, the pseudo differential amplifier circuit (2) is used to differentiate the voltage signal output by the ground and the IV conversion circuit (1) to reduce the influence of common mode interference on the circuit detection accuracy, and the amplitude of the input voltage signal is adjusted, including: S21, the voltage signal output by the IV conversion circuit (1) enters the first RC filter composed of a resistor R4 and a capacitor C4 in the pseudo differential amplifier circuit (2), and the noise is eliminated by the first RC filter; S22, after the voltage signal passes through the first RC filter, it is amplified by the in-phase proportional operational amplifier composed of the operational amplifier N2 and the resistors R6 and R7, and the operational amplifier N2 outputs the amplified voltage signal; S23, analogly outputs a reference level signal through a second RC filter composed of a resistor R5 and a capacitor C6 and a voltage follower composed of an operational amplifier N3, and the reference level signal and the voltage signal output by the operational amplifier N2 are input to an impedance matching network composed of a resistor R8, a resistor R9 and a capacitor C5, and the impedance matching network filters out high-frequency interference and common-mode noise in the signal, and realizes impedance matching of the output signal.

10. The working method of the high-precision accelerometer signal pseudo-differential digital conversion circuit according to claim 9, characterized in that: In the step S3, the AD conversion circuit (3) performs digital conversion on the pseudo differential voltage signal output by the pseudo differential amplifier circuit (2), comprising: S31, using a 5V bandgap reference source N4 as an external reference of the AD converter N5, connecting a -2.5V power supply and a 5V power supply to the ground and power supply terminals of the reference source N4 respectively, and the reference voltage VREF output by the reference source N4 is a 2.5V reference voltage; S32, connect the -2.5V power supply and the 2.5V reference voltage to the negative reference voltage terminal and the positive reference voltage terminal of the AD converter respectively, and the AD converter N5 collects signals in the range of -2.5V to 2.5V.

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