Filtering F-type power amplifier based on multimode resonator

Abstract

The invention discloses a filtering class F power amplifier based on a multimode resonator. The problems of large size and low efficiency caused by common design of a filter and an amplifier are mainly solved. The system comprises an input matching network, a grid electrode direct current feed network, a drain electrode direct current feed network, a transistor, a harmonic suppression network and a filtering matching network, and the input matching network utilizes a pi-shaped circuit to convert standard impedance of an input port into conjugation of optimal source impedance of the transistor; the grid and drain direct-current feed network isolates radio-frequency signals from entering a direct-current power supply and enables the transistor to work at a proper quiescent working point; the harmonic suppression network shapes the drain voltage and current of the transistor; the filtering matching network can control harmonic impedance and participate in matching, so that the drain electrode of the amplifier can reach the optimal load impedance. According to the invention, the loss generated by device connection is obviously reduced, the advantage of low complexity is shown, and the method is suitable for being applied to communication systems such as base stations and radars.

Description

Technical Field

[0001] The invention belongs to the field of communications and mainly relates to a filtered class F power amplifier based on a multi-mode resonator. Background Art

[0002] With the rapid development of 5G communication technology, the requirements for wireless systems are becoming increasingly stringent. This not only promotes the development of microwave communications but also places higher demands on the technical level of key components such as power amplifiers (PAs). 5G communication technology requires wireless systems to have higher data rates, lower latency, greater connection density, and higher reliability. To meet these requirements, power amplifiers, as key components in the RF front-end transmit path, have become crucial for performance optimization.

[0003] Filters and amplifiers, core components of RF transmitters, have traditionally been designed independently based on their respective performance specifications. While this approach ensures optimal performance for each component, it also presents significant challenges: the resulting circuit area of ​​the entire transmitter becomes relatively large, increasing manufacturing costs while significantly limiting miniaturization and portability, posing significant challenges to mass production.

[0004] To effectively address these challenges, researchers have conducted in-depth research on the co-design of filters and amplifiers in recent years. To achieve this, researchers have made many attempts, including the following:

[0005] (1) Design a compensation network between the amplifier and the filter to compensate for the signal distortion caused by the mismatch of input impedance between the two ports.

[0006] (2) A tuning line is introduced at the output end of the amplifier to tune the output impedance of the amplifier to a real number, which is used as the input impedance of the filter for design.

[0007] (3) The input port impedance of the filter is set to the optimal load impedance obtained by the load pull of the amplifier, and the network synthesis method of the filter is modified according to the case where the port is complex, and the frequency response of the input impedance is complex.

[0008] The existing technology combines the two originally independent devices more tightly by adjusting the impedance of the device input port, in order to significantly reduce the circuit area while maintaining performance, but its bandwidth and efficiency are low.

[0009] How to further broaden the bandwidth and improve the power added efficiency while maintaining the high integration of filters and amplifiers is a key issue that researchers urgently need to solve.

[0010] In order to solve the problems of large size and low efficiency caused by the joint design of the filter and the amplifier, the present invention provides a filtered class F power amplifier based on a multi-mode resonator. Summary of the Invention

[0011] In order to overcome the shortcomings of the prior art and solve the problems of large size and low efficiency caused by the joint design of the filter and the amplifier, the present invention provides a filtered F-class power amplifier based on a multi-mode resonator.

[0012] A filtered class F power amplifier based on a multi-mode resonator, comprising an input matching network 1, a gate DC feed network 2, a drain DC feed network 3, a transistor 5, a harmonic suppression network 4, and a filter matching network 6;

[0013] The input matching network 1 is used to transform the input impedance of the standard port into the conjugate of the optimal source impedance of the transistor gate, so that the input power can be transmitted to the load to the maximum extent; the gate DC feed network 2 is used to provide the bias voltage required for the operation of the transistor 5 gate; the drain DC feed network 3 is used to provide the bias voltage required for the operation of the transistor 5 drain, and together with the gate bias voltage, determines the static operating point of the transistor 5; the harmonic suppression network 4 is used to suppress the various harmonics of the transistor 5 drain. The harmonic suppression network 4 suppresses the second and third harmonics of the transistor 5, so that the drain output voltage only contains odd harmonics and the drain output current only contains even harmonics, thereby improving the efficiency of the amplifier; the filter matching circuit 6 is used to transform the output complex impedance of the harmonic suppression network 4 into 50Ω, so that the fundamental wave and various harmonics of the transistor 5 reach the optimal load impedance, thereby improving the amplifier gain and efficiency;

[0014] The transistor 5 is a GaN HEMT CGH40010F. The values ​​of the second resistor R2 and the third capacitor C3 in the RC stabilization circuit are determined according to the operating point of the transistor. The second resistor R2 of the RC stabilization circuit is 10Ω; the third capacitor C3 is 10pF. In order to separate the DC signal from the RF signal, the length of the seventh microstrip line TL7 is 0.25λ. g .

[0015] Furthermore, the input end of the filter matching network 6 is connected to the input end of the nineteenth microstrip line TL19; the output end of the nineteenth microstrip line TL19 is coupled to the input end of the twentieth microstrip line TL20; the twenty-first microstrip line TL21, the twenty-second microstrip line TL22 and the twenty-third microstrip line TL23 constitute a parallel three-mode cross-type structure; the input end of the parallel three-mode cross-type structure is the twenty-first microstrip line TL21; the output end of the twentieth microstrip line TL20 is coupled to the input end of the twenty-first microstrip line TL21; the output end of the parallel three-mode cross-type structure is the twenty-third microstrip line TL23; the twenty-third microstrip line TL The output end of the twenty-fourth microstrip line TL23 is coupled to the input end of the twenty-fourth microstrip line TL24; the output end of the twenty-fourth microstrip line TL24 is coupled to the input end of the twenty-fifth microstrip line TL25; the output end of the twenty-fifth microstrip line TL25 is the output end of the filter matching network; the output end of the filter matching network is the system output end; the twentieth microstrip line TL20 is the first resonator; the twenty-first microstrip line TL21, the twenty-second microstrip line TL22 and the twenty-third microstrip line TL23 generate three resonance modes; the three resonance modes correspond to the second resonator, the third resonator and the fourth resonator respectively; the twenty-fourth microstrip line TL24 is the fifth resonator.

[0016] Furthermore, the input matching network 1 includes a π-shaped matching circuit and an RC stabilization circuit;

[0017] The RC stabilization circuit includes a second resistor R2 and a third capacitor C3; the second resistor R2 and the third capacitor C3 are connected in parallel;

[0018] The π-shaped matching circuit includes a third microstrip line TL3, a fourth microstrip line TL4, a fifth microstrip line TL5, a sixth microstrip line TL6, an eighth microstrip line TL8, a ninth microstrip line TL9, and a tenth microstrip line TL10; the input end of the third microstrip line TL3 is connected to the input end of the fourth microstrip line TL4; the output end of the third microstrip line TL3 is open; the input end of the fourth microstrip line TL4 is connected to the input end of the second capacitor C2; the output end of the second capacitor C2 is respectively connected to the input end of the fifth microstrip line TL5, the input end of the sixth microstrip line TL6, and the input end of the eighth microstrip line TL8; the output end of the fifth microstrip line TL5 is open; the output end of the sixth microstrip line TL6 is connected to the input end of the gate DC feed network 2; the output end of the eighth microstrip line TL8 is respectively connected to the input end of the ninth microstrip line TL9, the input end of the tenth microstrip line TL10, and the input end of the RC stabilization circuit; the output ends of the ninth microstrip line TL9 and the tenth microstrip line TL10 are both open;

[0019] The system input end is respectively connected to the input end of the third microstrip line TL3 of the π-shaped matching circuit; the output end of the RC stabilization circuit is connected to the gate of the transistor 5.

[0020] Furthermore, the gate DC feed network 2 includes a first resistor R1, a seventh microstrip line TL7 and a first filter capacitor group; the first filter capacitor group is three parallel decoupling capacitors; the input end of the first resistor R1 is connected to the input end of the gate DC feed network 2; the output end of the first resistor R1 is connected to the input end of the seventh microstrip line TL7; the output end of the seventh microstrip line TL7 is respectively connected to the input end of the first filter capacitor group and the first external DC power supply Vgs; and the output end of the first filter capacitor group is grounded.

[0021] Furthermore, the drain DC feed network 3 includes a second filter capacitor group and a fifteenth microstrip line TL15; the second filter capacitor group is three parallel decoupling capacitors; the input end of the drain DC feed network 3 is connected to the input end of the fifteenth microstrip line TL15; the output end of the fifteenth microstrip line TL15 is respectively connected to the input end of the second filter capacitor group and the second external DC power supply Vds; the output end of the second filter capacitor group is grounded;

[0022] Furthermore, the harmonic suppression network 4 includes a thirteenth microstrip line TL13, a fourteenth microstrip line TL14, a sixteenth microstrip line TL16 and a fourth capacitor C4; the input end of the thirteenth microstrip line TL13 is connected to the drain of the transistor 5; the output end of the thirteenth microstrip line TL13 is respectively connected to the input end of the fourteenth microstrip line TL14, the input end of the sixteenth microstrip line TL16 and the input end of the drain DC feed network 3; the output end of the fourteenth microstrip line TL14 is open; the output end of the sixteenth microstrip line TL16 is connected to the input end of the fourth capacitor C4; the output end of the fourth capacitor C4 is connected to the input end of the filter matching network 6; the length of the thirteenth microstrip line TL13 is 0.25λ g .

[0023] Furthermore, the first microstrip line TL1, the first capacitor C1, and the second microstrip line TL2 are connected in series between the system input end and the input end of the third microstrip line TL3 of the π-shaped matching circuit; the eleventh microstrip line TL11 is connected in series between the output end of the RC stabilization circuit and the gate of the transistor 5; the twelfth microstrip line TL12 is connected in series between the input end of the thirteenth microstrip line TL13 and the drain of the transistor 5; and the seventeenth microstrip line TL17, the fifth capacitor C5, and the eighteenth microstrip line TL18 are connected in series between the output end of the fourth capacitor C4 and the input end of the filter matching network 6.

[0024] Furthermore, the steps for determining the output impedance of the π-matching circuit are:

[0025] Multiple frequency points are selected within the passband for load pulling and source pulling to obtain high-efficiency ranges and high-gain ranges of transistor 5 at different frequency points; the optimal impedance of the drain and gate of transistor 5 are determined based on the high-efficiency and high-gain ranges; and based on the optimal impedance of the drain and gate of transistor 5, the output impedance of the π-shaped matching circuit is simulated using simulation software, so that the output impedance is conjugate with the optimal impedance, thereby obtaining a π-shaped matching circuit that meets the requirements;

[0026] The dimensions of each microstrip line after simulation of the π-shaped matching circuit are:

[0027] The size of the first microstrip line TL1 is 2 / 3.18; the size of the second microstrip line TL2 is 1 / 2.54; the size of the third microstrip line TL3 is 1.87 / 7.35; the size of the fourth microstrip line TL4 is 1.5 / 16.6; the size of the fifth microstrip line TL5 is 1.2 / 13.67; the size of the sixth microstrip line TL6 is 1.5 / 4.94; the size of the seventh microstrip line TL7 is 3.95 / 15.58; the size of the eighth microstrip line TL8 is 3.33 / 5.32; the size of the ninth microstrip line TL9 is 6.35 / 11.63; the size of the tenth microstrip line TL10 is 6.35 / 11.63; the size of the eleventh microstrip line TL11 is 6.35 / 8.7; the size of a microstrip line is the ratio of the width to the length of the microstrip line.

[0028] Furthermore, based on the high-efficiency output impedance of the transistor 5, the steps for calculating the size and capacitance of each microstrip line of the output harmonic suppression network 4 are as follows:

[0029] The input impedance of the filter matching network 6 is matched to the optimal impedance of the drain of the transistor 5;

[0030] The harmonic suppression network 4 is used to control the impedance of the higher harmonics at the drain of the transistor 5;

[0031] The electrical length θ of the thirteenth microstrip line TL13 in the harmonic suppression network 4 is TL13 , the electrical length θ of the fourteenth microstrip line TL14 TL14 , the electrical length θ of the sixteenth microstrip line TL16 TL16 , the characteristic impedance Z of the thirteenth microstrip line TL13d TL13 , the characteristic impedance Z of the fourteenth microstrip line TL14 TL14 and the characteristic impedance Z of the sixteenth microstrip line TL16 TL16 The steps to determine are:

[0032] The impedance Z from the fifth capacitor C5 to the input port of the filter matching network 6 is D for:

[0033] Z D =Z C5 +Zout (1) Z C5 is the impedance of the fifth capacitor C5; Z out is the input impedance of the filter matching network 5;

[0034] The impedance Z from the fourth capacitor C4 to the input port of the filter matching network 6 is C for:

[0035] Z C =Z C4 +Z D (2) Z C4 is the impedance of the fourth capacitor C4;

[0036] A point where the output end of the thirteenth microstrip line TL13, the input end of the fourteenth microstrip line TL14, the input end of the fifteenth microstrip line TL15 and the input end of the sixteenth microstrip line TL16 are connected is defined as point B;

[0037] The impedance Z from point B to the sixteenth microstrip line TL16 B1 for:

[0038]

[0039] j is the imaginary unit;

[0040] The length of the fifteenth microstrip line TL15 is 0.25λ g , the input impedance Z from point B to the fifteenth microstrip line TL15 B2 It is equivalent to an open circuit, so Z B2 =∞, the impedance from point B to the fourteenth microstrip line TL14 is Z B3 ,

[0041] The input impedance of point B is the parallel impedance Z of the input end of the fourteenth microstrip line TL14, the input end of the fifteenth microstrip line TL15, and the input end of the sixteenth microstrip line TL16. B for:

[0042]

[0043] The input impedance from the transistor drain to the load is Z in :

[0044]

[0045] As long as the output impedance of the transistor drain matches the fundamental and harmonic impedances of the optimal impedance obtained by load pulling, a power amplifier that meets the design specifications can be obtained, that is, it needs to meet the following requirements:

[0046]

[0047] is the output impedance of the transistor drain;

[0048] According to formulas (1) to (6), the electrical length of each microstrip line in the harmonic suppression network 4 and the input impedance of the input port of the filter matching network 6 are calculated and determined;

[0049] The length and width of each microstrip line are calculated using simulation software based on the electrical length and input impedance, ultimately obtaining the specific dimensions of each microstrip line in the harmonic suppression network:

[0050] The size of the twelfth microstrip line TL12 is 1.56 / 1.6; the size of the thirteenth microstrip line TL13 is 8 / 4.23; the size of the fourteenth microstrip line TL14 is 4 / 6, the size of the fifteenth microstrip line TL15 is 1.2 / 22, the size of the sixteenth microstrip line TL16 is 4.72 / 10.72, the size of the seventeenth microstrip line TL17 is 4 / 2, and the size of the eighteenth microstrip line TL18 is 1 / 3.34.

[0051] Furthermore, according to the coupling matrix synthesis method, the ideal frequency response of the filter matching network 6 is obtained, and the steps for obtaining the dimensions of each microstrip line of the filter matching network 6 are as follows:

[0052] In order to make the input impedance of the filter matching network 6 equal to the output impedance of the harmonic suppression network 4, the impedance Z of the input port of the filter matching network 6 is designed. in Set as complex impedance, i.e. Z in =Re+j×Im, where Re is the impedance Z of the input port in The real part of the input port; Im is the impedance Z in The imaginary part of

[0053] According to the operating frequency of the filter matching network 6, the size of the three-mode cross-shaped structure in the filter matching network 6 is determined by using the odd-even mode analysis method. The relationship between the electrical lengths of the three-mode cross-shaped structures is:

[0054] cotθ L5+L8+L9 =0 (7)

[0055] cotθ L11 -tanθ L5+L8+L9 -tanθ L10 =0 (8)

[0056] where θ L11 is the electrical length of the eleventh microstrip line TL11, θ L5+L8+L9 is the sum of the electrical lengths of the fifteenth microstrip line TL5, the eighth microstrip line TL8, and the ninth microstrip line TL9, θ L10is the electrical length of the tenth microstrip line TL10;

[0057] According to formula (7) and formula (8), the electrical length of the three-mode cross-shaped structure is obtained by the given operating frequency of the filter matching network 6;

[0058] According to the external quality factor Q e determining a size of the first resonator and a size of the fifth resonator;

[0059] in f1 is the resonant frequency of the first resonator in the filter matching network 6, τ(f1) is the group delay;

[0060] Optimizing the size of the nineteenth microstrip line TL19, the size of the twenty-fourth microstrip line TL24, and the size of the twenty-fifth microstrip line TL25 by simulation software;

[0061] According to the coupling matrix synthesis method, the coupling matrix of the filter matching network 6 is expressed as:

[0062]

[0063] Among them, M Si is the coupling coefficient between the input port of the filter matching network 6 and the first resonator, the second resonator, the third resonator, the fourth resonator, and the fifth resonator, M iL is the coupling coefficient between the output port of the filter matching network 6 and the first resonator, the second resonator, the third resonator, the fourth resonator, and the fifth resonator, i=1, 2, 3, 4, 5;

[0064] According to the ideal frequency response curve obtained from the coupling matrix, simulation software is used to calculate the size of the nineteenth microstrip line TL19, the size of the twentieth microstrip line TL20, the size of the twentieth microstrip line TL20, and the size of the twenty-first microstrip line TL21, and finally a filter structure that meets the design indicators is obtained.

[0065] The beneficial effects of the present invention are as follows: since the harmonic suppression network and the multimode resonant filter of the Class F power amplifier are designed as an integrated whole, the present invention utilizes the coupling between the resonators to broaden the operating bandwidth, thereby improving the operating performance of the amplifier; the designed microstrip filter has a compact structure and is easy to integrate with the power amplifier, which not only reduces the cost but also meets the needs of miniaturization and mass production; the input impedance of the filter is designed to be the output impedance of the harmonic suppression network of the power amplifier, which realizes the direct cascade of the filter and the amplifier, eliminates the intermediate circuit, and reduces the complexity of the circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0066] Figure 1 A schematic structural diagram of a filtered class F power amplifier based on a multi-mode resonator according to the present invention;

[0067] Figure 2 Schematic diagram of the gate and drain DC bias network of the present invention; (a) is the gate DC feed network; (b) is the drain DC feed network;

[0068] Figure 3 Schematic diagram of the gate input matching network and gate DC feeding network structure of the present invention;

[0069] Figure 4 Schematic diagram of the structure of the drain input matching network and the drain DC feeding network of the present invention;

[0070] Figure 5 Schematic diagram of the topological structure of the multi-mode resonant filter of the present invention;

[0071] Figure 6 Schematic diagram of the frequency response of the multi-mode resonant filter of the present invention;

[0072] Figure 7 Schematic diagram of the S-parameter simulation results of the amplifier of the present invention;

[0073] Figure 8 The figure is a simulation result diagram of the amplifier efficiency and gain changing with frequency according to the present invention;

[0074] Figure 9 Graph showing simulation results of the amplifier efficiency of the present invention changing with input power;

[0075] Among them, 1-input matching network; 2-gate DC feeding network; 3-drain DC feeding network; 4-harmonic suppression network; 5 transistor; 6 filter matching network;

[0076] TL1-first microstrip line; TL2-second microstrip line; TL3-third microstrip line; TL4-fourth microstrip line; TL5-fifth microstrip line; TL6-sixth microstrip line; TL7-seventh microstrip line; TL8-eighth microstrip line; TL9-ninth microstrip line; TL10-tenth microstrip line; TL11-eleventh microstrip line; TL12-twelfth microstrip line; TL13-thirteenth microstrip line; TL14-fourteenth microstrip line; TL15-fifteenth microstrip line; TL16-sixteenth microstrip line; TL17-seventeenth microstrip line; TL18-eighteenth microstrip line; TL19-nineteenth microstrip line; TL20-twentieth microstrip line; TL21-twenty-first microstrip line; TL22-twenty-second microstrip line; TL23-twenty-third microstrip line; TL24-twenty-fourth microstrip line; TL25-twenty-fifth microstrip line;

[0077] R1-first resistor; R2-second resistor;

[0078] C1-first capacitor; C2-second capacitor; C3-third capacitor; C4-fourth capacitor; C5-first capacitor;

[0079] Vgs-first external DC power supply; Vds-second external DC power supply;

[0080] L1, L2, L3, L4, L6, L7, L5, L8, L9, L 10 , L 11 is the topological length of different parts of the microstrip line after bending; w1 is the width of the nineteenth microstrip line TL19; w2 is the width of the twentieth microstrip line TL20; w3 is the width of the twenty-second microstrip line TL22; w4 is the width of the twenty-first microstrip line TL21; s1 is the distance between the twenty-fourth microstrip line TL24 and the twenty-fifth microstrip line TL25; s2 is the distance between the twentieth microstrip line TL20 and the twenty-first microstrip line TL21. DETAILED DESCRIPTION

[0081] A filtered class F power amplifier based on a multi-mode resonator, comprising an input matching network 1, a gate DC feed network 2, a drain DC feed network 3, a transistor 5, a harmonic suppression network 4, and a filter matching network 6;

[0082] The input matching network 1 is used to transform the input impedance of the standard port into the conjugate of the optimal source impedance of the transistor gate, so that the input power can be transmitted to the load to the maximum extent; the gate DC feed network 2 is used to provide the bias voltage required for the operation of the transistor 5 gate; the drain DC feed network 3 is used to provide the bias voltage required for the operation of the transistor 5 drain, and together with the gate bias voltage, determines the static operating point of the transistor 5; the harmonic suppression network 4 is used to suppress the various harmonics of the transistor 5 drain. In the present invention, the second and third harmonics of the transistor 5 are mainly suppressed, so that the drain output voltage contains only odd harmonics and the drain output current contains only even harmonics, thereby significantly improving the efficiency of the amplifier; the filter matching circuit 6 is used to transform the output complex impedance of the harmonic suppression network 4 to 50Ω, so that the fundamental wave and various harmonics of the transistor 5 reach the optimal load impedance, thereby improving the amplifier gain and efficiency;

[0083] The input matching network 1 includes a π-shaped matching circuit and an RC stabilization circuit;

[0084] The RC stabilization circuit includes a second resistor R2 and a third capacitor C3; the second resistor R2 and the third capacitor C3 are connected in parallel;

[0085] The π-shaped matching circuit includes a third microstrip line TL3, a fourth microstrip line TL4, a fifth microstrip line TL5, a sixth microstrip line TL6, an eighth microstrip line TL8, a ninth microstrip line TL9, and a tenth microstrip line TL10; the input end of the third microstrip line TL3 is connected to the input end of the fourth microstrip line TL4; the output end of the third microstrip line TL3 is open; the output end of the fourth microstrip line TL4 is connected to the input end of the second capacitor C2; the output end of the second capacitor C2 is respectively connected to the input end of the fifth microstrip line TL5, the input end of the sixth microstrip line TL6, and the input end of the eighth microstrip line TL8; the output end of the fifth microstrip line TL5 is open; the output end of the sixth microstrip line TL6 is connected to the input end of the gate DC feed network 2; the output end of the eighth microstrip line TL8 is respectively connected to the input end of the ninth microstrip line TL9, the input end of the tenth microstrip line TL10, and the input end of the RC stabilization circuit; the output end of the ninth microstrip line TL9 and the output end of the tenth microstrip line TL10 are both open;

[0086] The system input end is respectively connected to the input end of the third microstrip line TL3 of the π-shaped matching circuit;

[0087] The output end of the RC stabilization circuit is connected to the gate of the transistor 5;

[0088] In another embodiment, a first microstrip line TL1, a first capacitor C1, and a second microstrip line TL2 are connected in series between the system input and the input of the third microstrip line TL3 of the π-shaped matching circuit. The first capacitor C1 is an input protection capacitor that prevents DC voltage from entering the test equipment. The first microstrip line TL1 and the second microstrip line TL2 are pads of the capacitors and have no impact on the performance of the input matching network.

[0089] In another embodiment, an eleventh microstrip line TL11 is connected in series between the output end of the RC stabilization circuit and the gate of the transistor 5 to facilitate welding the RC stabilization circuit and the transistor 5 .

[0090] The gate DC feed network 2 includes a first resistor R1, a seventh microstrip line TL7, and a first filter capacitor group; the first filter capacitor group is three parallel decoupling capacitors; the input end of the first resistor R1 is connected to the input end of the gate DC feed network 2; the input end of the first resistor R1 is connected to the input end of the seventh microstrip line TL7; the output end of the seventh microstrip line TL7 is respectively connected to the input end of the first filter capacitor group and a first external DC power supply; the output end of the first filter capacitor group is grounded;

[0091] The drain DC feed network 3 includes a second filter capacitor group and a fifteenth microstrip line TL15; the second filter capacitor group is composed of three parallel decoupling capacitors; the input end of the drain DC feed network 3 is connected to the input end of the fifteenth microstrip line TL15; the output end of the fifteenth microstrip line TL15 is respectively connected to the input end of the second filter capacitor group and the second external DC power supply; the output end of the second filter capacitor group is grounded;

[0092] The harmonic suppression network 4 includes a thirteenth microstrip line TL13, a fourteenth microstrip line TL14, a sixteenth microstrip line TL16 and a fourth capacitor C4; the input end of the thirteenth microstrip line TL13 is connected to the drain of the transistor 5; the output end of the thirteenth microstrip line TL13 is respectively connected to the input end of the fourteenth microstrip line TL14, the input end of the sixteenth microstrip line TL16 and the input end of the drain DC feed network 3; the output end of the fourteenth microstrip line TL14 is open; the output end of the sixteenth microstrip line TL16 is connected to the input end of the fourth capacitor C4; the output end of the fourth capacitor C4 is connected to the input end of the filter matching network 6; the length of the thirteenth microstrip line TL13 is 0.25λ g ; The harmonic suppression network makes the drain voltage and current waveforms of the transistor meet the conditions of a class F power amplifier.

[0093] In another embodiment, a twelfth microstrip line TL12 is connected in series between the input end of the thirteenth microstrip line TL13 and the drain of the transistor 5; the twelfth microstrip line TL12 is welded to the device, and the effect on the performance of the amplifier is negligible;

[0094] In another embodiment, the seventeenth microstrip line TL17, the fifth capacitor C5, and the eighteenth microstrip line TL18 are connected in series between the output end of the fourth capacitor C4 and the input end of the filter matching network 6 in sequence; this facilitates device welding and has negligible impact on amplifier performance;

[0095] The harmonic suppression network makes the drain voltage and current waveforms of transistor 5 meet the conditions of a class F power amplifier;

[0096] The input end of the filter matching network 6 is connected to the input end of the nineteenth microstrip line TL19; the output end of the nineteenth microstrip line TL19 is coupled to the input end of the twentieth microstrip line TL20; the twenty-first microstrip line TL21, the twenty-second microstrip line TL22 and the twenty-third microstrip line TL23 form a parallel three-mode cross-type structure; the input end of the parallel three-mode cross-type structure is the twenty-first microstrip line TL21; the output end of the twentieth microstrip line TL20 is coupled to the input end of the twentieth microstrip line TL21; the output end of the parallel three-mode cross-type structure is the twenty-third microstrip line TL23; the The output end is coupled to the input end of the twenty-fourth microstrip line TL24; the output end of the twenty-fourth microstrip line TL24 is coupled to the input end of the twenty-fifth microstrip line TL25; the output end of the twenty-fifth microstrip line TL25 is connected to the output end of the filter matching network, and the output end of the filter matching network is the system output end; the twentieth microstrip line TL20 is a first resonator; the twenty-first microstrip line TL21, the twenty-second microstrip line TL22, and the twenty-third microstrip line TL23 generate three resonant modes; the three resonant modes correspond to the second resonator, the third resonator, and the fourth resonator, respectively; the twenty-fourth microstrip line TL24 is a fifth resonator;

[0097] Step 1: Select transistors based on the amplifier's gain, efficiency, and power consumption.

[0098] The transistor 5 is a GaN HEMT CGH40010F; the second resistor R2 and the third capacitor C3 of the RC stabilization circuit are determined according to the operating point of the transistor;

[0099] The second resistor R2 of the RC stabilization circuit is 10Ω; the third capacitor C3 is 10pF;

[0100] In order to separate the DC signal from the RF signal, the length of the seventh microstrip line TL7 is 0.25λ g ;

[0101] The second step is to determine the output impedance of the π-shaped matching circuit;

[0102] The method for obtaining the output impedance of the π-shaped matching circuit is:

[0103] Multiple frequency points are selected within the passband for load pulling and source pulling to obtain high-efficiency ranges and high-gain ranges of transistor 5 at different frequency points; the optimal impedance of the drain and gate of transistor 5 are determined based on the high-efficiency and high-gain ranges; and based on the optimal impedance of the drain and gate of transistor 5, the output impedance of the π-shaped matching circuit is simulated using simulation software, so that the output impedance is conjugate with the optimal impedance, thereby obtaining a π-shaped matching circuit that meets the requirements;

[0104] The dimensions of each microstrip line after simulation of the π-shaped matching circuit are:

[0105] The dimensions of the first microstrip line TL1 are 2 / 3.18; the dimensions of the second microstrip line TL2 are 1 / 2.54; the dimensions of the third microstrip line TL3 are 1.87 / 7.35; the dimensions of the fourth microstrip line TL4 are 1.5 / 16.6; the dimensions of the fifth microstrip line TL5 are 1.2 / 13.67; the dimensions of the sixth microstrip line TL6 are 1.5 / 4.94; the dimensions of the seventh microstrip line TL7 are 3.95 / 15.58; the dimensions of the eighth microstrip line TL8 are 3.33 / 5.32; the dimensions of the ninth microstrip line TL9 are 6.35 / 11.63; the dimensions of the tenth microstrip line TL10 are 6.35 / 11.63; and the dimensions of the eleventh microstrip line TL11 are 6.35 / 8.7. The dimensions of a microstrip line are the ratio of the width to the length of the microstrip line.

[0106] Step 3: Calculate the size and capacitance of each microstrip line of the output harmonic suppression network 4 based on the high-efficiency output impedance of the transistor 5;

[0107] The input impedance of the filter matching network 6 is matched to the optimal impedance of the drain of the transistor 5;

[0108] The harmonic suppression network 4 is used to control the impedance of the higher harmonics at the drain of the transistor 5;

[0109] The electrical length θ of the thirteenth microstrip line TL13 in the harmonic suppression network 4 is TL13 , the electrical length θ of the fourteenth microstrip line TL14 TL14 , the electrical length θ of the sixteenth microstrip line TL16 TL16 、The characteristic impedance Z of the thirteenth microstrip line TL13 TL13 , the characteristic impedance Z of the fourteenth microstrip line TL14 TL14 and the characteristic impedance Z of the sixteenth microstrip line TL16 TL16 The steps to determine are:

[0110] The impedance Z from the fifth capacitor C5 to the input port of the filter matching network 6 is D for:

[0111] Z D =Z C5 +Z out (1) Z C5 is the impedance of the fifth capacitor C5; Z out is the input impedance of the filter matching network 6;

[0112] The impedance Z from the fourth capacitor C4 to the seventeenth microstrip line TL17 C for:

[0113] Z C =Z C4 +ZD (2) Z C4 is the impedance of the fourth capacitor C4;

[0114] A point where the output end of the thirteenth microstrip line TL13, the input end of the fourteenth microstrip line TL14, the input end of the fifteenth microstrip line TL15, and the input end of the sixteenth microstrip line TL16 are connected is defined as point B;

[0115] The impedance Z from point B to the sixteenth microstrip line TL16 B1 for:

[0116]

[0117] j is the imaginary unit;

[0118] The length of the fifteenth microstrip line TL15 is 0.25λ g , the input impedance Z from point B to the fifteenth microstrip line TL15 B2 It is equivalent to an open circuit, so Z B2 =∞, the impedance from point B to the fourteenth microstrip line TL14 is Z B3 ,

[0119] The input impedance of point B is the parallel impedance Z of the input end of the fourteenth microstrip line TL14, the input end of the fifteenth microstrip line TL15, and the input end of the sixteenth microstrip line TL16. B for:

[0120]

[0121] The input impedance from the transistor drain to the load is Z in :

[0122]

[0123] As long as the output impedance of the transistor drain matches the fundamental and harmonic impedances of the optimal impedance obtained by load pulling, a power amplifier that meets the design specifications can be obtained, that is, it needs to meet the following requirements:

[0124]

[0125] is the output impedance of the transistor drain;

[0126] According to formulas (1) to (6), the electrical length of each microstrip line in the harmonic suppression network 4 and the input impedance of the input port of the filter matching network 6 are calculated and determined;

[0127] The length and width of each microstrip line are calculated using simulation software based on the electrical length and input impedance, ultimately obtaining the specific dimensions of each microstrip line in the harmonic suppression network:

[0128] The dimensions of the twelfth microstrip line TL12 are 1.56 / 1.6; the dimensions of the thirteenth microstrip line TL13 are 8 / 4.23; the dimensions of the fourteenth microstrip line TL14 are 4 / 6, the dimensions of the fifteenth microstrip line TL15 are 1.2 / 22, the dimensions of the sixteenth microstrip line TL16 are 4.72 / 10.72, the dimensions of the seventeenth microstrip line TL17 are 4 / 2, and the dimensions of the eighteenth microstrip line TL18 are 1 / 3.34;

[0129] Step 4: Obtain the ideal frequency response of the filter matching network 6 according to the coupling matrix synthesis method, and obtain the size of each microstrip line of the filter matching network 6;

[0130] The specific steps are:

[0131] In order to make the input impedance of the filter matching network 6 equal to the output impedance of the harmonic suppression network 4, the impedance Z of the input port of the filter matching network 6 is designed. in Set as complex impedance, i.e. Z in =Re+j×Im, where Re is the impedance Z of the input port in The real part of the input port; Im is the impedance Z in The imaginary part of

[0132] According to the operating frequency of the filter matching network 6, the size of the three-mode cross-shaped structure in the filter matching network 6 is determined by using the odd-even mode analysis method. The relationship between the electrical lengths of the three-mode cross-shaped structures is:

[0133] cotθ L5+L8+L9 =0 (7)

[0134] cotθ L11 -tanθ L5+L8+L9 -tanθ L10 =0 (8)

[0135] where θ L11 is the electrical length of the eleventh microstrip line TL11, θ L5+L8+L9 is the sum of the electrical lengths of the fifteenth microstrip line TL5, the eighth microstrip line TL8, and the ninth microstrip line TL9, θ L10 is the electrical length of the tenth microstrip line TL10;

[0136] According to formula (7) and formula (8), the electrical length of the three-mode cross-shaped structure is obtained by the given operating frequency of the filter matching network 6;

[0137] According to the external quality factor Q edetermining a size of the first resonator and a size of the fifth resonator;

[0138] in f1 is the resonant frequency of the first resonator in the filter matching network 6, τ(f1) is the group delay;

[0139] Adjust the size of the nineteenth microstrip line TL19, the size of the twenty-fourth microstrip line TL24, and the size of the twenty-fifth microstrip line TL25 through simulation software;

[0140] According to the coupling matrix synthesis method, the coupling matrix of the filter matching network 6 is expressed as:

[0141]

[0142] Among them, M Si is the coupling coefficient between the input port of the filter matching network 6 and the first resonator, the second resonator, the third resonator, the fourth resonator, and the fifth resonator, M iL is the coupling coefficient between the output port of the filter matching network 6 and the first resonator, the second resonator, the third resonator, the fourth resonator, and the fifth resonator, i=1, 2, 3, 4, 5;

[0143] According to the ideal frequency response curve obtained from the coupling matrix, the dimensions of the nineteenth microstrip line TL19, the dimensions of the twentieth microstrip line TL20, the dimensions of the twentieth microstrip line TL20, and the dimensions of the twenty-first microstrip line TL21 are calculated using simulation software, and finally a filter structure that meets the design specifications is obtained;

[0144] At this time, the structure of the filter matching network 6 is shown in FIG. Figure 5 , the specific dimensions are as follows:

[0145] The nineteenth microstrip line TL19 and the twenty-fifth microstrip line TL25 have the same size;

[0146] The twentieth microstrip line TL20 and the twenty-fourth microstrip line TL24 have the same size;

[0147] The twenty-first microstrip line TL21 and the twenty-third microstrip line TL23 have the same size;

[0148] w1 is 1mm, L1 is 16.33mm, L2 is 3.9mm,

[0149] w2 is 0.41mm, L3 is 20.9mm, L6 is 3.43mm, L4 is 12.72mm, L7 is 3.4mm,

[0150] w3 is 1.7mm, L 10 12.68mm, L 11 2.82mm,

[0151] w4 is 0.35mm, L5 is 16.2mm; L8 is 1.8mm, L9 is 2.1mm,

[0152] s1 is 0.3mm, s2 is 0.43mm;

[0153] The sum of L1 and L2 is equal to the length of the nineteenth microstrip line TL19; w1 is the width of the nineteenth microstrip line TL19; the sum of L3, L4, L6 and L7 is equal to the length of the twentieth microstrip line TL20; w2 is the width of the twentieth microstrip line TL20; the sum of L5, L8 and L9 is equal to the length of the twenty-first microstrip line TL21; w4 is the width of the twenty-first microstrip line TL21; L 10 and L 11 The sum of is equal to the length of the twenty-second microstrip line TL22; w3 is the width of the twenty-second microstrip line TL22; s1 is the distance between the twenty-fourth microstrip line TL24 and the twenty-fifth microstrip line TL25; s2 is the distance between the twentieth microstrip line TL20 and the twenty-first microstrip line TL21;

[0154] The present invention will be further described below with reference to the accompanying drawings and examples.

[0155] When the input port impedance is complex, the filter's frequency response is as follows: Figure 6 The results show that the passband center frequency is 2.5GHz, the passband performance is excellent, the insertion loss is kept within 0.5dB, and the 3dB bandwidth of the filter is 2GHz-3GHz (40%). The filter is simulated as an amplifier output matching circuit, and the following is obtained: Figure 7 The S parameters shown in the figure show that the amplifier is well matched in the entire frequency band and the amplifier gain is stable in the 2-2.8GHz band. Figure 8 is the relationship between the added power efficiency, drain efficiency and gain of the power amplifier and the frequency, Figure 9 The relationship between the power added efficiency and drain efficiency of the power amplifier as a function of input power is shown. When the amplifier input power is 28dBm, the amplifier approaches saturation. At this time, the power added efficiency at 2.1GHz is 78%, and the 1dB compression gain is 12dB. The power amplifier gain is greater than 12dB throughout the entire passband and is relatively stable. The power added efficiency within the passband is greater than 60%. This shows that the amplifier designed with the filter as the matching network has superior performance, greatly saves circuit area, expands the amplifier operating bandwidth, and enhances the amplifier's out-of-band suppression. The present invention has the advantages of high efficiency, wide bandwidth, and small size, and can meet the needs of most base station equipment.

Claims

1. A filtered class F power amplifier based on a multimode resonator, characterized in that: It includes an input matching network (1), a gate DC feeding network (2), a drain DC feeding network (3), a transistor (5), a harmonic suppression network (4) and a filter matching network (6); The input matching network (1) is used to transform the input impedance of the standard port into the conjugate of the optimal source impedance of the transistor gate, so that the input power is transmitted to the load to the maximum extent; the gate DC feeding network (2) is used to provide the bias voltage required for the operation of the transistor (5) gate; the drain DC feeding network (3) is used to provide the bias voltage required for the operation of the transistor (5) drain, and together with the gate bias voltage, determines the static operating point of the transistor (5); The harmonic suppression network (4) is used to suppress the harmonics of the drain of the transistor (5). The harmonic suppression network (4) suppresses the second and third harmonics of the transistor (5), so that the drain output voltage only contains odd harmonics and the drain output current only contains even harmonics, thereby improving the efficiency of the amplifier; the filter matching circuit 6 is used to transform the output complex impedance of the harmonic suppression network (4) into 50Ω, so that the fundamental wave and each harmonic of the transistor (5) reach the optimal load impedance, thereby improving the amplifier gain and efficiency; The transistor (5) is a GaN HEMT CGH40010F.

2. The multi-mode resonator-based filtered class F power amplifier according to claim 1, wherein: The input end of the filter matching network (6) is connected to the input end of the nineteenth microstrip line (TL19); the output end of the nineteenth microstrip line (TL19) is connected to the input end of the twentieth microstrip line (TL20) through coupling; the twenty-first microstrip line (TL21), the twenty-second microstrip line (TL22) and the twenty-third microstrip line (TL23) form a parallel three-mode cross-shaped structure; the input end of the parallel three-mode cross-shaped structure is the twenty-first microstrip line (TL21); the output end of the twentieth microstrip line (TL20) is coupled to the input end of the twenty-first microstrip line (TL21); and the output end of the parallel three-mode cross-shaped structure is the twenty-third microstrip line (TL23); The output end of the twenty-third microstrip line (TL23) is coupled to the input end of the twenty-fourth microstrip line (TL24); The output end of the twenty-fourth microstrip line (TL24) is coupled to the input end of the twenty-fifth microstrip line (TL25); the output end of the twenty-fifth microstrip line (TL25) is the output end of the filter matching network; the output end of the filter matching network is the system output end; the twentieth microstrip line (TL20) is the first resonator; the twenty-first microstrip line (TL21), the twenty-second microstrip line (TL22) and the twenty-third microstrip line (TL23) generate three resonance modes; the three resonance modes correspond to the second resonator, the third resonator and the fourth resonator respectively; the twenty-fourth microstrip line (TL24) is the fifth resonator.

3. The filtered class F power amplifier based on a multimode resonator according to claim 1, characterized in that: The input matching network (1) includes a π-shaped matching circuit and an RC stabilization circuit; The RC stabilization circuit includes a second resistor (R2) and a third capacitor (C3); the second resistor (R2) and the third capacitor (C3) are connected in parallel; The π-shaped matching circuit comprises a third microstrip line (TL3), a fourth microstrip line (TL4), a fifth microstrip line (TL5), a sixth microstrip line (TL6), an eighth microstrip line (TL8), a ninth microstrip line (TL9), and a tenth microstrip line (TL10); the input end of the third microstrip line (TL3) is connected to the input end of the fourth microstrip line (TL4); the output end of the third microstrip line (TL3) is open; the input end of the fourth microstrip line (TL4) is connected to the input end of the second capacitor (C2); the output end of the second capacitor (C2) is respectively connected to the input end of the fifth microstrip line (TL5), the input end of the sixth microstrip line (TL6), and the input end of the eighth microstrip line (TL8); and the output end of the fifth microstrip line (TL5) is open. The output end of the sixth microstrip line (TL6) is connected to the input end of the gate DC feed network (2); the output end of the eighth microstrip line (TL8) is respectively connected to the input end of the ninth microstrip line (TL9), the input end of the tenth microstrip line (TL10), and the input end of the RC stabilization circuit; the output end of the ninth microstrip line (TL9) and the output end of the tenth microstrip line (TL10) are both open circuits; The system input end is respectively connected to the input end of the third microstrip line (TL3) of the π-shaped matching circuit; the output end of the RC stabilization circuit is connected to the gate of the transistor (5); The values ​​of a second resistor (R2) and a third capacitor (C3) in the RC stabilization circuit are determined according to the operating point of the transistor; the second resistor (R2) of the RC stabilization circuit is 10Ω; and the third capacitor (C3) is 10pF.

4. The filtered class F power amplifier based on a multimode resonator according to claim 1, characterized in that: The gate DC feeding network (2) comprises a first resistor (R1), a seventh microstrip line (TL7) and a first filter capacitor group; the first filter capacitor group is three parallel decoupling capacitors; the input end of the first resistor (R1) is connected to the input end of the gate DC feeding network (2); the output end of the first resistor (R1) is connected to the input end of the seventh microstrip line (TL7); The output end of the seventh microstrip line (TL7) is connected to the input end of the first filter capacitor group and the first external DC power supply (Vgs) respectively; the output end of the first filter capacitor group is grounded; in order to separate the DC signal from the radio frequency signal, the length of the seventh microstrip line (TL7) is 0.25λ g .

5. The filtered class F power amplifier based on a multi-mode resonator according to claim 1, characterized in that: The drain DC feeding network (3) comprises a second filter capacitor group and a fifteenth microstrip line (TL15); the second filter capacitor group is three parallel-connected decoupling capacitors; the input end of the drain DC feeding network (3) is connected to the input end of the fifteenth microstrip line (TL15); the output end of the fifteenth microstrip line (TL15) is respectively connected to the input end of the second filter capacitor group and a second external DC power supply (Vds); and the output end of the second filter capacitor group is grounded.

6. The filtered class F power amplifier based on a multimode resonator according to claim 1, characterized in that: The harmonic suppression network (4) comprises a thirteenth microstrip line (TL13), a fourteenth microstrip line (TL14), a sixteenth microstrip line (TL16) and a fourth capacitor (C4); the input end of the thirteenth microstrip line (TL13) is connected to the drain of the transistor (5); the output end of the thirteenth microstrip line (TL13) is respectively connected to the input end of the fourteenth microstrip line (TL14), the input end of the sixteenth microstrip line (TL16) and the input end of the drain DC feed network (3); the output end of the fourteenth microstrip line (TL14) is open; the output end of the sixteenth microstrip line (TL16) is connected to the input end of the fourth capacitor (C4); the output end of the fourth capacitor (C4) is connected to the input end of the filter matching network (6); the length of the thirteenth microstrip line (TL13) is 0.25λ g .

7. The filtered class F power amplifier based on a multi-mode resonator according to claim 3, characterized in that: A first microstrip line (TL1), a first capacitor (C1), and a second microstrip line (TL2) are sequentially connected in series between the system input end and the input end of the third microstrip line (TL3) of the π-shaped matching circuit; an eleventh microstrip line (TL11) is serially connected between the output end of the RC stabilization circuit and the gate of the transistor (5); a twelfth microstrip line (TL12) is serially connected between the input end of the thirteenth microstrip line (TL13) and the drain of the transistor (5); and a seventeenth microstrip line (TL17), a fifth capacitor (C5), and an eighteenth microstrip line (TL18) are sequentially connected in series between the output end of the fourth capacitor (C4) and the input end of the filter matching network (6).

8. The filtered class F power amplifier based on a multi-mode resonator according to claim 2, characterized in that: The ideal frequency response of the filter matching network (6) is obtained according to the coupling matrix synthesis method, and the steps for obtaining the dimensions of each microstrip line of the filter matching network (6) are as follows: In order to make the input impedance of the filter matching network (6) equal to the output impedance of the harmonic suppression network (4), the impedance Z of the input end of the filter matching network (6) is designed. in Set as complex impedance, i.e. Z in =Re+j×Im, where Re is the input impedance Z in The real part of the input terminal; Im is the impedance Z in The imaginary part of According to the operating frequency of the filter matching network (6), the size of the three-mode cross-shaped structure in the filter matching network (6) is determined by using the odd-even mode analysis method. The relationship between the electrical lengths of the three-mode cross-shaped structure is: cotθ L5+L8+L9 =0 (7) cotθ L11 -tanθ L5+L8+L9 -tanθ L10 =0 (8) where θ L11 is the electrical length of the eleventh microstrip line (TL11), θ L5+L8+L9 is the sum of the electrical lengths of the fifteenth microstrip line (TL5), the eighth microstrip line (TL8), and the ninth microstrip line (TL9), θ L10 is the electrical length of the tenth microstrip line (TL10); According to formula (7) and formula (8), the electrical length of the three-mode cross-shaped structure is obtained by the given operating frequency of the filter matching network (6); According to the external quality factor Q e determining a size of the first resonator and a size of the fifth resonator; in f1 is the resonant frequency of the first resonator in the filter matching network (6), τ(f1) is the group delay; Optimizing the size of the nineteenth microstrip line (TL19), the size of the twenty-fourth microstrip line (TL24), and the size of the twenty-fifth microstrip line (TL25) through simulation software; According to the coupling matrix synthesis method, the coupling matrix of the filter matching network (6) is expressed as: Among them, M Si is the coupling coefficient between the input end of the filter matching network (6) and the first resonator, the second resonator, the third resonator, the fourth resonator, and the fifth resonator, M iL is the coupling coefficient between the output end of the filter matching network (6) and the first resonator, the second resonator, the third resonator, the fourth resonator, and the fifth resonator, i=1, 2, 3, 4, 5; According to the ideal frequency response curve obtained from the coupling matrix, the size of the nineteenth microstrip line (TL19), the size of the twentieth microstrip line (TL20), the size of the twenty-first microstrip line (TL21) and the size of the twentieth microstrip line (TL20) are calculated using simulation software, and finally a filter structure that meets the design indicators is obtained.

9. The filtered class F power amplifier based on a multi-mode resonator according to claim 3, characterized in that: The steps to determine the output impedance of the π-matching circuit are: Selecting multiple frequency points within the passband to perform load pulling and source pulling, and obtaining a high efficiency range and a high gain range of the transistor (5) at different frequency points; determining the optimal impedance of the drain and the optimal impedance of the gate of the transistor (5) based on the high efficiency range and the high gain range; and simulating the output impedance of the π-shaped matching circuit using simulation software based on the optimal impedance of the drain and the optimal impedance of the gate of the transistor (5), so that the output impedance is conjugate with the optimal impedance, thereby obtaining a π-shaped matching circuit that meets the requirements; The dimensions of each microstrip line after simulation of the π-shaped matching circuit are: The size of the first microstrip line (TL1) is 2 / 3.18; the size of the second microstrip line (TL2) is 1 / 2.54; the size of the third microstrip line (TL3) is 1.87 / 7.35; the size of the fourth microstrip line (TL4) is 1.5 / 16.6; the size of the fifth microstrip line (TL5) is 1.2 / 13.67; the size of the sixth microstrip line (TL6) is 1.5 / 4.94; the size of the seventh microstrip line (TL7) is 3.95 / 15.58; the size of the eighth microstrip line (TL8) is 3.33 / 5.32; the size of the ninth microstrip line (TL9) is 6.35 / 11.63; the size of the tenth microstrip line (TL10) is 6.35 / 11.63; the size of the eleventh microstrip line (TL11) is 6.35 / 8.7; the size of the microstrip line is the ratio of the width to the length of the microstrip line.

10. The filtered class F power amplifier based on a multi-mode resonator according to claim 6, characterized in that: According to the high-efficiency output impedance of the transistor (5), the steps for calculating the size of each microstrip line and the value of the capacitance of the output harmonic suppression network (4) are as follows: The input impedance of the filter matching network (6) is optimally matched to the drain of the transistor (5); The harmonic suppression network (4) is used to control the impedance of the higher harmonics at the drain of the transistor (5); The electrical length θ of the thirteenth microstrip line (TL13) in the harmonic suppression network (4) TL13 , the electrical length θ of the fourteenth microstrip line (TL14) TL14 , the electrical length θ of the sixteenth microstrip line (TL16) TL16 、The characteristic impedance Z of the thirteenth microstrip line (TL13)d TL13 , the characteristic impedance Z of the fourteenth microstrip line (TL14) TL14 and the characteristic impedance Z of the sixteenth microstrip line (TL16) TL16 The steps to determine are: The impedance Z from the fifth capacitor (C5) to the input of the filter matching network (6) is D for: WITH D =Z C5 +Z out (1) Z C5 is the impedance of the fifth capacitor (C5); Z out is the input impedance of the filter matching network 5; The impedance Z from the fourth capacitor (C4) to the input of the filter matching network (6) C for: WITH C =Z C4 +Z D (2) Z C4 is the impedance of the fourth capacitor (C4); The point where the output end of the thirteenth microstrip line (TL13), the input end of the fourteenth microstrip line (TL14), the input end of the fifteenth microstrip line (TL15) and the input end of the sixteenth microstrip line (TL16) are connected is defined as point B; The impedance Z from point B to the sixteenth microstrip line (TL16) B1 for: j is the imaginary unit; The length of the fifteenth microstrip line (TL15) is 0.25λ g , the input impedance Z from point B to the fifteenth microstrip line (TL15) B2 It is equivalent to an open circuit, so Z B2 =∞, the impedance from point B to the fourteenth microstrip line (TL14) is Z B3 , The input impedance of point B is the parallel impedance Z of the input end of the fourteenth microstrip line (TL14), the input end of the fifteenth microstrip line (TL15) and the input end of the sixteenth microstrip line (TL16). B for: The input impedance from the transistor drain to the load is Z in : As long as the output impedance of the transistor drain matches the fundamental and harmonic impedances of the optimal impedance obtained by load pulling, a power amplifier that meets the design specifications can be obtained, that is, it needs to meet the following requirements: is the output impedance of the transistor drain; According to formulas (1) to (6), the electrical length of each microstrip line in the harmonic suppression network (4) and the input impedance of the input end of the filter matching network (6) are calculated and determined; The length and width of each microstrip line are calculated using simulation software based on the electrical length and input impedance, ultimately obtaining the specific dimensions of each microstrip line in the harmonic suppression network: The size of the twelfth microstrip line (TL12) is 1.56 / 1.6; the size of the thirteenth microstrip line (TL13) is 8 / 4.23; the size of the fourteenth microstrip line (TL14) is 4 / 6, the size of the fifteenth microstrip line (TL15) is 1.2 / 22, the size of the sixteenth microstrip line (TL16) is 4.72 / 10.72, the size of the seventeenth microstrip line (TL17) is 4 / 2, and the size of the eighteenth microstrip line (TL18) is 1 / 3.34.

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