Etching method for improving steepness of pattern structure and grating mother set

Abstract

The invention relates to the technical field of semiconductor device manufacturing, in particular to an etching method for improving the steepness of a graphic structure and a grating master mask, and the etching method comprises the following steps: S1, forming a graphic photoresist layer on the surface of a substrate; s2, the patterned photoresist layer is used as a masking layer, and the substrate is etched; wherein etching gas adopted in the etching process comprises SF6, Ar and CF4, the flow ratio of the SF6 to the Ar to the CF4 is (1-4): (1.5-4): 1, the radio frequency power of the etching process is 150-400 W, and the cavity pressure is 5-20 mTorr; and S3, the patterned photoresist layer is removed, and the patterned substrate is obtained. According to the method, the fluorocarbon polymer is generated in the etching process to protect the side wall, the vertical etching effect is completed while the morphology of the side wall is protected, the steepness of the side wall can reach 85-90 degrees, the etching steepness is greatly improved, the etching quality of a high-resolution pattern is improved, and a high-precision pattern structure is obtained.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor device manufacturing, in particular to an etching method and a grating master for improving the steepness of a graphic structure. Background Art

[0002] A micro-nano grating is a micro-nano optical element formed by etching a stepped or continuous relief structure onto a substrate or the surface of a conventional optical device using ultra-large-scale integrated circuit (VLSI) manufacturing processes. With the advancement of semiconductor technology, the characteristic dimensions of micro-nano gratings have reached the nanometer level. Fabrication methods for micro-nano grating structures include laser direct writing, ultraviolet lithography, electron beam lithography, and nanoimprinting. In nanoimprinting, the fabrication process for micro-nano grating structures uses a grating master as a grating imprint template. The grating master has a grating pattern on it, and the grating pattern on the grating master is transferred to the substrate through multiple nanoimprinting steps.

[0003] Currently, high-precision grating masters are typically produced using a combination of electron beam lithography and dry etching. Dry etching parameters directly impact the grating master's accuracy, sidewall verticality, and roughness. When the grating pattern period is small, such as less than 130nm, the sidewalls of the pattern structure etched using existing dry etching methods become less steep, with sidewall steepness falling below 80°. This increases the CD (critical dimension), making it difficult to etch downward and unable to reach the desired depth, resulting in low precision of the prepared grating master. Therefore, improving sidewall steepness during dry etching is currently a challenging issue. Summary of the Invention

[0004] The purpose of the present invention is to solve the problem of low sidewall steepness and increased CD of the graphic structure etched by the existing dry etching method, and to provide an etching method and a grating master for improving the steepness of the graphic structure.

[0005] In a first aspect, the present invention provides an etching method for improving the steepness of a pattern structure, comprising the following steps: S1, forming a patterned photoresist layer on the surface of the substrate; S2, etching the substrate using the patterned photoresist layer as a masking layer; wherein the etching gas used in the etching comprises SF6, Ar, and CF4, the flow ratio of SF6, Ar, and CF4 is 1-4:1.5-4:1, the RF power of the etching is 150-400W, and the chamber pressure is 5-20mTorr; S3, removing the patterned photoresist layer to obtain the patterned substrate.

[0006] As a preferred solution of the present invention, a hard mask layer is further provided between the substrate and the patterned photoresist layer, and the material of the hard mask layer is one of silicon dioxide, chromium, molybdenum, and silicon nitride.

[0007] As a preferred solution of the present invention, the etching rate in the etching process of step S2 is controlled to be 0.75-1 nm / s.

[0008] As a preferred solution of the present invention, during the etching process of step S2, the flow rate range of SF6 is 4-20 sccm, the flow rate range of Ar is 4-20 sccm, and the flow rate range of CF4 is 2-10 sccm.

[0009] As a preferred solution of the present invention, CF4 in the etching gas is replaced by C4F8; the flow ratio of SF6, Ar and C4F8 is 1~2:1~2:1.

[0010] As a preferred solution of the present invention, CF4 in the etching gas is replaced by C4F6; the flow ratio of SF6, Ar and C4F6 is 1~3:1~3:1.

[0011] As a preferred embodiment of the present invention, the patterned photoresist layer has a grating pattern, the etching depth is 80 to 100 nm, and the grating period is 76 to 250 nm.

[0012] As a preferred solution of the present invention, the etching equipment is a reactive ion etching equipment, the radio frequency power of the etching is 200-300W, and the chamber pressure is 5-10mTorr.

[0013] As a preferred embodiment of the present invention, the flow ratio of SF6, Ar and CF4 is 2~3:2~3:1.

[0014] In a second aspect, the present invention provides a grating master, which is prepared by using the above-mentioned etching method for improving the steepness of the pattern structure.

[0015] Compared with the prior art, the present invention has the following beneficial effects: The present invention provides an etching method for improving the steepness of a graphic structure. First, a graphic photoresist layer is formed on a substrate. The graphic photoresist layer is used as a masking layer to etch the substrate. The etching gas includes a fluorine-containing gas. The etching process generates an etching byproduct - a fluorocarbon polymer. The fluorocarbon polymer can protect the sidewalls, thereby achieving the effect of protecting the sidewall morphology while completing the vertical etching, etching a graphic structure with a high steepness, and greatly improving the etching steepness. 2. The etching method for improving the steepness of a graphic structure of the present invention is used to prepare a grating master. Experimental verification shows that the prepared grating master has a flat surface, smooth sidewalls with high verticality, and a sidewall steepness of up to 85-90°. The structural area height and sidewall steepness of the grating master graphic structure both meet the requirements of subsequent process applications.

[0016] 3. The etching method of the present invention for improving the steepness of the graphic structure can improve the steepness of the sidewall of the etched graphic and obtain a graphic structure that meets performance requirements. This method not only improves production efficiency but also reduces production costs and is very suitable for the industrial preparation of nano-level micro-nano structures. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 A schematic flow chart of an etching method for improving the steepness of a pattern structure according to the present invention; Figure 2 This is a schematic diagram of etching in the etching method for improving the steepness of the graphic structure of the present invention; Figure 3 This is a scanning electron microscope image of the upper surface of the grating master in Example 1 of the present disclosure; Figure 4 is a scanning electron microscope image of a cross section of the grating master in Example 1 of the present disclosure; Figure 5 is a scanning electron microscope image of a cross section of the grating master in Example 2 of the present disclosure; Figure 6 is a scanning electron microscope image of a cross section of the grating master in Example 3 of the present disclosure; Figure 7 This is a scanning electron microscope image of a cross section of the grating master in Comparative Example 1 of the present disclosure; Figure 8 This is a scanning electron microscope image of a cross section of the grating master in Comparative Example 2 of the present disclosure; Figure 9 This is a scanning electron microscope image of a cross section of the grating master in Comparative Example 3 of the present disclosure; Figure 10 This is a scanning electron microscope image of a cross section of the grating master in Comparative Example 4 of the present disclosure; Markings in the figure: 1-substrate, 2-patterned photoresist layer. DETAILED DESCRIPTION

[0018] The present invention will be further described in detail below with reference to specific embodiments. However, this should not be construed as limiting the scope of the present invention to the following embodiments, as all technologies implemented based on the present invention fall within the scope of the present invention.

[0019] The present disclosure provides an etching method for improving the steepness of a pattern structure, such as Figure 1 As shown, the following steps are included: S1, forming a patterned photoresist layer 2 on the surface of a substrate 1; S2, etching the substrate 1 using the patterned photoresist layer 2 as a mask layer; wherein the etching gases used include sulfur hexafluoride (SF6), argon (Ar) and carbon tetrafluoride (CF4), the flow ratio of SF6, Ar and CF4 is 1-4:1.5-4:1, the etching RF power is 150-400W, and the chamber pressure is 5-20mTorr; S3, removing the patterned photoresist layer 2 to obtain a patterned substrate 1.

[0020] In the above technical solution, a patterned photoresist layer is first formed on the substrate, and the patterned photoresist layer is used as a masking layer to dry-etch the substrate. The etching gases are SF6, Ar, and CF4. SF6 and CF4 are active gases that react chemically with the substrate. Ar is an auxiliary gas that can reduce the residence time of the plasma in the chamber, thereby inhibiting the further dissociation of CF4, thereby increasing the concentration of CF4 in the plasma and improving the anisotropy of the etching. CF4 helps to improve the selectivity of the etching and forms a protective layer on the sidewalls to achieve highly anisotropic etching. During the etching process, CF4 dissociates into CF3 radicals and fluorine radicals. The CF3 radicals then adsorb onto the surface of the substrate and react with the substrate to generate reaction products. As the reaction product atoms detach from the substrate surface and etch, the CF3 radicals also form fluorocarbon polymers. Fluorocarbon polymers, as etching by-products, will be deposited on the bottom and sidewalls of the etched grooves. Figure 2 As shown, the yellow color represents fluorocarbon polymer. Covering the sidewalls with fluorocarbon polymer significantly reduces the etching rate. Because the ion beam is incident perpendicularly on the substrate surface, the ions remove the fluorocarbon polymer at the bottom of the groove and etch vertically through reactions between the exposed material to be etched, ions, and free radicals. Ions have difficulty entering the groove sidewalls, preventing the fluorocarbon polymer from being removed and retaining it. Consequently, the sidewalls are protected by the fluorocarbon polymer. Fluoride ions, fluorine radicals, and fluorocarbon polymer are removed by adjusting the etching parameters. During the etching process, the flow ratio of SF6, Ar, and CF4 in the mixed gas is controlled between 1:4:1.5:4:1, and the etching parameters are controlled. The RF power is between 150 and 400 W, and the chamber pressure is between 5 and 20 mTorr. This achieves the effect of protecting the sidewall morphology while completing the vertical etching. This results in a highly steep feature, with sidewall steepness reaching 85 to 90°. This improves the etching quality of high-resolution features and produces high-precision features.

[0021] In some embodiments, the substrate is a silicon substrate, and etching is performed on the silicon substrate to obtain a pattern structure for preparing a grating master.

[0022] In some embodiments, before forming a patterned photoresist layer, before forming a photoresist layer on the upper surface of the substrate, the substrate is cleaned to remove impurities such as particles, impure metals, impure oxides, and organic pollutants on the substrate surface. The cleaning method includes ultrasonic cleaning using distilled water, ethanol, acetone and other solvents for 10 to 80 minutes, or soaking in piranha solution (concentrated sulfuric acid + hydrogen peroxide) or SC-1 (ammonia water + hydrogen peroxide + water) and SC-2 (hydrochloric acid + hydrogen peroxide + water) cleaning solutions for 1 to 20 hours, and then rinsing with deionized water.

[0023] In some embodiments, the patterned photoresist layer is formed by applying a photoresist material to a substrate by spin coating or spray coating, exposing the material to the substrate by electron beam direct writing, and then developing the material to form the patterned photoresist layer. Electron beam direct writing exposure uses a focused high-energy electron beam to write a designed pattern structure on the photoresist layer. The beam current of the electron beam direct writing exposure is 1 to 15 nA; the dose of the electron beam exposure is 50 to 400 μC / cm 2 .

[0024] The photoresist material is a negative photoresist, and the model used is one of AZ 4620, ZD-9060, ZEP 520A, UV135, AR-P 6200, PMMA, AR-N7520 and AR-P 546.

[0025] In some embodiments, the patterned photoresist layer has a thickness of 60 to 120 nm. During the etching process, the patterned photoresist layer serves as a masking layer for etching, and the photoresist layer also serves as an anti-etching layer. During the etching process, the thickness of the photoresist layer continuously decreases. The thickness of the photoresist layer ranges from 60 to 120 nm. The thickness should not be too small or too large, otherwise the accuracy of the pattern structure transfer at the nanoscale will be reduced. More preferably, the thickness of the patterned photoresist layer is 90 to 110 nm.

[0026] In some embodiments, a hard mask layer is further disposed between the substrate and the patterned photoresist layer. The photoresist material is typically a CH compound. The hard mask layer, disposed between the substrate and the patterned photoresist layer, serves as an enhanced etch barrier. When the etching selectivity is relatively low, the hard mask layer improves the accuracy of the transferred pattern structure. More specifically, the hard mask layer has the same pattern structure as the patterned photoresist layer.

[0027] In some embodiments, the hard mask layer is made of one of silicon dioxide, chromium, molybdenum, silicon nitride, and the like. When silicon dioxide is used, the hard mask layer has a thickness of 5 to 30 nm; when chromium is used, the hard mask layer has a thickness of 10 to 40 nm. This thickness range helps prevent the etching process from wearing away the photoresist layer, allowing the pattern structure to be transferred to the substrate. When other hard mask layers are used, a thickness commonly used in the art is used to ensure the accuracy of the transferred pattern structure.

[0028] In some embodiments, the hard mask layer is formed by forming a hard mask layer on a substrate using one of the methods selected from magnetron sputtering, electron beam evaporation, physical vapor deposition (PVD), chemical vapor deposition (CVD), and plasma enhanced chemical vapor deposition (PECVD), and forming a patterned photoresist layer on the hard mask layer; then, using the patterned photoresist layer as a masking layer, dry etching the hard mask layer to transfer the patterned structure on the patterned photoresist layer to the hard mask layer, and then etching the substrate.

[0029] In some embodiments, dry etching is used to form the pattern structure of the hard mask layer. The dry etching method can be selected from one of inductively coupled plasma etching, reactive ion etching, or ion beam etching. The dry etching method for preparing the hard mask layer adopts conventional methods in the art and is not described in detail.

[0030] In some embodiments, in step S2, the etching rate during the etching process is controlled to be 0.75-1 nm / s. The etching rate during the etching process is critical to the etching quality. In the present technical solution, the etching rate adopted is 0.75-1 nm / s. Using this etching rate range facilitates fine control of the etching process, helps reduce damage and defects on the substrate surface, makes the etched substrate surface smoother and flatter, avoids the increase in surface roughness caused by an excessively fast etching rate, and better controls the etching depth and sidewall profile, thereby improving the steepness of the sidewall and achieving precise pattern transfer.

[0031] In some embodiments, during the etching process of step S2, the flow rate of SF6 is in the range of 4-20 sccm, the flow rate of Ar is in the range of 4-20 sccm, and the flow rate of CF4 is in the range of 2-10 sccm. More preferably, the flow rate of SF6 is in the range of 6-15 sccm, the flow rate of Ar is in the range of 6-15 sccm, and the flow rate of CF4 is in the range of 3-5 sccm.

[0032] In some embodiments, CF4 in the etching gas is replaced with C4F8 (octafluorocyclobutane), and the flow ratio of SF6, Ar, and C4F8 is 1-2:1-2:1.

[0033] In some embodiments, CF4 in the etching gas is replaced with C4F6 (perfluorobutadiene); the flow ratio of SF6, Ar, and C4F6 is 1-3:1-3:1.

[0034] In the above-mentioned technical solution, the CF4 in the etching gas is replaced with C4F8 or C4F6. During the etching process, C4F8 or C4F6 dissociates in the plasma to form CF and CF2, which adsorb on the etched surface to form fluorocarbon polymers, thereby covering the etched surface with the fluorocarbon polymer. Because the ion beam is incident vertically on the substrate surface, the ions remove the fluorocarbon polymers on the flat surface, but the ions have difficulty entering the sidewalls of the pattern, so the fluorocarbon polymers are not removed and remain. The sidewalls are protected by the fluorocarbon polymers, and the fluorine ions, fluorine radicals, and fluorocarbon polymers are ultimately removed by controlling the etching parameters. Therefore, when the etching gas is SF6, Ar, and C4F8 or SF6, Ar, and C4F6, the flow ratio of the mixed gas and the etching parameters are controlled to achieve the effect of protecting the sidewall morphology while completing the vertical etching, etching a pattern structure with a higher steepness.

[0035] In some embodiments, the patterned photoresist layer has a grating pattern, the etching depth is 80-100 nm, and the grating period is 76-250 nm.

[0036] In some embodiments, the etching equipment is a reactive ion etching (RIE) equipment. RIE etching equipment utilizes reactive ion etching technology, which combines chemical etching and physical sputtering mechanisms. During the etching process, etching gas is introduced into the etching chamber and excited by a high-frequency electric field to generate a plasma. The active gas molecules in the plasma chemically react with the silicon surface, generating volatile products that are expelled. Simultaneously, the positive ions in the plasma are accelerated by the electric field to bombard the silicon surface, providing directional control and making the etching anisotropic.

[0037] Based on the above embodiment, the RF power of the RIE etching equipment is 200-300W, and the chamber pressure is 5-10mTorr. RF power affects the ion density and energy in the plasma. High RF power can produce high-density, high-energy ions, resulting in a fast etching rate, but may cause increased substrate temperature and surface damage. Low RF power results in a slow etching rate, but less damage to the substrate. The chamber pressure reflects the etching gas pressure. At low pressure, the free path of gas molecules is longer, the ion energy distribution in the plasma is narrower, and the etching has better anisotropy. At high pressure, the free path is shorter, the probability of gas molecule collisions increases, the ion energy distribution in the plasma is wider, and the etching rate first increases and then decreases. During etching, by controlling the proportion of the etching gas and the etching parameters, the RF power of the RIE etching equipment is 200-300W, and the chamber pressure is 5-10mTorr, which is more conducive to etching the depth of the designed graphic structure and improving the etching quality of high-resolution graphics.

[0038] Based on the above embodiment, the flow ratio of SF6, Ar and CF4 is 2~3:2~3:1.

[0039] In some embodiments, during the etching process in step S2, the electrode temperature is room temperature. The electrode temperature affects the adsorption and reaction rate of the reactant gases during etching, as well as the desorption of etching products. A too high electrode temperature may soften or deform mask materials such as photoresist; a too low electrode temperature may cause etching products to condense on the substrate surface, affecting the etching effect. Specifically, the electrode temperature employed is 20±2°C, which ensures the progress of the etching chemical reaction and the separation of volatile etching products.

[0040] In step S3, the photoresist layer is removed using a degumming solution, which is one or more of ethyl chloride, chloroform, acetone, sulfuric acid, or acidic oxygen water. The etched substrate is immersed in the degumming solution, and the photoresist material gradually dissolves. After the photoresist material is completely dissolved, it is removed and cleaned with deionized water. Preferably, an oxygen plasma degumming machine is used to further remove residual glue.

[0041] When a hard mask layer is placed between the substrate and the patterned photoresist layer, wet etching is used to remove the hard mask layer, typically using a buffered hydrofluoric acid (BHF) or buffered oxide (BOE) etchant. BHF, whose main components are hydrofluoric acid and nitric acid, corrodes and dissolves the hard mask material. The specific method is to immerse the substrate in the BHF solution, controlling the immersion time and temperature. After the hard mask layer is completely etched away, it is removed and cleaned. The main components of BOE etchant are HF (hydrofluoric acid) and NH4F (ammonium fluoride), usually in a ratio of 6:1 or higher.

[0042] The disclosed embodiment further provides a grating master, which is prepared using the above-mentioned etching method for improving the steepness of the graphic structure. The grating master is used as a nanoimprint template for preparing gratings by nanoimprinting.

[0043] In some embodiments, the substrate has a thickness of 0.5-1 mm.

[0044] Example 1: This embodiment provides a grating master plate, which is prepared by using the above-mentioned etching method for improving the steepness of the pattern structure, including the following steps: S1, select 800μm thick 2-inch p-type <100> The silicon wafer with the same crystal orientation is used as the silicon substrate, and the silicon substrate is ultrasonically cleaned with distilled water + propanol for 30 to 60 minutes; The photoresist material AR-P 6200 was poured onto the silicon substrate and spin-coated at a speed of 400-600 rpm for 30 seconds. The photoresist material was heated at 100°C for 10 minutes to cure and form a photoresist layer with a thickness of 80 nm. The photoresist layer was exposed to electron beam direct writing with an exposure dose of 200 μC / cm 2 , the current is 12nA, after the exposure is completed, development and fixing are performed to obtain a patterned photoresist layer, the pattern structure is a grating pattern with a period of 76nm; S2, placing the silicon substrate into the RIE etching equipment, using the patterned photoresist layer as a mask layer, and etching the silicon substrate according to the etching depth; the etching gases include SF6, Ar and CF4, and the specific etching parameters are shown in Table 1, where the etching time is the total etching time.

[0045] S3, using a stripping solution to remove the patterned photoresist layer to obtain a grating master.

[0046] Table 1 Etching parameters of silicon substrate in Example 1

[0047] The prepared patterned grating master was analyzed using a scanning electron microscope. Figure 3 、 Figure 4 The scanning electron microscope images of the upper surface and cross-section of the grating master respectively show that the surface of the grating master is flat, the side walls are smooth and the verticality is high; according to the grating pattern observed in the scanning image, the height of the structure area and the steepness of the side walls were tested, and the height of the structure area was 72.1nm and the steepness was 90°.

[0048] Example 2: This embodiment provides a grating master plate, which is prepared by using the above-mentioned etching method for improving the steepness of the pattern structure, including the following steps: S1, select 800μm thick 2-inch p-type <100> The silicon wafer with the same crystal orientation is used as the silicon substrate, and the silicon substrate is ultrasonically cleaned with distilled water + propanol for 30 to 60 minutes; The photoresist material AR-P 6200 was poured onto the silicon substrate and spin-coated at a speed of 400-600 rpm for 30 seconds. The photoresist material was heated at 100°C for 10 minutes to cure and form a photoresist layer with a thickness of 80 nm. The photoresist layer was exposed to electron beam direct writing with an exposure dose of 200 μC / cm 2 , the current is 12nA, after the exposure is completed, development and fixing are performed to obtain a patterned photoresist layer, the pattern structure is a grating pattern with a period of 130nm; S2, placing the silicon substrate into the RIE etching equipment, using the patterned photoresist layer as a mask layer, and etching the silicon substrate according to the etching depth; the etching gases include SF6, Ar and CF4, and the specific etching parameters are shown in Table 2.

[0049] S3, using a stripping solution to remove the patterned photoresist layer to obtain a grating master.

[0050] Table 2 Etching parameters of silicon substrate in Example 2

[0051] The scanned image of the prepared patterned grating master is as follows Figure 5 As shown, the test results show that the height of the structure area is 75.3nm and the side wall steepness is 85°.

[0052] Example 3: This embodiment provides a grating master plate, which is prepared by using the above-mentioned etching method for improving the steepness of the pattern structure, including the following steps: S1, select 800μm thick 2-inch p-type <100> The silicon wafer with the same crystal orientation is used as the silicon substrate, and the silicon substrate is ultrasonically cleaned with distilled water + propanol for 30 to 60 minutes; The photoresist material AR-P 6200 was poured onto the silicon substrate and spin-coated at a speed of 400-600 rpm for 30 seconds. The photoresist material was heated at 100°C for 10 minutes to cure and form a photoresist layer with a thickness of 80 nm. The photoresist layer was exposed to electron beam direct writing with an exposure dose of 200 μC / cm 2 , the current is 12nA, after the exposure is completed, development and fixing are performed to obtain a patterned photoresist layer, the pattern structure is a grating pattern with a period of 90nm; S2, placing the silicon substrate into the RIE etching equipment, using the patterned photoresist layer as a mask layer, and etching the silicon substrate according to the etching depth; the etching gases include SF6, Ar and CF4, and the specific etching parameters are shown in Table 3.

[0053] S3, using a stripping solution to remove the patterned photoresist layer to obtain a grating master.

[0054] Table 3 Etching parameters of silicon substrate in Example 3

[0055] The scanned image of the prepared patterned grating master is as follows Figure 6 As shown, the test results show that the height of the structure area is 87.3nm and the steepness of the side wall is 87°.

[0056] Comparative Example 1: This comparative example provides a grating motherboard, and the etching method includes the following steps: S1, forming a patterned photoresist layer on the surface of the silicon substrate. The silicon substrate, patterned photoresist layer and forming method used are the same as those in Example 1, and the pattern structure on the patterned photoresist layer is the same as that in Example 1.

[0057] S2, placing the silicon substrate into the etching equipment, using the patterned photoresist layer as a mask layer, and etching the silicon substrate according to the etching depth. The etching gas includes SF6. The specific parameters of the etching process are shown in Table 4.

[0058] S3, using a stripping solution to remove the patterned photoresist layer to obtain a grating master.

[0059] Table 4 Etching parameters of silicon substrate in Comparative Example 1

[0060] Comparative Example 2: This comparative example provides a grating motherboard, and the etching method includes the following steps: S1, forming a patterned photoresist layer on the surface of the silicon substrate. The silicon substrate, patterned photoresist layer and forming method used are the same as those in Example 1, and the pattern structure on the patterned photoresist layer is the same as that in Example 1.

[0061] S2, placing the silicon substrate into the etching equipment, using the patterned photoresist layer as a mask layer, and etching the silicon substrate according to the etching depth. The etching gases include SF6, Ar and CHF3. The specific parameters of the etching process are shown in Table 5.

[0062] S3, using a stripping solution to remove the patterned photoresist layer to obtain a grating master.

[0063] Table 5 Etching parameters of silicon substrate in Comparative Example 2

[0064] Comparative Example 3: This comparative example provides a grating motherboard, and the etching method includes the following steps: S1, forming a patterned photoresist layer on the surface of the silicon substrate. The silicon substrate, patterned photoresist layer and forming method used are the same as those in Example 1, and the pattern structure on the patterned photoresist layer is the same as that in Example 1.

[0065] S2, placing the silicon substrate into the etching equipment, using the patterned photoresist layer as a mask layer, and etching the silicon substrate according to the etching depth. The etching gases include SF6, Ar and CHF3. The specific parameters of the etching process are shown in Table 6.

[0066] S3, using a stripping solution to remove the patterned photoresist layer to obtain a grating master.

[0067] Table 6 Etching parameters of silicon substrate in Comparative Example 3

[0068] Comparative Example 4: This comparative example provides a grating motherboard, and the etching method includes the following steps: S1, forming a patterned photoresist layer on the surface of the silicon substrate. The silicon substrate, patterned photoresist layer and forming method used are the same as those in Example 1, and the pattern structure on the patterned photoresist layer is the same as that in Example 1.

[0069] S2, placing the silicon substrate into the etching equipment, using the patterned photoresist layer as a mask layer, and etching the silicon substrate according to the etching depth. The etching gases include SF6, Ar and CHF3. The specific parameters of the etching process are shown in Table 7.

[0070] S3, using a stripping solution to remove the patterned photoresist layer to obtain a grating master.

[0071] Table 7 Etching parameters of silicon substrate in Comparative Example 4

[0072] The grating masters prepared in Comparative Examples 1-4 were analyzed using a scanning electron microscope. Figure 7 、 Figure 8 、 Figure 9 、 Figure 10 As shown, the test results of the structural area height and side wall steepness are shown in Table 8.

[0073] Table 8 Results of the structure area height and sidewall steepness of the grating master prepared in Comparative Examples 1-4

[0074] From the data in Table 8, it can be seen that in terms of the structure area height, Example 1 reaches 72.1 nm, while the structure area heights of Comparative Examples 1 to Comparative Examples 4 are 10 nm, 20 nm, 62 nm and 50 nm, respectively. In terms of sidewall steepness, Example 1 reaches 90°, while the sidewall steepnesses of Comparative Examples 1 to Comparative Examples 4 are 63°, 67°, 78° and 75°, respectively. The grating master pattern structures prepared by the methods of Comparative Examples 1-4 all show poor structure area heights, and the sidewall steepness is less than 80°. However, the structure area height and sidewall steepness of the grating master pattern structure prepared by the method of Example 1 are significantly improved, and meet the requirements of subsequent process applications.

[0075] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. An etching method for improving the steepness of a pattern structure, characterized in that: The following steps are involved: S1, forming a patterned photoresist layer on the surface of the substrate; S2, etching the substrate using the patterned photoresist layer as a masking layer; wherein the etching gas used in the etching comprises SF6, Ar, and CF4, the flow ratio of SF6, Ar, and CF4 is 1-4:1.5-4:1, the RF power of the etching is 150-400W, and the chamber pressure is 5-20mTorr; S3, removing the patterned photoresist layer to obtain the patterned substrate.

2. The etching method for improving the steepness of a pattern structure according to claim 1, characterized in that: A hard mask layer is further provided between the substrate and the patterned photoresist layer. The material of the hard mask layer is one of silicon dioxide, chromium, molybdenum and silicon nitride.

3. The etching method for improving the steepness of a pattern structure according to claim 1, characterized in that: The etching rate during the etching process is controlled to be 0.75-1 nm / s.

4. The etching method for improving the steepness of a pattern structure according to claim 1, characterized in that: During the etching process, the flow rate of SF6 is in the range of 4-20 sccm, the flow rate of Ar is in the range of 4-20 sccm, and the flow rate of CF4 is in the range of 2-10 sccm.

5. The etching method for improving the steepness of a pattern structure according to claim 1, characterized in that: The CF4 in the etching gas is replaced with C4F8; the flow ratio of SF6, Ar and C4F8 is 1~2:1~2:

1.

6. The etching method for improving the steepness of a pattern structure according to claim 1, characterized in that: The CF4 in the etching gas is replaced with C4F6; the flow ratio of SF6, Ar and C4F6 is 1~3:1~3:

1.

7. The etching method for improving the steepness of a pattern structure according to any one of claims 1 to 6, characterized in that: The patterned photoresist layer has a grating pattern, the etching depth is 80-100 nm, and the grating period is 76-250 nm.

8. The etching method for improving the steepness of a pattern structure according to any one of claims 1 to 6, characterized in that: The etching equipment is a reactive ion etching equipment, the radio frequency power of the etching is 200-300W, and the chamber pressure is 5-10mTorr.

9. The etching method for improving the steepness of a pattern structure according to claim 8, characterized in that: The flow ratio of SF6, Ar and CF4 is 2~3:2~3:

1.

10. A grating master, characterized in that: The grating master is prepared by the etching method for improving the steepness of the graphic structure according to any one of claims 1 to 9.

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