Carrier synchronization method and carrier synchronization device without interconnection line

Abstract

The invention discloses an interconnection-line-free carrier synchronization method and a carrier synchronization device. The method comprises the following steps: acquiring a voltage signal of a grid-connected point; determining a current voltage phase angle of the grid connection point according to the voltage signal; determining a target voltage phase angle according to the equal interval of the current voltage phase angle; calculating the time difference from the current voltage phase angle to the target voltage phase angle; counting the time difference by using a counting module of which the working frequency is higher than the carrier frequency of the converter, and generating a counting completion signal when the counting meets a preset condition; in response to the counting completion signal, determining a generation moment of the counting completion signal as a carrier synchronization reference moment; and carrying out carrier synchronization on the parallel converters based on the carrier synchronization reference moment. According to the invention, the problem of low precision of a carrier synchronization method without an interconnection line in the prior art can be solved.

Description

Technical Field

[0001] This invention relates to the field of power system technology, and in particular to a carrier synchronization method and carrier synchronization device without interconnection lines. Background Technology

[0002] With the goal of building a new type of power system, the proportion of renewable energy generation will further increase, and the application of string photovoltaic inverters and string energy storage converters will become increasingly widespread. There are more and more application scenarios where multiple photovoltaic inverters or energy storage converters are connected in parallel at the AC end and then connected to a step-up transformer. However, connecting multiple inverters in parallel at the AC end can easily cause current circulation at the switching frequency, which not only reduces the power quality of the output current but also threatens the safe operation of the inverters.

[0003] Currently, the core of measures to suppress parallel circulating current is to achieve carrier synchronization between inverters. Carrier synchronization methods are mainly divided into carrier synchronization with interconnection lines and carrier synchronization without interconnection lines. Carrier synchronization with interconnection lines typically requires a high-speed signal synchronization line or communication line to provide a reference time for the carriers of different inverters before carrier synchronization. When the number of inverters to be connected in parallel is too large or the distance between them is too far, the effectiveness of carrier synchronization with interconnection lines decreases, and the cost increases. Carrier synchronization without interconnection lines typically utilizes common grid information, such as grid voltage and grid current, to provide a time reference for carrier synchronization, making it suitable for large-scale inverter parallel connection scenarios.

[0004] However, grid voltage and current are power frequency signals, while the carrier frequency of the converter is at the switching frequency level (far higher than the power frequency). How to provide a high-precision synchronization reference for the high-frequency carrier based on the power frequency signal is the key challenge and technical difficulty faced by this type of method. Summary of the Invention

[0005] This invention provides a carrier synchronization method and device without interconnecting lines to solve the problem of low accuracy in existing carrier synchronization methods without interconnecting lines.

[0006] In a first aspect, embodiments of the present invention provide a carrier synchronization method without interconnection lines, comprising: acquiring a voltage signal at a grid connection point; determining the current voltage phase angle at the grid connection point based on the voltage signal; determining a target voltage phase angle based on the equally divided intervals in which the current voltage phase angle is located; calculating the time difference between the current voltage phase angle and the target voltage phase angle; counting the time difference using a counting module with an operating frequency higher than the carrier frequency of the converter, and generating a counting completion signal when the counting meets a preset condition; in response to the counting completion signal, determining the generation time of the counting completion signal as the carrier synchronization reference time; and performing carrier synchronization on the parallel converters based on the carrier synchronization reference time.

[0007] Optionally, the step of determining the current voltage phase angle of the grid-connected point according to the voltage signal comprises: performing phase-locked loop control on the voltage signal to obtain the current voltage phase angle of the grid-connected point.

[0008] Optionally, the step of determining the target voltage phase angle according to the interval in which the current voltage phase angle falls comprises: dividing the range of 0-2π of the voltage phase angle of the grid-connected point in one power frequency cycle into N intervals, each interval corresponding to an angle of 2π / N, N being a positive integer; when the current voltage phase angle falls into an interval, the terminal phase angle of the interval is determined as the target voltage phase angle.

[0009] Optionally, the step of calculating the time difference for the current voltage phase angle to reach the target voltage phase angle comprises: determining the voltage frequency of the grid-connected point according to the voltage signal; determining the phase angle change rate based on the voltage frequency; determining the phase angle difference according to the difference between the current voltage phase angle and the target voltage phase angle; and calculating the time difference according to the phase angle change rate and the phase angle difference.

[0010] Optionally, the step of determining the voltage frequency of the grid-connected point according to the voltage signal comprises: performing phase-locked loop control or frequency-locked loop control on the voltage signal to obtain the voltage frequency of the grid-connected point.

[0011] Optionally, the step of determining the voltage frequency of the grid-connected point according to the voltage signal comprises: detecting the voltage frequency of the grid-connected point using a logic state capture unit.

[0012] Optionally, the time difference ; wherein, is the voltage frequency of the grid-connected point, is the phase angle change rate, N is the number of intervals into which the range of 0-2π of the voltage phase angle of the grid-connected point in one power frequency cycle is divided, is the current voltage phase angle, k is an integer satisfying 0≤k≤N-1, and N is a positive integer.

[0013] Optionally, the step of setting the initial value of the timer count of the converter master control chip based on the time difference and the main frequency of the converter master control chip and controlling the start of the timer comprises: performing a numerical multiplication operation on the time difference and the main frequency, and converting the operation result into an integer to obtain the initial value of the timer count; and setting the initial value to the timer and controlling the timer to start the count-down operation based on the clock period corresponding to the main frequency.

[0014] Optionally, the preset condition is that the timer decreases from the initial value to 0.

[0015] Optionally, the counting module is a timer of the converter main control chip, and the counting completion signal is an interrupt signal; the steps of using a counting module with an operating frequency higher than the carrier frequency of the converter to count the time difference and generating a counting completion signal when the count meets the preset conditions include: setting the initial counting value of the timer based on the time difference and the main frequency of the converter main control chip, and controlling the timer to start counting from the initial value; generating an interrupt signal when the timer count meets the preset conditions.

[0016] Optionally, the steps for setting the initial count value of the timer based on the time difference and the main frequency of the converter's main control chip include: performing a numerical multiplication operation based on the time difference and the main frequency, converting the operation result into an integer, and using it as the initial count value of the timer.

[0017] Optionally, the step of controlling the timer to start counting from the initial value includes: controlling the timer to start a decrementing operation based on the clock cycle corresponding to the main frequency; wherein the preset condition is that the timer decrements from the initial value to 0 based on the clock cycle corresponding to the main frequency.

[0018] Secondly, embodiments of the present invention provide a carrier synchronization device without interconnection lines, comprising: a voltage detection module for acquiring a grid-connected point voltage signal; a phase angle processing module for determining the current voltage phase angle of the grid-connected point based on the voltage signal; a target voltage phase angle determination module for determining a target voltage phase angle based on the equally divided interval where the current voltage phase angle is located; a time calculation module for determining the time difference between the current voltage phase angle and the target voltage phase angle; a counting module, whose operating frequency is higher than the carrier frequency of the converter, for counting the time difference and generating a counting completion signal when the counting meets a preset condition; a reference time determination module for determining the generation time of the counting completion signal as the carrier synchronization reference time in response to the counting completion signal; and a synchronization execution module for performing carrier synchronization on parallel converters based on the carrier synchronization reference time.

[0019] The carrier synchronization method without interconnects provided in this invention determines the current voltage phase angle at the grid connection point based on the voltage signal, determines the target voltage phase angle based on the equally divided interval of the current voltage phase angle, calculates the phase angle change rate based on the phase angle difference between the current and target voltage phase angles and the grid connection point voltage frequency, and converts the phase difference into a precise time difference, ensuring a deviation-free conversion from phase information to time information, thus laying the foundation for the time accuracy of the synchronization reference. A counting module with a carrier frequency higher than the converter's operating frequency counts the time difference and generates a counting completion signal when the count meets preset conditions. In response to the counting completion signal, the generation time of the counting completion signal is determined as the carrier synchronization reference time. This process, leveraging the high-precision counting characteristics of the hardware counting module, ensures strict consistency of the synchronization reference time of different converters on the time axis, avoiding reference offsets caused by software calculation delays, crystal oscillator deviations, and other factors. The above carrier synchronization method transforms the originally difficult-to-use power frequency voltage signal into a high-precision synchronization reference that can be directly reused by a high-frequency carrier, thereby solving the core problem of inaccurate synchronization references in existing methods without interconnects.

[0020] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of the present invention, nor is it intended to limit the scope of the invention. Other features of the invention will become readily apparent from the following description. Attached Figure Description

[0021] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0022] Figure 1 This is a flowchart of a carrier synchronization method without interconnection lines provided in an embodiment of the present invention;

[0023] Figure 2 This is a circuit diagram of multiple inverters connected in parallel and grid-connected according to an embodiment of the present invention;

[0024] Figure 3 This is a waveform diagram of a three-phase voltage provided in an embodiment of the present invention;

[0025] Figure 4 This is a flowchart of another carrier synchronization method without interconnection lines provided in an embodiment of the present invention;

[0026] Figure 5 This is a flowchart of another carrier synchronization method without interconnection lines provided in an embodiment of the present invention;

[0027] Figure 6 is a flow chart of another interconnection-free carrier synchronization method provided by the embodiment of the present application;

[0028] Figure 7 is a flow chart of another interconnection-free carrier synchronization method provided by the embodiment of the present application;

[0029] Figure 8 is a flow chart of another interconnection-free carrier synchronization method provided by the embodiment of the present application;

[0030] Figure 9 is a schematic diagram of a carrier synchronization reference time selection method provided by the embodiment of the present application;

[0031] Figure 10 is a simulation waveform diagram of inductance currents of two converters and a filter capacitor current of one of the two converters before application of the interconnection-free carrier synchronization method;

[0032] Figure 11 is a simulation waveform diagram of inductance currents of two converters and a filter capacitor current of one of the two converters after application of the interconnection-free carrier synchronization method;

[0033] Figure 12 is a structural schematic diagram of an interconnection-free carrier synchronization device provided by the embodiment of the present application. DETAILED DESCRIPTION

[0034] In order to make the personnel in the art better understand the present application scheme, the technical solutions in the embodiments of the present application will be described clearly and completely below in combination with the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by the personnel in the art without creative labor should belong to the protection scope of the present application.

[0035] It should be noted that the terms "first", "second", and the like in the specification and claims of the present application and the above-described drawings are used to distinguish similar objects, and do not have to be used to describe a specific order or sequence. It should be understood that the data thus used can be interchanged under appropriate circumstances, so that the embodiments of the present application described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusion, for example, a process, method, system, product or device including a series of steps or units does not have to be limited to those steps or units clearly listed, but can include other steps or units not clearly listed or inherent to the process, method, product or device.

[0036] Figure 1This is a flowchart of a carrier synchronization method without interconnection lines provided by an embodiment of the present invention. This embodiment is applicable to the case of carrier synchronization. The method can be executed by a carrier synchronization device without interconnection lines. The carrier synchronization device without interconnection lines can be implemented in hardware and / or software. The carrier synchronization device without interconnection lines can be configured in an electronic device, which can be composed of two or more physical entities or a single physical entity.

[0037] like Figure 1 As shown, this embodiment of the invention provides a carrier synchronization method without interconnection lines, which specifically includes the following steps:

[0038] S101. Obtain the voltage signal at the grid connection point.

[0039] For example, Figure 2 This is a circuit diagram of multiple inverters connected in parallel and grid-connected. For example... Figure 2 As shown, the AC outputs of M inverters are connected in parallel to a step-up transformer and then to the power grid. The circulating current generated by this parallel connection at the switching frequency is caused by the asynchrony of the inverter switching transistor drive signals. Further analysis reveals that this is due to the deviation of the carrier frequency caused by the crystal oscillator deviation of each inverter. The voltage signal at the grid connection point can be obtained using the voltage sensors built into the inverters and the sampling and conditioning circuit on the control board. Figure 2 middle Indicates capacitance. Indicates inductance. This represents resistance, where M is an integer greater than or equal to 2.

[0040] S102. Determine the current voltage phase angle of the grid connection point based on the voltage signal.

[0041] The converters are connected in parallel at the grid connection point, and the same grid connection point voltage is collected. The three-phase voltage waveforms at the grid connection point are as follows: Figure 3 As shown. The converter uses a phase-locked loop to control the grid connection point voltage, obtaining the phase angle of the grid connection point voltage, and using phase a voltage as the reference. The peak value is at the moment of phase angle 0. It varies linearly within the range of 0 to 2π within one power frequency cycle. This represents the voltage of phase b. t represents the voltage of phase c, and t represents time.

[0042] Grid connection point voltage phase angle The phase angle of the AC voltage at the grid connection point at any given moment during the sinusoidal change process varies linearly within one power frequency cycle (corresponding to the period of the power grid frequency) along the range of 0 to 2π. It is an overall parameter reflecting the phase state of the power grid voltage.

[0043] Current voltage phase angle It is the phase angle of the grid connection point voltage. A specific form of the voltage phase angle, refers to the value of the voltage phase angle of the grid-connected point calculated at a certain time, is the voltage phase angle of the grid-connected point at the current time. The voltage phase angle of the grid-connected point at the current time is the instantaneous value of the voltage phase angle of the grid-connected point at the current time. That is, the current voltage phase angle . The voltage phase angle of the grid-connected point at the current time is the voltage phase angle of the grid-connected point at the current time. The voltage phase angle of the grid-connected point at the current time is the instantaneous value of the voltage phase angle of the grid-connected point at the current time. That is, the current voltage phase angle . The voltage phase angle of the grid-connected point at the current time is the voltage phase angle of the grid-connected point at the current time. The voltage phase angle of the grid-connected point at the current time is the instantaneous value of the voltage phase angle of the grid-connected point at the current time. That is, the current voltage phase angle

[0044] . In some embodiments, the collected voltage signal can be processed by a Phase-Locked Loop (PLL) software. The Phase-Locked Loop tracks the phase change of the voltage signal, and outputs the current voltage phase angle of the grid-connected point in real time. .

[0045] In actual application, the starting point of the voltage phase angle can be flexibly set. For example, the peak value time of the a-phase voltage is set as the phase angle 0 time, to ensure that the voltage phase angle stably covers the range of 0~2π in a power frequency cycle. .

[0046] S103, determining the target voltage phase angle according to the current voltage phase angle. . The target voltage phase angle refers to the end point phase angle of the current voltage phase angle in the equally divided interval, after the grid-connected point voltage phase angle is equally divided into N intervals according to the multiple relationship between the carrier frequency and the grid frequency (the carrier frequency is N times of the grid frequency, N is a positive integer) in a power frequency cycle (corresponding to the phase angle range 0~2π). That is, the voltage phase angle of the grid-connected point is equally divided into N intervals in the range of 0~2π in a power frequency cycle, and each interval corresponds to an angle of

[0047] / N, N is a positive integer; when the current voltage phase angle falls into a certain interval, the end point phase angle of the interval is determined as the target voltage phase angle. . In some embodiments, based on the carrier frequency set according to the grid frequency , the range of 0~2π of the voltage phase angle of the grid-connected point in a power frequency cycle is equally divided into N continuous intervals, and each interval is represented as [k× / N, (k+1)×

[0048] / N), where k is an integer, and 0≤k≤N-1. . For example, assuming that the current voltage phase angle falls into the interval [k× / N, (k+1)× / N), where k is an integer, and 0≤k≤N-1. . For example, assuming that the current voltage phase angle falls into the interval [k×

[0049] / N, (k+1)× / N), where k is an integer, and 0≤k≤N-1. (k+1) x / N, the end point phase angle (k+1) x / N of the partition is determined as the target voltage phase angle.

[0050] S104, the time difference of the current voltage phase angle reaching the target voltage phase angle is calculated.

[0051] The time difference of the current voltage phase angle reaching the target voltage phase angle refers to the time interval experienced from the current time (corresponding to the current voltage phase angle to the target voltage phase angle.

[0052] In some embodiments, based on the voltage frequency , the phase angle change rate is obtained as ; the difference between the current voltage phase angle and the target voltage phase angle (k+1) x / N is calculated, and the phase angle difference = (k+1) x / N- is obtained; the phase angle difference is converted into the time difference according to the phase angle change rate, and the calculation formula is = / , is the phase angle change rate.

[0053] S105, the time difference is counted by a counting module with a working frequency higher than the carrier frequency of the converter, and a counting completion signal is generated when the counting meets the preset condition.

[0054] The counting completion signal refers to an electrical signal or a logic signal generated by the timing module after completing the timing of the preset time period, which is used to indicate the end of timing. It is an event-triggered signal. Its specific form can be: hardware interrupt signal: such as timer overflow interrupt, capture comparison interrupt.

[0055] Level jump: a jump from low level to high level or from high level to low level.

[0056] In an embodiment, the counting module is realized by a hardware timer inside the converter main control chip. The working clock of the hardware timer is provided by the control chip main frequency, and its frequency is much higher than the carrier frequency of the converter, thereby ensuring the high precision required for timing.

[0057] In yet another embodiment, the counting module can also be implemented by a counter logic in a Field-Programmable Gate Array (FPGA) or an Application-Specific Integrated Circuit (ASIC).

[0058] The working clock of the counting module is provided by a high-frequency clock source. When the timing starts, a counting value calculated based on the time difference and the frequency of the high-frequency clock is loaded to the counting module. The counting module performs a decremental counting at the rising edge of each high-frequency clock. When it is detected that the output value of the counting module is zero, the counting module generates a high-level pulse signal as a counting completion signal.

[0059] S106, in response to the counting completion signal, determining the time when the counting completion signal is generated as a carrier synchronization reference time.

[0060] Suppose the counting module is implemented by a hardware timer in the main control chip. When the counting value of the timer decreases to zero, its hardware circuit will automatically set the internal interrupt flag to 1 and send an interrupt request signal to the main control chip of the converter. The interrupt request signal is the counting completion signal.

[0061] The main control chip of the converter responds to the interrupt request and immediately enters an interrupt service program. In the interrupt service program, the main control chip of the converter records the time when the interrupt occurs (for example, by reading a high-precision system clock register) and assigns this time to a time stamp as a global variable of the system. This time stamp is determined as the reference time for carrier synchronization of all parallel converters in the current period.

[0062] The counting completion signal can also be the overflow state flag of the timer. The main program detects whether the timing is completed by constantly polling the state flag. Once it is detected that the flag is set, the main control chip of the converter immediately records the current time and determines it as the carrier synchronization reference time, and then clears the state flag.

[0063] The counting module can also be implemented by an FPGA. In the FPGA, the counter generates a high-level pulse signal with a clock cycle width when the counter counting is completed. The pulse signal is directly connected to the enable end of another logic module. In response to the rising edge of the pulse signal, another logic module latches the counting value of the current FPGA high-speed clock and sends the latched value to the processor as the carrier synchronization reference time.

[0064] S107, based on the carrier synchronization reference time, performing carrier synchronization on the parallel converters.

[0065] At the carrier synchronization reference moment, the maximum value of the time base counter of the converter ePWM unit in the current analog-digital conversion interrupt period is recorded, and the value is determined as the original maximum value (i.e. the initial value of the ePWM period register TBPRD). The value is a reference parameter of the carrier period and directly affects the carrier frequency.

[0066] The change trend of the time base counter of the ePWM unit after the carrier synchronization reference moment is detected: if the time base counter value presents a downward trend (the counting direction is decreasing), it indicates that the current carrier is in the stage of changing from the peak value to the valley value; if the time base counter value presents an upward trend (the counting direction is increasing), it indicates that the current carrier is in the stage of changing from the valley value to the peak value.

[0067] The maximum value of the time base counter is adjusted according to the above trend:

[0068] When the downward trend is presented, the maximum value of the time base counter is updated to a first target value (the difference between the original maximum value and the preset value Δ, i.e. TBPRD-Δ) in the next analog-digital conversion interrupt period, so as to temporarily increase the carrier frequency by shortening the carrier period and speed up the phase alignment.

[0069] When the upward trend is presented, the maximum value of the time base counter is updated to a second target value (the sum of the original maximum value and the preset value Δ, i.e. TBPRD+Δ) in the next analog-digital conversion interrupt period, so as to temporarily reduce the carrier frequency by lengthening the carrier period and slow down the phase change to realize the alignment.

[0070] The duration of the target value is a first preset period, which is equal to the number of analog-digital conversion interrupt periods corresponding to the quotient of the original maximum value and the preset value Δ of the preset multiple, i.e. [TBPRD / (2Δ)] periods, and [] represents the integer. After the preset period ends, the maximum value of the time base counter is restored to the original maximum value, so as to return the carrier frequency to normal and complete a synchronization adjustment. Through the above process, the phases of the carriers of the parallel converters can be gradually aligned at the carrier synchronization reference moment and in the subsequent periods, high-precision carrier synchronization in the scenario without interconnection lines is realized, and the switching frequency secondary circulating current is effectively suppressed.

[0071] The carrier synchronization method without interconnection provided by the embodiment of the present application determines the current voltage phase angle of the grid-connected point according to the voltage signal, determines the target voltage phase angle according to the interval in which the current voltage phase angle is located, converts the phase difference into an accurate time difference based on the phase angle difference between the current voltage phase angle and the target voltage phase angle and the phase angle change rate calculated in combination with the voltage frequency of the grid-connected point, ensures the unbiased conversion from the phase information to the time information, and lays a foundation for the time accuracy of the synchronization reference. The time difference is counted by using a counting module with a higher frequency than the carrier frequency of the converter, and a counting completion signal is generated when the counting meets the preset condition; the time when the counting completion signal is generated is determined as the carrier synchronization reference time in response to the counting completion signal. This process ensures the strict consistency of the synchronization reference time of different converters on the time axis by means of the high-precision counting characteristics of the hardware counting module, and avoids the reference deviation caused by factors such as software calculation delay and crystal oscillator deviation. The above carrier synchronization method converts the power frequency voltage signal which is difficult to accurately utilize into a high-precision synchronization reference which can be directly reused by the high-frequency carrier, thereby solving the core problem of the inaccurate synchronization reference in the existing method without interconnection.

[0072] Figure 4 is a flowchart of another carrier synchronization method without interconnection provided by the embodiment of the present application, as shown in Figure 4 , the carrier synchronization method comprises the following steps.

[0073] S201, acquiring a voltage signal of a grid-connected point.

[0074] S202, performing phase-locked loop control on the voltage signal to calculate a current voltage phase angle of the grid-connected point.

[0075] The phase angle calculation is achieved by the phase-locked loop through the following processes: filtering, synchronous sampling and other processing of the voltage signal to eliminate noise interference; the phase comparator of the phase-locked loop compares the phase difference between the input voltage signal and the internal reference signal in real time, adjusts the output of the voltage-controlled oscillator through the loop filter, so that the phase of the internal reference signal always tracks the phase change of the input voltage signal; based on the tracked phase relationship, the current voltage phase angle corresponding to the current time is calculated and output in real time, so that the phase angle can accurately reflect the instantaneous phase state of the grid-connected point voltage in the range of 0~2π.

[0076] Optionally, the voltage signal is input into a phase-locked loop algorithm module, and the phase-locked loop realizes the phase angle calculation through the following processes: filtering, synchronous sampling and other processing of the voltage signal to eliminate noise interference; the phase comparator of the phase-locked loop compares the phase difference between the input voltage signal and the internal reference signal in real time, adjusts the output of the voltage-controlled oscillator through the loop filter, so that the phase of the internal reference signal always tracks the phase change of the input voltage signal; based on the tracked phase relationship, the current voltage phase angle corresponding to the current time is calculated and output in real time, so that the phase angle can accurately reflect the instantaneous phase state of the grid-connected point voltage in the range of 0~2π.

[0077] S203, determining a target voltage phase angle according to the interval in which the current voltage phase angle is located.

[0078] S204, calculate a time difference of the current voltage phase angle reaching the target voltage phase angle.

[0079] S205, count the time difference by using a counting module with a working frequency higher than the carrier frequency of the converter, and generate a counting completion signal when the counting module meets a preset condition.

[0080] S206, determine the time when the counting completion signal is generated as a carrier synchronization reference time in response to the counting completion signal.

[0081] S207, synchronize the carrier of the parallel converter based on the carrier synchronization reference time.

[0082] Figure 5 is a flowchart of another carrier synchronization method without interconnection line provided by an embodiment of the present application, as shown in Figure 5 The carrier synchronization method comprises the following steps.

[0083] S301, obtain a voltage signal of a grid-connected point.

[0084] S302, determine a current voltage phase angle of the grid-connected point according to the voltage signal.

[0085] S303, determine a target voltage phase angle according to the current voltage phase angle in the equal interval.

[0086] S304, determine a grid-connected point voltage frequency according to the voltage signal.

[0087] In some embodiments, the voltage signal is subjected to phase-locked loop control or frequency-locked loop control, and the grid-connected point voltage frequency is calculated.

[0088] In some embodiments, the grid-connected point voltage frequency is detected by using a logic state capture unit.

[0089] The logic state capture unit (Enhanced Capture, eCAP) is a hardware function module integrated in a master control chip, such as a digital signal processor (Digital Signal Processor, DSP) and other embedded chips.

[0090] The voltage signal of the grid-connected point is converted into a form suitable for eCAP detection. Usually, the sine voltage signal is converted into a square wave signal through a filter circuit. In this way, the eCAP can more conveniently detect the edge change of the signal, because the rising edge and the falling edge of the square wave correspond to the key change points of the voltage, such as the zero-crossing point.

[0091] According to the detection requirements, the eCAP is configured in a suitable working mode, such as a continuous capture mode. At the same time, the counter source and the clock frequency are set, and the clock source used by the internal timer and its frequency division coefficient are defined, so as to accurately record the time.

[0092] The eCAP capture unit detects the falling edge or rising edge of the first target phase square wave in real time. When the edge is detected, the corresponding event is triggered. By recording the trigger time of two consecutive rising edges or falling edges, the time difference between them is calculated, which is the period of the voltage signal. According to the relationship between frequency and period f = 1 / T, where f is the frequency and T is the period, the frequency of the grid-connected point voltage can be obtained. For example, if the time difference between two rising edges is 0.02 seconds, then the voltage frequency is 50 Hz.

[0093] S305, determining the phase angle change rate based on the voltage frequency.

[0094] The phase angle change rate refers to the change angle of the grid-connected point voltage phase angle per unit time, which is a parameter reflecting the dynamic change speed of the grid voltage phase with time. Its size is directly related to the grid-connected point voltage frequency, and the unit is usually rad / s. In a power frequency cycle, the voltage phase angle changes linearly from 0 to 2π, and the phase angle change rate is a constant value.

[0095] Grid-connected point voltage frequency The relationship between the two is , The phase angle change rate is 100π rad / s, for example, when the grid frequency is 50 Hz.

[0096] S306, determining the phase angle difference according to the difference between the current voltage phase angle and the target voltage phase angle.

[0097] Phase angle difference = target voltage phase angle - current voltage phase angle ;

[0098] S307, calculating the time difference according to the phase angle change rate and the phase angle difference.

[0099] Time difference = / ; that is ;

[0100] Wherein, is the grid-connected point voltage frequency, is the phase angle change rate, N is the number of equal intervals in the range of 0~2π of the voltage phase angle of the grid-connected point in a power frequency cycle, k is an integer satisfying 0≤k≤N-1, and N is a positive integer.

[0101] S308, counting the time difference using a counting module with a carrier frequency higher than that of the converter, and generating a counting completion signal when the counting module meets the preset condition.

[0102] S309, in response to the counting completion signal, determining the time when the counting completion signal is generated as the carrier synchronization reference time.

[0103] S310, based on the carrier synchronization reference time, performing carrier synchronization on the parallel-connected converters.

[0104] Figure 6 is a flowchart of another interconnection line-free carrier synchronization method provided by the embodiment of the application, as shown in the figure, the carrier synchronization method comprises: Figure 6

[0105] S401, acquiring a voltage signal of a grid-connected point.

[0106] S402, determining a current voltage phase angle of the grid-connected point according to the voltage signal.

[0107] S403, determining a target voltage phase angle according to the interval in which the current voltage phase angle is located.

[0108] S404, calculating a time difference of the current voltage phase angle reaching the target voltage phase angle.

[0109] S405, counting the time difference by using a counting module with a working frequency higher than a carrier frequency of the converter, and generating a counting completion signal when the counting of the counting module meets a preset condition.

[0110] S406, in response to the counting completion signal, determining the time when the counting completion signal is generated as the carrier synchronization reference time.

[0111] S407, based on the carrier synchronization reference time, performing carrier synchronization on the parallel-connected converters.

[0112] Figure 7 is a flowchart of another interconnection line-free carrier synchronization method provided by the embodiment of the application, the counting module is a timer of a main control chip of the converter, and the counting completion signal is an interrupt signal. As shown in the figure, the carrier synchronization method comprises: Figure 7

[0113] S501, acquiring a voltage signal of a grid-connected point.

[0114] S502, determining a current voltage phase angle of the grid-connected point according to the voltage signal.

[0115] S503, determining a target voltage phase angle according to the interval in which the current voltage phase angle is located.

[0116] S504, calculating a time difference of the current voltage phase angle reaching the target voltage phase angle.

[0117] ​​S505, set the initial value of the timer based on the time difference and the main frequency of the converter master control chip, and control the timer to start counting from the initial value.

[0118] Specifically, the initial value of the timer is obtained by multiplying the time difference by the main frequency and converting the result to an integer. The main frequency refers to the working clock frequency of the converter master control chip, usually in hertz, which reflects the reference rate of the timer. The essence of the multiplication is to convert the time difference into the corresponding number of clock cycles. For example, if the time difference is 1 microsecond and the main frequency of the master control chip is 100 MHz, the result of the multiplication is 100, indicating that the time difference corresponds to 100 clock cycles. The result is converted to an integer because the counting unit of the timer is an integer number of clock cycles, and the integer operation is used to ensure that the parameter meets the hardware requirements of the timer.

[0119] The initial value of the timer count refers to an integer parameter calculated based on the time difference from the current voltage phase angle to the target voltage phase angle and the main frequency of the converter master control chip, which is used to set the initial count of the timer. Its role is to convert the time difference into a counting unit that the timer can recognize, to achieve precise control of the synchronization time. The main frequency of the converter master control chip That is, the working clock frequency of the master control chip.

[0120] The initial value of the timer count is calculated by the formula: × where [] represents the integer operation on the product, ensuring that the initial value is an integer. Finally, the calculated initial value is written to the count register of the timer, and the timer is controlled to start the countdown operation with the clock period corresponding to the main frequency of the master control chip as the counting reference.

[0121] S506, generate an interrupt signal when the count of the timer meets the preset condition.

[0122] The preset condition is that the timer decreases from the initial value to 0 with the clock period corresponding to the main frequency as the reference.

[0123] The main frequency of the master control chip determines the counting period of the timer, i.e. the time consumed for each count is 1 / After the timer is started, it starts counting from the preset initial value and decreases by 1 each time until it reaches 0, triggering the timer interrupt and generating an interrupt signal. This countdown method based on the main frequency can accurately convert the time difference from the current voltage phase angle to the target phase angle into the counting process of the timer, ensuring that the timers of different converters can trigger interrupts at the same time, thereby achieving the unification of the carrier synchronization reference time.

[0124] S507. In response to the interrupt signal, the generation time of the interrupt signal is determined as the carrier synchronization reference time.

[0125] S508. Based on the carrier synchronization reference time, perform carrier synchronization on parallel converters.

[0126] Figure 8 This is a flowchart of another carrier synchronization method without interconnection lines provided by an embodiment of the present invention, as shown below. Figure 8 As shown, the carrier synchronization method includes:

[0127] S601, Obtain the voltage signal at the grid connection point.

[0128] S602. Perform phase-locked loop control on the voltage signal to calculate the current voltage phase angle at the grid connection point.

[0129] S603. Determine the target voltage phase angle based on the equally divided intervals in which the current voltage phase angle is located.

[0130] S604. Determine the grid connection point voltage frequency based on the voltage signal.

[0131] S605. Determine the rate of change of phase angle based on voltage frequency.

[0132] S606. Determine the phase angle difference based on the difference between the current voltage phase angle and the target voltage phase angle.

[0133] S607. Calculate the time difference based on the rate of change of phase angle and the phase angle difference.

[0134] S608. Based on the time difference and the main frequency of the converter main control chip, set the initial value of the timer's count, and control the timer to start counting from the initial value.

[0135] S609. When the timer count meets the preset conditions, an interrupt signal is generated.

[0136] S610, in response to the interrupt signal, determines the generation time of the interrupt signal as the carrier synchronization reference time.

[0137] S611. Based on the carrier synchronization reference time, perform carrier synchronization on the parallel converters.

[0138] Based on the grid connection point voltage frequency With converter carrier frequency Taking the same method, where two converters are connected in parallel and grid-connected to implement carrier synchronization, as an example, the carrier of the first converter is carrier 1, and the carrier of the second converter is carrier 2. When the current voltage phase angle... Within the range [k*2π / N, (k+1)*2π / N), due to the phase deviation between carrier 1 and carrier 2, the current voltage phase angle calculated by the PLL of different converters will be different, respectively. , The time difference between the moment when the current voltage phase angle is calculated from the converter and the moment when the target voltage phase angle is (k+1)*2π / N. , They are respectively:

[0139] ;

[0140] ;

[0141] When the PLL of the converter calculates the current voltage phase angle, the timer of the converter's main control chip is loaded. The loaded values ​​for Timer 1 and Timer 2 are respectively [ * ]and[ * ],in, The clock frequency is the main control chip's clock speed, and [] indicates rounding. After the timer is loaded, it begins counting down according to the period corresponding to the main control chip's clock frequency. When the timer counts to 0, a timer interrupt is triggered, which serves as the reference time for carrier synchronization.

[0142] Figure 9 This is a schematic diagram of a carrier synchronization reference time selection method provided in an embodiment of the present invention. Figure 9 It can be seen that no matter how large the initial carrier deviation is between the converters, the same synchronization reference time can be obtained, and thus carrier synchronization between the converters can be achieved by various methods.

[0143] In the carrier synchronization method of this invention, k can be any positive integer between [0, N). Synchronization can be performed at any time within one power frequency cycle, and can be performed any number of times, even once in each carrier cycle. Compared with other wireless carrier synchronization methods, this carrier synchronization method is simple to operate and has high synchronization accuracy.

[0144] Taking the implementation of carrier synchronization using two converters connected in parallel to the grid as an example. Each converter has a rated power of 60kW, a rated voltage of 480V, and a rated frequency of 50Hz. Before and after applying the carrier synchronization method without interconnection lines, the waveforms of the inductor current (channel 1, channel 3) and the filter capacitor current (channel 4) of the two converters are as follows: Figure 10 and Figure 11Before the application of the interconnection-free carrier synchronization method, the inductive current of the two converters has a phase deviation, which results in a significant switching frequency current circulation between the two converters. The circulation flows through the filter capacitor, which greatly increases the switching frequency component of the filter capacitor current and makes the envelope of the capacitor current fluctuate obviously. After the application of the interconnection-free carrier synchronization method, the phase deviation of the inductive current of the two converters is significantly reduced, the switching frequency circulation between the two converters is significantly reduced, the switching frequency component of the filter capacitor current returns to a normal level, and the envelope of the capacitor current becomes smooth. The above verifies the effectiveness of the high-precision interconnection-free carrier synchronization method.

[0145] Based on the same inventive concept, the embodiment of the present application also provides an interconnection-free carrier synchronization device, Figure 12 is a structural schematic diagram of the interconnection-free carrier synchronization device provided by the embodiment of the present application. As shown in the figure, Figure 12 the carrier synchronization device 10 comprises:

[0146] a voltage detection module 110, configured to acquire a grid-connected point voltage signal.

[0147] a phase angle processing module 120, configured to determine a current voltage phase angle of the grid-connected point according to the voltage signal.

[0148] a target voltage phase angle determination module 130, configured to determine a target voltage phase angle according to a partition interval in which the current voltage phase angle is located.

[0149] a time calculation module 140, configured to determine a time difference of the current voltage phase angle reaching the target voltage phase angle.

[0150] a counting module 150, whose working frequency is higher than the carrier frequency of the converter, configured to count the time difference and generate a counting completion signal when the counting satisfies a preset condition.

[0151] a reference time point determination module 160, configured to determine, in response to the counting completion signal, a time point of generating the counting completion signal as a carrier synchronization reference time point.

[0152] a synchronization execution module 170, configured to perform carrier synchronization on the parallel converter based on the carrier synchronization reference time point.

[0153] The interconnection-free carrier synchronization device provided by the embodiment of the present application can execute the interconnection-free carrier synchronization method provided by any embodiment of the present application, has the function modules and beneficial effects corresponding to the execution method, and the same as the carrier synchronization method can refer to the explanation and description of the carrier synchronization method. The embodiment will not be described here.

[0154] It should be understood that the various forms of flow shown above can be used to reorder, add, or remove steps. For example, the steps described in the present application can be performed in parallel, in series, or in a different order, as long as the desired results of the technical solutions of the present application can be achieved, which are not limited herein.

[0155] The above detailed description does not constitute a limitation on the protection scope of the present application. Those skilled in the art should understand that various modifications, combinations, arrangements and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present application shall be included in the protection scope of the present application.

Claims

1. A carrier synchronization method without interconnect lines, characterized in that, include: Obtain the voltage signal at the grid connection point; Determine the current voltage phase angle of the grid connection point based on the voltage signal; Determine the target voltage phase angle based on the equally divided intervals in which the current voltage phase angle is located; Calculate the time difference between the current voltage phase angle and the target voltage phase angle; The time difference is counted using a counting module whose operating frequency is higher than the carrier frequency of the converter, and a counting completion signal is generated when the count meets a preset condition; In response to the count completion signal, the generation time of the count completion signal is determined as the carrier synchronization reference time; Based on the carrier synchronization reference time, carrier synchronization is performed on the parallel converters.

2. The carrier synchronization method without interconnection lines according to claim 1, characterized in that, The step of determining the current voltage phase angle of the grid connection point based on the voltage signal includes: The voltage signal is subjected to phase-locked loop control to calculate the current voltage phase angle at the grid connection point.

3. The carrier synchronization method without interconnection lines according to claim 1, characterized in that, The step of determining the target voltage phase angle based on the equally divided intervals in which the current voltage phase angle is located includes: The voltage phase angle of the grid connection point is divided into N equal parts within a power frequency cycle from 0 to 2π, resulting in N equal intervals. The angle corresponding to each equal interval is 2π / N, where N is a positive integer. When the current voltage phase angle falls into a certain equally divided interval, the endpoint phase angle between the equally divided intervals is determined as the target voltage phase angle.

4. The carrier synchronization method without interconnection lines according to claim 1, characterized in that, The step of calculating the time difference between the current voltage phase angle and the target voltage phase angle includes: The grid connection point voltage frequency is determined based on the voltage signal; The rate of phase angle change is determined based on the voltage frequency; The phase angle difference is determined based on the difference between the current voltage phase angle and the target voltage phase angle; The time difference is calculated based on the rate of change of the phase angle and the phase angle difference.

5. The carrier synchronization method without interconnecting lines according to claim 4, characterized in that, The step of determining the grid connection point voltage frequency based on the voltage signal includes: The voltage signal is subjected to phase-locked loop control or frequency-locked loop control to calculate the voltage frequency at the grid connection point; or, The step of determining the grid connection point voltage frequency based on the voltage signal includes: The voltage frequency at the grid connection point is detected using a logic state capture unit.

6. The carrier synchronization method without interconnection lines according to claim 4, characterized in that, The time difference ; in, The voltage frequency at the grid connection point, Let N be the rate of change of the phase angle, and N be the number of equal partitions within the range of 0 to 2π of the voltage phase angle at the grid connection point in one power frequency cycle. The current voltage phase angle is k, where k is an integer 0 ≤ k ≤ N-1, and N is a positive integer.

7. The carrier synchronization method without interconnection lines according to claim 1, characterized in that, The counting module is a timer for the main control chip of the converter, and the counting completion signal is an interrupt signal; The step of using a counting module with an operating frequency higher than the carrier frequency of the converter to count the time difference and generating a counting completion signal when the count meets a preset condition includes: Based on the time difference and the main frequency of the converter main control chip, the initial count value of the timer is set, and the timer is controlled to start counting from the initial value; When the timer count meets a preset condition, the interrupt signal is generated.

8. The carrier synchronization method without interconnecting lines according to claim 7, characterized in that, The step of setting the initial count value of the timer based on the time difference and the main frequency of the converter main control chip includes: The time difference is multiplied by the main frequency, and the result is converted into an integer and used as the initial value for the timer count.

9. The carrier synchronization method without interconnecting lines according to claim 7, characterized in that, The step of controlling the timer to start counting from the initial value includes: The timer is controlled to start a countdown operation based on the clock cycle corresponding to the main frequency; wherein the preset condition is that the timer decreases from the initial value to 0.

10. A carrier synchronization device without interconnecting lines, characterized in that, include: The voltage detection module is used to acquire the voltage signal at the grid connection point; The phase angle processing module is used to determine the current voltage phase angle of the grid connection point based on the voltage signal; The target voltage phase angle determination module is used to determine the target voltage phase angle based on the equally divided interval where the current voltage phase angle is located; The time calculation module is used to determine the time difference between the current voltage phase angle and the target voltage phase angle; The counting module, whose operating frequency is higher than the carrier frequency of the converter, is used to count the time difference and generate a counting completion signal when the count meets a preset condition. A reference time determination module is used to determine the generation time of the count completion signal as the carrier synchronization reference time in response to the count completion signal. The synchronization execution module is used to perform carrier synchronization on parallel converters based on the carrier synchronization reference time.

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