Power supply protection method and device for server

Abstract

The invention discloses a power supply protection method and device for a server, and the method comprises the steps: obtaining CPU model information through a hardware interface by a substrate management controller when the server is powered on; calling a corresponding voltage regulation code from a BMC flash memory according to the CPU model information; burning the voltage regulation code to a voltage regulator of the main power of the CPU, and dynamically setting a first overcurrent protection point; server memory information is determined, and the memory information and the CPU model information are transmitted to the CPLD; the CPLD dynamically sets a second overcurrent protection point of the front-end electronic fuse according to the memory information and the CPU model information; and performing power supply protection on the server based on the dual protection points. Intelligent power supply protection for adaptively adjusting the overcurrent protection threshold according to actual hardware configuration is realized, the problem that a traditional fixed protection point cannot respond to abnormal current such as weak short circuit in time in a medium and low configuration scene is effectively solved, and the power supply reliability of a server and the hardware safety are remarkably improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of servers, and in particular to a power supply protection method and device for a server. BACKGROUND

[0002] With the continuous upgrading of server hardware performance, the increase in the number of CPU processing cores and the capacity of memory leads to a significant increase in the power consumption of the whole machine. In the current server power supply architecture, in order to ensure downward compatibility, the overcurrent protection threshold of the front-end electronic fuse (EFUSE) and the CPU main power (VCCIN) is generally set according to the highest hardware configuration supported by the model, that is, according to the current demand of the maximum power consumption CPU model (such as 350W) and the full-configuration memory (such as 32 roots), a fixed protection point is set with a 1.2 to 1.5 times redundancy coefficient. Although this design can cover the maximum load scenario, it has exposed serious defects in actual deployment: due to the wide existence of customer customization requirements, the configuration of a large number of shipped servers is far below the design upper limit (for example, only a 250W CPU and 16 roots of memory are used), resulting in a large difference between the actual working current and the overcurrent protection threshold.

[0003] When such low-configuration servers occur abnormal working conditions such as weak short circuit (such as local breakdown of memory particles or PCB leakage), the abnormal current exceeds the normal load range, but cannot trigger the overcurrent protection mechanism of the EFUSE or the CPU main power due to not reaching the preset fixed protection threshold. This protection blind area allows abnormal current to exist, eventually causing hardware damage accidents such as CPU or memory module burnout. Although the prior art attempts to expand the protection range by increasing the redundancy coefficient, the excessively high threshold may trigger protection by mistake, affecting system stability, and fundamentally cannot solve the protection failure problem caused by configuration difference. SUMMARY

[0004] The present application provides a power supply protection method and device for a server, to solve the problem that in the traditional server power supply system, the fixed overcurrent protection threshold cannot adapt to dynamic hardware configuration, resulting in weak short circuit and other abnormal currents in low load scenarios that cannot trigger protection and burn CPU or memory.

[0005] In a first aspect, the present application provides a power supply protection method for a server, comprising:

[0006] When the server is powered on, the baseboard management controller corresponding to the server acquires the CPU model information corresponding to the server through a hardware interface;

[0007] According to the CPU model information, the voltage adjustment code corresponding to the CPU model information is called in the BMC flash memory corresponding to the baseboard management controller;

[0008] burn the voltage regulation code to a voltage regulator of a CPU main power supply to dynamically set a first over-current protection point corresponding to the CPU main power supply;

[0009] determine memory information corresponding to the server, and transmit the memory information and the CPU model information to a CPLD corresponding to the server;

[0010] dynamically set, by the CPLD, a second over-current protection point corresponding to a front-end electronic fuse of the server according to the memory information and the CPU model information;

[0011] perform power supply protection on the server based on the first over-current protection point and the second over-current protection point.

[0012] In a second aspect, the present application provides a power supply protection device of a server, comprising:

[0013] a CPU model information determination module configured to acquire, by a baseboard management controller corresponding to the server through a hardware interface, CPU model information corresponding to the server when the server is powered on;

[0014] a voltage regulation code determination module configured to retrieve, according to the CPU model information, voltage regulation code corresponding to the CPU model information in a BMC flash memory corresponding to the baseboard management controller;

[0015] a first over-current protection point determination module configured to burn the voltage regulation code to a voltage regulator of a CPU main power supply to dynamically set a first over-current protection point corresponding to the CPU main power supply;

[0016] a memory information determination module configured to determine memory information corresponding to the server, and transmit the memory information and the CPU model information to a CPLD corresponding to the server;

[0017] a second over-current protection point determination module configured to dynamically set, by the CPLD, a second over-current protection point corresponding to a front-end electronic fuse of the server according to the memory information and the CPU model information;

[0018] an execution module configured to perform power supply protection on the server based on the first over-current protection point and the second over-current protection point.

[0019] In a third aspect, the present application provides a readable medium comprising execution instructions, when a processor of an electronic device executes the execution instructions, the electronic device executes the method according to any one of the first aspect.

[0020] In a fourth aspect, the present application provides an electronic device comprising a processor and a memory storing execution instructions, when the processor executes the execution instructions stored in the memory, the processor executes the method according to any one of the first aspect.

[0021] The application provides a power supply protection method and device of a server. When the server is powered on, a baseboard management controller acquires CPU model information through a hardware interface; according to the CPU model information, corresponding voltage regulation code is called in a BMC flash memory; the voltage regulation code is burned into a voltage regulator of a CPU main power supply, and a first overcurrent protection point is dynamically set; server memory information is determined, and the memory information and the CPU model information are transmitted to a CPLD; the CPLD dynamically sets a second overcurrent protection point of a front-end electronic fuse according to the memory information and the CPU model information; and the server is powered and protected based on the double protection points. The intelligent power supply protection of adaptively adjusting the overcurrent protection threshold according to the actual hardware configuration is realized, the problem that the traditional fixed protection point cannot respond to abnormal currents such as weak short circuit in a low configuration scene is effectively solved, and the server power supply reliability and hardware security are significantly improved.

[0022] Further effects of the above-described non-conventional preferred modes will be described below in conjunction with the specific embodiments. BRIEF DESCRIPTION OF DRAWINGS

[0023] In order to more clearly illustrate the embodiments of the application or the prior art technical solutions, the drawings needed in the embodiments or the prior art description will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments described in the application, and those skilled in the art can also obtain other drawings according to these drawings without creative labor.

[0024] Figure 1 A flowchart of a power supply protection method of a server provided by an embodiment of the application is shown in the figure.

[0025] Figure 2 A flowchart of another power supply protection method of a server provided by an embodiment of the application is shown in the figure.

[0026] Figure 3 A flowchart of another power supply protection method of a server provided by an embodiment of the application is shown in the figure.

[0027] Figure 4 A flowchart of another power supply protection method of a server provided by an embodiment of the application is shown in the figure.

[0028] Figure 5 A structural diagram of a power supply protection device of a server provided by an embodiment of the application is shown in the figure.

[0029] Figure 6 A structural diagram of an electronic device provided by an embodiment of the application is shown in the figure. DETAILED DESCRIPTION

[0030] In order to make the purposes, technical solutions and advantages of the present application clearer, the technical solutions of the present application will be described clearly and completely below in combination with specific embodiments and corresponding drawings. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative work belong to the protection scope of the present application.

[0031] With the continuous upgrading of server hardware performance, the increase in the number of CPU processing cores and the capacity of memory leads to a significant increase in the power consumption of the whole machine. In the current server power supply architecture, in order to ensure downward compatibility, the overcurrent protection threshold of the front-end electronic fuse (EFUSE) and the CPU main power (VCCIN) is generally set according to the highest hardware configuration supported by the model, that is, according to the current demand of the maximum power consumption CPU model (such as 350W) and the full-configuration memory (such as 32 roots), a fixed protection point is set with a 1.2 to 1.5 times redundancy coefficient. Although this design can cover the maximum load scenario, it has exposed serious defects in actual deployment: due to the wide existence of customer customization requirements, the configuration of a large number of shipped servers is far below the design upper limit (for example, only 250W CPU and 16 root memory are used), resulting in a large difference between the actual working current and the overcurrent protection threshold.

[0032] When such low-configuration servers occur abnormal working conditions such as weak short circuit (such as local breakdown of memory particles or PCB leakage), the abnormal current exceeds the normal load range, but cannot trigger the overcurrent protection mechanism of EFUSE or CPU main power due to not reaching the preset fixed protection threshold. This protection blind area makes the abnormal current continue to exist, eventually causing hardware damage accidents such as CPU or memory module burnout. Although the prior art attempts to expand the protection range by increasing the redundancy coefficient, the excessively high threshold may trigger protection by mistake, affecting system stability, and essentially cannot fundamentally solve the protection failure problem caused by configuration difference.

[0033] In order to solve this problem, the embodiments of the present application propose a power supply protection method of a server, which aims to solve the problem that in the traditional server power supply system, the fixed overcurrent protection threshold cannot adapt to the dynamic hardware configuration, resulting in the abnormal current such as weak short circuit in the low load scenario cannot trigger protection and burn CPU or memory. In the embodiments, a power supply protection method of a server includes:

[0034] Step 101, when the server is powered on, the baseboard management controller corresponding to the server obtains the CPU model information corresponding to the server through a hardware interface.

[0035] When the server completes the hardware installation and performs the power-on operation, the baseboard management controller (BMC) immediately starts the hardware identification process. The BMC establishes a communication connection with the CPU through a dedicated hardware interface, and the most commonly used communication method is through the PECI signal interface. PECI is a single-wire serial interface protocol defined by Intel, which is specially used for low-speed communication between the processor and the external management device, and has the characteristics of low power consumption and good real-time performance. The BMC can directly read the model register in the CPU by sending a standard PECI command package, and obtain detailed hardware specification information including CPU model, power consumption level, core number, etc.

[0036] In addition to the PECI interface, the BMC can also obtain CPU information through the I2C bus connected to the platform controller hub (PCH). In some server architectures, the basic information of the CPU is transmitted to the PCH through DMI, and then forwarded to the BMC by the PCH through the I2C interface. In addition, the physical in-place state of the CPU is directly transmitted to the BMC through a dedicated SKTOCC_N signal, ensuring that the BMC can accurately identify the installation state of the CPU. This multiple acquisition mechanism ensures that even if a communication path fails, the BMC can still obtain the necessary CPU model information through the backup path, thereby ensuring the normal operation of the subsequent protection mechanism.

[0037] Step 102, according to the CPU model information, call the voltage regulation code corresponding to the CPU model information in the BMC flash memory corresponding to the baseboard management controller.

[0038] Determine the target CPU model supported by the server; obtain the maximum nominal current value corresponding to each CPU target model through electrical characteristic testing; based on the preset redundancy coefficient and the maximum nominal current value, generate an overcurrent protection threshold value corresponding to the CPU target model; convert the overcurrent protection threshold value into a register configuration parameter executable by the voltage regulator to form a voltage regulation code.

[0039] After the BMC obtains accurate CPU model information, it immediately performs a table lookup operation in its built-in BMC flash memory. During the system design phase, all CPU target models supported by the server are determined in advance, including different power consumption level processor models such as 350W, 270W, 250W, 225W, etc. For each CPU model, the maximum nominal current value under full load working condition is obtained through electrical characteristic testing, and these data constitute the basic parameters for overcurrent protection design.

[0040] Based on the obtained maximum nominal current value, the system generates an overcurrent protection threshold corresponding to each CPU model using a preset redundancy coefficient (usually 1.2 to 1.5 times). The setting of this redundancy coefficient needs to find a balance point between the timeliness of protection and the risk of false triggering, both to ensure that the power supply can be quickly cut off to avoid hardware damage in abnormal situations, and to avoid false triggering of the protection mechanism in normal transient load fluctuations.

[0041] The generated overcurrent protection threshold is then converted into register configuration parameters that the voltage regulator (VR) can directly execute, which are stored in a specific digital encoding format, forming a so-called voltage regulation code (VR code). The BMC matches the recognized CPU model information in the pre-stored regulation code table to quickly locate the voltage regulation code corresponding to the current CPU power consumption level.

[0042] Step 103, burn the voltage regulation code to the voltage regulator of the CPU main power supply to dynamically set the first overcurrent protection point corresponding to the CPU main power supply.

[0043] After determining the adapted voltage regulation code, the BMC sends a burn instruction carrying the voltage regulation code to the voltage regulator of the CPU main power supply through a dedicated management bus. This burn process is actually a reprogramming operation on the threshold registers inside the voltage regulator. After receiving the burn instruction, the voltage regulator parses the voltage regulation code contained therein and writes the corresponding overcurrent protection parameter values into its internal threshold registers. These registers store the comparison reference values for current monitoring, and when the actual current exceeds this reference value, the hardware comparator will immediately trigger the protection action.

[0044] Through this dynamic burn mechanism, the first overcurrent protection point of the CPU main power supply is no longer a fixed value, but is accurately matched according to the actual installed CPU model. Compared with the traditional fixed threshold design, this method can set the protection point in a reasonable range closer to the actual load current, ensuring the effectiveness of protection and avoiding the protection blind area caused by excessive conservative setting. After the burn is completed, the BMC sends a command to the CPLD, indicating that the system can perform subsequent boot actions, ensuring that the CPU main power supply protection mechanism is configured in place before the system is formally running.

[0045] Step 104, determine the memory information corresponding to the server, and transmit the memory information and CPU model information to the CPLD corresponding to the server.

[0046] Read the memory model and capacity information of the memory bar corresponding to the server through the serial detection data signal; count the number of installed memory bars; determine the memory information based on the memory model, capacity information and number information.

[0047] After the system is powered on, the BIOS starts the memory training process, which is to determine the server memory configuration. The BIOS communicates with each memory stick through the serial presence detect (SPD) signal, which is a small EEPROM chip stored on the memory stick, recording detailed specifications of the memory stick. By reading the SPD data, the BIOS can obtain key information such as the memory model and capacity of each memory stick. At the same time, the BIOS will count the number of memory sticks actually installed in the server, identify which memory slots are occupied and which are in idle state.

[0048] Based on the collected memory model, capacity information and quantity information, the BIOS comprehensively analyzes to form complete memory information. The memory information not only includes static specification parameters, but also includes dynamic power consumption estimation and current demand calculation. The BIOS will arrange the memory information together with the previously identified CPU model information and transmit it to the server CPLD through the Sblink signal.

[0049] Step 105, CPLD dynamically sets the second overcurrent protection point corresponding to the front-end electronic fuse of the server according to the memory information and CPU model information.

[0050] After the CPLD receives the memory information and CPU model information, it immediately executes the built-in logic algorithm to calculate the most suitable second overcurrent protection point of the front-end electronic fuse according to the current hardware configuration combination. The core function of the CPLD is to control a switching circuit composed of a switching matrix composed of multiple NMOS tubes. The drain of each NMOS tube is connected to a precision resistor with different resistance values, and the source is connected to the current limiting pin of the front-end electronic fuse.

[0051] According to the calculated second overcurrent protection point, the CPLD selectively turns on the specific MOS tube, connecting the corresponding preset resistance value resistor between the current limiting pin and the ground circuit. Since the overcurrent protection threshold of the electronic fuse and the ground impedance value of the current limiting pin have a strict corresponding relationship, by changing this impedance value, the overcurrent protection point can be accurately adjusted.

[0052] Different resistance combinations can produce various impedance configurations, thereby realizing the protection threshold setting corresponding to different hardware configurations. This hardware switch control method has fast response speed and high reliability, which can ensure the accurate setting and stable work of the second overcurrent protection point.

[0053] Step 106, power protection is performed on the server based on the first overcurrent protection point and the second overcurrent protection point.

[0054] The first current value of the CPU main power and the second current value of the front-end electronic fuse are monitored; when the first current value exceeds the first overcurrent protection point, the voltage regulator cuts off the power supply output of the CPU main power; when the second current value exceeds the second overcurrent protection point, the front-end electronic fuse cuts off the power supply output to the rear-end load.

[0055] After the dynamic setting of the first overcurrent protection point and the second overcurrent protection point is completed, the server enters a normal working state, at this time, a complete double overcurrent protection mechanism is established. The system continuously monitors the first current value of the CPU main power path and the second current value of the front-end electronic fuse path, and the two monitoring points form a hierarchical protection system. When the first current value of the CPU main power exceeds the dynamically set first overcurrent protection point, the voltage regulator will immediately perform a protection action, quickly cutting off the power supply output of the CPU main power, directly protecting the CPU from overcurrent damage.

[0056] At the same time, the front-end electronic fuse, as a higher-level protection device, monitors the current condition of the entire rear-end load. When the second current value exceeds the corresponding second overcurrent protection point, the front-end electronic fuse will cut off the power supply output to all rear-end loads, including the CPU and the memory system, forming a more extensive system-level protection. This double protection mechanism not only provides multi-level security, but also can take corresponding level protection measures according to the specific location and severity of the fault, ensuring the safety of the system and minimizing unnecessary system downtime.

[0057] Through the above technical scheme, the beneficial effects of the embodiment are:

[0058] The power supply protection method of the server provided by the embodiment comprises the following steps: when the server is powered on, the baseboard management controller corresponding to the server acquires the CPU model information corresponding to the server through a hardware interface; according to the CPU model information, the voltage regulation code corresponding to the CPU model information is called in the BMC flash memory corresponding to the baseboard management controller; the voltage regulation code is burned into the voltage regulator of the CPU main power, so as to dynamically set the first overcurrent protection point corresponding to the CPU main power; the memory information corresponding to the server is determined, and the memory information and the CPU model information are transmitted to the CPLD corresponding to the server; the CPLD dynamically sets the second overcurrent protection point corresponding to the front-end electronic fuse of the server according to the memory information and the CPU model information; and the server is powered and protected based on the first overcurrent protection point and the second overcurrent protection point. The intelligent power supply protection of self-adaptive adjustment of the overcurrent protection threshold according to the actual hardware configuration is realized, the problem that the traditional fixed protection point cannot respond to abnormal currents such as weak short circuit in a low configuration scene is effectively solved, and the server power supply reliability and hardware security are significantly improved.

[0059] Figure 1The above is only a basic embodiment of a server power supply protection method according to this application. With certain optimizations and extensions, other preferred embodiments of a server power supply protection method can be obtained.

[0060] like Figure 2 The image shows another specific embodiment of a power supply protection method for a server according to this application.

[0061] In this embodiment, a power supply protection method for a server includes the following steps:

[0062] Step 201: When the server is powered on, the baseboard management controller corresponding to the server obtains the CPU model information corresponding to the server through the hardware interface.

[0063] Step 202: Based on the CPU model information, retrieve the voltage regulation code corresponding to the CPU model information from the BMC flash memory corresponding to the baseboard management controller.

[0064] Step 203: Match the corresponding CPU power consumption level according to the CPU model information.

[0065] Once the BMC obtains the specific CPU model information, the system needs to convert this model information into a standardized CPU power consumption level classification. CPU model names typically contain complex encoded information; for example, Intel processor model names might be represented as Xeon Gold 6338 or Xeon Silver 4314. While these model names contain basic processor specifications, further parsing is required to determine their precise power consumption level. The BMC's built-in model resolution algorithm performs pattern matching and table lookup operations on the obtained CPU model string, mapping the specific model to a predefined power consumption level classification.

[0066] This CPU power consumption classification is usually based on the processor's TDP (Thermal Design Power) value, such as classifying CPUs into different power consumption levels like 350W, 270W, 250W, and 225W. Each power consumption level not only represents the processor's maximum power consumption, but more importantly, reflects its current demand characteristics under different workloads.

[0067] During the matching process, BMC also considers the specific variant and stepping version of the CPU, because even processors of the same series may have slight differences in power consumption characteristics between different production batches or revisions. Through this fine-grained power consumption level matching, the system can determine the most suitable protection parameter benchmark for each specific CPU model, providing a basis for setting the first overcurrent protection point.

[0068] Step 204, find the voltage regulation code matching the CPU power consumption level from the pre-stored regulation code table in the BMC flash memory.

[0069] After determining the CPU power consumption level, the BMC immediately performs a lookup operation in the pre-stored regulation code table in the BMC flash memory. This regulation code table is a data structure formed after a large number of experiments during system design and testing, and contains complete mapping relationships between all CPU power consumption levels supported by the server and corresponding voltage regulation codes.

[0070] Each record in the regulation code table contains power consumption level identification, corresponding overcurrent protection threshold, voltage regulator register configuration parameters, and related verification information. The BMC quickly locates the record item that completely matches the current CPU power consumption level through hash lookup or binary search algorithm.

[0071] After finding the matching item, the BMC extracts the voltage regulation code stored therein, which is actually a carefully coded set of register configuration parameters. The voltage regulation code contains digital representation of current threshold, protection delay parameter, fault response configuration, and other key settings.

[0072] Step 205, burn the voltage regulation code to the voltage regulator of the CPU main power supply to dynamically set the first overcurrent protection point corresponding to the CPU main power supply.

[0073] Step 206, determine the memory information corresponding to the server, and transmit the memory information and CPU model information to the CPLD corresponding to the server.

[0074] Step 207, the CPLD dynamically sets the second overcurrent protection point corresponding to the front-end electronic fuse of the server according to the memory information and CPU model information.

[0075] Step 208, power supply protection is performed on the server based on the first overcurrent protection point and the second overcurrent protection point.

[0076] Through the above technical solution, the beneficial effects of the present embodiment are: by establishing an accurate mapping mechanism from CPU model to power consumption level, the adaptive identification and configuration of the server power supply protection system for different processor specifications are realized. Through the fast lookup mechanism of the pre-stored regulation code table, fast configuration and real-time update of the power supply protection parameters are realized. Through the standardized power consumption level classification system, good scalability and maintainability of the power supply protection scheme are realized. When a new CPU model needs to be supported, only the corresponding mapping relationship needs to be added in the regulation code table, without modifying the core protection logic code.

[0077] As Figure 3As shown, another embodiment of the power supply protection method of the server of the present application is provided. This embodiment is further described on the basis of the foregoing embodiment.

[0078] In this embodiment, the power supply protection method of the server comprises the following steps:

[0079] In step 301, when the server is powered on, the server corresponding to the baseboard management controller obtains the CPU model information corresponding to the server through the hardware interface.

[0080] In step 302, according to the CPU model information, the voltage regulation code corresponding to the CPU model information is called in the BMC flash memory corresponding to the baseboard management controller.

[0081] In step 303, the voltage regulation code is burned into the voltage regulator of the CPU main power supply to dynamically set the first overcurrent protection point corresponding to the CPU main power supply.

[0082] In step 304, the baseboard management controller sends a burning instruction carrying the voltage regulation code to the voltage regulator.

[0083] After obtaining the voltage regulation code matching the current CPU power consumption level, the baseboard management controller immediately starts the data transmission process to the voltage regulator. The BMC establishes a communication connection with the voltage regulator of the CPU main power supply through a dedicated management bus interface. The management bus interface usually adopts I2C, SMBus or a special digital power management protocol.

[0084] When constructing the burning instruction, the BMC formats and packages the previously obtained voltage regulation code according to the communication protocol requirements of the voltage regulator. Since the voltage regulation code may contain configuration parameters of multiple registers, the BMC needs to organize these parameters into a continuous data stream in the correct order and format. The BMC sends the complete burning instruction to the voltage regulator through the bus interface and starts a response waiting mechanism to monitor the execution state feedback of the voltage regulator.

[0085] In step 305, the voltage regulator updates the threshold register corresponding to the voltage regulator according to the voltage regulation code.

[0086] After receiving the burning instruction sent by the BMC, the voltage regulator starts to analyze the voltage regulation code carried in the instruction, extracts and classifies the configuration parameters contained therein into corresponding functional modules. The voltage regulator internally contains multiple dedicated threshold registers, which are respectively responsible for storing protection parameters of different types such as overcurrent protection, overvoltage protection, undervoltage protection and temperature protection. For the overcurrent protection function, the voltage regulator identifies the configuration data related to the current threshold and writes these data into the corresponding threshold register.

[0087] The register update process adopts an atomic operation mechanism to ensure that there is no intermediate state during the update process that leads to inconsistent protection parameters. When the voltage regulator performs a register write operation, it temporarily disables the related protection function to prevent accidental triggering during the parameter update process. After the new threshold parameter is written, the voltage regulator performs a parameter legality check to verify whether the set threshold is within the hardware supported range and whether there is a logical conflict between the protection parameters. After the check passes, the voltage regulator reactivates the protection function and sends an update completion confirmation signal to the BMC.

[0088] Step 306, set the first overcurrent protection point through the overcurrent protection parameter value configured in the threshold register.

[0089] After completing the threshold register update, the voltage regulator sets the first overcurrent protection point based on the newly written overcurrent protection parameter value. The digital parameter stored in the threshold register needs to be converted to an analog comparison reference voltage through an internal digital-to-analog conversion circuit, which directly determines the overcurrent protection trigger threshold.

[0090] The high-precision current detection circuit built into the voltage regulator continuously monitors the output current and converts the detected current signal to a corresponding voltage signal, which is compared with the reference voltage set by the threshold register in real time. When the voltage signal corresponding to the detected current exceeds the reference voltage, the comparator immediately outputs a protection trigger signal.

[0091] The setting of the first overcurrent protection point also involves the timing control and response characteristics configuration of the protection action. The voltage regulator sets the response time of the protection action according to the delay parameter in the threshold register, ensuring both fast response to real overcurrent faults and avoiding false triggering caused by transient current spikes.

[0092] After the protection point is set, the voltage regulator performs a self-checking program to verify the normal operation of the protection function through internal test circuits. This comprehensive protection point setting mechanism not only ensures the accuracy of the protection threshold, but also guarantees the reliability and timeliness of the protection action.

[0093] Step 307, determine the memory information corresponding to the server and transmit the memory information and CPU model information to the CPLD corresponding to the server.

[0094] Step 308, the CPLD dynamically sets the second overcurrent protection point corresponding to the front-end electronic fuse of the server according to the memory information and CPU model information.

[0095] Step 309, supply power protection to the server based on the first overcurrent protection point and the second overcurrent protection point.

[0096] Through the above technical solution, it is known that the embodiment has the beneficial effects that: through the accurate first over-current protection point setting mechanism, the personalized protection and optimal protection effect of the CPU main power path are realized. Compared with the traditional scheme of adopting a unified protection threshold, the embodiment can set the most suitable protection point according to the actual current characteristics of different CPU models, which not only ensures the timeliness and effectiveness of protection, but also maximally reduces the possibility of false triggering, thereby improving the overall reliability and usability of the system.

[0097] As shown in the figure, it is another specific embodiment of a power supply protection method of a server of the present application. The embodiment is further described on the basis of the foregoing embodiment. Figure 4

[0098] Step 401: When the server is powered on, the baseboard management controller corresponding to the server acquires the CPU model information corresponding to the server through a hardware interface.

[0099] Step 402: According to the CPU model information, the voltage regulation code corresponding to the CPU model information is called in the BMC flash memory corresponding to the baseboard management controller.

[0100] Step 403: The voltage regulation code is burned to the voltage regulator of the CPU main power to dynamically set the first over-current protection point corresponding to the CPU main power.

[0101] Step 404: The memory information corresponding to the server is determined, and the memory information and the CPU model information are transmitted to the CPLD corresponding to the server.

[0102] Step 405: The CPLD dynamically sets the second over-current protection point corresponding to the front-end electronic fuse of the server according to the memory information and the CPU model information.

[0103] Step 406: The CPLD controls the target MOS tube in the switch circuit to be turned on according to the memory information and the CPU model information.

[0104] After the CPLD receives the memory information and the CPU model information from the BIOS, it immediately starts the built-in configuration decision algorithm. This algorithm is based on pre-programmed logical rules and comprehensively analyzes the hardware configuration combination of the current system, including the power consumption level of the CPU, the number of memory sticks, the type and capacity of the memory, and other key parameters.

[0105] The CPLD internally stores a complete configuration decision table, which defines the optimal over-current protection point setting corresponding to different hardware configuration combinations. For example, when the system is configured with a CPU of 270W or more and 8 or more memory sticks, a relatively high protection threshold needs to be selected; when the system is configured with a CPU of 225W or less and less than 8 memory sticks, a lower protection threshold needs to be selected to ensure the effectiveness of protection.​

[0106] Based on the results of the configuration analysis, the CPLD determines the target MOS tube combination that needs to be turned on. The switch circuit is composed of multiple parallel NMOS tubes, each connected to a precision resistor of different resistance, forming a programmable impedance network. The CPLD precisely controls the gate voltage of the target MOS tube by outputting specific digital control signals, causing it to enter the on state. This control method has extremely high precision and reliability, ensuring that only the intended MOS tube is activated, while the others remain in the off state. The CPLD also considers the optimization of switching timing when performing switch control, using a first-off and then-on switching strategy to avoid abnormal impedance values caused by multiple resistors being connected simultaneously during the switching process.

[0107] Step 407: Connect the preset resistance between the current limit pin of the front-end electronic fuse and the ground through the turned-on MOS tube to change the ground impedance value of the current limit pin.

[0108] When the target MOS tube enters the on state under the control of the CPLD, the preset resistance connected to its drain is effectively connected in the circuit between the current limit pin of the front-end electronic fuse and the ground. These preset resistors are high-precision resistors selected with precision, with a resistance error usually controlled within ±1%, ensuring the accuracy of the protection point setting.

[0109] The ground impedance value of the current limit pin directly determines the reference level of the comparator inside the electronic fuse. Different impedance values correspond to different overcurrent protection thresholds. By selectively turning on different MOS tubes, the system can achieve flexible switching of multiple impedance configurations.

[0110] During the resistance connection process, the turned-on MOS tube needs to have a low enough on-resistance to ensure that its impact on the overall impedance value can be ignored. The NMOS tube selected by the CPLD usually has a milliohm-level on-resistance, which is completely within the acceptable range compared to the kilo- or mega-ohm-level precision resistors connected.

[0111] Step 408: Set the second overcurrent protection point according to the ground impedance value.

[0112] The front-end electronic fuse automatically adjusts its internal overcurrent protection threshold according to the ground impedance value of the current limit pin, completing the setting of the second overcurrent protection point. The electronic fuse is integrated with a precise current detection circuit and a programmable comparator inside, and the reference level of the comparator has a strict linear or logarithmic relationship with the impedance value of the current limit pin.

[0113] When the impedance value changes, the reference level of the comparator is adjusted accordingly, thereby changing the trigger point of the overcurrent protection. This impedance feedback-based protection point setting method has the advantages of fast response speed and high precision, and can take effect immediately after the impedance switching is completed.

[0114] Step 409, power supply protection is performed on the server based on the first overcurrent protection point and the second overcurrent protection point.

[0115] Through the above technical solution, the beneficial effects of the present embodiment are: through the programmable switch matrix controlled by the CPLD, the hardware-level dynamic configuration capability of the front-end electronic fuse protection parameter is realized. Through the dynamic reconfiguration mechanism of the precision impedance network, high precision and high reliability of the protection threshold setting are realized. Compared with the adjustment scheme using analog circuits or digital potentiometers, the switch resistance network used in the present embodiment has better long-term stability and temperature characteristics.

[0116] As shown in Figure 5 , it is a specific embodiment of a power supply protection device for a server of the present application. The power supply protection device for a server of the present embodiment is an entity device for executing a power supply protection method for a server. Figures 1 to 4 The technical solution of the present embodiment is essentially consistent with the above-mentioned embodiment, and the corresponding description in the above-mentioned embodiment is also applicable to the present embodiment. The power supply protection device for a server in the present embodiment comprises:

[0117] The CPU model information determination module 501 is configured to, when the server is powered on, the baseboard management controller corresponding to the server acquires the CPU model information corresponding to the server through a hardware interface;

[0118] The voltage adjustment code determination module 502 is configured to, according to the CPU model information, call the voltage adjustment code corresponding to the CPU model information in the BMC flash memory corresponding to the baseboard management controller;

[0119] The first overcurrent protection point determination module 503 is configured to burn the voltage adjustment code to the voltage regulator of the CPU main power supply, so as to dynamically set the first overcurrent protection point corresponding to the CPU main power supply;

[0120] The memory information determination module 504 is configured to determine the memory information corresponding to the server, and transmit the memory information and the CPU model information to the CPLD corresponding to the server;

[0121] The second overcurrent protection point determination module 505 is configured to dynamically set the second overcurrent protection point corresponding to the front-end electronic fuse of the server according to the memory information and the CPU model information by the CPLD;

[0122] The execution module 506 is configured to perform power supply protection on the server based on the first overcurrent protection point and the second overcurrent protection point.

[0123] Figure 6 is a structural schematic diagram of an electronic device provided by an embodiment of the present application. At the hardware level, the electronic device includes a processor, and optionally further includes an internal bus, a network interface, and a memory. The memory can include a memory such as a random-access memory (RAM), and can further include a non-volatile memory such as at least one disk memory. Of course, the electronic device can further include other hardware required by a business.

[0124] The processor, the network interface, and the memory can be connected to each other through the internal bus, which can be an industry standard architecture (ISA) bus, a peripheral component interconnect (PCI) bus, or an extended industry standard architecture (EISA) bus, etc. The bus can be divided into an address bus, a data bus, and a control bus, etc. For ease of representation, Figure 6 Only one bidirectional arrow is used in the figure to represent the bus, but it does not mean that there is only one bus or only one type of bus.

[0125] The memory is configured to store an execution instruction. Specifically, the execution instruction is a computer program that can be executed. The memory can include a memory and a non-volatile memory, and provide the processor with the execution instruction and data.

[0126] In a possible implementation manner, the processor reads corresponding execution instructions from the non-volatile memory into the memory and then runs, and can also obtain corresponding execution instructions from other devices, to form a power supply protection device of a server at a logical level. The processor executes the execution instruction stored in the memory, to implement the power supply protection method of the server provided in any embodiment of the present application through the executed execution instruction.

[0127] The above-mentioned server power supply protection method provided by the embodiments of the present application Figure 5The method executed by the power supply protection device of the server provided by the embodiment shown can be applied to a processor or implemented by the processor. The processor can be an integrated circuit chip with signal processing capability. In the implementation process, each step of the method can be completed by integrated logic circuits of hardware in the processor or instructions in the form of software. The processor mentioned above can be a general processor, including a central processing unit (CPU), a network processor (NP), etc.; or a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field-programmable gate array (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components. Each method, step and logic block disclosed in the embodiments of the present application can be implemented or executed. The general processor can be a microprocessor or any conventional processor.

[0128] The steps of the method disclosed in the embodiments of the present application can be directly embodied as hardware code processing executed by a code processor, or executed by a combination of hardware and software modules in the code processor. The software module can be located in a random access memory, a flash memory, a read-only memory, a programmable read-only memory or an electrically erasable programmable memory, a register, or other mature storage media in the field. The storage medium is located in the storage, and the processor reads the information in the storage and combines the hardware to complete the steps of the method.

[0129] The embodiments of the present application further provide a readable storage medium storing execution instructions. When the execution instructions stored in the readable storage medium are executed by a processor of an electronic device, the electronic device can execute the power supply protection method of the server provided in any one of the embodiments of the present application, and specifically execute the method shown in the embodiments of the present application. Figure 1 Or Figure 2 Or Figure 3 Or Figure 4 The method shown.

[0130] The electronic device in each of the foregoing embodiments can be a computer.

[0131] Those skilled in the art shall understand that the embodiments of the present application can be provided as a method or a computer program product. Therefore, the present application can be in the form of a complete hardware embodiment, a complete software embodiment, or a combination of software and hardware.

[0132] Each of the embodiments in the present application is described in a progressive manner, and the same or similar parts between the embodiments can be referred to each other. Each of the embodiments focuses on the difference from other embodiments. In particular, for the device embodiments, since they are basically similar to the method embodiments, they are described more simply, and the relevant parts can be referred to the part of the method embodiments.

[0133] It should also be noted that the terms "comprising", "containing", or any other variant thereof are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements, but can also include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without more limitations, the element defined by the statement "comprising a" does not exclude the existence of additional identical elements in the process, method, article, or apparatus that includes the element.

[0134] The above is only an embodiment of the present application, and is not intended to limit the present application. The present application can have various modifications and changes for those skilled in the art. Any modification, equivalent replacement, improvement, etc. within the spirit and principle of the present application shall be included in the scope of claims of the present application.

Claims

1. A power supply protection method of a server, characterized by, The method comprises the following steps: When the server is powered on, the server corresponding to the baseboard management controller obtains the CPU model information corresponding to the server through a hardware interface; According to the CPU model information, the voltage regulation code corresponding to the CPU model information is called in the BMC flash memory corresponding to the baseboard management controller; The voltage regulation code is burned into the voltage regulator of the CPU main power supply to dynamically set the first overcurrent protection point corresponding to the CPU main power supply; Determine the memory information corresponding to the server, and transmit the memory information and the CPU model information to the CPLD corresponding to the server; The CPLD dynamically sets the second overcurrent protection point corresponding to the front-end electronic fuse of the server according to the memory information and the CPU model information; Based on the first overcurrent protection point and the second overcurrent protection point, the server is powered on for protection.

2. The method of claim 1, wherein, Further comprising: Determine the CPU target model supported by the server; Obtain the maximum nominal current value corresponding to each CPU target model through electrical characteristic test; Based on the preset redundancy coefficient and the maximum nominal current value, generate the overcurrent protection threshold value corresponding to the CPU target model; Convert the overcurrent protection threshold value into a register configuration parameter executable by the voltage regulator to form the voltage regulation code.

3. The method of claim 1, wherein, The voltage regulation code corresponding to the CPU model information is called in the BMC flash memory corresponding to the baseboard management controller, which comprises: According to the CPU model information, the CPU power consumption level corresponding to the CPU model information is matched; From the pre-stored regulation code table in the BMC flash memory, the voltage regulation code matched with the CPU power consumption level is found.

4. The method of claim 1, wherein, The voltage regulation code is burned into the voltage regulator of the CPU main power supply to dynamically set the first overcurrent protection point corresponding to the CPU main power supply, which comprises: The baseboard management controller sends a burning instruction carrying the voltage regulation code to the voltage regulator; The voltage regulator updates the threshold register corresponding to the voltage regulator according to the voltage regulation code; The first overcurrent protection point is set through the overcurrent protection parameter value configured in the threshold register.

5. The method of claim 1, wherein, The determination of the memory information corresponding to the server comprises: Read the memory model and capacity information of the memory bank corresponding to the server through serial detection data signal; Count the number of memory banks installed; Determine the memory information based on the memory model, the capacity information and the number information.

6. The method of claim 5, wherein, The CPLD dynamically sets the second overcurrent protection point corresponding to the front-end electronic fuse of the server according to the memory information and the CPU model information, which comprises: The CPLD controls the target MOS tube in the switch circuit to be turned on according to the memory information and the CPU model information; By turning on the MOS tube, a resistance with a preset resistance value is connected between the current limiting pin of the front-end electronic fuse and the ground wire to change the ground impedance value of the current limiting pin; The second overcurrent protection point is set according to the ground impedance value.

7. The method of claim 6, wherein, The power supply protection of the server based on the first over-current protection point and the second over-current protection point comprises: monitoring the first current value of the CPU main power and the second current value of the front-end electronic fuse; when the first current value exceeds the first over-current protection point, the voltage regulator cuts off the power supply output of the CPU main power; when the second current value exceeds the second over-current protection point, the front-end electronic fuse cuts off the power supply output to the rear-end load.

8. A power supply protection apparatus of a server, characterized by comprising: comprise: a CPU model information determination module configured to, when the server is powered on, the baseboard management controller corresponding to the server acquires the CPU model information corresponding to the server through a hardware interface; a voltage regulation code determination module configured to, according to the CPU model information, call the voltage regulation code corresponding to the CPU model information in the BMC flash memory corresponding to the baseboard management controller; a first over-current protection point determination module configured to burn the voltage regulation code to the voltage regulator of the CPU main power to dynamically set the first over-current protection point corresponding to the CPU main power; a memory information determination module configured to determine the memory information corresponding to the server, and transmit the memory information and the CPU model information to the CPLD corresponding to the server; a second over-current protection point determination module configured to, according to the memory information and the CPU model information, the CPLD dynamically sets the second over-current protection point corresponding to the front-end electronic fuse of the server; an execution module configured to perform power supply protection of the server based on the first over-current protection point and the second over-current protection point.

9. A computer readable storage medium, the storage medium having stored thereon a computer program, characterized in that, The computer program is used to execute the power supply protection method of the server in any one of the above claims 1-7.

10. An electronic device, comprising: The electronic device comprises: a processor; a memory for storing executable instructions of the processor; the processor is used to read the executable instructions from the memory and execute the instructions to realize the power supply protection method of the server in any one of the above claims 1-7.

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