Package substrate and package structure having the same

Abstract

The application provides a packaging substrate and a packaging structure. The packaging substrate of the embodiment of the application comprises a solder resist layer, a copper layer and a substrate which are sequentially stacked, the solder resist layer comprises a first solder resist part on the copper layer and a second solder resist part on the substrate; the packaging structure further has a first channel and a second channel, the first channel penetrates the copper layer along the thickness direction of the substrate, and part of the first solder resist part is filled into the first channel; the second channel penetrates the second solder resist part along the thickness direction of the substrate. Therefore, the packaging substrate of the embodiment of the application has the characteristic that the solder resist layer, the copper layer and the substrate and the plastic package in the subsequent plastic package process are not prone to delamination.

Description

Technical Field

[0001] This invention relates to the field of chip packaging technology, and in particular to a packaging substrate and packaging structure. Background Technology

[0002] In the manufacturing process of traditional packaged products, a packaging solution combining ink and molding compound is typically used. For high-power device packaged products, due to their functional requirements, various types of components such as large inductors and MOSFETs need to be integrated inside the package.

[0003] Due to the space constraints of miniaturization and high integration of terminal products, the spacing between various components inside the package and the package edge often needs to be controlled within 0.5mm.

[0004] These types of packaged products must undergo multiple rounds of high and low temperature cycling reliability tests before leaving the factory. However, due to the significant differences in the coefficients of thermal expansion (CTE) of different materials such as ink, molding compound, substrate, and copper within the packaging system, large thermal stresses are generated between these materials during high and low temperature cycling. This thermal stress is concentrated and released in the narrow gap between the device and the package edge, which can easily lead to interface delamination failure. Specifically, this manifests as delamination between the molding compound and ink, or delamination between the ink and the substrate or copper foil, severely affecting the structural stability and long-term reliability of the packaged product.

[0005] Therefore, the packaging structure in related technologies is prone to delamination of the solder mask layer, copper layer, and molding compound layer. Summary of the Invention

[0006] This invention provides a packaging substrate to solve the problem of delamination of the solder mask layer, copper layer and molding compound layer in packaging structures in related technologies.

[0007] The packaging substrate of this invention includes a solder resist layer, a copper layer and a substrate stacked sequentially, wherein the solder resist layer includes a first solder resist portion located on the copper layer and a second solder resist portion located on the substrate; The packaging structure also has a first channel and a second channel, wherein the first channel penetrates the copper layer along the thickness direction of the substrate, and a portion of the first solder mask is filled into the first channel; The second channel extends through the second solder mask portion along the thickness direction of the substrate.

[0008] It is understandable that by providing a first channel penetrating through the copper layer in its thickness direction, a portion of the solder resist layer can be filled into the first channel, that is, a portion of the first solder resist portion can be filled into the first channel. Since the copper layer is stacked on the substrate, the first solder resist portion filled into the first channel can be connected to the substrate. Due to the large surface roughness and high toughness of the substrate, the connection strength between the first solder resist portion in the first channel and the substrate is greater. The high toughness can also adapt to the deformation caused by temperature changes at the connection between the first solder resist portion and the substrate, making it less prone to delamination. At the same time, the first solder resist portion in the first channel also connects other portions of the first solder resist portion to the substrate. That is to say, the first solder resist portion is connected to the substrate in addition to being connected to the copper layer. This connection method can further improve the connection strength between the first solder resist portion, the copper layer and the substrate, that is, further improve the connection strength between the solder resist layer, the copper layer and the substrate, making it less prone to delamination between the solder resist layer, the copper layer and the substrate.

[0009] Similarly, by providing a second channel penetrating through the second solder resist portion of the solder resist layer in its thickness direction, during the subsequent molding process, the molded body is placed on the surface of the solder resist layer, and part of the molded body can fill into the second channel and connect with the substrate, thereby improving the connection strength between the molded body, the second solder resist portion and the substrate. In other words, it can improve the connection strength between the molded body, the solder resist layer and the substrate, making it less likely for delamination to occur between the molded body, the solder resist layer and the substrate.

[0010] Therefore, the packaging substrate of the present invention has the characteristic that it is less likely to delaminate between the solder mask layer, the copper layer, the substrate, and the molding compound in the subsequent molding process. In some embodiments, the solder mask layer is located inside the first channel and is divided into a first connecting portion, which is connected to the substrate and the solder mask layer.

[0011] In some embodiments, there are multiple first channels, the sum of the projected areas of the multiple first channels in the thickness direction of the substrate is A, and the projected area of ​​the copper layer in the thickness direction of the substrate is B, wherein A / B is 0.3-0.5.

[0012] In some embodiments, a plurality of the first channels are disposed adjacent to the outer edge of the substrate, and the plurality of the first channels are spaced apart circumferentially along the substrate.

[0013] In some embodiments, the distance E between the projection of the first channel onto the thickness direction of the substrate and the projection of the substrate onto its thickness direction is 100-300 μm.

[0014] In some embodiments, there are multiple second channels, the sum of the projected areas of the multiple second channels in the thickness direction of the substrate is C, the projected area of ​​the solder resist layer in the thickness direction of the substrate is D, and C / D is 0.3-0.5.

[0015] In some embodiments, the thickness of the solder resist layer is 10-35 μm; and / or, the thickness of the copper layer is 15-35 μm.

[0016] In some embodiments, the cross-sectional shape of the first channel is rectangular or circular; the cross-sectional shape of the second channel is rectangular or circular.

[0017] The present invention also provides a packaging structure.

[0018] The packaging structure of this invention includes: The packaging substrate as described in the above embodiments; The components are disposed on the top surface of the packaging substrate, and the packaging substrate is electrically connected to the copper layer; A molding compound is disposed on the top surface of the packaging substrate to encapsulate the component, and a portion of the molding compound fills the first channel and the second channel.

[0019] In some embodiments, the portion of the molding compound located within the first channel is a second connection portion, which is connected to the substrate and to the solder resist layer. Attached Figure Description

[0020] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the description of the embodiments of the present invention will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0021] Figure 1 This is a schematic diagram of the packaging substrate according to an embodiment of the present invention; Figure 2 These are schematic diagrams of multiple structures of the packaging structure according to embodiments of the present invention; Figure 3 This is a cross-sectional view of the packaging substrate in an embodiment of the present invention.

[0022] In the picture: 100. Packaging substrate; 200. Packaging structure; 1. Substrate; 2. Copper layer; 3. Solder resist layer; 301. First solder resist section; 302. Second solder resist section; 4. Plastic sealant; 5. First passage; 6. Second channel; 7. First connecting part; 8. Second connecting part. Detailed Implementation

[0023] To make the technical problems solved, the technical solutions, and the beneficial effects of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.

[0024] In the description of this invention, it should be understood that the terms "longitudinal," "radial," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," and "outer," etc., indicating orientation or positional relationships, are based on the orientation or positional relationships shown in the accompanying drawings and are only for the convenience of describing the invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of the invention. In the description of this invention, unless otherwise stated, "a plurality of" means two or more.

[0025] In the description of this invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "joining" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal encapsulation of two components. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0026] In order to address the problem that the solder mask layer 3, copper layer 2 and molding compound layer are prone to delamination in the packaging structure 200 of related technologies, the present invention provides a packaging substrate 100.

[0027] The packaging substrate 100 of this embodiment includes a solder resist layer 3, a copper layer 2 and a substrate 1 stacked sequentially. The solder resist layer 3 includes a first solder resist portion 301 located on the copper layer 2 and a second solder resist portion 302 located on the substrate 1. The packaging structure 200 also has a first channel 5 and a second channel 6. The first channel 5 penetrates the copper layer 2 along the thickness direction of the substrate 1, and a portion of the first solder resist portion 301 fills the first channel 5. The second channel 6 penetrates the second solder resist portion 302 along the thickness direction of the substrate 1.

[0028] It is understandable that by providing a first channel 5 penetrating through the copper layer 2 in its thickness direction, a portion of the solder resist layer 3 can be filled into the first channel 5, that is, a portion of the first solder resist portion 301 can be filled into the first channel 5. Since the copper layer 2 is stacked on the substrate 1, the first solder resist portion 301 filled into the first channel 5 can be connected to the substrate 1. Due to the large surface roughness and high toughness of the substrate 1, the connection strength between the first solder resist portion 301 in the first channel 5 and the substrate 1 is greater, and the higher toughness can also accommodate the first solder resist portion 301 and the substrate 1. The deformation caused by temperature changes at the connection point makes it less prone to delamination. At the same time, the first solder mask 301 in the first channel 5 also connects the first solder mask 301 of other parts to the substrate 1. That is to say, the first solder mask 301 is connected to the substrate 1 in addition to being connected to the copper layer 2. This connection method can further improve the connection strength between the first solder mask 301, the copper layer 2 and the substrate 1, that is, further improve the connection strength between the solder mask layer 3, the copper layer 2 and the substrate 1, so that the delamination problem between the solder mask layer 3, the copper layer 2 and the substrate 1 is less likely to occur.

[0029] Similarly, by providing a second channel 6 through the second solder resist portion 302 of the solder resist layer 3 in its thickness direction, during the subsequent molding process, the molding compound 4 is disposed on the surface of the solder resist layer 3, and part of the molding compound 4 can fill into the second channel 6 and be connected to the substrate 1, thereby improving the connection strength between the molding compound 4, the second solder resist portion 302 and the substrate 1. In other words, it can improve the connection strength between the molding compound 4, the solder resist layer 3 and the substrate 1, making it less likely for delamination to occur between the molding compound 4, the solder resist layer 3 and the substrate 1.

[0030] Therefore, the packaging substrate 100 of the present invention has the characteristic that it is not easy for delamination to occur between the solder resist layer 3, the copper layer 2 and the substrate 1 and the molding compound 4 in the subsequent molding process.

[0031] In some embodiments, the first solder mask portion 301 is located inside the first channel 5 and is divided into a first connecting portion 7. The first connecting portion 7 is connected to the substrate 1 and the first connecting portion 7 is connected to the solder mask layer 3.

[0032] It is understandable that, since the first channel 5 penetrates the copper layer 2, the first connecting portion 7 located within the first channel 5 is connected to the copper layer 2. At the same time, since the copper layer 2 is stacked on the substrate 1, the first connecting portion 7 filling the first channel 5 can be connected to the substrate 1. In other words, the first connecting portion 7 is connected to the substrate 1 in addition to being connected to the copper layer 2. This connection method can further improve the connection strength between the first solder resist portion 301, the copper layer 2, and the substrate 1, that is, further improve the connection strength between the solder resist layer 3, the copper layer 2, and the substrate 1, making it less likely for delamination to occur between the solder resist layer 3, the copper layer 2, and the substrate 1. At the same time, due to the large surface roughness and strong toughness of the substrate 1, the connection strength between the first connecting portion 7 and the substrate 1 is even greater. The strong toughness can also adapt to the deformation caused by temperature changes at the connection between the first connecting portion 7 and the substrate 1, making it less likely for delamination to occur.

[0033] In some embodiments, such as Figure 3 As shown, there are multiple first channels 5, and the sum of the projected areas of the multiple first channels 5 in the thickness direction of the substrate 1 is A, and the projected area of ​​the copper layer 2 in the thickness direction of the substrate 1 is B, where A / B is 0.3-0.5.

[0034] Preferably, the A / B ratio is 0.30, 0.32, 0.34, 0.36, 0.38, 0.40, 0.42, 0.44, 0.46, 0.48, or 0.50.

[0035] It is understandable that if the A / B value is too large, although it can improve the connection strength between the solder mask layer 3, the copper layer 2 and the substrate 1, an excessively large A / B value means that the remaining area of ​​the copper layer 2 will be too small, which will affect the heat dissipation performance of the packaging substrate 100. If the A / B value is too small, although it can improve the heat dissipation performance of the packaging substrate 100, the insufficient area of ​​the first channel 5 will affect the connection strength between the solder mask layer 3, the copper layer 2 and the substrate 1.

[0036] Therefore, by setting the ratio A / B between the sum of the projected areas A of the multiple first channels 5 in the thickness direction of the substrate 1 and the projected area B of the copper layer 2 in the thickness direction of the substrate 1 to the range described above, the heat dissipation performance of the packaging substrate 100 can be guaranteed while ensuring the connection strength between the solder resist layer 3, the copper layer 2 and the substrate 1.

[0037] In some embodiments, a plurality of first channels 5 are disposed adjacent to the outer edge of the substrate 1, and the plurality of first channels 5 are disposed at intervals along the circumferential direction of the substrate 1.

[0038] It is understandable that multiple first channels 5 are arranged near the outer edge of the substrate 1. That is, there is a gap between the first channels 5 and the outer edge of the substrate 1. This can improve the connection strength between the solder resist layer 3, copper layer 2 and substrate 1 of the packaging substrate 100 and avoid delamination between the solder resist layer 3, copper layer 2 and substrate 1. It can also avoid affecting the connection strength between the multiple first channels 5 and the solder resist layer 3, copper layer 2 and substrate 1 at the outer edge of the substrate 1.

[0039] Meanwhile, multiple first channels 5 are arranged at intervals along the circumference of the substrate 1, which can better improve the connection strength between the solder resist layer 3, the copper layer 2 and the substrate 1, and better avoid the problem of delamination between the solder resist layer 3, the copper layer 2 and the substrate 1.

[0040] In some embodiments, the distance E between the projection of the first channel 5 in the thickness direction of the substrate 1 and the projection of the substrate 1 in its thickness direction is 100-300 μm.

[0041] Preferably, the distance between the projection of the first channel 5 in the thickness direction of the substrate 1 and the projection of the substrate 1 in its thickness direction is 100μm, 120μm, 140μm, 160μm, 180μm, 200μm, 220μm, 240μm, 260μm, 280μm, or 300μm.

[0042] It is understood that by setting the distance between the projection of the first channel 5 in the thickness direction of the substrate 1 and the projection of the substrate 1 in its thickness direction to the range described above, it is possible to improve the connection strength between the solder resist layer 3, the copper layer 2 and the substrate 1 of the packaging substrate 100 and avoid delamination problems between the solder resist layer 3, the copper layer 2 and the substrate 1, while avoiding the impact on the connection strength between the multiple first channels 5 and the solder resist layer 3, the copper layer 2 and the substrate 1 at the outer edge of the substrate 1.

[0043] In some embodiments, there are multiple second channels 6, the sum of the projected areas of the multiple second channels 6 in the thickness direction of the substrate 1 is C, the projected area of ​​the solder resist layer 3 in the thickness direction of the substrate 1 is D, and C / D is 0.3-0.5.

[0044] Preferably, the C / D ratio is 0.30, 0.32, 0.34, 0.36, 0.38, 0.40, 0.42, 0.44, 0.46, 0.48, or 0.50.

[0045] It is understandable that if the C / D value is too large, it means that the projected area of ​​multiple second channels 6 in the thickness direction of the substrate 1 is too large, which will increase the processing cost of the second channels 6; if the C / D value is too small, it means that the projected area of ​​multiple second channels 6 in the thickness direction of the substrate 1 is too small, which will affect the connection strength between the molding compound 4, the solder mask layer 3 and the substrate 1 in the subsequent molding process.

[0046] Therefore, by setting the ratio C / D between the sum of the projected areas C of the multiple second channels 6 in the thickness direction of the substrate 1 and the projected area D of the solder mask layer 3 in the thickness direction of the substrate 1 to the range described above, it is possible to ensure the connection strength between the molding compound 4, the solder mask layer 3 and the substrate 1 during the subsequent molding process and to avoid delamination between the molding compound 4, the solder mask layer 3 and the substrate 1, while avoiding excessive increases in the processing cost of the second channels 6.

[0047] In some embodiments, the thickness of the solder mask layer 3 is 10-35 μm; and / or, the thickness of the copper layer 2 is 15-35 μm.

[0048] Preferably, the thickness of the solder mask layer 3 is 10μm, 12μm, 14μm, 16μm, 18μm, 20μm, 22μm, 24μm, 26μm, 28μm, 30μm, 32μm, 34μm, or 35μm; Preferably, the thickness of the copper layer 2 is 15μm, 17μm, 19μm, 21μm, 23μm, 25μm, 27μm, 29μm, 31μm, 33μm, or 35μm; It is understandable that by setting the thickness of the solder mask 3 to the above range, it is possible to achieve a protective effect while avoiding the use of excessive solder mask 3, which would increase costs.

[0049] At the same time, by setting the thickness of copper layer 2 to the above range, it is possible to increase costs by using too much copper layer 2 while still meeting the conductivity requirements.

[0050] In some embodiments, the cross-sectional shape of the first channel 5 is rectangular or circular; the cross-sectional shape of the second channel 6 is rectangular or circular.

[0051] It is understood that the cross-sectional shape of the first channel 5 and the cross-sectional shape of the second channel 6 can be set by those skilled in the art according to actual needs.

[0052] The present invention also provides a packaging structure 200.

[0053] The packaging structure 200 of this invention includes a packaging substrate 100 as described in the above embodiments, and also includes components and a molding compound 4. The components are disposed on the top surface of the packaging substrate 100, and the packaging substrate 100 is electrically connected to the copper layer 2; the molding compound 4 is disposed on the top surface of the packaging substrate 100 to encapsulate the components, and a portion of the molding compound 4 fills the first channel 5 and the second channel 6.

[0054] In some embodiments, the portion of the molding compound 4 located within the first channel 5 is the second connecting portion 8, which is connected to the substrate 1 and to the solder mask layer 3.

[0055] It is understandable that, since the second channel 6 penetrates the second solder resist 302, that is, the second channel 6 penetrates the solder resist layer 3, the second connecting part 8 located in the second channel 6 is connected to the second solder resist 302. At the same time, since the second solder resist 302 is stacked on the substrate 1, the second connecting part 8 filling the second channel 6 can be connected to the substrate 1. In other words, the second connecting part 8 is connected to the substrate 1 in addition to being connected to the second solder resist 302. This connection method can further improve the connection strength between the molding compound 4, the second solder resist 302 and the substrate 1, that is, further improve the connection strength between the molding compound 4, the solder resist layer 3 and the substrate 1, so that the delamination problem between the molding compound 4, the solder resist layer 3 and the substrate 1 is not likely to occur.

[0056] Meanwhile, due to the large surface roughness and strong toughness of the substrate 1, the connection strength between the second connecting part 8 and the substrate 1 is greater. The strong toughness can also adapt to the deformation caused by temperature changes at the connection between the second connecting part 8 and the substrate 1, and it is not easy for delamination to occur.

[0057] The above-described embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be included within the protection scope of the present invention.

Claims

1. A packaging substrate, characterized in that, It includes a solder resist layer (3), a copper layer (2) and a substrate (1) stacked in sequence. The solder resist layer (3) includes a first solder resist portion (301) located on the copper layer (2) and a second solder resist portion (302) located on the substrate (1). The packaging structure (200) also has a first channel (5) and a second channel (6), the first channel (5) penetrating the copper layer (2) along the thickness direction of the substrate (1), and a portion of the first solder mask (301) filling the first channel (5); The second channel (6) penetrates the second solder mask portion (302) along the thickness direction of the substrate (1).

2. The packaging substrate according to claim 1, characterized in that, The solder resist layer (3) is located inside the first channel (5) and is divided into a first connecting part (7). The first connecting part (7) is connected to the substrate (1) and the first connecting part (7) is connected to the solder resist layer (3).

3. The packaging substrate according to claim 1, characterized in that, There are multiple first channels (5), and the sum of the projected areas of the multiple first channels (5) in the thickness direction of the substrate (1) is A, and the projected area of ​​the copper layer (2) in the thickness direction of the substrate (1) is B, where A / B is 0.3-0.

5.

4. The packaging substrate according to claim 3, characterized in that, A plurality of first channels (5) are disposed adjacent to the outer edge of the substrate (1), and the plurality of first channels (5) are disposed at circumferential intervals along the substrate (1).

5. The packaging substrate according to claim 4, characterized in that, The distance E between the projection of the first channel (5) in the thickness direction of the substrate (1) and the projection of the substrate (1) in its thickness direction is 100-300μm.

6. The packaging substrate according to claim 1, characterized in that, There are multiple second channels (6), and the sum of the projected areas of the multiple second channels (6) in the thickness direction of the substrate (1) is C. The projected area of ​​the solder resist layer (3) in the thickness direction of the substrate (1) is D, and C / D is 0.3-0.

5.

7. The packaging substrate according to claim 1, characterized in that, The thickness of the solder resist layer (3) is 10-35 μm, and the thickness of the copper layer (2) is 15-35 μm.

8. The packaging substrate according to claim 1, characterized in that, The first channel (5) has a rectangular or circular cross-sectional shape; the second channel (6) has a rectangular or circular cross-sectional shape.

9. A packaging structure, characterized in that, include: The packaging substrate (100) as described in any one of claims 1-8; The components are disposed on the top surface of the packaging substrate (100), and the packaging substrate (100) is electrically connected to the copper layer (2). A molding compound (4) is disposed on the top surface of the packaging substrate (100) to encapsulate the component, and a portion of the molding compound (4) fills the first channel (5) and the second channel (6).

10. The packaging structure according to claim 9, characterized in that, The portion of the molding compound (4) located within the first channel (5) is the second connecting portion (8), which is connected to the substrate (1) and the solder resist layer (3).

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