Silicon carbide high-temperature ohmic contact electrode and method of making same

Abstract

The application provides a silicon carbide high-temperature ohmic contact electrode and a preparation method thereof, and belongs to the technical field of silicon carbide device manufacturing; the technical problem to be solved is that the existing high-temperature SiC ohmic contact electrode has large interface stress, is easy to diffuse and peel off, and has poor high-temperature stability; the technical scheme for solving the technical problem is that the electrode comprises a substrate, a Ti adhesion layer is deposited on the surface of the substrate, a Ti:W continuous gradient transition layer is deposited on the surface of the Ti adhesion layer, a W barrier layer is deposited on the surface of the Ti:W continuous gradient transition layer, and a Pt electrode layer is deposited on the surface of the W barrier layer; the application is applied to the fields of aerospace, oil exploration, new energy vehicles, smart grids and the like.

Description

Technical Field

[0001] This application relates to the field of silicon carbide device manufacturing technology, and in particular to a silicon carbide high-temperature resistant ohmic contact electrode and its preparation method. Background Technology

[0002] Silicon carbide (SiC), as a third-generation wide-bandgap semiconductor material, possesses characteristics such as a large bandgap, high critical breakdown electric field, and excellent thermal conductivity. It can operate stably in extreme environments of high temperature, high frequency, and high power, and is widely used in aerospace, oil exploration, new energy vehicles, smart grids, and other fields. It is a core material for devices such as high-temperature pressure sensors. The ohmic contact between the metal and SiC is a critical structure for the signal input and output of these devices; its contact resistance, thermal stability, and interfacial bonding directly determine the device's conduction characteristics, operating performance, and long-term reliability.

[0003] Existing SiC ohmic contact electrodes have the following defects: (1) Traditional titanium / gold (Ti / Au) electrode: Au diffuses rapidly at high temperature, the interface is oxidized and a high-resistivity phase is generated, and the contact performance degrades sharply; (2) Titanium / Platinum / Gold (Ti / Pt / Au) electrode: Pt can block Au diffusion, but the thermal stress mismatch at the SiC and Ti interface is severe, and the film is prone to cracking and peeling during high-temperature thermal cycling; (3) Uniform titanium-tungsten alloy (TiW) electrode: Although it has a certain diffusion barrier capability, Ti and TiW are abrupt interfaces, and the stress cannot be buffered. The high temperature stability is still insufficient, making it difficult to meet the long-term working requirements above 600℃.

[0004] The aforementioned existing technologies have failed to effectively address the synergistic failure problem between the enormous thermal stress and interfacial diffusion caused by the mismatch in thermal expansion coefficients between the metallization system and SiC under high-temperature conditions. Therefore, achieving SiC ohmic contacts with low contact resistance, high thermal stability, and high interfacial adhesion is a core technical challenge for promoting the practical application of SiC high-temperature devices. Summary of the Invention

[0005] To address the aforementioned technical problems, this application proposes a silicon carbide high-temperature resistant ohmic contact electrode and its preparation method.

[0006] The technical solution adopted in this application is: a silicon carbide high-temperature ohmic contact electrode, comprising a substrate, a Ti adhesion layer deposited on the surface of the substrate, a Ti:W continuous gradient transition layer deposited on the surface of the Ti adhesion layer, a W barrier layer deposited on the surface of the Ti:W continuous gradient transition layer, and a Pt electrode layer deposited on the surface of the W barrier layer.

[0007] Furthermore, the thickness of the Ti adhesion layer is 50nm~150nm.

[0008] Furthermore, the thickness of the Ti:W continuous gradient transition layer is 50nm~120nm.

[0009] Furthermore, the thickness of the W barrier layer is 50nm~150nm.

[0010] Furthermore, the thickness of the Pt electrode layer is 100nm~200nm.

[0011] Furthermore, a method for preparing the silicon carbide high-temperature ohmic contact electrode as described above includes the following steps: Step 1: Clean the substrate; Step 2: Perform photolithography on the substrate to form electrode pattern windows; Step 3: Sequentially deposit the Ti adhesion layer, the Ti:W continuous gradient transition layer, the W barrier layer, and the Pt electrode layer within the electrode pattern window; Step 4: Remove excess metal from the electrode pattern window using a stripping process to obtain the electrode chip; Step 5: Perform rapid thermal annealing on the electrode chip to form an ohmic contact electrode.

[0012] Furthermore, step 3 specifically includes the following steps: Step 3.1: Place the substrate into the magnetron sputtering chamber. Under an Ar atmosphere, deposit the Ti adhesion layer on the substrate surface using a DC sputtering process. Use Ti with a purity ≥99.99% as the target material. The discharge power is 300W~600W, the gas flow rate is 30sccm, and the vacuum degree of the magnetron sputtering chamber is ≤5×10⁻⁶. -5 Pa; Step 3.2: Under an Ar atmosphere, a Ti:W continuous gradient transition layer is deposited on the surface of the Ti adhesion layer using a multi-target magnetron co-sputtering process. Ti with a purity ≥99.99% and W with a purity ≥99.99% are used as targets. The discharge power of the Ti target is constant at 230W~350W, while the discharge power of the W target gradually increases from 0W to 80W~150W within 3min~8min. The gas flow rate is 30sccm~60sccm, and the vacuum degree of the magnetron sputtering chamber is ≤5×10⁻⁶. -5 Pa; Step 3.3: Deposit the W barrier layer on the surface of the Ti:W continuous gradient transition layer using a DC sputtering process, using W with a purity ≥99.99% as the target material, with a discharge power of 300W~450W, and the vacuum degree of the magnetron sputtering chamber ≤5×10⁻⁶. -5 Pa; Step 3.4: Under an Ar atmosphere, deposit the Pt electrode layer on the surface of the W barrier layer using radio frequency magnetron sputtering. Use Pt with a purity ≥99.99% as the target material, a gas flow rate of 30 sccm, and a vacuum level ≤5×10⁻⁶ in the magnetron sputtering chamber. -5 Pa, firstly, a Pt electrode layer with a discharge working power of 300W~500W and a sputtering thickness of 35nm~70nm is set, and then a Pt electrode layer with a discharge working power of 80W~120W and a sputtering thickness of 65nm~130nm is set, and the total thickness of the Pt electrode layer is 100nm~200nm.

[0013] Further, in step 1, the substrate is subjected to standard RCA cleaning, the natural oxide layer on the substrate surface is removed using a dilute HF solution, and the substrate surface is dried using nitrogen gas.

[0014] Further, in step 5, the electrode chip is placed in a rapid annealing furnace and annealed in a vacuum atmosphere at 950℃~1050℃ for 90s~180s to obtain the ohmic contact electrode.

[0015] The advantages of this application over the prior art are as follows: (1) Gradient stress buffer: The Ti:W gradient transition layer can achieve a smooth transition of thermal expansion coefficient from Ti adhesion layer to W barrier layer, thereby greatly reducing interfacial thermal stress during high-temperature annealing and thermal cycling, and avoiding film cracking and peeling.

[0016] (2) Enhanced diffusion barrier: The gradient structure can actively accommodate the Ti adhesion layer and inhibit the upward diffusion of Ti atoms. At the same time, the W barrier layer isolates Pt from the reaction with the lower layer, significantly improving high-temperature thermal stability.

[0017] (3) Interface repair and low-resistivity contact: The micro-diffusion of Ti at the bottom of the Ti:W gradient transition layer can repair the micro-defects at the interface of the Ti adhesion layer; the Ti adhesion layer and SiC are annealed at high temperature to generate TiC compound, forming an extremely low Schottky barrier at the interface, thus achieving low specific contact resistivity.

[0018] (4) Multi-mechanism synergy achieves high temperature and long life: Through the synergistic superposition of three mechanisms in the multilayer film system, namely gradient stress buffer, diffusion barrier enhancement and interface repair and low resistance contact, the contact resistance of the electrode can still maintain a very small drift after aging due to long-term operation in an environment close to the SiC limit temperature, thus breaking through the bottleneck that a single structure cannot take into account both low resistance and high reliability. Attached Figure Description

[0019] The following description, in conjunction with the accompanying drawings, further illustrates this application: Figure 1This is a schematic diagram of the ohmic contact electrode in this application; In the figure: 1 is the substrate, 2 is the Ti adhesion layer, 3 is the Ti:W continuous gradient transition layer, 4 is the W barrier layer, and 5 is the Pt electrode layer. Detailed Implementation

[0020] like Figure 1 As shown, this application provides a silicon carbide high-temperature ohmic contact electrode, comprising a 4H-SiC substrate 1, a Ti adhesion layer 2 deposited on the surface of the substrate 1, a Ti:W continuous gradient transition layer 3 deposited on the surface of the Ti adhesion layer 2, a W barrier layer 4 deposited on the surface of the Ti:W continuous gradient transition layer 3, and a Pt electrode layer 5 deposited on the surface of the W barrier layer 4. The thickness of the Ti adhesion layer 2 is 50 nm to 150 nm (preferably 100 nm), the thickness of the Ti:W continuous gradient transition layer 3 is 50 nm to 120 nm (preferably 80 nm), and in the Ti:W continuous gradient transition layer 3, from the side closest to the Ti adhesion layer 2 to the side closest to the W barrier layer 4, the percentage of W atoms gradually increases from 0 at% to 35 at% to 40 at%. The thickness of the W barrier layer 4 is 50 nm to 150 nm (preferably 100 nm), and the thickness of the Pt electrode layer 5 is 100 nm to 200 nm (preferably 150 nm).

[0021] A method for preparing the silicon carbide high-temperature ohmic contact electrode as described above includes the following steps: Step 1: Perform standard RCA cleaning on substrate 1, remove the native oxide layer on the surface of substrate 1 using dilute HF solution, and dry the surface of substrate 1 using nitrogen gas. Step 2: Spin-coat photoresist onto the surface of substrate 1, and then perform pre-baking, mask exposure, development, and hardening to form electrode pattern windows; Step 3: Sequentially deposit Ti adhesion layer 2, Ti:W continuous gradient transition layer 3, W barrier layer 4, and Pt electrode layer 5 within the electrode pattern window, specifically including the following steps: Step 3.1: Place substrate 1 into the magnetron sputtering chamber. Under an Ar atmosphere, deposit a Ti adhesion layer 2 on the surface of substrate 1 using a DC sputtering process. Use high-purity Ti (purity ≥ 99.99%) as the target material. The discharge power is 300W~600W (preferably 500W), the gas flow rate is 30sccm, and the vacuum degree of the magnetron sputtering chamber is ≤ 5×10⁻⁶. -5 Pa; Step 3.2: Under an Ar atmosphere, a Ti:W continuous gradient transition layer 3 is deposited on the surface of the Ti adhesion layer 2 using a multi-target magnetron co-sputtering process. High-purity Ti (purity ≥ 99.99%) and high-purity W (purity ≥ 99.99%) are used as targets. The discharge power of the Ti target is constant at 230W~350W (preferably 300W), and the discharge power of the W target increases to 80W~150W (preferably 100W) within 3min~8min. The gas flow rate is 30sccm~60sccm (preferably 50sccm), and the vacuum degree of the magnetron sputtering chamber is ≤ 5×10⁻⁶. -5 Pa; Through this step, the W concentration in the Ti:W continuous gradient transition layer 3 increases from 0 at% near the upper surface of the Ti adhesion layer 2 to 35 at%~40 at% near the bottom surface of the W barrier layer 4, achieving a continuous gradient distribution of W concentration. Step 3.3: Deposit a W barrier layer 4 on the surface of the Ti:W continuous gradient transition layer 3 using a DC sputtering process. High-purity W (purity ≥ 99.99%) is used as the target material. The discharge power is 300W~450W (preferably 400W), and the vacuum degree of the magnetron sputtering chamber is ≤ 5×10⁻⁶. -5 Pa; Step 3.4: Under an Ar atmosphere, deposit a Pt electrode layer 5 on the surface of the W barrier layer 4 using radio frequency magnetron sputtering. High-purity Pt (purity ≥ 99.99%) is used as the target material, the gas flow rate is 30 sccm, and the vacuum degree of the magnetron sputtering chamber is ≤ 5 × 10⁻⁶. -5 Pa, firstly, a discharge working power of 300W~500W (preferably 500W) is set for sputtering a Pt electrode layer 5 with a thickness of 35nm~70nm (preferably 50nm). Then, a discharge working power of 80W~120W (preferably 100W) is set for sputtering a Pt electrode layer 5 with a thickness of 65nm~130nm (preferably 100nm). The total thickness of the Pt electrode layer 5 is 100nm~200nm (preferably 150nm). First, a high-power sputtering method of 300W~500W is used to sputter the Pt electrode layer 5 with a thickness of 35nm~70nm. Its advantage is that it can quickly form a capping layer, reduce the exposure time of the underlying W film in the sputtering environment, reduce the risk of interface oxidation, and improve production efficiency. Then, a low-power sputtering method of 80W~120W is used to sputter the Pt electrode layer 5 with a thickness of 65nm~130nm. The shadowing effect brought about by the lower deposition rate can be used to effectively fill the gaps, greatly improve the density of the Pt electrode layer 5, and thus enhance its oxidation resistance and barrier ability.

[0022] Step 4: After completing steps 3.1 to 3.4, the entire material, including the 4H-SiC substrate 1, Ti adhesion layer 2, Ti:W continuous gradient transition layer 3, W barrier layer 4, and Pt electrode layer 5, is ultrasonically immersed in acetone for 5 minutes until the metal is completely detached. Then, it is sequentially cleaned with ethanol and deionized water, and its surface is dried with nitrogen gas to obtain the electrode chip. Step 5: Place the electrode chip in a rapid annealing furnace and anneal it in a vacuum atmosphere of 950℃~1050℃ (preferably 1000℃) for 90s~180s (preferably 120s) to allow the Ti and SiC interface to react and generate a low-resistivity TiC phase, forming a stable ohmic contact, thereby obtaining an ohmic contact electrode.

[0023] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

Claims

1. A silicon carbide high-temperature ohmic contact electrode, comprising a substrate (1), characterized in that: A Ti adhesion layer (2) is deposited on the surface of the substrate (1), a Ti:W continuous gradient transition layer (3) is deposited on the surface of the Ti adhesion layer (2), a W barrier layer (4) is deposited on the surface of the Ti:W continuous gradient transition layer (3), and a Pt electrode layer (5) is deposited on the surface of the W barrier layer (4). Among them, the Ti:W continuous gradient transition layer (3) increases the percentage of W atoms from 0 at% to 35 at%~40 at% from the side near the Ti adhesion layer (2) to the side near the W barrier layer (4).

2. The silicon carbide high-temperature resistant ohmic contact electrode according to claim 1, characterized in that: The thickness of the Ti adhesion layer (2) is 50 nm to 150 nm.

3. The silicon carbide high-temperature resistant ohmic contact electrode according to claim 1, characterized in that: The thickness of the Ti:W continuous gradient transition layer (3) is 50nm~120nm.

4. The silicon carbide high-temperature resistant ohmic contact electrode according to claim 1, characterized in that: The thickness of the W barrier layer (4) is 50nm~150nm.

5. The silicon carbide high-temperature resistant ohmic contact electrode according to claim 1, characterized in that: The thickness of the Pt electrode layer (5) is 100nm~200nm.

6. A method for preparing a silicon carbide high-temperature ohmic contact electrode as described in any one of claims 1-5, characterized in that, Includes the following steps: Step 1: Clean the substrate (1); Step 2: Perform photolithography on the substrate (1) to form an electrode pattern window; Step 3: Sequentially deposit the Ti adhesion layer (2), the Ti:W continuous gradient transition layer (3), the W barrier layer (4), and the Pt electrode layer (5) within the electrode pattern window; Step 4: Remove excess metal from the electrode pattern window using a stripping process to obtain the electrode chip; Step 5: Perform rapid thermal annealing on the electrode chip to form an ohmic contact electrode.

7. The method for preparing a silicon carbide high-temperature resistant ohmic contact electrode according to claim 6, characterized in that: Step 3 specifically includes the following steps: Step 3.1: Place the substrate (1) into the magnetron sputtering chamber, and deposit the Ti adhesion layer (2) on the surface of the substrate (1) by DC sputtering under an Ar atmosphere. Use Ti with a purity ≥99.99% as the target material, the discharge power is 300W~600W, the gas flow rate is 30sccm, and the vacuum degree of the magnetron sputtering chamber is ≤5×10 -5 Pa; Step 3.2: Under an Ar atmosphere, the Ti:W continuous gradient transition layer (3) is deposited on the surface of the Ti adhesion layer (2) using a multi-target magnetron co-sputtering process. Ti with a purity ≥99.99% and W with a purity ≥99.99% are used as targets. The discharge power of the Ti target is constant at 230W~350W, and the discharge power of the W target increases from 0W to 80W~150W in a gradient within 3min~8min. The gas flow rate is 30sccm~60sccm, and the vacuum degree of the magnetron sputtering chamber is ≤5×10 -5 Pa; Step 3.3: Deposit the W barrier layer (4) on the surface of the Ti:W continuous gradient transition layer (3) using a DC sputtering process, using W with a purity ≥99.99% as the target material, with a discharge power of 300W~450W, and the vacuum degree of the magnetron sputtering chamber ≤5×10 -5 Pa; Step 3.4: Under an Ar atmosphere, the Pt electrode layer (5) is deposited on the surface of the W barrier layer (4) by radio frequency magnetron sputtering. Pt with a purity ≥ 99.99% is used as the target material, the gas flow rate is 30 sccm, and the vacuum degree of the magnetron sputtering chamber is ≤ 5 × 10⁻⁶. -5 Pa, firstly, a Pt electrode layer (5) with a discharge working power of 300W~500W and a sputtering thickness of 35nm~70nm is set, and then a Pt electrode layer (5) with a discharge working power of 80W~120W and a sputtering thickness of 65nm~130nm is set. The total thickness of the Pt electrode layer (5) is 100nm~200nm.

8. The method for preparing a silicon carbide high-temperature resistant ohmic contact electrode according to claim 6, characterized in that: In step 1, the substrate (1) is cleaned using standard RCA, the natural oxide layer on the surface of the substrate (1) is removed using a dilute HF solution, and the surface of the substrate (1) is dried using nitrogen gas.

9. The method for preparing a silicon carbide high-temperature ohmic contact electrode according to claim 6, characterized in that: In step 5, the electrode chip is placed in a rapid annealing furnace and annealed in a vacuum atmosphere at 950℃~1050℃ for 90s~180s to obtain the ohmic contact electrode.

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