A laser and optical module

Abstract

The laser and the optical module provided by the present disclosure, the laser comprises an N-InP substrate layer and a buried zone P-InP substrate layer. The active layer and the grating layer are arranged in the buried zone. The P-InP layer has strong absorption to the optical field due to the high free carrier concentration, resulting in optical loss. The introduction of the doped layer with high refractive index in the N-InP substrate layer makes the optical field deviate to the N-InP substrate layer, thereby reducing the optical absorption loss of the P-InP layer. The buried zone comprises a first connecting area, a second connecting area and a third connecting area, and the sidewalls of the three connecting areas are formed based on different etching processes. The first connecting area is formed based on dry etching, and the bottom surface of the first connecting area is located above the active layer to avoid damage to the active layer during the dry etching process. The second connecting area is formed based on a surface treatment process. The third connecting area is formed based on wet etching, which ensures that the first doped layer is not etched too much to protect the doping characteristics of the doped layer.

Description

Technical Field

[0001] This disclosure relates to the field of optical communication technology, and in particular to a laser and an optical module. Background Technology

[0002] Currently, high-power lasers used in silicon photonics sources often employ buried heterojunction structures. Due to their excellent optical field confinement capabilities and carrier injection efficiency, buried heterojunction lasers have become the mainstream choice for high-power silicon photonics sources. Utility Model Content

[0003] In some embodiments, a laser and an optical module are provided to provide a high-power silicon photonics source.

[0004] In some embodiments, a laser is provided, comprising:

[0005] N-InP substrate layer;

[0006] A doped layer is located within the N-InP substrate layer, and the refractive index of the doped layer is greater than that of the N-InP substrate layer; the doped layer includes a first doping layer.

[0007] A buried region, located above an N-InP substrate, contains an active layer and a grating layer, with the grating layer located above the active layer. The buried region includes:

[0008] The first connection region has its sidewalls formed by dry etching, and the bottom surface of the first connection region is located at a predetermined position above the active layer.

[0009] The second connection region has a sidewall formed based on a surface treatment. The second connection region is connected to the bottom surface of the first connection region, and the bottom surface of the second connection region is located in the active layer.

[0010] The third connection region has its sidewalls formed by wet etching. The third connection region is connected to the bottom surface of the second connection region, and the bottom surface of the third connection region is located above the first doped layer.

[0011] The P-InP layer is located above the burial area.

[0012] The above technical solution has the following advantages or beneficial effects: The laser includes an N-InP substrate layer and a buried P-InP substrate layer. The buried region is located above the N-InP substrate layer. An active layer and a grating layer are disposed within the buried region, with the grating layer located above the active layer. When the P-InP layer and the N-InP substrate layer form a PN junction, the concentration difference of the charge carriers causes diffusion. The result of this diffusion is that the P-InP layer contains holes and negative ions, while the N-InP substrate layer contains electrons and positive ions. Based on the principle of charge, holes are driven downwards into the active layer 931, and electrons are driven upwards into the active layer. Within the active layer, stimulated emission causes discrete electron-hole pairs to recombine, generating photons, thereby effectively converting electrically injected charge carriers into photons and generating gain light. The photons generated by recombination within the active layer are reflected by the resonant cavity or distributed feedback grating to form positive feedback, thereby generating lasing light. By changing the current injected into the grating layer, the effective refractive index of the grating layer can be altered, thereby changing the resonant lasing wavelength of the laser and achieving wavelength selection. The P-InP layer, due to its high free carrier concentration, exhibits strong absorption of the light field, leading to optical loss. Introducing a doped layer with a higher refractive index into the N-InP substrate shifts the light field towards the N-InP substrate, reducing the optical absorption loss of the P-InP layer and increasing the laser's output power. Furthermore, the buried region includes a first connection region, a second connection region, and a third connection region, which are sequentially connected. The sidewalls of the three connection regions are formed using different etching processes. The first connection region is formed using dry etching, with its bottom surface located above the active layer to avoid damage to the active layer during dry etching, thus protecting the light field distribution near the active layer. The second connection region is formed using a surface treatment process. Surface treatment has less impact on the surface of the active layer; therefore, the second connection region is etched to the surface of the active layer using surface treatment. The third connection region is formed by wet etching, which can precisely control the etching depth to ensure that the first doped layer is not over-etched, thus protecting the doping characteristics of the doped layer.

[0013] In some embodiments, the bottom surface of the first connection region is located at a position of 50-100 nm above the active layer.

[0014] The above technical solution has the following advantages or beneficial effects: the sidewalls of the first connection region are formed based on a dry etching process. Dry etching has physical bombardment characteristics, which may cause microscopic damage to the surface of the active layer, such as lattice defects or surface roughness, affecting the optical field distribution and carrier recombination efficiency. By controlling the endpoint of dry etching at 50-100 nm above the active layer, direct physical etching of the active layer is avoided, thereby protecting the integrity and photoelectric performance of the active layer.

[0015] In some embodiments, the doped layer includes multiple doped layers, wherein the multiple doped layers include the first doped layer, which is disposed close to the active layer.

[0016] The above technical solution has the following advantages or beneficial effects: The P-InP layer, due to its high free carrier concentration, exhibits strong absorption of the light field, leading to optical loss. The refractive index of the doped layer is greater than that of the N-InP substrate, which can shift the light field towards the N-InP substrate. By placing the first doped layer close to the active layer, the light field near the active layer is further shifted to the doped layer with the higher refractive index. Because the doped layer has a higher refractive index, the propagation loss of the light field within the doped layer is smaller, thereby reducing the absorption loss of light by the P-InP layer and improving the output power of the laser.

[0017] In some embodiments, the refractive index is consistent among the plurality of doped layers; or, the refractive index varies in a gradient among the plurality of doped layers, and the refractive index of the first doped layer is greater than the refractive index of the other doped layers.

[0018] The above technical solution has the following advantages or beneficial effects: The refractive index can be consistent across multiple doped layers. The refractive index can also exhibit a gradient change among multiple doped layers, with the refractive index of the first doped layer being greater than that of the other doped layers, guiding the light field to be more concentrated near the active layer and reducing light leakage to the P-InP layer. The high refractive index of the first doped layer forms a stronger light field confinement boundary with the active layer, reducing the light absorption loss of the P-InP layer. The gradient refractive index distribution reduces abrupt changes in the light field at the interface, reducing scattering loss and increasing the laser output power.

[0019] In some embodiments, a first inverted PN junction region and a second inverted PN junction region are formed on both sides of the buried area, respectively;

[0020] The first inversion PN junction region includes a first N-InP inversion layer and a first P-InP inversion layer;

[0021] The second inversion PN junction region includes a second N-InP inversion layer and a second P-InP inversion layer.

[0022] The above technical solution has the following advantages or beneficial effects: a first inversion PN junction region and a second inversion PN junction region are epitaxially grown on both sides of the buried area. The first inversion PN junction region includes a first N-InP inversion layer and a first P-InP inversion layer. The second inversion PN junction region includes a second N-InP inversion layer and a second P-InP inversion layer. When the laser is working, an applied voltage acts on the first inversion PN junction region, causing a change in the built-in electric field. This change in electric field affects the carrier distribution and motion state in the first inversion PN junction region. When the applied voltage is large enough, the inversion carriers in the first inversion PN junction region are accelerated and injected into the active layer. These injected carriers recombine in the active layer and generate photons, increasing the output optical power of the laser. Due to the presence of the first and second inversion PN junction regions, the current on both sides tends to flow through the buried area and the key region of the active layer, while flowing less through other regions, which helps to improve the efficiency of the laser.

[0023] In some embodiments, an optical module is provided, comprising:

[0024] Circuit board;

[0025] A coherent optical component, electrically connected to the circuit board, includes an optical modulator;

[0026] A laser for providing a light source to an optical modulator, the laser comprising:

[0027] N-InP substrate layer;

[0028] A doped layer is located within the N-InP substrate layer, and the refractive index of the doped layer is greater than that of the N-InP substrate layer; the doped layer includes a first doping layer.

[0029] A buried region, located above an N-InP substrate, contains an active layer and a grating layer, with the grating layer located above the active layer. The buried region includes:

[0030] The first connection region has its sidewalls formed by dry etching, and the bottom surface of the first connection region is located at a predetermined position above the active layer.

[0031] The second connection region has a sidewall formed based on a surface treatment. The second connection region is connected to the bottom surface of the first connection region, and the bottom surface of the second connection region is located in the active layer.

[0032] The third connection region has its sidewalls formed by wet etching. The third connection region is connected to the bottom surface of the second connection region, and the bottom surface of the third connection region is located above the first doped layer.

[0033] The P-InP layer is located above the burial area.

[0034] The above technical solution has the following advantages or beneficial effects: The optical module includes a circuit board, a coherent optical component, and a laser. The coherent optical component includes an optical modulator, and the laser provides a light source for the optical modulator. The laser includes an N-InP substrate layer and a buried P-InP substrate layer. The buried region is located above the N-InP substrate layer. An active layer and a grating layer are provided in the buried region, with the grating layer located above the active layer. When the P-InP layer and the N-InP substrate layer form a PN junction, the concentration difference of the charge carriers causes diffusion. The result of the carrier diffusion is that the P-InP layer includes holes and negative ions, and the N-InP substrate layer includes electrons and positive ions. Based on the charge principle, holes are driven downward into the active layer 931, and electrons are driven upward into the active layer. In the active layer, stimulated emission causes discrete electron-hole pairs to recombine and generate photons, thereby effectively converting electrically injected charge carriers into photons and generating gain light. Photons generated by recombination within the active layer are reflected by the resonant cavity or distributed feedback grating to form positive feedback, thereby generating lasing light. By changing the current injected into the grating layer, the effective refractive index of the grating layer can be altered, thus changing the resonant lasing wavelength of the laser and achieving wavelength selection. The P-InP layer, due to its high free carrier concentration, exhibits strong absorption of the light field, leading to optical loss. Introducing a doped layer with a higher refractive index into the N-InP substrate layer causes the light field to shift towards the N-InP substrate, thereby reducing the optical absorption loss of the P-InP layer and increasing the laser's output power. Furthermore, the buried region includes a first connection region, a second connection region, and a third connection region, which are sequentially connected. The sidewalls of the three connection regions are formed using different etching processes. The first connection region is formed using dry etching, and its bottom surface is located above the active layer, preventing damage to the active layer during dry etching and thus protecting the light field distribution near the active layer. The second connection region is formed based on a surface treatment process. Surface treatment has a smaller impact on the surface of the active layer, so the second connection region is formed based on surface treatment to etch to the surface of the active layer. The third connection region is formed based on wet etching. Wet etching can precisely control the etching depth to ensure that it does not over-etch to the first doped layer, thus protecting the doping characteristics of the doped layer.

[0035] In some embodiments, the bottom surface of the first connection region is located at a position of 50-100 nm above the active layer.

[0036] The above technical solution has the following advantages or beneficial effects: the sidewalls of the first connection region are formed based on a dry etching process. Dry etching has physical bombardment characteristics, which may cause microscopic damage to the surface of the active layer, such as lattice defects or surface roughness, affecting the optical field distribution and carrier recombination efficiency. By controlling the endpoint of dry etching at 50-100 nm above the active layer, direct physical etching of the active layer is avoided, thereby protecting the integrity and photoelectric performance of the active layer.

[0037] In some embodiments, the doped layer includes multiple doped layers, wherein the multiple doped layers include the first doped layer, which is disposed close to the active layer.

[0038] The above technical solution has the following advantages or beneficial effects: The P-InP layer, due to its high free carrier concentration, exhibits strong absorption of the light field, leading to optical loss. The refractive index of the doped layer is greater than that of the N-InP substrate, which can shift the light field towards the N-InP substrate. By placing the first doped layer close to the active layer, the light field near the active layer is further shifted to the doped layer with the higher refractive index. Because the doped layer has a higher refractive index, the propagation loss of the light field within the doped layer is smaller, thereby reducing the absorption loss of light by the P-InP layer and improving the output power of the laser.

[0039] In some embodiments, the refractive index is consistent among the plurality of doped layers; or, the refractive index varies in a gradient among the plurality of doped layers, and the refractive index of the first doped layer is greater than the refractive index of the other doped layers.

[0040] The above technical solution has the following advantages or beneficial effects: The refractive index can be consistent across multiple doped layers. The refractive index can also exhibit a gradient change among multiple doped layers, with the refractive index of the first doped layer being greater than that of the other doped layers, guiding the light field to be more concentrated near the active layer and reducing light leakage to the P-InP layer. The high refractive index of the first doped layer forms a stronger light field confinement boundary with the active layer, reducing the light absorption loss of the P-InP layer. The gradient refractive index distribution reduces abrupt changes in the light field at the interface, reducing scattering loss and increasing the laser output power.

[0041] In some embodiments, a first inverted PN junction region and a second inverted PN junction region are formed on both sides of the buried area, respectively;

[0042] The first inversion PN junction region includes a first N-InP inversion layer and a first P-InP inversion layer;

[0043] The second inversion PN junction region includes a second N-InP inversion layer and a second P-InP inversion layer.

[0044] The above technical solution has the following advantages or beneficial effects: a first inversion PN junction region and a second inversion PN junction region are epitaxially grown on both sides of the buried area. The first inversion PN junction region includes a first N-InP inversion layer and a first P-InP inversion layer. The second inversion PN junction region includes a second N-InP inversion layer and a second P-InP inversion layer. When the laser is working, an applied voltage acts on the first inversion PN junction region, causing a change in the built-in electric field. This change in electric field affects the carrier distribution and motion state in the first inversion PN junction region. When the applied voltage is large enough, the inversion carriers in the first inversion PN junction region are accelerated and injected into the active layer. These injected carriers recombine in the active layer and generate photons, increasing the output optical power of the laser. Due to the presence of the first and second inversion PN junction regions, the current on both sides tends to flow through the buried area and the key region of the active layer, while flowing less through other regions, which helps to improve the efficiency of the laser. Attached Figure Description

[0045] To more clearly illustrate the technical solutions in this disclosure, the accompanying drawings used in some embodiments of this disclosure will be briefly described below. Obviously, the drawings described below are merely drawings of some embodiments of this disclosure, and those skilled in the art can obtain other drawings based on these drawings. Furthermore, the drawings described below can be regarded as schematic diagrams and are not intended to limit the actual size of the product, the actual flow of the method, the actual timing of the signals, etc. involved in the embodiments of this disclosure.

[0046] Figure 1 This is a partial architecture diagram of an optical communication system according to some embodiments;

[0047] Figure 2 This is a partial structural diagram of a host computer according to some embodiments;

[0048] Figure 3 This is a structural diagram of an optical module according to some embodiments;

[0049] Figure 4 An exploded view of an optical module according to some embodiments;

[0050] Figure 5 This is an internal structural diagram of an optical module according to some embodiments;

[0051] Figure 6 This is a cross-sectional structural diagram of a laser according to some embodiments;

[0052] Figure 7 This is a structural diagram of the buried area of ​​a laser according to some embodiments;

[0053] Figure 8This is a schematic diagram of a laser fabrication method according to some embodiments;

[0054] Figure 9 A schematic electron microscope image of an etched structure in a buried area according to some embodiments. Figure 1 ;

[0055] Figure 10 A schematic electron microscope image of an etched structure in a buried area according to some embodiments. Figure 2 ;

[0056] Figure 11 A schematic electron microscope image of an etched structure in a buried area according to some embodiments. Figure 3 . Detailed Implementation

[0057] In optical communication technology, to establish information transmission between information processing devices, information needs to be loaded onto light, and the propagation of light is used to transmit the information. Here, the light carrying the information is called an optical signal. When optical signals are transmitted in information transmission equipment, optical power loss can be reduced, thus enabling high-speed, long-distance, and low-cost information transmission. Information processing devices can recognize and process electrical signals. Information processing devices typically include optical network units (ONUs), gateways, routers, switches, mobile phones, computers, servers, tablets, televisions, etc., while information transmission equipment typically includes optical fibers and optical waveguides.

[0058] An optical module enables the conversion between optical and electrical signals between information processing and transmission devices. For example, at least one of the optical signal input or output ports of the optical module is connected to an optical fiber, and at least one of the electrical signal input or output ports is connected to an optical network terminal. A first optical signal from the optical fiber is transmitted to the optical module, which converts it into a first electrical signal and transmits it to the optical network terminal. A second electrical signal from the optical network terminal is transmitted to the optical module, which converts it into a second optical signal and transmits it back to the optical fiber. Since multiple information processing devices can transmit information via electrical signals, at least one of the devices needs to be directly connected to the optical module, rather than all devices. Here, the information processing device directly connected to the optical module is referred to as the host computer of the optical module. Furthermore, the optical signal input or output port of the optical module can be referred to as an optical port, and the electrical signal input or output port can be referred to as an electrical port.

[0059] Figure 1 This is a partial structural diagram of an optical communication system according to some embodiments. Figure 1As shown, the optical communication system mainly includes a remote information processing device 1000, a local information processing device 2000, a host computer 100, an optical module 200, an optical fiber 101, and a network cable 103.

[0060] One end of optical fiber 101 extends toward the remote information processing device 1000, and the other end of optical fiber 101 is connected to optical module 200 through the optical port of optical module 200. The optical signal can undergo total internal reflection in optical fiber 101, and the propagation of the optical signal in the direction of total internal reflection can almost maintain the original optical power. The optical signal undergoes multiple total internal reflections in optical fiber 101 to transmit the optical signal from the remote information processing device 1000 to optical module 200, or to transmit the optical signal from optical module 200 to remote information processing device 1000, thereby realizing long-distance, low-power loss information transmission.

[0061] The optical communication system may include one or more optical fibers 101, and the optical fibers 101 may be detachably or fixedly connected to the optical module 200. The host computer 100 is configured to provide data signals to the optical module 200, receive data signals from the optical module 200, or monitor or control the operating status of the optical module 200.

[0062] The host computer 100 includes a generally rectangular housing and an optical module interface 102 disposed on the housing. The optical module interface 102 is configured to connect to the optical module 200 so that the host computer 100 and the optical module 200 can establish a one-way or two-way electrical signal connection.

[0063] The host computer 100 also includes an external power interface that can connect to an electrical signal network. For example, this external power interface includes a Universal Serial Bus (USB) interface or a network cable interface 104, which is configured to connect a network cable 103 to establish a unidirectional or bidirectional electrical signal connection between the host computer 100 and the network cable 103. One end of the network cable 103 is connected to the local information processing device 2000, and the other end of the network cable 103 is connected to the host computer 100, thereby establishing an electrical signal connection between the local information processing device 2000 and the host computer 100 via the network cable 103. For example, a third electrical signal emitted by the local information processing device 2000 is transmitted to the host computer 100 via the network cable 103. The host computer 100 generates a second electrical signal based on the third electrical signal. This second electrical signal from the host computer 100 is transmitted to the optical module 200, which converts the second electrical signal into a second optical signal and transmits it to the optical fiber 101. The second optical signal is then transmitted in the optical fiber 101 to the remote information processing device 1000. Alternatively, a first optical signal from the remote information processing device 1000 propagates through the optical fiber 101 and is transmitted to the optical module 200. The optical module 200 converts the first optical signal into a first electrical signal and transmits it to the host computer 100. The host computer 100 generates a fourth electrical signal based on the first electrical signal and transmits the fourth electrical signal to the local information processing device 2000. It should be noted that an optical module is a tool for converting optical signals to electrical signals. During the conversion process, the information itself does not change, but the encoding and decoding methods can change.

[0064] In addition to optical network terminals, the host computer 100 also includes optical line terminals (OLTs), optical network equipment (ONTs), or data center servers.

[0065] Figure 2 This is a partial structural diagram of a host computer according to some embodiments. To clearly show the connection relationship between the optical module 200 and the host computer 100, Figure 2 Only the structure of the host computer 100 related to the optical module 200 is shown. For example... Figure 2 As shown, the host computer 100 also includes a PCB circuit board 105 disposed within the housing, a cage 106 disposed on the surface of the PCB circuit board 105, a heat sink 107 disposed on the cage 106, and an electrical connector disposed inside the cage 106. The electrical connector is configured to connect to the electrical port of the optical module 200; the heat sink 107 has fins and other protruding structures to increase the heat dissipation area.

[0066] The optical module 200 is inserted into the cage 106 of the host computer 100, where it is secured. Heat generated by the optical module 200 is conducted to the cage 106 and then dissipated through the heat sink 107. After insertion into the cage 106, the optical module 200's electrical port connects to the electrical connector inside the cage 106, establishing a bidirectional electrical signal connection between the optical module 200 and the host computer 100. Furthermore, the optical port of the optical module 200 connects to the optical fiber 101, establishing a bidirectional optical signal connection between the optical module 200 and the optical fiber 101.

[0067] Figure 3 This is a structural diagram of an optical module according to some embodiments. Figure 4 This is an exploded view of an optical module according to some embodiments. Figure 3 and Figure 4 As shown, the optical module 200 includes a shell, a circuit board 300 disposed inside the shell, a laser 900, and a coherent optical component 1100.

[0068] The housing includes an upper housing 201 and a lower housing 202, with the upper housing 201 covering the lower housing 202 to form the aforementioned housing having two openings 204 and 205; the outer contour of the housing is generally square.

[0069] In some embodiments, the lower housing 202 includes a base plate 2021 and two lower side plates 2022 located on both sides of the base plate 2021 and perpendicular to the base plate 2021; the upper housing 201 includes a cover plate 2011, which covers the two lower side plates 2022 of the lower housing 202 to form the aforementioned housing.

[0070] In some embodiments, the lower housing 202 includes a base plate 2021 and two lower side plates 2022 located on both sides of the base plate 2021 and perpendicular to the base plate 2021; the upper housing 201 includes a cover plate 2011 and two upper side plates located on both sides of the cover plate 2011 and perpendicular to the cover plate 2011. The two upper side plates and the two lower side plates 2022 are combined to realize that the upper housing 201 covers the lower housing 202.

[0071] The direction of the line connecting the two openings 204 and 205 can be consistent with or inconsistent with the length direction of the optical module 200. For example, opening 204 is located at the end of the optical module 200. Figure 3 The opening 205 is also located at the end of the optical module 200 (right end). Figure 3(Left end). Alternatively, opening 204 is located at the end of optical module 200, while opening 205 is located on the side of optical module 200. Opening 204 is an electrical port, through which the gold fingers 301 of circuit board 300 extend and are inserted into the electrical connector of host computer 100; opening 205 is an optical port, configured to connect to external optical fiber 101 so that optical fiber 101 can connect to laser 900 and coherent optical component 1100 in optical module 200.

[0072] The assembly method using an upper housing 201 and a lower housing 202 facilitates the installation of the circuit board 300, laser 900, coherent optical component 1100, etc., into the aforementioned housings. The upper housing 201 and lower housing 202 can encapsulate and protect these devices. Furthermore, the assembly of the circuit board 300, laser 900, coherent optical component 1100, etc., facilitates the deployment of positioning components, heat dissipation components, and electromagnetic shielding components for these devices, which is beneficial for automated production.

[0073] In some embodiments, the upper housing 201 and the lower housing 202 are made of metal materials, which facilitates electromagnetic shielding and heat dissipation.

[0074] In some embodiments, the optical module 200 further includes an unlocking component 600 located outside its housing. The unlocking component 600 is configured to establish a fixed connection between the optical module 200 and the host computer, or to release the fixed connection between the optical module 200 and the host computer.

[0075] For example, the unlocking component 600 is located on the outside of the two lower side plates 2022 of the lower housing 202, and includes a locking component that matches the cage 106 of the host computer 100. When the optical module 200 is inserted into the cage 106, the locking component of the unlocking component 600 fixes the optical module 200 in the cage 106; when the unlocking component 600 is pulled, the locking component of the unlocking component 600 moves accordingly, thereby changing the connection relationship between the locking component and the host computer, so as to release the fixation between the optical module 200 and the host computer, thereby allowing the optical module 200 to be pulled out of the cage 106.

[0076] Circuit board 300 includes circuit traces, electronic components, and chips. The circuit traces connect the electronic components and chips according to the circuit design to achieve functions such as power supply, electrical signal transmission, and grounding. Electronic components may include, for example, capacitors, resistors, transistors, and metal-oxide-semiconductor field-effect transistors (MOSFETs). Chips may include, for example, microcontroller units (MCUs), laser driver chips, transimpedance amplifiers (TIAs), limiting amplifiers, clock and data recovery (CDR) chips, power management chips, and digital signal processing (DSP) chips.

[0077] Circuit board 300 is generally a rigid circuit board. Due to its relatively hard material, the rigid circuit board can also perform a load-bearing function. For example, the rigid circuit board can stably support the aforementioned electronic components and chips. The rigid circuit board can also be inserted into the electrical connector in the cage 106 of the host computer 100.

[0078] The circuit board 300 also includes gold fingers 301 formed on its end surface, the gold fingers 301 consisting of a plurality of independent pins. The circuit board 300 is inserted into the cage 106 and is connected to an electrical connector within the cage 106 by the gold fingers 301. The gold fingers 301 may be provided only on one side of the surface of the circuit board 300 (e.g., Figure 4 The upper surface shown can also be positioned on the upper and lower surfaces of the circuit board 300 to provide a greater number of pins, thus adapting to applications with high pin count requirements. The gold fingers 301 are configured to establish an electrical connection with the host computer to achieve power supply, grounding, two-wire synchronous serial (Inter-Integrated Circuit, I2C) signal transmission, and data signal transmission. Of course, flexible circuit boards are also used in some optical modules. Flexible circuit boards are generally used in conjunction with rigid circuit boards as a supplement to rigid circuit boards.

[0079] Figure 5 This is an internal structural diagram of an optical module according to some embodiments. Figure 5 As shown, in some embodiments, a laser 900, a coherent optical component 1100, and a DSP chip 1200 are respectively provided on the surface of the circuit board 300. The coherent optical component 1100 includes an optical modulator for modulating and demodulating optical signals. Exemplarily, the optical modulator is a silicon-based optical modulator or a thin-film lithium niobate-based optical modulator.

[0080] In some embodiments, the optical modulator itself has no light source, and the laser 900 serves as an external light source for the optical modulator. The laser 900 emits light from its side, and the emitted light enters the optical modulator. The laser 900 can output light of different wavelengths.

[0081] In some embodiments, the host computer transmits electrical signals to the DSP chip 1200 via the gold finger 301. Optical signals experience distortion during transmission through the fiber optic link. The DSP chip 1200 counteracts and compensates for this distortion, reducing its impact on the system's bit error rate. The DSP chip 1200 can perform various signal compensation processes, such as chromatic dispersion compensation and polarization mode dispersion compensation. For example, the DSP chip 1200 converts the 16-channel PAM-4 electrical signals from the host computer into four-channel transmitter PAM-4 electrical signals. The optical modulator modulates these four received PAM-4 electrical signals onto the light emitted by the laser 900, thereby generating a transmitted optical signal.

[0082] In some embodiments, the laser 900 serves as an external light source, and the emitted light beam is split into a first beam and a second beam. The first beam, as the light to be modulated, is transmitted to the coherent optical component 1100. The coherent optical component 1100 modulates the light to be modulated according to the electrical signal processed by the DSP chip 1200, and the resulting optical signal is transmitted to the outside of the optical module. The second beam, as the local oscillator light, is transmitted to the coherent optical component 1100. The coherent optical component 1100 coherently demodulates the received optical signal according to the second beam, and the demodulated electrical signal is transmitted to the DSP chip 1200.

[0083] In some embodiments, laser 900 can be a distributed feedback (DFB) laser. The DFB laser can be a buried heterojunction (BH) type laser. BH type lasers have a stable lateral optical field distribution and a low threshold current.

[0084] Figure 6 This is a cross-sectional structural diagram of a laser according to some embodiments. For example... Figure 6 As shown, in some embodiments, laser 900 can be a distributed feedback (DFB) laser.

[0085] In some embodiments, the laser 900 may include a first electrode layer 910. The first electrode layer 910 is an N-type electrode metal layer used to inject N-type charge carriers into the active layer.

[0086] In some embodiments, the laser 900 may include an N-InP substrate layer 920. The N-InP substrate layer 920 is an N-type doped InP layer. The N-InP substrate layer 920 is located above the first electrode layer 910.

[0087] In some embodiments, the laser 900 may include a buried region 930. The buried region 930 has a boss structure, which confines the optical field to this narrow region, thereby reducing the threshold current and increasing the output power. The etching depth and sidewall flatness of the buried region 930 directly affect the performance of the laser 900. The buried region 930 is located above the N-InP substrate layer 920.

[0088] In some embodiments, the buried region 930 includes an active layer 931 and a grating layer 932. The grating layer 932 is located above the active layer 931. The active layer 931 may employ an InGaAsP multiple quantum well structure.

[0089] In some embodiments, the width of the buried region 930 is smaller than the width of the N-InP substrate layer 920.

[0090] In some embodiments, the laser 900 may include a P-InP layer 940. The P-InP layer 940 is a P-type doped InP layer. The P-InP layer 940 is located above the buried region 930. Exemplarily, the P-InP layer 940 is located above the grating layer 932. The buried region 930 is disposed between the P-InP layer 940 and the N-InP substrate layer 920, and the width of the buried region 930 is smaller than the width of the P-InP layer 940 or the N-InP substrate layer 920.

[0091] In some embodiments, the laser 900 may include a second electrode layer 950. The second electrode layer 950 is a P-type electrode metal layer used to inject P-type charge carriers into the active layer 931.

[0092] In some embodiments, when the P-InP layer 940 and the N-InP substrate layer 920 form a PN junction, the concentration difference of charge carriers causes diffusion. The result of this diffusion is that the P-InP layer 940 contains holes and negative ions, while the N-InP substrate layer 920 contains electrons and positive ions. Based on the principle of charge, holes are driven downwards into the active layer 931, and electrons are driven upwards into the active layer 931. Within the active layer 931, stimulated emission causes discrete electron-hole pairs to recombine, generating photons. This effectively converts electrically injected charge carriers into photons and generates gain light. The photons generated by recombination within the active layer 931 are reflected by the resonant cavity or distributed feedback grating to form positive feedback, thereby generating lasing light.

[0093] In some embodiments, by changing the current injected into the grating layer 932, the effective refractive index of the grating layer 932 can be changed, thereby changing the resonant lasing wavelength of the laser 900, thus achieving the selection of a specific wavelength.

[0094] In some embodiments, the P-InP layer 940 has a high concentration of free carriers, which leads to strong absorption of the light field and light loss.

[0095] In some embodiments, the laser 900 may include a doped layer 960. The doped layer 960 is located within an N-InP substrate layer 920.

[0096] In some embodiments, the refractive index of the doped layer 960 is greater than that of the N-InP substrate 920. The doped layer 960 comprises multiple InGaAsP thin layers, and the refractive index of the InGaAsP material is greater than that of the InP material. Exemplarily, the thickness of the doped layer 960 is less than the thickness of the N-InP substrate 920. For example, the thickness of the doped layer 960 is 60 nm.

[0097] In some embodiments, a doped layer 960 with a higher refractive index is introduced into the N-InP substrate layer 920. The doped layer 960 causes the light field to shift towards the N-InP substrate layer 920, thereby reducing the light absorption loss of the P-InP layer 940 and improving the output power of the laser 900.

[0098] In some embodiments, the doped layer 960 includes multiple InGaAsP layers. The doped layer 960 may include a first doped layer 961, which is located in the upper region of the doped layer 960, close to the active layer 931, with the remaining layers located below the first doped layer 961. The refractive index of the multiple InGaAsP layers may be uniform or may exhibit a gradient refractive index variation.

[0099] In some embodiments, by placing the first doped layer close to the active layer, the light field is further deflected into the doped layer with a higher refractive index near the active layer. Because the doped layer has a higher refractive index, the propagation loss of the light field within the doped layer is smaller, thereby reducing the absorption loss of the P-InP layer and increasing the output power of the laser.

[0100] In some embodiments, the refractive index can be consistent across multiple doped layers. Alternatively, the refractive index can exhibit a gradient across the multiple doped layers, with the first doped layer having a higher refractive index than the others. This guides the light field to be more concentrated near the active layer, reducing light leakage to the P-InP layer. The high refractive index of the first doped layer forms a stronger light field confinement boundary with the active layer, reducing the light absorption loss of the P-InP layer. The gradient refractive index distribution reduces abrupt changes in the light field at the interface, lowers scattering loss, and increases the laser output power.

[0101] In some embodiments, the buried region 930 is a boss structure, and its two sidewalls are formed by etching. The etching depth of the two sidewalls of the buried region 930 is between the active layer 931 and the first doped layer 961, so as to avoid damaging the first doped layer 961 and thus protect the doping characteristics of the doped layer 960.

[0102] In some embodiments, the laser 900 may include a first inverted PN junction region 970. The first inverted PN junction region 970 is connected to a sidewall of the buried region 930. Exemplarily, the first inverted PN junction region 970 is formed by epitaxial growth along a sidewall of the buried region 930. The first inverted PN junction region 970 is formed by introducing an additional doped layer on top of an existing PN junction, thereby forming an inverted structure. When the laser 900 is operating, an applied voltage is applied to the first inverted PN junction region 970, causing a change in the built-in electric field. This change in electric field affects the carrier distribution and motion state in the first inverted PN junction region 970. When the applied voltage is sufficiently large, the inverted carriers in the first inverted PN junction region 970 are accelerated and injected into the active layer 931. These injected carriers recombine in the active layer 931 and generate photons, increasing the output optical power of the laser 900. Due to the presence of the first inversion PN junction region 970, the current on this side tends to flow through key regions such as the buried region 930 and the active layer 931, and less through other regions, which helps to improve the efficiency of the laser 900.

[0103] In some embodiments, the first inversion PN junction region 970 includes a first N-InP inversion layer 971 and a first P-InP inversion layer 972, which are stacked one on top of the other.

[0104] In some embodiments, the laser 900 may include a second inversion PN junction region 980. The second inversion PN junction region 980 is connected to the other sidewall of the buried region 930. Exemplarily, the second inversion PN junction region 980 is epitaxially grown along the other sidewall of the buried region 930. The second inversion PN junction region 980 also has current-limiting characteristics. Due to the presence of the second inversion PN junction region 980, the current on this side tends to flow more through critical regions such as the buried region 930 and the active layer 931, and less through other regions, which helps to improve the efficiency of the laser 900. The second inversion PN junction region 980 includes a second N-InP inversion layer 981 and a second P-InP inversion layer 982, which are stacked one on top of the other.

[0105] Figure 7 This is a buried area structure for a laser according to some embodiments. For example... Figure 7 As shown, in some embodiments, the burial area 930 can be a platform structure with flat arc surfaces on both sides.

[0106] In some embodiments, the buried region 930 may include a first connection region 930a. The sidewalls of the first connection region 930a are formed by dry etching. Dry etching has strong directionality, which can ensure that the etching boundary is consistent with the etching mask and pre-etch to a certain depth, thereby providing a uniform initial etching interface for subsequent surface treatment and wet etching, and ensuring that the subsequent etching window is controllable.

[0107] In some embodiments, the bottom surface of the first connection region 930a is located at a predetermined position above the active layer 931 to avoid damage to the active layer during the dry etching process, thereby protecting the optical field distribution near the active layer. Dry etching has physical bombardment characteristics and may cause microscopic damage to the surface of the active layer 931, such as lattice defects or surface roughness, affecting the optical field distribution and carrier recombination efficiency. Therefore, the endpoint of dry etching can be controlled at a predetermined position above the active layer 931, thus the bottom surface of the first connection region 930a is located at a predetermined position above the active layer 931.

[0108] In some embodiments, by controlling the dry etching endpoint at 50-100 nm above the active layer, direct physical etching of the active layer can be reduced, thereby protecting the integrity and optoelectronic properties of the active layer.

[0109] In some embodiments, the burial area 930 may include a second connection area 930b. The second connection area 930b is connected to the bottom surface of the first connection area 930a. The sidewalls of the second connection area 930b are formed based on a surface treatment process. The bottom surface of the second connection area 930b is located on the surface of the active layer 931, and the surface treatment process causes less impact and damage to the active layer 931, thus helping to protect the surface of the active layer 931. Exemplarily, the surface treatment process may employ an etchant, such as phosphoric acid.

[0110] In some embodiments, dry etching introduces surface defects, and byproducts from the dry etching process adhere to the sidewalls, affecting subsequent etching efficiency. The second connection region 930b is formed based on a surface treatment process. This surface treatment can eliminate surface defects introduced by dry etching and corrode the deposits on the sidewall surface, making the sidewall surface more active and beneficial for subsequent etching. At the same time, the surface treatment process can further modify the etching depth, allowing etching to continue downwards to the surface of the active layer 931.

[0111] In some embodiments, the buried region 930 may include a third connection region 930c. The third connection region 930c is connected to the bottom surface of the second connection region 930b. The third connection region 930c is formed by wet etching. Based on dry etching and surface treatment, wet etching can precisely control the etching depth to ensure that the first doped layer 961 is not over-etched, thereby protecting the doping characteristics of the doped layer 960.

[0112] In some embodiments, the corrosion rate of the etchant on the sidewall surface during the surface treatment process is relatively low, resulting in a lower depth etching rate. In such cases, the third connection region 930c can be generated based on wet etching, providing an etching rate and improving the depth etching accuracy.

[0113] In some embodiments, a first connection region 930a is formed by dry etching, and then the sidewalls of the first connection region 930a are etched downwards by surface treatment to form a second connection region 930b. Then, the sidewalls of the second connection region 930b are etched downwards by wet etching to form a third connection region 930c. The first connection region 930a, the second connection region 930b, and the third connection region 930c are then sequentially connected to form a buried region 930.

[0114] Figure 8 This is a schematic diagram of a laser fabrication method according to some embodiments. Figure 8 As shown, in some embodiments, the method for fabricating the laser includes:

[0115] S110: A doped layer is grown inside the N-InP substrate layer. The refractive index of the doped layer is greater than that of the N-InP substrate layer. The doped layer includes a first doped layer.

[0116] In some embodiments, the P-InP layer 940 has a high concentration of free carriers, which leads to strong absorption of the light field and light loss.

[0117] In some embodiments, the laser 900 may include a doped layer 960. The doped layer 960 is located within an N-InP substrate layer 920.

[0118] In some embodiments, the refractive index of the doped layer 960 is greater than that of the N-InP substrate 920. The doped layer 960 comprises multiple InGaAsP thin layers, and the refractive index of the InGaAsP material is greater than that of the InP material. Exemplarily, the thickness of the doped layer 960 is less than the thickness of the N-InP substrate 920. For example, the thickness of the doped layer 960 is 60 nm.

[0119] In some embodiments, a doped layer 960 with a higher refractive index is introduced into the N-InP substrate layer 920. The doped layer 960 causes the light field to shift towards the N-InP substrate layer 920, thereby reducing the light absorption loss of the P-InP layer 940 and improving the output power of the laser 900.

[0120] In some embodiments, the doped layer 960 includes multiple InGaAsP layers. The doped layer 960 may include a first doped layer 961, which is located in the upper region of the doped layer 960, close to the active layer 931, with the remaining layers located below the first doped layer 961.

[0121] In some embodiments, the method for fabricating a laser includes:

[0122] S120: An active layer is grown on the surface of an N-InP substrate, and a grating layer is etched on the surface of the active layer.

[0123] In some embodiments, the material of the active layer 931 may include, but is not limited to, InGaAsP / InP quantum wells, and its thickness may be adjusted as needed. The etching of the grating layer 932 may be achieved by dry etching or wet etching processes to form a distributed feedback (DFB) structure, thereby providing the required wavelength selectivity and feedback mechanism.

[0124] In some embodiments, the method for fabricating a laser includes:

[0125] S130: The surface of the grating layer is filled, and the sidewalls are etched along the filled surface based on dry etching, and etched to a preset position above the active layer to form the first connection region.

[0126] In some embodiments, the sidewalls of the burial area 930 are formed by three different etching processes. Depending on the etching process, the burial area 930 is divided into a first connection area 930a, a second connection area 930b, and a third connection area 930c.

[0127] In some embodiments, the first connection region 930a is formed by dry etching, and the bottom surface of the first connection region 930a is located above the active layer 931 to avoid damage to the active layer 931 during the dry etching process, thereby protecting the light field distribution near the active layer 931.

[0128] In some embodiments, the second connection region 930b is formed based on a surface treatment process. The surface treatment process has a smaller impact on the surface of the active layer 931. Therefore, the second connection region 930b is formed based on a surface treatment process to etch to the surface of the active layer 931.

[0129] In some embodiments, the third connection region 930c is formed by wet etching, which can precisely control the etching depth to ensure that the first doped layer 961 is not over-etched, thereby protecting the doping characteristics of the doped layer 960.

[0130] In some embodiments, dry etching has strong directionality, which can ensure that the etching boundary is consistent with the etching mask and pre-etch to a certain depth, thereby providing a uniform initial etching interface for subsequent surface treatment and wet etching, and ensuring that the subsequent etching window is controllable.

[0131] In some embodiments, dry etching is used to stop the etching at a position 50-100 nm above the surface of the active layer 931. Dry etching has physical bombardment characteristics and may cause microscopic damage to the surface of the active layer, such as lattice defects or surface roughness, affecting the optical field distribution and carrier recombination efficiency. By controlling the endpoint of dry etching at 50-100 nm above the active layer, direct physical etching of the active layer can be reduced, thereby protecting the integrity and optoelectronic properties of the active layer.

[0132] In some embodiments, dry etching can employ inductively coupled plasma (ICP) etching. ICP etching achieves anisotropic and selective etching by controlling the plasma density and bombardment energy through a separate radio frequency (RF) power supply. By controlling ICP etching parameters, such as RF power, gas flow rate, and etching time, the etching depth is ensured to reach a preset position.

[0133] In some embodiments, dry etching has strong directionality, enabling precise control of etching depth and sidewall perpendicularity, providing a uniform initial etching interface for subsequent surface treatment and wet etching, and ensuring that the subsequent etching window is controllable. By pre-etching to a certain depth using dry etching, the dependence of subsequent wet etching on etching rate and depth is reduced, improving the fault tolerance of the wet etching process.

[0134] In some embodiments, the ICP dry etching process may include: first, transferring a mask pattern onto the surface of a laser material using photolithography to form an etching window; then, using an ICP etching machine to etch the exposed material. During the etching process, etching parameters, such as RF power, gas flow rate, etching time, and etching depth, are controlled to ensure that the etching depth of the current mesa remains at a preset position above the active layer. ICP dry etching can reduce lateral diffusion during the etching process, thereby maintaining the clarity of the etched pattern.

[0135] In some embodiments, during photolithography, the pattern on the photomask is transferred to photoresist. The exposed portions of the photoresist are removed by development, and then the pattern is transferred to an epitaxial wafer by etching or etching to obtain a pre-designed pattern. The photolithography process includes: uniform coating of photoresist, exposure, development, and etching. Photoresist is a thin film material whose solubility in the developer changes after exposure to light of a certain wavelength, resulting in a photochemical reaction in the exposed area. Photoresist is photochemically sensitive; after spin coating, pre-baking, exposure, and development, the pattern on the photomask is transferred to the substrate to obtain the desired circuit pattern. Based on the change in solubility before and after exposure, photoresist is classified into positive photoresist and negative photoresist. Positive photoresist, after exposure, has increased solubility in the developer and is dissolved, leaving the unexposed area as the desired pattern. Negative photoresist, after exposure, has decreased solubility in the developer and remains on the substrate, while the unexposed area dissolves in the developer, resulting in a pattern complementary to the pattern on the photomask.

[0136] In some embodiments, SiO2 is filled on the surface of the grating layer 932, and then a SiO2 mask is fabricated to grow a layer of SiO2 on the wafer surface with a thickness of 300-500 nm. Then, SiO2 is etched using photoresist as a mask, and the photoresist is removed after etching is completed.

[0137] In some embodiments, by adjusting the radio frequency power of the ICP etching machine, the ion energy in the plasma can be modulated, thereby affecting the etching rate and etching depth. Different gas combinations and flow ratios can adjust the chemical reaction rate and physical bombardment effect during the etching process, thereby affecting the etching depth and the quality of the etched surface.

[0138] In some embodiments, ICP dry etching involves physical bombardment, introducing surface defects and resulting in slag spots on the wafer surface, affecting chip yield. Simultaneously, ICP dry etching generates byproducts that easily adhere to vertical sidewalls, preventing sidewall corrosion.

[0139] In some embodiments, the method for fabricating a laser includes:

[0140] S140: Surface treatment is performed along the sidewall of the first connection region, and etching is performed to the surface of the source layer to form a second connection region, which is connected to the first connection region.

[0141] In some embodiments, the sidewalls of the second connection region 930b are formed based on a surface treatment process. The bottom surface of the second connection region 930b is located on the surface of the active layer 931. The surface treatment process causes less impact and damage to the active layer 931, thus helping to protect the surface of the active layer 931. Exemplarily, the surface treatment process may employ an etchant, such as phosphoric acid.

[0142] In some embodiments, surface treatment can repair surface defects introduced by dry etching and corrode deposits on the sidewall surface, thereby activating the surface. Simultaneously, surface treatment has a selective etching effect, further refining the etching precision and enabling the etching depth to reach the active layer surface.

[0143] In some embodiments, the surface treatment process can use an etchant to selectively etch the wafer after ICP etching, thereby selectively etching the semiconductor structure after ICP etching to remove sidewall deposits. Furthermore, after surface treatment, the etching depth is increased from the ICP etching depth to 400-500 nm, and then further etched to 600 nm, freeing up process redundancy for subsequent wet etching processes, further improving the depth etching accuracy. For example, the etchant can be phosphoric acid.

[0144] In some embodiments, surface treatment may employ chemical mechanical polishing (CMP) to ensure a smooth mesa surface after etching and that the etching depth accurately reaches the active layer surface. Surface treatment effectively removes surface impurities or residues introduced during ICP dry etching, improving surface smoothness. Surface treatment can also remove byproducts generated during ICP dry etching, preventing byproducts from covering the vertical sidewalls and hindering sidewall corrosion, removing a certain thickness of surface material, correcting the etching depth, and ensuring that the etching depth reaches the surface of the active layer 931.

[0145] In some embodiments, the thickness of the removed material can be controlled by adjusting the CMP polishing time and polishing fluid composition, thereby achieving further control over the etching depth.

[0146] In some embodiments, the surface treatment process may include: first, performing preliminary cleaning to remove impurities and residues present on the surface; then, processing with chemical mechanical polishing (CMP) technology, whereby the thickness of the removed material can be precisely controlled by adjusting the CMP polishing time and polishing solution composition, thereby achieving control over the etching depth.

[0147] In some embodiments, the method for fabricating a laser includes:

[0148] S150: Wet etching is performed along the sidewall of the second connection region and etched above the first doped layer to form the third connection region. The third connection region is connected to the second connection region to form a buried region.

[0149] In some embodiments, the third connection region 930c is formed by wet etching. Based on dry etching and surface treatment, wet etching can precisely control the etching depth to ensure that the first doped layer 961 is not over-etched, so as to protect the doping characteristics of the doped layer 960.

[0150] In some embodiments, the corrosion rate of the etchant on the sidewall surface during the surface treatment process is relatively low, resulting in a lower depth etching rate. In such cases, the third connection region 930c can be generated based on wet etching, providing an etching rate and improving the depth etching accuracy.

[0151] In some embodiments, based on dry etching and surface treatment, wet etching, with its superior etching uniformity and consistency, allows for precise control of the etching depth, ensuring that the first doped layer 961 is not over-etched, thus protecting its doping characteristics. For example, by adjusting the wet etching process parameters, such as the etchant concentration, temperature, and etching time, the etching rate and depth can be further precisely controlled to ensure that the etching depth lies between the active layer 931 and the first doped layer 961.

[0152] In some embodiments, because ICP dry etching has higher precision and etches to a certain depth, a shorter wet etching time is required while keeping the total mesa height constant, resulting in higher etching uniformity.

[0153] In some embodiments, a Br:HBr:H2O solution can be used as the etching solution to immerse the surface-treated semiconductor structure in the etching solution. Then, by adjusting the concentration, temperature, etching time, etching rate, and etching depth of the etching solution, the etching depth is ensured to be between the active layer and the first doped layer.

[0154] In some embodiments, the anisotropic etching of wet etching forms two etched surfaces on the wafer: a vertical one and a horizontal one. The vertical etched surface consumes the Br:HBr:H2O etching solution above SiO2, ensuring the uniformity of solution concentration in the horizontal direction, thereby avoiding unevenness of the horizontal etched surface.

[0155] In some embodiments, through the synergistic effect of dry etching, surface treatment and wet etching, dry etching can pre-etch to a certain depth and control the directionality of the etching depth; surface treatment can activate the surface by eliminating defects introduced by dry etching and further correct the etching depth; wet etching corrects the etching wall and repairs the etching interface, and finely controls the etching depth to etch to the target position.

[0156] In some embodiments, while wet etching offers high uniformity, its isotropic nature can lead to lateral over-etching. Dry etching pre-etching to a certain depth provides a safety margin for wet etching, preventing process variations from causing the etching depth to directly penetrate to the active layer. Combined with the depth correction capabilities of surface treatment, wet etching can precisely etch to the target location between the active layer and the first doped layer.

[0157] In some embodiments, dry etching, with its physical bombardment characteristics, may cause microscopic damage to the active layer surface, such as lattice defects or surface roughness, affecting the optical field distribution and carrier recombination efficiency. By controlling the endpoint of dry etching at a predetermined position above the active layer, direct physical etching of the active layer is avoided, thereby protecting the integrity and optoelectronic performance of the active layer. Then, based on the depth correction capabilities of surface treatment, the etching depth can be further extended to the active layer surface. Building upon dry etching and surface treatment, wet etching, with its precise etching control capabilities, achieves the correction of etched walls and the repair of interfaces, thereby ensuring the accuracy and controllability of the etching depth throughout the process, etching to the target position between the active layer and the first doped layer.

[0158] In some embodiments, dry etching, surface treatment, and wet etching are performed synergistically. Dry etching, as a preliminary step, leverages its strong directionality to provide a uniform initial etching interface for subsequent surface treatment and wet etching, ensuring controllable etching windows. By pre-etching to a certain depth using dry etching, the dependence of subsequent wet etching on etching rate and depth is reduced, improving the fault tolerance of the wet etching process. The surface treatment step ensures the cleanliness and flatness of the wafer surface, eliminating surface defects introduced by dry etching, and further refining the etching depth. Finally, wet etching, with its precise etching control capabilities, corrects the etched walls and repairs the interface, thereby ensuring the accuracy and controllability of the etching depth throughout the process, etching to the target location.

[0159] In some embodiments, the method for fabricating a laser includes:

[0160] S160: The first inverted PN junction region and the second inverted PN junction region are grown epitaxially along both sides of the buried area.

[0161] In some embodiments, due to the presence of the first inverted PN junction region 970 and the second inverted PN junction region 980, the current on both sides tends to flow through key regions such as the buried region 930 and the active layer 931, and less through other regions. This current-limiting characteristic helps to improve the efficiency of the laser 900.

[0162] In some embodiments, the first inversion PN junction region 970 includes a first N-InP inversion layer 971 and a first P-InP inversion layer 972, which are stacked one on top of the other. The second inversion PN junction region 980 includes a second N-InP inversion layer 981 and a second P-InP inversion layer 982, which are stacked one on top of the other.

[0163] In some embodiments, the surfaces of the first inverted PN junction region 970 and the second inverted PN junction region 980 are flush with the surface of the buried region 930.

[0164] In some embodiments, the method for fabricating a laser includes:

[0165] S170: A P-InP layer is grown along the surface of the buried area.

[0166] In some embodiments, when the P-InP layer 940 and the N-InP substrate layer 920 form a PN junction, the concentration difference of charge carriers causes diffusion. The result of this diffusion is that the P-InP layer 940 contains holes and negative ions, while the N-InP substrate layer 920 contains electrons and positive ions. Based on the principle of charge, holes are driven downwards into the active layer 931, and electrons are driven upwards into the active layer 931. Within the active layer 931, stimulated emission causes discrete electron-hole pairs to recombine, generating photons. This effectively converts electrically injected charge carriers into photons and generates gain light. The photons generated by recombination within the active layer 931 are reflected by the resonant cavity or distributed feedback grating to form positive feedback, thereby generating lasing light.

[0167] Figure 9 A schematic electron microscope image of an etched structure in a buried area according to some embodiments. Figure 1 , Figure 10 A schematic electron microscope image of an etched structure in a buried area according to some embodiments. Figure 2 , Figure 11 A schematic electron microscope image of an etched structure in a buried area according to some embodiments. Figure 3 . Figure 9 The corresponding structure is the etched structure of the buried area obtained by wet etching. Figure 10 The corresponding etching structure of the buried area is obtained by combining dry etching and wet etching. Figure 11 The corresponding etched structure of the buried area is obtained by combining dry etching, surface treatment and wet etching.

[0168] like Figure 9 As shown, when wet etching is used, if the etching depth is between the active layer and the first doped layer, the first doped layer will almost be etched through near the etching depth. Figure 10 As shown, when dry etching and wet etching are combined, the presence of reaction products on the sidewalls after dry etching leads to uneven etching during subsequent wet etching, resulting in a groove-like morphology.

[0169] like Figure 11 As shown, combining dry etching, surface treatment, and wet etching results in a flat etched morphology. The etching depth is controlled between the active layer and the first doped layer. Furthermore, the surface treatment exhibits selective etching, which not only flattens the etch but also improves the depth etching accuracy. Regarding the morphology, the surface treatment etches away a layer of semiconductor material, causing sidewall deposits to detach, thus achieving a smooth etched morphology.

[0170] The above description is merely a specific embodiment of this disclosure, but the scope of protection of this disclosure is not limited thereto. Any variations or substitutions conceived by those skilled in the art within the scope of the technology disclosed in this disclosure should be included within the scope of protection of this disclosure. Therefore, the scope of protection of this disclosure should be determined by the scope of the claims.

Claims

1. A laser, characterized by, include: N-InP substrate layer; A doped layer is located within the N-InP substrate layer, and the refractive index of the doped layer is greater than that of the N-InP substrate layer; the doped layer includes a first doping layer. A buried region, located above an N-InP substrate, contains an active layer and a grating layer, with the grating layer located above the active layer. The buried region includes: The first connection region has its sidewalls formed by dry etching, and the bottom surface of the first connection region is located at a predetermined position above the active layer. The second connection region has a sidewall formed based on a surface treatment. The second connection region is connected to the bottom surface of the first connection region, and the bottom surface of the second connection region is located in the active layer. The third connection region has its sidewalls formed by wet etching. The third connection region is connected to the bottom surface of the second connection region, and the bottom surface of the third connection region is located above the first doped layer. The P-InP layer is located above the burial area.

2. The laser of claim 1, wherein, The bottom surface of the first connection region is located at a position of 50-100 nm above the active layer.

3. The laser of claim 1, wherein, The doped layer includes multiple doped layers, wherein the multiple doped layers include the first doped layer, which is disposed close to the active layer.

4. The laser of claim 3, wherein, The refractive indices are consistent among the multiple doped layers; or, the refractive indices vary in a gradient among the multiple doped layers, and the refractive index of the first doped layer is greater than that of the other doped layers.

5. The laser of claim 1, wherein, A first inverted PN junction region and a second inverted PN junction region are formed on both sides of the buried area, respectively; The first inversion PN junction region includes a first N-InP inversion layer and a first P-InP inversion layer; The second inversion PN junction region includes a second N-InP inversion layer and a second P-InP inversion layer.

6. An optical module characterized by comprising: include: Circuit board; A coherent optical component, electrically connected to the circuit board, includes an optical modulator; A laser for providing a light source to an optical modulator, the laser comprising: N-InP substrate layer; A doped layer is located within the N-InP substrate layer, and the refractive index of the doped layer is greater than that of the N-InP substrate layer; the doped layer includes a first doping layer. A buried region, located above an N-InP substrate, contains an active layer and a grating layer, with the grating layer located above the active layer. The buried region includes: The first connection region has its sidewalls formed by dry etching, and the bottom surface of the first connection region is located at a predetermined position above the active layer. The second connection region has a sidewall formed based on a surface treatment. The second connection region is connected to the bottom surface of the first connection region, and the bottom surface of the second connection region is located in the active layer. The third connection region has its sidewalls formed by wet etching. The third connection region is connected to the bottom surface of the second connection region, and the bottom surface of the third connection region is located above the first doped layer. The P-InP layer is located above the burial area.

7. The optical module according to claim 6, characterized in that, The bottom surface of the first connection region is located at a position of 50-100 nm above the active layer.

8. The optical module according to claim 6, characterized in that, The doped layer includes multiple doped layers, wherein the multiple doped layers include the first doped layer, which is disposed close to the active layer.

9. The optical module according to claim 8, characterized in that, The refractive indices are consistent among the multiple doped layers; or, the refractive indices vary in a gradient among the multiple doped layers, and the refractive index of the first doped layer is greater than that of the other doped layers.

10. The optical module according to claim 6, characterized in that, A first inverted PN junction region and a second inverted PN junction region are formed on both sides of the buried area, respectively; The first inversion PN junction region includes a first N-InP inversion layer and a first P-InP inversion layer; The second inversion PN junction region includes a second N-InP inversion layer and a second P-InP inversion layer.

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