2c1a mini small size pd fast charging power supply charger circuit

Abstract

The utility model discloses a 2C1A mini small size PD fast charging power supply charger circuit, and its internal circuit includes input and anti surge circuit, full -wave rectifier circuit, EMI filter electromagnetic anti -interference circuit, absorption loop and high frequency transformer conversion circuit, synchronous rectification MOS circuit and output control circuit that connect gradually, absorption loop and high frequency transformer conversion circuit include high frequency transformer TR1A, and the primary side of high frequency transformer TR1A is connected EMI filter electromagnetic anti -interference circuit, still has integrated MOSFET pipe driving device and PWM control IC circuit, and the secondary side is connected synchronous rectification MOS circuit, output control circuit still has 431 output voltage adjustment and photo -coupler feedback loop circuit, and output control circuit includes the protocol chip U101 of model IP2726, U201 and the synchronous rectification power switch U5 of model MK91736.

Description

Technical Field

[0001] This utility model belongs to the technical field of power chargers, specifically relating to a 2C1A mini-sized PD fast charging power charger circuit. Background Technology

[0002] With the trend of consumer electronic devices becoming thinner and lighter, users have an increasingly urgent need for miniaturized and portable chargers. However, in order to achieve independent power distribution and protocol compatibility for different interfaces, existing multi-interface PD fast chargers require additional voltage divider components, switching switches, and interface adaptation control modules in traditional circuits. The large number of new components not only increases the complexity of the circuit, but also seriously encroaches on the internal layout space of the charger, resulting in a larger and heavier overall size of the charger, which cannot meet users' needs for portable and high-performance charging devices. Utility Model Content

[0003] The purpose of this invention is to provide a 2C1A mini-sized PD fast charging power bank / charger circuit to address the aforementioned problems.

[0004] This utility model is achieved through the following technical solution: a 2C1A miniature PD fast charging power bank charger circuit, the internal circuit of which includes, in sequence, an input and surge protection circuit, a full-wave rectification circuit, an EMI filtering electromagnetic interference suppression circuit, an absorption circuit and high-frequency transformer conversion circuit, a synchronous rectification MOS circuit, and an output control circuit. The absorption circuit and high-frequency transformer conversion circuit includes a high-frequency transformer TR1A. The primary side of the high-frequency transformer TR1A is connected to the EMI filtering electromagnetic interference suppression circuit, and is also connected to an integrated MOSFET driver device and a PWM control IC circuit. The secondary side is connected to the synchronous rectification MOS circuit, which includes a MOS transistor Q1. The gate (G) of the MOSFET Q1 is connected to a synchronous rectification control IC circuit, the source (S) is connected to the secondary side of the high-frequency transformer TR1A, and the drain (D) is connected to the input terminal of the output control circuit. The output control circuit is also connected to a 431 output voltage adjustment and optocoupler feedback loop circuit. The output control circuit includes protocol chips U101 and U201 (model IP2726) and a synchronous rectification power switch U5 (model MK91736). Protocol chip U101 is connected to a TYPE-C1 interface, and protocol chip U201 is connected to a TYPE-C2 interface and a USB-A interface. The TYPE-C2 interface and the USB-A interface output power after step-down through the TYPE-C1 interface.

[0005] Furthermore, pins 14-17 of the protocol chip U101 are CC2, DP1, DM1, and CC1, respectively, and are connected to the TYPE-C1 interface through resistors R111-R114. The TYPE-C1 interface and resistors R111-R114 are connected in parallel with capacitors C113-115 and then grounded. Pins 3 and 5 of the protocol chip U101 are CMPI / SDA and FB, respectively, and are connected to the 431 output voltage adjustment and optocoupler feedback loop circuit through capacitor C102, resistors R105 and R106. The protocol chip U101 is connected to the protocol chip U201 through the synchronous rectifier power switch U5.

[0006] Furthermore, pins 14-17 of the protocol chip U201 are connected to the TYPE-C2 interface via resistors R212-R215, respectively. Capacitors C210-213 are connected in parallel between the TYPE-C2 interface and resistors R212-R215 and then grounded. Pins 22-24 of the protocol chip U201 are connected to the VOUT1, VOUT1G, and VIN pins of the MOSFET Q3, respectively. The VIN pin is connected to the drain (D) of the MOSFET Q3 via resistor R211. The VOUT1G pin is connected to a 100K resistor R210 and the gate (G) of the MOSFET Q3, respectively. The VOUT1 pin is connected to a resistor R209... The source (S) terminal of MOSFET Q3 is connected to the positive terminal of the TYPE-C2 interface. Pins 13 and 12 of the protocol chip U201 are DM2 and DP2, respectively, and are connected to the USB-A interface through resistors R201 and R202. Pins 20 and 21 of the protocol chip U201 are connected to the VOUT2 and VOUT2G pins of MOSFET Q4, respectively. The VOUT2G pin is connected to a 100K resistor R208 and the gate (G) terminal of MOSFET Q4, respectively. The VOUT2 pin is connected to the source (S) terminal of MOSFET Q4 and the positive terminal of the USB-A interface through resistor R207. The drain (D) terminal of MOSFET Q4 is connected to the drain (D) terminal of MOSFET Q3.

[0007] Furthermore, pins 5 and 6 of the synchronous rectifier power switch U5 are SW pins, connected to resistor R25 and inductor L2. The end of resistor R25 furthest from the SW pin is grounded through capacitor C18. The end of inductor L2 furthest from the SW pin is connected to the input terminal of the protocol chip. Pin 4 of the synchronous rectifier power switch U5 is VIN pin, pins 7 and 8 are GND pins, and pin 1 is VFB pin connected to Vout2fb terminal. Vout2fb terminal is connected to FB pin of U201 and resistor R26 respectively. Resistor R24 ​​and capacitor C17 are connected in parallel to resistor R26 and then connected to the end of inductor L2 furthest from the SW pin. Polarized capacitors EC7, C19 and C20 are also connected between inductor L2 and VIN pin of protocol chip U2.

[0008] Furthermore, the FB pin of the protocol chip U101 is connected to the Vout1fb terminal in the 431 output voltage adjustment and optocoupler feedback loop circuit, and a high-precision resistor R22 with a resistance of 100K and an accuracy of 1% is connected between them. A resistor R18 is connected between the Vout1fb terminal and ground. The 431 output voltage adjustment and optocoupler feedback loop circuit also includes an infrared emitting diode U3A in the optocoupler U3 and an adjustable parallel regulator U4 of model TL431. The optocoupler U3 is of model EL1018, and the adjustable parallel regulator U4... The reference terminal is connected between resistor R18 and Vout1fb. The anode is grounded, and the cathode is connected to the cathode of infrared emitting diode U3A. The cathode of infrared emitting diode U3A is connected to Vout1fb through capacitor C14, resistor R21, and capacitor C12. The resistance of resistor R21 is 1K, the capacitance of capacitor C12 is 10nF, and the withstand voltage is 50V. A resistor R20 with a resistance of 2K is connected in parallel across infrared emitting diode U3A. The anode of infrared emitting diode U3A is connected to the positive terminal of the power supply through resistor R19 and capacitor C11.

[0009] Furthermore, the integrated MOSFET driving device and PWM control IC circuit includes a control chip U1 and a phototransistor detector U3B connected to the FB pin of the control chip U1. The control chip U1 is model MK2789, and the DRAIN pin of the control chip U1 is connected to the primary side of the high-frequency transformer TR1A.

[0010] This utility model employs an output control circuit that uses protocol chips U101 and U201 to handshake with the inserted device. The TYPE-C1, TYPE-C2, and USB-A interfaces output the required power from the device. The TYPE-C2 and USB-A interfaces are obtained by stepping down the voltage from the TYPE-C1 interface, which reduces the number of electronic components required. This helps to reduce the overall size of the device, improve the portability of the product, and meet the market demand for miniaturization and multi-functionality. Attached Figure Description

[0011] Figure 1 This is a circuit block diagram of this utility model; Figure 2 This is the circuit diagram of this utility model.

[0012] The attached figures are labeled as follows: 1. Input and surge protection circuit; 2. Full-wave rectifier circuit; 3. EMI filter electromagnetic interference suppression circuit; 4. Absorption circuit and high-frequency transformer conversion circuit; 5. Integrated MOSFET driver device and PWM control IC circuit; 6. Synchronous rectification MOS circuit; 7. Synchronous rectification control IC circuit; 8. Output control circuit; 9. 431 output voltage adjustment and optocoupler feedback loop circuit. Detailed Implementation

[0013] The present invention will be further illustrated below with reference to specific examples and accompanying drawings.

[0014] like Figures 1-2 As shown, this utility model describes a 2C1A miniature PD fast charging power bank / charger circuit. Its internal circuitry includes, in sequence, an input and surge protection circuit 1, a full-wave rectification circuit 2, an EMI filter and electromagnetic interference suppression circuit 3, an absorption circuit and high-frequency transformer conversion circuit 4, a synchronous rectification MOS circuit 6, and an output control circuit 8. The absorption circuit and high-frequency transformer conversion circuit 4 includes a high-frequency transformer TR1A. The primary side of the high-frequency transformer TR1A is connected to the EMI filter and electromagnetic interference suppression circuit 3, and also to an integrated MOSFET driver device and a PWM control IC circuit 5. The secondary side is connected to the synchronous rectification MOS circuit 6, which includes a MOSFET Q1. The gate (G) of the MOSFET Q1 is connected to the synchronous rectification control IC circuit 7, the source (S) is connected to the secondary side of the high-frequency transformer TR1A, and the drain (D) is connected to the input terminal of the output control circuit 8. The output control circuit 8 is also connected to the 431 output voltage adjustment and optocoupler feedback loop circuit 9. The output control circuit 8 includes protocol chips U101 and U201 of model IP2726 and synchronous rectification power switch U5 of model MK91736. Protocol chip U101 is connected to a TYPE-C1 interface, and protocol chip U201 is connected to a TYPE-C2 interface and a USB-A interface. The TYPE-C2 interface and the USB-A interface output power after step-down through the TYPE-C1 interface.

[0015] This utility model is equipped with an output control circuit 8, which uses protocol chips U101 and U201 to handshake with the inserted device. The TYPE-C1 interface, TYPE-C2 interface, and USB-A interface output the required output power of the device. The TYPE-C2 interface and USB-A interface are obtained by stepping down the voltage of the TYPE-C1 interface, which reduces the number of electronic components required, thus reducing the overall size of the device, improving the portability of the product, and meeting the market demand for miniaturization and multi-functionality.

[0016] In this embodiment of the invention, pins 14-17 of the protocol chip U101 are pins CC2, DP1, DM1, and CC1, respectively, and are connected to the TYPE-C1 interface through resistors R111-R114. Capacitors C113-115 are connected in parallel between the TYPE-C1 interface and resistors R111-R114 and then grounded, improving the anti-interference capability and reliability of the interface communication. Pins 3 and 5 of the protocol chip U101 are pins CMPI / SDA and FB, respectively, and are connected to the 431 output voltage adjustment and optocoupler feedback loop circuit 9 through capacitor C102, resistors R105 and R106. The protocol chip U101 is connected to the protocol chip U201 through the synchronous rectifier power switch U5, forming a precise voltage feedback adjustment path and an efficient power distribution mechanism. This ensures accurate control of the output voltage, achieves coordinated operation between multiple interfaces, further improves the overall performance and power safety of the charger, and meets the stable power supply requirements for simultaneous fast charging of multiple devices.

[0017] In this embodiment of the invention, pins 14-17 of the protocol chip U201 are connected to the TYPE-C2 interface via resistors R212-R215. Capacitors C210-213 are connected in parallel between the TYPE-C2 interface and resistors R212-R215 and then grounded. Pins 22-24 of the protocol chip U201 are connected to the VOUT1, VOUT1G, and VIN pins of the MOSFET Q3, respectively. The VIN pin is connected to the drain (D) of the MOSFET Q3 via resistor R211. The VOUT1G pin is connected to the gate (G) of the MOSFET Q3 via a 100K resistor R210. The VOUT1 pin is connected to the source (S) of the MOSFET Q3 and the positive terminal of the TYPE-C2 interface via resistor R209. The protocol chip U201... Pins 13 and 12 are DM2 and DP2 respectively, connected to the USB-A interface via resistors R201 and R202. Pins 20 and 21 of the protocol chip U201 are connected to the VOUT2 and VOUT2G pins of MOSFET Q4 respectively. The VOUT2G pin is connected to the gate (G) of MOSFET Q4 via a 100K resistor R208. The VOUT2 pin is connected to the source (S) of MOSFET Q4 and the positive terminal of the USB-A interface via resistor R207. The drain (D) of MOSFET Q4 is connected to the drain (D) of MOSFET Q3. This enables independent and stable power output from multiple interfaces. Through drive control and signal filtering mechanisms, the overall efficiency and electrical safety of the charger are improved, meeting the fast charging needs of different devices and the stable operation requirements under complex working conditions.

[0018] In this embodiment of the present invention, pins 5 and 6 of the synchronous rectifier power switch U5 are SW pins, connected to resistor R25 and inductor L2. The end of resistor R25 furthest from the SW pin is grounded through capacitor C18. The end of inductor L2 furthest from the SW pin is connected to the input terminal of the protocol chip. Pin 4 of the synchronous rectifier power switch U5 is VIN pin, pins 7 and 8 are GND pins, and pin 1 is VFB pin connected to Vout2fb terminal. Vout2fb terminal is connected to FB pin of U201 and resistor R26 respectively. Resistor R24 ​​and capacitor C17 are connected in parallel to resistor R26 and then connected to the end of inductor L2 furthest from the SW pin to form a feedback voltage divider and compensation network. The voltage at the output terminal of the inductor is collected and fed back to FB pin of U201 to form a closed-loop regulation mechanism. Polarized capacitor EC7, capacitor C19 and capacitor C20 are also connected between inductor L2 and VIN pin of protocol chip U2 to form a multi-stage filtering network to improve the smoothness of the input voltage.

[0019] In this embodiment of the invention, the FB pin of the protocol chip U101 is connected to the Vout1fb terminal in the 431 output voltage adjustment and optocoupler feedback loop circuit 9. A high-precision resistor R22 with a resistance of 100K and an accuracy of 1% is connected between the two. A resistor R18 is connected between the Vout1fb terminal and ground. The 431 output voltage adjustment and optocoupler feedback loop circuit 9 also includes an infrared emitting diode U3A in the optocoupler U3 and an adjustable parallel voltage regulator U4 of model TL431. The optocoupler U3 is model EL1018. The reference terminal of U4 is connected between resistor R18 and Vout1fb. The anode is grounded, and the cathode is connected to the cathode of infrared emitting diode U3A. The cathode of infrared emitting diode U3A is connected to Vout1fb through capacitor C14, resistor R21, and capacitor C12. The resistance of resistor R21 is 1K, the capacitance of capacitor C12 is 10nF, and the voltage rating is 50V. A resistor R20 with a resistance of 2K is connected in parallel across infrared emitting diode U3A. The anode of infrared emitting diode U3A is connected to the positive terminal of the power supply through resistor R19 and capacitor C11.

[0020] In this embodiment of the present invention, the integrated MOSFET driving device and PWM control IC circuit 5 includes a control chip U1 and a phototransistor detector U3B connected to the FB pin of the control chip U1. The control chip U1 is model MK2789. The DRAIN pin of the control chip U1 is connected to the primary side of the high-frequency transformer TR1A. By utilizing the isolated signal transmission between the phototransistor detector U3B and the front-end optocoupler feedback loop, the control chip can respond to changes in the output voltage in real time and dynamically adjust the PWM duty cycle, thereby improving the timeliness and accuracy of voltage regulation.

[0021] The above embodiments are merely preferred embodiments of the present utility model and are only used to explain the present utility model, not to limit the present utility model. Any changes, substitutions, combinations, simplifications, modifications, etc., made by those skilled in the art without departing from the spirit and principle of the present utility model shall be considered equivalent substitutions and shall be included within the protection scope of the present utility model.

Claims

1. A 2C1A miniature PD fast charging power bank / charger circuit, characterized in that: Its internal circuitry includes an input and surge protection circuit (1), a full-wave rectifier circuit (2), an EMI filter electromagnetic interference suppression circuit (3), an absorption circuit and high-frequency transformer conversion circuit (4), a synchronous rectifier MOS circuit (6), and an output control circuit (8) connected in sequence. The absorption circuit and high-frequency transformer conversion circuit (4) includes a high-frequency transformer TR1A. The primary side of the high-frequency transformer TR1A is connected to the EMI filter electromagnetic interference suppression circuit (3) and also to an integrated MOSFET driver device and a PWM control IC circuit (5). The secondary side is connected to the synchronous rectifier MOS circuit (6). The synchronous rectifier MOS circuit (6) includes a MOS transistor Q1. The gate of the MOS transistor Q1 is connected to... A synchronous rectification control IC circuit (7) is connected, with the S terminal connected to the secondary side of the high-frequency transformer TR1A and the D terminal connected to the input terminal of the output control circuit (8). The output control circuit (8) is also connected to a 431 output voltage adjustment and optocoupler feedback loop circuit (9). The output control circuit (8) includes protocol chips U101 and U201 of model IP2726 and synchronous rectification power switch U5 of model MK91736. The protocol chip U101 is connected to a TYPE-C1 interface, and the protocol chip U201 is connected to a TYPE-C2 interface and a USB-A interface. The TYPE-C2 interface and the USB-A interface output power after being stepped down by the TYPE-C1 interface.

2. The 2C1A miniature PD fast charging power bank / charger circuit according to claim 1, characterized in that: Pins 14-17 of the protocol chip U101 are CC2, DP1, DM1 and CC1 respectively, and are connected to the TYPE-C1 interface through resistors R111-R114 respectively. The TYPE-C1 interface and resistors R111-R114 are connected in parallel with capacitors C113-115 and then grounded. Pins 3 and 5 of the protocol chip U101 are CMPI / SDA and FB respectively, and are connected to the 431 output voltage adjustment and optocoupler feedback loop circuit (9) through capacitor C102, resistors R105 and R106. The protocol chip U101 is connected to the protocol chip U201 through the synchronous rectifier power switch U5.

3. The 2C1A miniature PD fast charging power bank / charger circuit according to claim 1, characterized in that: Pins 14-17 of the protocol chip U201 are connected to the TYPE-C2 interface via resistors R212-R215. Capacitors C210-213 are connected in parallel between the TYPE-C2 interface and resistors R212-R215, and then grounded. Pins 22-24 of the protocol chip U201 are connected to the VOUT1, VOUT1G, and VIN pins of the MOSFET Q3, respectively. The VIN pin is connected to the drain (D) of the MOSFET Q3 via resistor R211. The VOUT1G pin is connected to a 100K resistor R210 and the gate (G) of the MOSFET Q3. The VOUT1 pin is connected to the M... The source (S) of MOSFET Q3 and the positive terminal of the TYPE-C2 interface are connected. Pins 13 and 12 of the protocol chip U201 are DM2 and DP2, respectively, and are connected to the USB-A interface through resistors R201 and R202. Pins 20 and 21 of the protocol chip U201 are connected to the VOUT2 and VOUT2G pins of MOSFET Q4, respectively. The VOUT2G pin is connected to a 100K resistor R208 and the gate (G) of MOSFET Q4, respectively. The VOUT2 pin is connected to the source (S) of MOSFET Q4 and the positive terminal of the USB-A interface through resistor R207. The drain (D) of MOSFET Q4 is connected to the drain (D) of MOSFET Q3.

4. The 2C1A miniature PD fast charging power bank / charger circuit according to claim 1, characterized in that: Pins 5 and 6 of the synchronous rectifier power switch U5 are SW pins, connected to resistor R25 and inductor L2. The end of resistor R25 furthest from the SW pin is grounded through capacitor C18. The end of inductor L2 furthest from the SW pin is connected to the input terminal of the protocol chip. Pin 4 of the synchronous rectifier power switch U5 is VIN pin, pins 7 and 8 are GND pins, and pin 1 is VFB pin connected to Vout2fb terminal. Vout2fb terminal is connected to FB pin of U201 and resistor R26 respectively. Resistor R24 ​​and capacitor C17 are connected in parallel to resistor R26 and then connected to the end of inductor L2 furthest from the SW pin. Polarized capacitors EC7, C19 and C20 are also connected between inductor L2 and VIN pin of protocol chip U2.

5. The 2C1A miniature PD fast charging power bank charger circuit according to claim 1, characterized in that: The FB pin of the protocol chip U101 is connected to the Vout1fb terminal in the 431 output voltage adjustment and optocoupler feedback loop circuit (9). A high-precision resistor R22 with a resistance of 100K and an accuracy of 1% is connected between the two. A resistor R18 is connected between the Vout1fb terminal and ground. The 431 output voltage adjustment and optocoupler feedback loop circuit (9) also includes the infrared emitting diode U3A in the optocoupler U3 and the adjustable parallel regulator U4 of model TL431. The optocoupler U3 is of model EL1018 and the adjustable parallel regulator U4 is of model EL1018. The reference terminal is connected between resistor R18 and Vout1fb. The anode is grounded, and the cathode is connected to the cathode of infrared emitting diode U3A. The cathode of infrared emitting diode U3A is connected to Vout1fb through capacitor C14, resistor R21, and capacitor C12. The resistance of resistor R21 is 1K, the capacitance of capacitor C12 is 10nF, and the withstand voltage is 50V. A resistor R20 with a resistance of 2K is connected in parallel across infrared emitting diode U3A. The anode of infrared emitting diode U3A is connected to the positive terminal of the power supply through resistor R19 and capacitor C11.

6. The 2C1A miniature PD fast charging power bank / charger circuit according to claim 1, characterized in that: The integrated MOSFET driving device and PWM control IC circuit (5) includes a control chip U1 and a phototransistor detector U3B connected to the FB pin of the control chip U1. The control chip U1 is model MK2789, and the DRAIN pin of the control chip U1 is connected to the primary side of the high-frequency transformer TR1A.

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