Method for reducing the boron concentration of a semiconductor layer
Thermal oxidation and annealing cycles with oxide layer segregation and removal effectively reduce boron concentration in semiconductor-on-insulator substrates, addressing contamination issues and enhancing photonic device performance.
Patent Information
- Application Number
- FR2023001464
- Authority / Receiving Office
- FR · FR
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2023-02-16
- Publication Date
- 2025-12-26
- Estimated Expiration
- 2043-02-16
AI Technical Summary
Photonic applications using semiconductor-on-insulator substrates are sensitive to boron contamination in the active layer, which leads to photon absorption and electromagnetic wave attenuation, despite efforts to minimize boron content in donor substrates and during manufacturing processes.
A method involving thermal oxidation and annealing cycles to form an oxide layer, where boron atoms segregate into the oxide, reducing boron concentration in the semiconductor layer, followed by oxide layer removal, and optionally annealing under inert atmosphere to enhance boron diffusion and uniformity.
Significantly reduces boron concentration in the semiconductor layer to less than 5 x 10¹⁴ at/cm³, compensating for external contamination and improving substrate quality for photonic devices.
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Abstract
Description
Title of the invention: Method for reducing the boron concentration of a semiconductor layer technical field
[0001] The invention relates to a method for reducing the boron concentration of a semiconductor layer, as well as a method for manufacturing a semiconductor-on-insulator substrate in which said method for reducing the boron concentration can be implemented to remedy boron contamination of said semiconductor layer. State of the art
[0002] Photonic applications use semiconductor-on-insulator substrates. Such substrates comprise, from their back face to their front face, a support substrate, an electrically insulating layer and a single-crystal semiconductor layer, called the active layer.
[0003] Photonic devices, such as lasers, modulators, waveguides or multiplexers, can advantageously be formed at least in part in the active layer of a semiconductor-on-insulator substrate.
[0004] However, these applications are very sensitive to the presence of boron in the active layer. For example, in a waveguide, the presence of boron in the active layer induces the absorption of photons, which leads to an attenuation of an electromagnetic wave circulating in the active layer.
[0005] We therefore seek to reduce the boron content in the active layer.
[0006] In some cases, the boron concentration in the active layer may come from the material of said layer itself.
[0007] In particular, a semiconductor-on-insulator substrate can typically be formed by the Smart Cut™ process, comprising: the formation of a weakened zone in a donor substrate to delimit a semiconductor layer intended to form the active layer, the bonding of the donor substrate to a support substrate via an electrically insulating layer, and the detachment of the donor substrate along the weakened zone so as to transfer the semiconductor layer to the support substrate and the electrically insulating layer.
[0008] A first solution therefore consists of reducing the boron content in the donor substrate from which the active layer is derived. For this purpose, an N-doped donor substrate can be chosen, which has a boron content lower than the donor substrates conventionally used in the microelectronics industry, which are generally P-doped semiconductor substrates and have a boron content on the order of 1015 at / cm3 or more.
[0009] However, even by minimizing the boron content in the donor substrate, there is external contamination, linked in particular to the atmosphere to which the semiconductor-on-insulator substrate is subjected during its manufacture, as well as to the equipment used in the manufacturing processes, which is difficult to avoid.
[0010] Thus, for example, after the transfer of the semiconductor layer from the donor substrate to the support substrate, a rapid thermal annealing (RTA) process is generally implemented to smooth the surface of the transferred semiconductor layer. During this thermal treatment, the edge of the semiconductor-on-insulator substrate is surrounded by an annular protective tool (called an "edge guard ring") designed to uniformize the temperature within the substrate. Such a tool is typically made of polycrystalline silicon with a high boron content to increase its mechanical strength. Under the influence of the thermal treatment temperature and ambient gases, the boron present in the tool reacts and contaminates the edge of the substrate surrounded by the tool.
[0011] Tests were carried out with holding tools having a lower boron content, but, despite this measure, the boron content in the active layer of the semiconductor-on-insulator substrate remains higher than the maximum desired content. Summary of the invention
[0012] One object of the invention is to further reduce the boron concentration of the active layer of a semiconductor-on-insulator substrate, particularly for photonic applications.
[0013] To this end, the invention proposes a method for reducing the boron concentration of a semiconductor layer of a semiconductor-on-insulator substrate, comprising:
[0014] - at least one heat treatment cycle, each cycle comprising an oxidation thermal modification of said semiconductor layer so as to form an oxide layer on the semiconductor layer, in which, by boron segregation, boron atoms from the semiconductor layer diffuse into the oxide layer so as to create a boron concentration deficit in the semiconductor layer at the interface with the oxide layer, and
[0015] - a removal of the oxide layer.
[0016] Thus, thanks to the segregation phenomenon, the boron content in the semiconductor layer can be reduced in one or more heat treatment cycles. This process therefore makes it possible to compensate for boron contamination that may occur during the fabrication of the semiconductor-on-insulator substrate.
[0017] According to one embodiment of the process, said at least one heat treatment cycle includes, after thermal oxidation, annealing under an inert atmosphere for a duration suitable to uniformize the boron concentration in the semiconductor layer and / or increase the diffusion of boron atoms towards the sacrificial oxide / semiconductor layer interface.
[0018] According to one implementation of the process, annealing is carried out at a temperature between 800 °C and 1200 °C.
[0019] According to one embodiment of the process, the annealing time is between a few seconds and several hours, for example between two seconds and twenty hours.
[0020] According to one embodiment of the process, thermal oxidation is carried out at a temperature between 800 and 1200°C under an oxidizing atmosphere.
[0021] According to one embodiment of the process, thermal oxidation is carried out under controlled conditions to form the oxide layer with a thickness greater at the center of the semiconductor layer than at the edge of said semiconductor layer.
[0022] According to one embodiment of the process, thermal oxidation includes a temperature rise under an inert atmosphere above a target thermal oxidation temperature followed by a temperature fall back to said target thermal oxidation temperature so as to form a temperature gradient in the substrate to generate a higher oxide layer formation rate at the center of the semiconductor layer compared to the edge.
[0023] According to one embodiment of the process, the semiconductor layer has a thickness of between 0.01 and 1 pm.
[0024] According to one implementation of the process, in each treatment cycle, thermal oxidation and annealing are carried out in the same furnace.
[0025] According to one embodiment, the process includes at least a first and a second treatment cycle.
[0026] According to one embodiment, the process includes, between the first and second treatment cycle, a removal of the oxide layer formed during the first heat treatment cycle.
[0027] According to one embodiment, the second treatment cycle directly follows the first treatment cycle, the oxide layer formed during the first and second treatment cycles being removed after the second treatment.
[0028] According to one embodiment, the semiconductor layer has an initial boron concentration greater than or equal to 1015 at / cm3.
[0029] According to one embodiment, the semiconductor layer has, after removal of the oxide layer, a final boron content less than or equal to 5.1014 at / cm3.
[0030] According to one embodiment, the removal of the oxide layer is implemented by selective chemical etching.
[0031] The invention further relates to a method for manufacturing a semiconductor-on-insulator substrate, comprising:
[0032] - the formation of a weakening zone by the implantation of ionic species in a donor substrate to delimit a semiconductor layer,
[0033] - the assembly of the donor substrate with a support substrate via a electrically insulating layer,
[0034] - the detachment of the donor substrate along the embrittlement zone for transfer the semiconductor layer onto the supporting substrate, thus forming a semiconductor-on-insulator substrate.
[0035] - the implementation of the process for reducing the boron concentration of the layer semiconductor according to the invention.
[0036] According to one embodiment, the manufacturing process includes, after the transfer of the semiconductor layer onto the support substrate, at least one rapid heat treatment for smoothing the surface of said semiconductor layer, each rapid heat treatment being carried out before the implementation of the process for reducing the boron concentration of the semiconductor layer.
[0037] The invention further relates to a method of manufacturing a photonic device, comprising the manufacture of a semiconductor-on-insulator substrate according to the manufacturing method according to the invention, and the formation of a passive photonic component in the semiconductor layer having a reduced boron concentration.
[0038] The invention further relates to a semiconductor-on-insulator substrate comprising: • a support substrate, • an electrically insulating layer disposed on the support substrate, • a semiconductor layer transferred onto the support substrate, the electrically insulating layer being interposed between the support substrate and the semiconductor layer,
[0039] the semiconductor layer having an average boron concentration of less than 5.1014 at / cm3.
[0040] According to one embodiment, the thickness of the semiconductor layer is between 100 and 600 nm and the thickness of the electrically insulating layer is between 200 nm and 3000 nm.
[0041] According to one embodiment, the semiconductor layer comprises a passive photonic component. Brief description of the drawings
[0042] Other features and advantages of the invention will become apparent from the detailed description that follows, with reference to the accompanying drawings, in which:
[0043] - Fig. 1 is a schematic cross-sectional view of the formation of a brittle zone lization by implantation of ionic species in a donor substrate;
[0044] - [Fig. 2] is a schematic cross-sectional view of the formation of an electrical layer triangularly insulating on a supporting substrate;
[0045] - [Fig. 3] is a schematic cross-sectional view of the bonding of the donor substrate to the [Fig.1] on the substrate supporting the [Fig.2];
[0046] - [Fig. 4] is a schematic cross-sectional view of the semiconductor substrate on insulator obtained after detachment of the donor substrate along the weakening zone;
[0047] - [Fig. 5] is a schematic cross-sectional view of the thermal oxidation of the layer active semiconductor substrate on insulator of the [Fig.4];
[0048] - [Fig. 6] is a schematic cross-sectional view of the semiconductor substrate of the [Fig.5] after removal of the oxide layer;
[0049] - [Fig.7a] is a schematic illustration of a stage in the establishment of species in a semiconductor substrate
[0050] - [Fig. 7b] is a schematic illustration of an embodiment comprising a thermal oxidation step;
[0051] - [Fig. 8] is a graph showing boron concentration curves as a function of of the depth in the semiconductor-on-insulator substrate, respectively following a standard manufacturing process comprising a rapid smoothing heat treatment (I), a manufacturing process based on a boron-depleted donor substrate and the use of an annular substrate protection tool during a rapid smoothing heat treatment designed to minimize boron contamination (II) and a process carried out under the same conditions as process (II) followed by the boron concentration reduction process according to the invention (III).
[0052] For reasons of readability of the figures, the different layers have not necessarily been represented to scale. Detailed description of implementation methods
[0053] Figures 1 to 4 represent, in a manner known from the prior art, a Smart Cut™ manufacturing process for a semiconductor substrate on an insulator, comprising successively at least the following steps:
[0054] - the implantation of ionic species in a first semiconductor substrate 10, called donor substrate, so as to form a weakening zone 11, as shown in [Fig.1], said weakening zone limiting a layer 12 to be transferred;
[0055] - the formation, on a second semiconductor substrate 20, called the receiving substrate, of an electrically insulating layer 21, in particular obtained by oxidation of a superficial part of the substrate 20, as shown in [Fig.2];
[0056] - the transfer of a layer 12 of the donor substrate 10 by bonding to the substrate receiver 20, via the electrically insulating layer 21, then by de staining of the donor substrate 10 along the embrittlement zone 11, as shown in figures 3 and 4. A substrate 1 of the semiconductor-on-insulator type is thus obtained (cf. [Fig.4]).
[0057] Advantageously, the substrate 1 is configured for photonic applications. As a result, the thickness of the transferred layer 12 is preferably between 100 and 600 nm and the thickness of the electrically insulating layer is preferably between 200 nm and 3000 nm.
[0058] According to an alternative, the electrically insulating layer 21 can be formed on the donor substrate 10 before the implantation step.
[0059] The invention relates to a method for reducing the boron concentration of the semiconductor layer 12 of the substrate.
[0060] In its general embodiment, this process involves, after the transfer step, a heat treatment cycle. This cycle includes a thermal oxidation step of the semiconductor layer 12, in order to form a sacrificial oxide layer 120 on the semiconductor layer, this step being shown in [Fig. 5]. During the oxidation, a segregation phenomenon occurs, during which boron atoms move from the semiconductor layer to the sacrificial oxide layer 120, thus reducing the boron concentration of the semiconductor layer 12. The heat treatment cycle also includes a heat treatment step, carried out either after the oxidation step or simultaneously with it. This heat treatment step allows a redistribution of boron atoms in the semiconductor layer 12. Finally, and with reference to [Fig.6], the sacrificial oxide layer 120 is removed so as to expose the semiconducting layer 12.
[0061] Thermal oxidation can be carried out at a temperature between 800 and 1200 °C under an oxidizing atmosphere.
[0062] Advantageously, the process is implemented under conditions that already allow, in a known manner, a significant reduction in the boron content of the semiconductor substrate. In particular, an N-doped substrate with a reduced boron content can be used as the donor substrate. A low-boron protective ring tool can also be used.
[0063] According to one embodiment, the process may comprise several heat treatment cycles, in particular two heat treatment cycles. This allows for better diffusion of boron at the interface between the semiconductor layer 12 and the sacrificial oxide layer 120. The heat treatment cycles can then be carried out directly one after the other, removing the oxide layer 120 after the last heat treatment cycle, or the oxide layer 120 formed after each heat treatment cycle can be removed. Removing the The oxide layer 120 after the last heat treatment cycle has the advantage of not requiring removal of the substrate from the furnace between the different heat treatment cycles, thus facilitating the industrialization of the process.
[0064] In order to further improve the diffusion of boron at the interface between the semiconductor layer 12 and the sacrificial oxide layer 120, the heat treatment step can be annealing under an inert atmosphere. Advantageously, such annealing can be carried out at a suitable temperature to uniformize the boron concentration in the semiconductor layer 12 and / or increase the diffusion of boron atoms towards the sacrificial oxide 120 / semiconductor layer 12 interface. This annealing can advantageously be performed at a temperature between 800 and 1200 °C and last from a few seconds to several hours, or even several tens of hours.
[0065] In order to minimize the time and material resources required to implement the proposed process, the heat treatment cycles and the heat treatment step can be carried out in the same furnace. Thus, only one furnace is required to implement the process, and no removal of the substrate from the furnace is necessary before the oxide layer removal step 120.
[0066] Following the implantation step of the Smart Cut™ process, the inventors observed that the uniformity of the implantation depth of the species is degraded. This non-uniformity of implantation depth results in a non-uniformity of the thickness of the active layer, which typically adopts a concave or convex profile, which is detrimental to the quality of the components subsequently formed in this active layer. Such a concave profile is illustrated in [Fig. 7a]. According to an embodiment illustrated in [Fig. 7b], thermal oxidation is carried out under controlled conditions, so as to form the oxide layer with a greater thickness at the center of the semiconductor layer 12 than at its edges.Thus, this oxidation step consumes more material from the semiconductor layer 12 at the center than at the edge of the substrate, thereby compensating, at least in part, for the non-uniformity of thickness due to the implantation step of the semiconductor-on-insulator substrate manufacturing process.
[0067] In order to obtain such an oxide layer 120 with a greater thickness at the center than at its edges, thermal oxidation can be carried out in two stages. Initially, the temperature is increased under an inert atmosphere, above a target thermal oxidation temperature, and then the temperature is decreased to this target temperature. An oxidizing atmosphere is introduced during this second stage. This allows the substrate to cool at its edges more rapidly than at its center, so as to obtain a higher oxide growth rate at the center of the substrate than at its edges. An oxide layer is thus formed with a thickness profile more suitable for improving the uniformity of the semiconductor layer 12 after deoxidation, than if We had formed an oxide layer with a simple rise to the target oxidation temperature. In this latter case, the thickness profile of the oxide layer formed will be similar to the initial thickness profile of the transferred semiconductor layer 12.
[0068] Before implementation of the proposed process, the semiconductor layer may have an initial boron concentration greater than or equal to 10¹⁵ at / cm³. Indeed, P-doped substrates generally used in the fabrication of semiconductor-on-insulator substrates have a boron content of this order. Following the use of the process, the semiconductor layer is advantageously reduced to a boron content less than or equal to 5 x 10¹⁴ at / cm³.
[0069] According to one embodiment, the removal of the oxide layer 120 is achieved by selective chemical etching, which is particularly well-suited to the fabrication of semiconductor substrates on insulators. This may, in particular, involve hydrofluoric acid etching. Alternatively, it may involve dry reactive ion etching, which offers both a good degree of anisotropy, allowing the substrate to be etched primarily in its thickness direction, and does not significantly damage the substrate.
[0070] The invention further relates to a method for manufacturing a semiconductor-on-insulator substrate, comprising:
[0071] - the formation of a weakening zone 11 by the implantation of ionic species in a donor substrate 10 to delimit a semiconductor layer 12,
[0072] - the assembly of the donor substrate 10 with a support substrate 20 via of an electrically insulating layer 21,
[0073] - the detachment of the donor substrate along the embrittlement zone 11 for transfer the semiconductor layer 12 onto the support substrate 20, so as to form the semiconductor-on-insulator substrate 1.
[0074] - the implementation of the boron concentration reduction process described above- Before.
[0075] One or more rapid heat treatment (RTA) steps may be provided before the implementation of the boron concentration reduction process, so as to smooth the surface of the semiconductor layer 12.
[0076] Figure 8 shows boron concentration curves as a function of depth in the semiconductor-on-insulator substrate, respectively following a standard manufacturing process comprising a rapid smoothing heat treatment (I), a manufacturing process based on a boron-depleted donor substrate and the use of an annular substrate protection tool during a rapid smoothing heat treatment designed to minimize boron contamination (II), and a process implemented under the same conditions as process (II) followed by A boron concentration reduction process according to the invention (III). It can be seen that the proposed manufacturing process considerably reduces the boron content of the upper layer of the resulting semiconductor substrate, the upper semiconductor layer corresponding to depths less than 0.5 micrometers. In particular, the reduction in boron content is especially significant beyond approximately 0.1 micrometers in thickness (the peak located between 0 and 0.04 µm in depth is a measurement artifact). Conversely, a boron content peak is observed at around 0.5 µm in depth, which corresponds to the depth of the electrically insulating layer.
[0077] Finally, the invention also relates to a method for manufacturing a photonic device, comprising the fabrication of a semiconductor-on-insulator substrate according to the method described above and the formation of a passive photonic component in the semiconductor layer 12. The passive photonic component thus obtained will therefore have a reduced boron concentration. It may be, for example, but not limited to, a waveguide, a modulator, or a multiplexer.
Claims
Demands
1. A method for reducing the boron concentration of a semiconductor layer (12) of a semiconductor-on-insulator substrate (1), comprising: - at least one heat treatment cycle, each cycle comprising thermal oxidation of said semiconductor layer (12) so as to form an oxide layer (120) on the semiconductor layer (12), in which, by boron segregation, boron atoms from the semiconductor layer (12) diffuse into the oxide layer (120) so as to create a boron concentration deficit in the semiconductor layer (12) at the interface with the oxide layer (120), and - removal of the oxide layer (120),in which thermal oxidation comprises a temperature rise under an inert atmosphere above a target thermal oxidation temperature followed by a temperature fall back to said target thermal oxidation temperature so as to form a temperature gradient in the substrate to generate a higher oxide layer formation rate (120) at the center of the semiconductor layer compared to the edge.
2. A method according to the preceding claim, wherein said at least one heat treatment cycle comprises, after thermal oxidation, annealing under an inert atmosphere for a time adapted to uniformize the boron concentration in the semiconductor layer (12) and / or increase the diffusion of boron atoms towards the sacrificial oxide (120) / semiconductor layer (12) interface.
3. A method according to claim 2, wherein annealing is carried out at a temperature between 800 °C and 1200 °C.
4. A method according to any one of claims 1 to 3, wherein thermal oxidation is carried out at a temperature between 800 and 1200°C under an oxidizing atmosphere.
5. A method according to any one of claims 1 to 4, wherein the semiconductor layer (12) has a thickness between 0.01 and 1 pm.
6. A process according to any one of claims 2 to 5, wherein, in each treatment cycle, thermal oxidation and annealing are carried out in the same furnace.
7. A method according to any one of claims 1 to 6, comprising at least a first and a second treatment cycle.
8. A process according to claim 7, comprising, between the first and second treatment cycle, a removal of the oxide layer (120) formed during the first heat treatment cycle.
9. A method according to claim 7, wherein the second treatment cycle directly follows the first treatment cycle, the oxide layer (120) formed during the first and second treatment cycles being removed after the second treatment.
10. A method according to any one of claims 1 to 9, wherein the semiconductor layer (12) has an initial boron concentration greater than or equal to 1015 at / cm3.
11. A method according to claim 10, wherein the semiconductor layer (12) has, after removal of the oxide layer (120), a final boron content less than or equal to 5.1014 at / cm3.
12. A method according to any one of claims 1 to 11, wherein the removal of the oxide layer (120) is carried out by selective chemical etching.
13. A method for manufacturing a semiconductor-on-insulator substrate (1), comprising: - the formation of a weakening zone (11) by implanting ionic species in a donor substrate (10) to delimit a semiconductor layer (12), - the assembly of the donor substrate (10) with a support substrate (20) via an electrically insulating layer (21), - the detachment of the donor substrate (10) along the weakening zone (11) to transfer the semiconductor layer (12) onto the support substrate (20), so as to form the semiconductor-on-insulator substrate (1), - the implementation of the method for reducing the boron concentration of the semiconductor layer (12) according to any one of claims 1 to 1.
14. 1Z. A method according to claim 13, comprising, after the transfer of the semiconductor layer (12) onto the support substrate (20), at least one rapid heat treatment for smoothing the surface of said semiconductor layer (12), each rapid heat treatment being carried out before the implementation of the method for reducing the boron concentration of the semiconductor layer (12).
15. Method of manufacturing a photonic device, comprising manufacturing a semiconductor-on-insulator substrate according to the method of claim 13 or claim 14, and forming a passive photonic component in the semiconductor layer (12) having a reduced boron concentration.