RF transmitter

Abstract

To suppress occurrence of a local leak in a RF transmitter using a Gilbert cell type double balanced mixer.SOLUTION: In a RF transmitter 100, a local leak detection circuit 130 detects a local leak output from a RF signal generation unit 110. A mixer in the RF signal generation unit 110 has correction bias generation means for generating a correction bias for offset correction of a differential pair on the basis of a given digital value. A correction control unit 140 is means that has storage means for storing the digital value to be given to the correction bias generation means and controls the digital value stored in the storage means, and searches for a digital value that minimizes a detection voltage obtained from the local leak detection circuit 130.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to an RF transmitter using a Gilbert cell type double balanced mixer. [Background technology]

[0002] A frequency mixer is a circuit that multiplies two signals with different frequencies and outputs the result, and is often abbreviated as a mixer or mixer circuit. In a transmission / reception system, a frequency mixer is installed as a component circuit and plays a role in modulating (transmitting) a carrier wave (local signal) based on signal information, or demodulating (receiving) signal information from an external receiving signal.

[0003] One form of frequency mixer is a Gilbert cell type circuit 200 shown in Fig. 7. This Gilbert cell type circuit 200 has two first differential pairs 201 and 202 and one second differential pair 203. Here, the common node of the first differential pair 201 and the common node of the first differential pair 202 are connected to two differential output nodes of the second differential pair 203. This Gilbert cell type circuit 200 is often used when a double balanced mixer, which has excellent separation characteristics for two different frequency components, is implemented on an integrated circuit.

[0004] The Gilbert cell type circuit 200 shown in Fig. 7 is used as a demodulation circuit. An RF (radio frequency) signal frequency-mixed with a carrier wave is input from the outside to this Gilbert cell type circuit 200. In the Gilbert cell type circuit 200, this RF signal is multiplied by a local signal LO corresponding to the carrier wave, and an IF (intermediate frequency) signal is output. Only the differential signal frequency can be extracted from this IF signal. The Gilbert cell type circuit 200 is also used as a modulation circuit. In the case of a modulation circuit, an RF signal is generated by frequency-mixing the local signal LO, which is the carrier wave, with the IF signal.

[0005] 8 shows a Gilbert cell type double balanced mixer 250 that uses the Gilbert cell type circuit 200. In this Gilbert cell type double balanced mixer 250, mixers 221 and 222 are configured using the Gilbert cell type circuit 200.

[0006] This Gilbert cell type double balanced mixer 250 is a mixer that generates a 16QAM (quadrature amplitude modulation) transmission signal by frequency mixing a baseband signal BB and a local signal LO, and is used in, for example, a wireless LAN (WiFi) modulation device.

[0007] This Gilbert cell type double balanced mixer 250 has current output type differential pairs 211 and 212. Differential pair 211 differentially amplifies I channel differential format baseband signals BBIP and BBIN and outputs a pair of differential output currents. Differential pair 212 differentially amplifies Q channel differential format baseband signals BBQP and BBQN which are out of phase with the I channel by 90 degrees and outputs a pair of differential output currents.

[0008] The mixer 221 performs frequency mixing of a pair of differential output currents of the differential pair 211 and the I-channel local signals LOIP and LOIN to generate a pair of differential output signals. The mixer 222 performs frequency mixing of a pair of differential output currents of the differential pair 212 and the Q-channel local signals LOQP and LOQN to generate a pair of differential output signals. The adder 230 adds the pair of differential output signals obtained from the mixer 221 and the pair of differential output signals obtained from the mixer 222 to generate a 16QAM transmission signal. Note that such a frequency mixer using a Gilbert cell type circuit is disclosed in, for example, Patent Document 1. [Prior art documents] [Patent documents]

[0009] [Patent Document 1] JP 2014-7606 A Summary of the Invention [Problem to be solved by the invention]

[0010] In the above-mentioned Gilbert cell type double balanced mixer 250, if there is a mismatch in the threshold Vth or the like in the differential pair inside the mixer, an offset voltage occurs, causing an error in the multiplication of two signals. The same applies when the input signal to the mixer originally contains a DC offset. In that case, the component of the local signal LO that should be canceled leaks to the RF signal, causing signal interference power, and depending on its size, it may not be possible to meet the required specifications of the transmission and reception system.

[0011] Patent Document 1 describes that in a frequency mixer using a Gilbert cell circuit, an offset voltage is detected and an input signal is corrected based on the detected offset voltage, thereby correcting the offset voltage. However, correcting the offset voltage by correcting the input signal in this way is a very difficult process, and there is a problem that the offset voltage cannot be sufficiently removed.

[0012] The present invention has been made in consideration of the above-described circumstances, and has an object to provide a technical means for suppressing the occurrence of local leak in an RF transmitter using a Gilbert cell type double balanced mixer. [Means for solving the problem]

[0013] The present invention provides an RF transmitter having a Gilbert cell type double balanced mixer that frequency-mixes a baseband signal and a local signal, and transmitting an RF signal obtained by the Gilbert cell type double balanced mixer, the RF transmitter comprising: a local leak detection circuit that detects a local leak output from the Gilbert cell type double balanced mixer; The present invention provides an RF transmitter having a correction bias generating means for generating a correction bias for offset correction of a differential pair constituting the Gilbert cell type double balanced mixer based on a given digital value, and a storage means for storing a correction digital value to be given to the correction bias generating means, the storage means controlling the correction digital value stored in the storage means, the correction control means searching for the correction digital value which minimizes the detection voltage obtained from the local leak detection circuit.

[0014] According to this invention, the correction bias generating means generates a correction bias for offset correction of a differential pair constituting a Gilbert cell type double balanced mixer based on a given correction digital value, and the correction control means searches for a correction digital value that minimizes the detection voltage obtained from the local leak detection circuit. Therefore, according to this invention, it is possible to suppress the occurrence of local leak in an RF transmitter. [Brief description of the drawings]

[0015] [Figure 1] 1 is a circuit diagram showing a configuration of an RF transmitter according to an embodiment of the present invention. [Diagram 2] FIG. 2 is a circuit diagram showing the configuration of the RF transmitter. [Diagram 3] FIG. 2 is a diagram showing the relationship between the offset voltage of a differential pair constituting a mixer of the RF transmitter and the power level of local leakage. [Figure 4] 11 is a diagram showing the relationship between the offset voltage of a differential pair constituting the mixer and the output voltage of a local leak detection circuit. FIG. [Diagram 5] FIG. 2 is a circuit diagram showing the configuration of the mixer. [Figure 6] 4 is a time chart showing the operation of the RF transmitter. [Figure 7] FIG. 1 is a circuit diagram showing a configuration of a Gilbert cell type circuit. [Figure 8] FIG. 1 is a circuit diagram showing an example of the configuration of a mixer using a Gilbert cell type circuit. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0016] Hereinafter, an embodiment of the present invention will be described with reference to the drawings.

[0017] 1 and 2 are circuit diagrams showing a configuration of an RF transmitter 100 according to an embodiment of the present invention. The RF transmitter 100 includes an RF signal generating section 110, a power amplifier 122 and an analog switch 124 connected to an output terminal 121 of the RF signal generating section 110, a transmitting antenna 123 connected to the output terminal of the power amplifier 122, a local leak detection circuit 130 connected to the output terminal 121 of the RF signal generating section 110 via the analog switch 124, and a correction control section 140.

[0018] The RF transmitter 100 according to this embodiment can operate in a normal mode with the analog switch 124 turned OFF, and in a calibration mode with the analog switch 124 turned ON to perform offset correction of the differential pair in the RF signal generating unit 110. Fig. 1 shows the state of the RF transmitter 100 in the normal mode, and Fig. 2 shows the state of the RF transmitter 100 in the calibration mode.

[0019] 1 and 2, transmission DACs (Digital Analogue Converters) 111_I and 111_Q of an RF signal generating unit 110 convert I-channel and Q-channel digital signals for transmission into analog signals. LPFs (Low Pass Filters) 112_I and 112_Q pass components of the output signals of the DACs 111_I and 111_Q that are equal to or lower than the cutoff frequency, respectively. Mixers 113_I and 113_Q, a local oscillator 114, and an adder 115 constitute a Gilbert cell type double balanced mixer. The local oscillator 114 supplies local signals Lo, which are 90 deg out of phase with each other, to the mixers 113_I and 113_Q, respectively. The mixer 113_I frequency-mixes (multiplies) the output signal of the LPF 112_I and the local signal Lo (0 deg) and outputs the result. Mixer 113_Q frequency-mixes (multiplies) the output signal of LPF 112_Q and local signal Lo (90 deg) and outputs the result. Adder 115 adds the output signal of mixer 113_I and the output signal of mixer 113_Q and outputs the result. Driver amplifier 116 amplifies the output signal of adder 115 and outputs it to output terminal 121 as an RF signal.

[0020] The RF signal output to the output terminal 121 is amplified by a power amplifier 122 and radiated from an antenna 123. The output terminal 121 is also connected to a local leak detection circuit 130 via an analog switch 124. Here, the analog switch 124 is OFF when the calibration signal CAL is "0" and ON when the calibration signal CAL is "1".

[0021] In this embodiment, the RF signal generating unit 110 may output a local leak during a period in which the RF signal is not output. The power level of the local leak depends on the DC offset of the differential pair constituting the mixers 113_I and 113_Q of the RF signal generating unit 110 as shown in FIG.

[0022] The calibration mode in this embodiment is a mode in which the RF signal generating unit 110 is adjusted so as to minimize this local leak. The calibration signal CAL is normally "0", but is periodically switched to "1" by, for example, a higher-level device (not shown) to set the calibration mode.

[0023] The local leak detection circuit 130 is a circuit that converts the local leak output from the RF signal generation unit 110 into a DC voltage in the calibration mode. The mixers 131_I and 131_Q of the local leak detection circuit 130 frequency-mix local signals that are out of phase with each other by 90 degrees with respect to the output signal from the RF signal generation unit 110, and output the signals as I-channel and Q-channel detection signals, respectively. The LPF 132_I converts the I-channel detection signal output from the mixer 131_I into a DC voltage. The LPF 132_Q converts the Q-channel detection signal output from the mixer 131_Q into a DC voltage. The multiplexer 133 selects and outputs the I-channel DC voltage output from the LPF 132_I during the period when the switching signal CAL_IQ is "0", and selects and outputs the Q-channel DC voltage output from the LPF 132_Q during the period when the switching signal CAL_IQ is "1". The switching signal CAL_IQ switches between "0" and "1" at a predetermined cycle. That is, the multiplexer 133 time-multiplexes and outputs the DC voltage of the I channel and the DC voltage of the Q channel. As shown in FIG. 4, the output voltage of the local leak detection circuit 130 depends on the DC offset of the differential pair constituting the mixers 113_I and 113_Q of the RF signal generating unit 110.

[0024] In this embodiment, the mixers 113_I and 113_Q of the RF signal generating unit 110 have a correction bias generating means for generating a correction bias for offset correction of the differential pair. Fig. 5 is a circuit diagram showing the configuration of the mixer 113_I. Although not shown in the figure, the mixer 113_Q has the same configuration as the mixer 113_I.

[0025] As shown in FIG. 5, the mixer 113_I includes a differential pair 810 in which the sources of MOSFETs (Metal Oxide Semiconductor Field Effect Transistors; hereinafter, simply referred to as transistors) 811 and 812 are commonly connected (hereinafter, the common connection point of the sources is referred to as the common source), a differential pair 820 in which the sources of transistors 821 and 822 are commonly connected, and a differential pair 830 in which the sources of transistors 831 and 832 are commonly connected. Here, the common source of the differential pair 810 is grounded via a constant current source 813. Also, the common source of the differential pair 820 is connected to the drain of the transistor 811, and the common source of the differential pair 830 is connected to the drain of the transistor 812. Also, the drains of the transistors 821 and 832 are commonly connected. This common connection point is a node that outputs a positive-phase signal OUTP to the adder 115, and is connected to a power supply via a resistor 841. Also, the drains of the transistors 822 and 831 are commonly connected. This common connection point is a node that outputs the inverted phase signal OUTN to the adder 115 and is connected to the power supply via a resistor 842 .

[0026] A positive-phase baseband signal DAC(P) is provided to the gate of a transistor 811, and a negative-phase baseband signal DAC(N) is provided to the gate of a transistor 812. In the differential pair 810, differential amplification is performed between the positive-phase baseband signal DAC(P) and the negative-phase baseband signal DAC(N).

[0027] A positive-phase local signal LO(P) is provided to the gates of transistors 821 and 831, and a negative-phase local signal LO(N) is provided to the gates of transistors 822 and 832. In each of the differential pairs 820 and 830, differential amplification is performed between the positive-phase local signal LO(P) and the negative-phase local signal LO(N). As a result, in the mixer 113_I, frequency mixing (multiplication) of the baseband signal and the local signal is performed.

[0028] In this mixer 113_I, if there is a mismatch in threshold value Vth or the like in the differential pair 810, 820, or 830, an offset voltage occurs, causing an error in the multiplication of the two signals. The same applies when the input signal to the mixer originally contains a DC offset. Therefore, the mixer 113_I is provided with V-DACs 851 and 852, which are voltage output type DACs, and an I-DAC 853, which is a current output type DAC, as correction bias generating means.

[0029] The V-DAC 851 generates back-gate voltages BGP(P) and BGP(N) having a difference proportional to the correction digital value LOP[5:0] by D / A conversion of the 6-bit correction digital value LOP[5:0]. Then, the V-DAC 851 outputs the back-gate voltages BGP(P) and BGP(N) to the transistors 831 and 821.

[0030] Moreover, the V-DAC 852 generates back-gate voltages BGN(P) and BGN(N) having a difference proportional to the correction digital value LON[5:0] by D / A conversion of the 6-bit correction digital value LON[5:0]. Then, the V-DAC 852 outputs the back-gate voltages BGN(P) and BGN(N) to the transistors 832 and 822.

[0031] In addition, the I-DAC 853 generates currents Isink+ and Isink- having a difference proportional to the correction digital value DAC[5:0] by D / A converting the 6-bit correction digital value DAC[5:0]. Then, the currents Isink+ and Isink- are drawn from the drains of the transistors 811 and 812 of the differential pair 810.

[0032] 1 and 2, the correction control unit 140 is a means for controlling the correction digital values ​​to be provided to the mixers 113_I and 113_Q of the RF signal generating unit 110. In this correction control unit 140, the differential amplifier 141 differentially amplifies the output voltage of the local leak detection circuit 130 in synchronization with the master clock MCLK. The selection unit 142_LO supplies the output signal of the differential amplifier 141 to the digital value control unit 143_LO while the switching signal CAL_LO is "1". The selection unit 142_BB supplies the output signal of the differential amplifier 141 to the digital value control unit 143_BB while the switching signal CAL_BB is "1".

[0033] The digital value control unit 143_LO has a storage means for storing the correction digital values ​​LOP[5:0] and LON[5:0] for each of the I channel and the Q channel. The digital value control unit 143_LO executes a binary search for each of these correction digital values ​​in synchronization with the master clock MCLK to search for a digital value that minimizes a signal that passes through the selection unit 142_LO (i.e., the output voltage of the local leak detection circuit 130). The digital value control unit 143_BB also has a storage means for storing the correction digital value DAC[5:0] for each of the I channel and the Q channel. The digital value control unit 143_BB executes a binary search for each of these correction digital values ​​in synchronization with the master clock MCLK to search for a digital value that minimizes a signal that passes through the selection unit 142_BB (i.e., the output voltage of the local leak detection circuit 130).

[0034] 6 is a time chart showing the operation of the RF transmitter 100 according to this embodiment. In this embodiment, for example, a host device periodically turns on the analog switch 124 for a predetermined period of time, causing the RF transmitter 100 to operate in the calibration mode. When the calibration mode ends, the mode changes to the normal mode.

[0035] The mixers 113_I and 113_Q operate normally in both the calibration mode and the normal mode. The transmit DACs 111_I and 111_Q stop operating in the calibration mode and operate normally in the normal mode. The analog switch 124 is ON in the calibration mode and OFF in the normal mode. The local leak detection circuit 130 operates normally in the calibration mode and is in standby in the normal mode. The correction control unit 140 sequentially executes processes P1 to P6 in the calibration mode and maintains the correction digital values ​​obtained by the processes P1 to P6 in the normal mode.

[0036] The operation of the correction control unit 140 in the calibration mode is as follows. In process P1, the digital value control unit 143_LO performs a binary search of the I-channel correction digital value LOP[5:0] for minimizing the DC voltage (local leak) passing through the selection unit 142_LO. In process P2, the digital value control unit 143_LO performs a binary search of the I-channel correction digital value LON[5:0] for minimizing the DC voltage (local leak) passing through the selection unit 142_LO.

[0037] In addition, in process P3, the digital value control unit 143_LO performs a binary search of the Q channel correction digital value LOP[5:0] for minimizing the DC voltage (local leak) passing through the selection unit 142_LO. In process P4, the digital value control unit 143_LO performs a binary search of the Q channel correction digital value LON[5:0] for minimizing the DC voltage (local leak) passing through the selection unit 142_LO.

[0038] In addition, in process P5, the digital value control unit 143_BB performs a binary search of the I-channel correction digital value DAC[5:0] for minimizing the DC voltage (local leak) passing through the selection unit 142_BB. In process P6, the digital value control unit 143_BB performs a binary search of the Q-channel correction digital value DAC[5:0] for minimizing the DC voltage (local leak) passing through the selection unit 142_BB.

[0039] Through the above adjustments, the local leak of RF transmitter 100 is minimized, and the digital correction values ​​that minimize this local leak are stored in the storage means of digital value control units 143_LO and 143_BB. Therefore, in the normal mode, the digital correction values ​​stored in the storage means are provided to V-DACs 851, 852 and I-DAC 853, and RF transmitter 100 can be operated with the local leak minimized.

[0040] As described above, according to this embodiment, it is possible to suppress the occurrence of local leak in an RF transmitter using a Gilbert cell type double balanced mixer.

[0041] The adjustment of the differential pair can be performed at any time, and may be performed during initial operation, or during operation, or when there is a temperature change. [Explanation of symbols]

[0042] 100: RF transmitter; 110: RF signal generation unit; 111_I, 111_Q: transmission DAC; 112_I, 112_Q, 132_I, 132_Q: LPF; 112_I, 112_Q, 131_I, 131_Q: mixer; 114: local oscillator; 115: adder; 116: driver amplifier; 121: output terminal; 122: power amplifier; 123: antenna; 124: analog switch; 130: Local leakage detection circuit, 133...multiplexer, 140...correction control unit, 141...differential amplifier, 142_LO, 142_BB...selection unit, 143_LO, 143_BB...digital value control unit, 811, 812, 821, 822, 831, 832...transistors, 810, 820, 830...differential pair, 813...constant current source, 841, 842...resistors, 851, 852...V-DAC, 853...I-DAC.

Claims

1. An RF transmitter having a Gilbert cell type double balanced mixer that frequency-mixes a baseband signal and a local signal, and transmitting an RF signal obtained by the Gilbert cell type double balanced mixer, a local leak detection circuit for detecting a local leak output from the Gilbert cell type double balanced mixer; a correction bias generating means for generating a correction bias for offset correction of a differential pair constituting the Gilbert cell type double balanced mixer based on a given digital value; a correction control means for controlling the correction digital value stored in the storage means, the correction control means searching for the correction digital value that minimizes the detection voltage obtained from the local leak detection circuit; An RF transmitter having

2. 2. The RF transmitter according to claim 1, wherein the memory means stores a plurality of types of digital correction values ​​for offset correction of a plurality of differential pairs, and the correction control means sequentially selects one type of digital correction value from the plurality of digital correction values, and searches for a digital correction value that minimizes the detection voltage.

3. 2. The RF transmitter according to claim 1, wherein the correction bias generating means generates, as the correction bias, a back-gate voltage to be applied to transistors forming a differential pair.

4. 2. The RF transmitter according to claim 1, wherein the correction bias generating means generates, as the correction bias, a current to be flowed into transistors constituting a differential pair.

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