Coatings with diffusion barriers for corrosion and contamination protection - Patents.com

Abstract

An exemplary method of semiconductor processing is described. The method was developed to increase corrosion resistance for substrates, such as metal substrates. The method includes forming a first oxygen-containing material on the substrate. The first oxygen-containing material can be or include silicon oxide, yttrium oxide, or aluminum oxide. The method can include forming a barrier layer on the first oxygen-containing material. The method can include forming a second oxygen-containing material on the barrier layer. The second oxygen-containing material can be or include silicon oxide, yttrium oxide, or aluminum oxide.

Description

[Technical field]

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0001] This application claims the benefit of and priority to U.S. patent application Ser. No. 17 / 713,350, entitled "COATINGS WITH DIFFUSION BARRIERS FOR CORROSION AND CONTAMINATION PROTECTION," filed April 5, 2022, the entire contents of which are incorporated by reference into this specification.

[0002]

[0002] The present technology relates to processes and systems for coating components. More particularly, the present technology relates to systems and methods for coating substrates with multi-layer corrosion and contamination resistant coatings. [Background technology]

[0003] background

[0003] Semiconductor processing systems may include numerous components used to support substrates, deliver build and remove materials, and define processing regions and flow paths. These components may be exposed to high and low temperatures, high and low pressures, and a variety of corrosive and erosive substances. Thus, many processing chambers contain processed or coated materials. However, as processing systems and chambers become more complex, the components incorporated within the systems may be multi-piece devices that may include complex shapes and features throughout. These features may in turn be exposed to environmental conditions and materials that may damage the components.

[0004]

[0004] Thus, there is a need for improved systems and methods that can be used to manufacture high quality devices and structures. The present technique addresses these and other needs. Summary of the Invention

[0005]

[0005] Embodiments of the present technology include a semiconductor processing method that includes forming a first oxygen-containing material on a substrate. The first oxygen-containing material can be or include silicon oxide, yttrium oxide, or aluminum oxide. The method includes forming a barrier layer on the first oxygen-containing material. The method includes forming a second oxygen-containing material on the barrier layer. The second oxygen-containing material can be or include silicon oxide, yttrium oxide, or aluminum oxide.

[0006] In some embodiments, the first oxygen-containing material and the second oxygen-containing material may be or include the same material. The substrate may include a metal component of a semiconductor processing chamber. The barrier layer may be characterized by a thickness of about 25 nm or less. The thickness of the barrier layer may be about 20% or less of the total thickness of the first oxygen-containing material, the barrier layer, and the second oxygen-containing material. The barrier layer may be or include hafnium oxide, lanthanum oxide, aluminum oxide, tungsten, tungsten nitride, or titanium nitride. The barrier layer may be deposited by atomic layer deposition. The method may include exposing the substrate to a halogen-containing species subsequent to forming the second oxygen-containing material. The barrier layer may reduce the amount of corrosive components that interact with the substrate.

[0007]

[0007] Some embodiments of the present technique may include a semiconductor processing method. The method may include i) forming an oxygen-containing material on a metal substrate. The oxygen-containing material may be or include silicon oxide, yttrium oxide, or aluminum oxide. The method may include ii) forming a barrier material. The barrier material may be layered on the oxygen-containing material. The method may include iii) repeating operations i and ii to form an alternating stack of oxygen-containing material and barrier material on the metal substrate.

[0008] In some embodiments, the temperature is maintained at or below 450° C. during formation of the oxygen-containing material and the barrier material. The metal substrate may include stainless steel or aluminum semiconductor processing chamber components. The alternating stack may include more than three layers of barrier material. Each barrier material may be characterized by a thickness that is about 10% or less of the total thickness of the alternating stack of oxygen-containing and barrier materials. The method may include iv) exposing the substrate to a halogen-containing species. The halogen content may include fluorine. The oxygen-containing material may be or include yttrium oxide and the barrier material may be or include lanthanum oxide.

[0009] Some embodiments of the present technology include a semiconductor structure. The structure may include a substrate. The structure may include an oxygen-containing material on the substrate. The oxygen-containing material may be or include silicon oxide, yttrium oxide, or aluminum oxide. The structure may include one or more barrier layers interposed within the oxygen-containing material. Each of the one or more barrier layers may be characterized by a thickness of about 25 nm or less. The total thickness of the one or more barrier layers may be about 50% or less of the combined thickness of the oxygen-containing material and the one or more barrier layers.

[0010] In some embodiments, the combined thickness of the oxygen-containing material and the one or more barrier layers may be between about 100 nm and about 500 nm. The substrate may include a metal substrate. Each of the one or more barrier layers may be co-formed on the oxygen-containing material. The one or more barrier layers may be or include hafnium oxide, lanthanum oxide, aluminum oxide, tungsten, tungsten nitride, or titanium nitride.

[0011]

[0011] The present technology offers numerous advantages over conventional corrosion resistant coatings for metal components exposed to highly corrosive environments. Embodiments of the present technology form corrosion resistant coatings capable of resistant to highly corrosive halogen-containing atmospheres. In embodiments, the multi-layer corrosion resistant coating includes one or more barrier layers interposed within a main layer. A corrosion resistant main layer, such as silicon dioxide or yttrium oxide, can resist corrosion from aggressive halogen-containing species, for example, in semiconductor manufacturing equipment. Additional barrier layers, such as metal oxides, metals, metal nitrides, etc., further enhance the corrosion resistance of the corrosion resistant main layer to form a highly corrosion resistant multi-layer coating. The barrier layers may also reduce the outward migration of contaminants from the substrate on which the multi-layer coating is formed. These and other embodiments, along with their many advantages and features, are described in further detail in conjunction with the following description and accompanying figures.

[0012] A further understanding of the nature and advantages of the disclosed technology may be realized by reference to the remaining portions of the specification and the drawings. [Brief description of the drawings]

[0013] [Figure 1] 1 illustrates selected operations in a method of forming a component according to some embodiments of the present technique. [Diagram 2]

[0014] 1 shows a schematic cross-sectional view of a portion of a component coated with a multi-layer corrosion resistant coating according to an embodiment of the present invention. [Diagram 3]

[0015] 1 shows a schematic cross-sectional view of a portion of a component coated with a multi-layer corrosion resistant coating according to an additional embodiment of the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0014]

[0016] Some figures are included as schematic diagrams. It is understood that the figures are for illustrative purposes and should not be considered to be to scale unless specifically stated otherwise. Also, the figures are provided as schematic diagrams to aid understanding and may not include all aspects or information compared to realistic representations and may include exaggerated details for illustrative purposes.

[0015]

[0017] In the accompanying figures, similar components and / or functions may have the same reference label. Additionally, various components of the same type may be distinguished by following the reference label with a letter that distinguishes the similar components. If only the first reference label is used in the specification, the description applies to any of the similar components having the same first reference label, regardless of the letter.

[0016]

[0018] Semiconductor processing involves operations that produce intricate patterns of materials on substrates. The operations include remote and in-situ formation and removal processes that utilize corrosive materials including halogen-containing compounds, radicals, hot gases of ions, and ionized plasma. For example, etching operations often involve contacting a substrate with a halogen-containing liquid, gas, or plasma etchant that flows into the processing region of processing equipment. The halogen-containing etchants are intended to etch wafers and other device substrates, but react with the walls of the processing chamber and other equipment components, causing corrosion of the equipment. If the equipment components are made of metals such as stainless steel or aluminum, the halogen-containing materials can react quickly, causing wear on the equipment and becoming a source of contamination. Such contaminants can migrate from the components to the substrate, contaminating the substrate and affecting the performance of the final device. Additionally, over time, corrosion increases equipment repair and replacement costs and processing equipment downtime.

[0017]

[0019] Similarly, a deposition process may use a plasma-enhanced process or rapid thermal processing to form or deposit a material on a substrate, which in turn may deposit on a chamber component. After the substrate is removed from the chamber, a cleaning operation may be required. The cleaning process may include utilizing one or more halogen-containing precursors or a plasma effluent of these precursors to remove material deposited on surfaces within the processing chamber. While the cleaning may be directed at the deposited material, many of the surfaces of exposed chamber components may be attacked as well. For example, when the substrate is removed from the processing chamber, the central region of the substrate support is exposed without residual deposited material. The cleaning process may begin to cause pits or other removal in the substrate support, which may reduce its planarity and may also reduce the integrity of the chuck. Many of these chamber components include multiple pieces that are joined together to create channels, flow paths, or confined areas within the components. The individual pieces within the chamber or components of the combined apparatus may be characterized by any number of internal features, including channels, apertures, and various other topographies.

[0018]

[0020] Conventional techniques have struggled to limit both corrosion and erosion of chamber components and tend to replace components periodically due to damage caused by one or both of these mechanisms. Some processes may involve a seasoning process prior to processing of semiconductor substrates, which can introduce additional challenges. For example, the seasoning process may cover portions of the substrate support, but may not completely cover the backside or stem, so that components of the substrate support, such as the base plate and stem, may still be exposed to process and cleaning materials. Additionally, the seasoning process typically deposits a coating of 100 nanometers or less. This requires that the seasoning be replaced for every substrate processed, which can increase wait times and may reduce the likelihood of uniform or complete coverage. Conventional techniques have attempted to protect many of these components with coatings that may be less reactive to corrosive materials and / or more resistant to plasma bombardment.

[0019]

[0021] Embodiments of the present technology address these and other problems by coating chamber components with a multi-layer corrosion resistant coating to prevent the chamber components from contaminating structures being processed in the chamber. In embodiments, the multi-layer coating includes a barrier layer formed between main layers. In further embodiments, the multi-layer coating can include multiple barrier layers interposed within the main layers. When a component coated with the multi-layer coating of the present invention undergoes processing, such as in an environment using halogen-containing species, the main layer can reduce corrosion of the substrate. However, if corrosion of the substrate does occur, the barrier layer can prevent contaminants from escaping the multi-layer coating. If contaminants escape the multi-layer coating, they may interact with structures or devices being processed. The multi-layer coating of the present invention reduces corrosive species, such as halogen-containing species, from reaching the component while simultaneously reducing contaminants from the component reaching the interior of the chamber.

[0020]

[0022] The remaining disclosure identifies specific materials, components, and semiconductor processing methods according to embodiments of the present technology. It is readily understood that the described methods, materials, components, and systems are applicable to a variety of other methods, materials, components, and systems used in the manufacture of semiconductor devices, and other types of devices in which a corrosion resistant coating protects components within a manufacturing system or apparatus. Thus, the present technology is not limited to the coating methods, materials, components, and systems described. This disclosure describes non-limiting operations of exemplary coating methods, as well as general components that may be coated according to embodiments of the present technology.

[0021]

[0023] FIG. 1 illustrates selected operations in a method 100 of coating a semiconductor component substrate according to an embodiment of the present technique. Many operations of the method 100 can be performed in any number of chambers or systems, including, for example, an oxidation chamber and an atomic layer deposition chamber, and any combination of the systems described or configured to perform the operations described for the method 100. The method 100 can include one or more operations, including processing to manufacture or prepare one or more parts or pieces to be joined and components that are already joined, prior to the first described operation. For example, upstream processing can include casting or processing metal components and preparing one or more surfaces for a coating operation. The method 100 can further include optional operations that may or may not be specifically related to an embodiment of the method of the present invention. For example, some embodiments providing a broader or alternative scope of the coating method of the present invention can include one or more operations that do not occur or occur at different times in other embodiments of the present invention.

[0022]

[0024] The method 100 will also be described in conjunction with a cross-sectional view of a portion of a component 200 shown in FIG. 2. The component 200 includes an embodiment of a multi-layer corrosion resistant coating of the present invention disposed on a surface of a substrate 205 that forms at least a portion of the component. In the embodiment shown in FIG. 2, the multi-layer coating is a multi-layer coating including a main layer 210 and a barrier layer 215. It should be noted that additional layers may be formed below the substrate 205 and above the main layer 210. It should also be understood that the interface between the layers may or may not have a clear boundary. For example, a portion of the interface may include a combination of materials of two adjacent layers, such as the main layer 210 and the barrier layer 215. In an embodiment of the present technology, the coated child component includes one or more substrate surfaces on which the multi-layer coating is formed. The substrate surfaces include exposed surfaces of the substrate that form a bonding layer of the multi-layer coating. The substrate may include one or more metals incorporated into at least a portion of the component, such as the walls of the component. In an embodiment, the metal substrate may be or include any number of components or component sections. In additional embodiments, the metal substrate may be incorporated into components of semiconductor processing systems used to perform semiconductor manufacturing operations that use corrosive liquids, gases, and plasmas. In yet additional embodiments, the metal substrate may be incorporated into semiconductor manufacturing equipment components such as base plates or edge rings, fluid delivery components such as showerheads or lid plates, structural components such as spacers or liners, and other single or multiple components of semiconductor manufacturing equipment that can be coated according to the methods of the present invention. The components can be substantially planar or can include complex shapes that include channels, apertures, or other features across one or more surfaces of the components. The components can be made of a variety of materials, including aluminum, carbon, chromium, copper, iron, magnesium, manganese, nickel, silicon, titanium, or zinc. The components can be or include alloys, such as iron alloys, that can include any number of materials. In many embodiments, the metal substrate in the components includes stainless steel, such as 316 stainless steel.Although the following description refers to stainless steel from which components according to embodiments of the invention are fabricated, it should be understood that the techniques of the invention may be used with any ferrous alloy that may be used in a semiconductor processing chamber or system, as well as alloys of any number of other metals.

[0023]

[0025] In embodiments, the method 100 may include preparing a surface of the substrate 205 in optional operation 105. In further embodiments, the preparing may include one or more of removing an existing coating from the substrate surface, roughening the substrate surface, smoothing the substrate surface, exposing the substrate surface to an oxidizing environment, exposing the substrate surface to a passivating environment, and exposing the substrate surface to an etching environment, among other preparations. In some embodiments, the preparation of the substrate surface in optional operation 105 may be omitted because the substrate surface is already primed for forming a multi-layer coating.

[0024]

[0026] In additional embodiments, preparation of the substrate surface in optional operation 105 may include removal of oxides, organics, oils, dirt, particles, debris, and / or other contaminants from the surface of the substrate 205. In further embodiments, the preparation may include blasting or texturing the surface, exposing the surface to a vacuum, solvent cleaning the surface, acid cleaning the surface, wet cleaning the surface, plasma cleaning the surface, ultrasonicating the surface, and the like. The prepared surface of the substrate 205 may be characterized by faster formation of a multi-layer coating on the surface and stronger bonding compared to an unprepared substrate surface.

[0025]

[0027] In further embodiments, preparing the substrate surface may include blasting or exposing the surface to one or more abrasive particles, such as beads, sand, carbonates, solid carbon dioxide (CO2), or other types of particles. In embodiments, the particle exposure removes oxides and other contaminants from the substrate surface and may also provide texture to the surface of the substrate 205. In other embodiments, preparing the substrate surface may include placing the component 200 in a chamber in a pulse push-pull gas cycling system and exposing the substrate surface of the component to at least one cycle of a purge gas, such as nitrogen, argon, helium, and mixtures thereof. In further embodiments, the component 200 may be exposed to at least one vacuum purge to remove particles and other debris from the substrate surface. In yet other embodiments, the component 200 may be placed in a plasma chamber and the substrate surface may be exposed to one or more plasmas, such as a hydrogen-containing plasma, an oxygen or ozone-containing plasma, a nitrogen-containing plasma, or the like. In still other embodiments, the plasma may be generated in situ or may be generated remotely outside of the chamber holding the component 200 and delivered to the chamber.

[0026]

[0028] In more embodiments, the preparation of the substrate surface may include removing one or more organic and oxide compounds from the surface of the substrate 205. In additional embodiments, the organic and oxide compounds may be removed from the surface by a reducing plasma, such as a hydrogen plasma. In more embodiments, the reduced organic and oxide compounds may be degassed from the surface and exposed to ozone. In still other embodiments, the preparation of the substrate surface may include a wet clean to remove organic compounds from the surface. In embodiments, the wet clean may include immersing the substrate surface in an alkaline degreasing solution, rinsing, exposing the surface to an acid cleaning solution (such as sulfuric acid, phosphoric acid, hydrochloric acid, etc.), rinsing again, and exposing the surface to a deionized water ultrasonic bath. In still further embodiments, the preparation of the substrate surface may include a wet clean to remove oxide compounds from the surface. In embodiments, the wet clean may include exposing the substrate surface to a dilute acid solution (e.g., acetic acid or hydrochloric acid), rinsing, and exposing the surface to deionized water in an ultrasonic bath. In further embodiments, the preparation of the substrate surface may include a preparation operation to remove particles from the substrate surface. In embodiments, these particle removal preparations may include exposing the substrate surface to ultrasonic treatment (e.g., megasonic treatment) and / or supercritical carbon dioxide cleaning, followed by cycles of purge gas (e.g., N2, Ar, He, or any combination thereof) and vacuum purging to remove particles from the surface and dry it. In yet another embodiment, the substrate surface preparation may include exposing the surface to a heating and drying operation. In embodiments, the heating operation may include exposing the substrate surface to a temperature above room temperature. In additional embodiments, the elevated temperature may be characterized by a temperature of about 50° C. or more, about 75° C. or more, about 100° C. or more, about 125° C. or more, about 150° C. or more, about 175° C. or more, about 200° C. or more, or more. In more embodiments, the heating operation may include exposing the substrate surface to a heat lamp or placing the component in an oven.

[0027]

[0029] The method 100 may further include forming a main layer 210, such as a first portion or a first oxygen-containing material of the main layer 210, on the substrate 205 in operation 110. In an embodiment, the oxygen-containing material of the main layer 210 may include a silicon oxide, such as silicon dioxide. In further embodiments, the silicon oxide (e.g., SiO2) in the main layer may be 50% or more, 60% or more, 70% or more, 80% or more, 90% or more, 95% or more, or more by weight of the total weight of the main layer 210. In still other embodiments, the main layer 210 may be deposited by a vapor deposition process, such as atomic layer deposition (ALD), plasma-enhanced atomic layer deposition (PE-ALD), thermal chemical vapor deposition (CVD), plasma-enhanced chemical vapor deposition (PE-CVD), among other vapor deposition processes. In further embodiments, the deposition process may include an ALD process that provides a semiconductor or metal-containing reactant and an oxidation reactant to a deposition processing region to form a silicon oxide-containing layer on at least a portion of the substrate 205. The semiconductor or metal-containing reactant and the oxidation reactant deposit the primary layer 210 on the substrate 205. In additional embodiments, the semiconductor or metal-containing reactant may include a silicon-containing reactant such as a silane, a silicon chloride, a silicon cyanate, an oxysilane, or an aminosilane, among other silicon-containing reactants. In yet additional embodiments, the silane may include one or more of a silane, a disilane, a trisilane, a tetrasilane, a pentasilane, and a hexasilane, among other silanes. In yet another embodiment, the silicon chloride may include one or more of a monochlorosilane, a dichlorosilane, a trichlorosilane, a tetrachlorosilane, and a hexachlorosilane, among other silicon chlorides. In more embodiments, the silicon cyanate may include a tetraisocyanatosilane, among other silicon cyanates. In yet other embodiments, the oxysilane can include tetraethoxysilane, among other oxysilanes. In additional embodiments, the aminosilane can include tris(dimethylamino)silane, bis(ethylmethylamino)silane, among other aminosilanes.In additional embodiments, the oxidation reactant may include one or more of water (e.g., steam), oxygen (O2), atomic oxygen (O), ozone (O3), nitrous oxide, one or more peroxides, one or more alcohols, plasmas thereof, or any combination thereof. In further embodiments, one or both of the silicon-containing reactant and the oxidation reactant may include one or more carrier gases, such as nitrogen (N2), argon, helium, neon, hydrogen (H2), etc.

[0028]

[0030] In other embodiments, the atomic layer deposition of the main layer 210 can include one or more cycles of exposing the substrate 205 to a semiconductor or metal-containing reactant, performing a purge pump operation of the deposition processing region to remove residual metal-containing reactant, exposing the component to an oxidizing reactant, and performing another purge pump operation to remove residual oxidizing reactant from the deposition processing region. In still other embodiments, the ALD operation can include 1 or more, 2 or more, 3 or more, 4 or more, 5 or more, 8 or more, 10 or more, 15 or more, 20 or more, 30 or more, 50 or more, 80 or more, 100 or more, 150 or more, 200 or more, 250 or more, 300 or more, 350 or more, 400 or more, 450 or more, about 500 or more cycles, or more. In still other embodiments, each cycle may deposit a portion of the main layer 210 that may be characterized by a thickness of about 25 nm or less, about 20 nm or less, about 17.5 nm or less, about 15 nm or less, about 12.5 nm or less, about 10 nm or less, about 7.5 nm or less, about 5 nm or less, or less.

[0029]

[0031] In additional embodiments, the oxygen-containing material of the primary layer 210 may include yttrium oxide, such as yttrium trioxide. In further embodiments, the yttrium oxide (e.g., YO) in the primary layer 210 may be 50% or more, 60% or more, 70% or more, 80% or more, 90% or more, 95% or more, or more by weight of the total weight of the primary layer 210. Similar to the silicon oxide materials described above, the yttrium oxide may be deposited by a vapor deposition process, such as ALD, PE-ALD, CVD, PE-CVD, among other vapor deposition processes. In further embodiments, the deposition process may include an ALD process, in which a semiconductor or metal-containing reactant and an oxidizing reactant are delivered to a deposition processing region to form an yttrium oxide-containing layer on at least a portion of the substrate 205. The semiconductor or metal-containing reactant and the oxidizing reactant deposit the primary layer 210 on the substrate 205. In additional embodiments, the semiconductor or metal-containing reactant may include an yttrium-containing reactant, such as tris(N,N-bis(trimethylsilyl)amido)yttrium(III), yttrium(III) butoxide, yttrium(III) chloride, tris(methylcyclopentadienyl)yttrium, tris(butylcyclopentadienyl)yttrium, tris(cyclopentadienyl)yttrium, among other yttrium-containing reactants.

[0030]

[0032] In yet another embodiment, the oxygen-containing material of the primary layer 210 may include aluminum oxide. In further embodiments, the aluminum oxide (e.g., Al2O3) in the primary layer 210 may be about 50% by weight or more, about 60% by weight or more, about 70% by weight or more, about 80% by weight or more, about 90% by weight or more, about 95% by weight or more, or more, of the total weight of the barrier layer 215. In yet another embodiment, the aluminum oxide-containing primary layer 210 may be deposited by a vapor deposition process such as ALD, PE-ALD, CVD, and PE-CVD, among other vapor deposition processes. In further embodiments, the deposition process may include an ALD process that provides a semiconductor or metal-containing reactant and an oxidation reactant to a deposition processing region to form an aluminum oxide-containing layer on at least a portion of the substrate 205. The semiconductor or metal-containing reactant and the oxidation reactant deposit the primary layer 210 on the substrate 205. In additional embodiments, the semiconductor or metal-containing reactant may include an aluminum-containing reactant, such as one or more of aluminum alkyl compounds, one or more of aluminum alkoxy compounds, and one or more of aluminum acetylacetonate compounds, among other aluminum-containing reactants. In still other embodiments, the aluminum-containing reactant may be trimethylaluminum, triethylaluminum, tripropylaluminum, tributylaluminum, trimethoxyaluminum, triethoxyaluminum, tripropoxyaluminum, tributoxyaluminum, aluminum acetylacetonate (Al(acac)3, also known as tris(2,4-pentanediono)aluminum), aluminum hexafluoroacetylacetonate (Al(hfac)3), and trisdipivaloylmethanatoaluminum (DPM3Al; (C 11 H 19 Contains O2)3Al).

[0031]

[0033] The method 100 may further include forming a barrier layer 215 in operation 115. The barrier layer 215 may be conformally formed on the primary layer 210. In an embodiment, the barrier layer 215 may include hafnium oxide. In a further embodiment, the hafnium oxide (e.g., HfO2) in the primary layer 215 may be about 50% by weight or more, about 60% by weight or more, about 70% by weight or more, about 80% by weight or more, about 90% by weight or more, about 95% by weight or more, or more, of the total weight of the barrier layer 215. In yet another embodiment, the hafnium oxide-containing barrier layer 215 may be deposited by a vapor deposition process such as ALD, PE-ALD, CVD, and PE-CVD, among other vapor deposition processes. In a further embodiment, the deposition process may include an ALD process that provides a hafnium-containing reactant and an oxidizing reactant to a deposition processing area exposed to at least a portion of the primary layer 210 formed on the component 200. In additional embodiments, the hafnium-containing reactant may include hafnium cyclopentadiene compounds, hafnium amino compounds, hafnium alkyl compounds, and hafnium alkoxy compounds, as well as other hafnium-containing reactants. In more embodiments, the hafnium-containing reactant may include bis(methylcyclopentadiene)dimethylhafnium ((MeCp)2HfMe2), bis(methylcyclopentadiene)methylmethoxyhafnium ((MeCp)2Hf(OMe)(Me)), bis(cyclopentadiene)dimethylhafnium ((Cp)2HfMe2), tetra(tert-butoxy)hafnium, hafnium isopropoxide ((iPrO)4Hf), tetrakis(dimethylamino)hafnium (TDMAH), tetrakis(diethylamino)hafnium (TDEAH), and tetrakis(ethylmethylamino)hafnium (TEMAH), among other hafnium-containing reactants.

[0032]

[0034] In further embodiments, the barrier layer 215 may include lanthanum oxide. In further embodiments, the lanthanum oxide (e.g., La2O3) in the barrier 215 may be about 50% by weight or more, about 60% by weight or more, about 70% by weight or more, about 80% by weight or more, about 90% by weight or more, about 95% by weight or more, or more, of the total weight of the barrier layer 215. In yet another embodiment, the lanthanum oxide-containing barrier layer 215 may be deposited by a vapor deposition process such as ALD, PE-ALD, CVD, and PE-CVD, among other vapor deposition processes. In further embodiments, the deposition process may include an ALD process that provides a lanthanum-containing reactant and an oxidizing reactant to a deposition processing area exposed to at least a portion of the primary layer 210 formed on the component 200. In additional embodiments, the lanthanum-containing reactant may include a lanthanum cyclopentadiene compound, a lanthanum amino compound, a lanthanum alkyl compound, and a lanthanum alkoxy compound, among other lanthanum-containing reactants. In more embodiments, the lanthanum-containing reactant may include lanthanum(III) chloride, tris(i-propylcyclopentadienyl)lanthanum, tris(cyclopentadienyl)lanthanum, lanthanum(III) i-propoxide, lanthanum(III) acetylacetonate hydrate, tris(N,N-di-i-propylpentylamidinato)lanthanum(III), tris(N,N-bis(trimethylsilyl)amide)lanthanum(III), tris(N,N'-di-i-propylformamidinato)lanthanum(III), tris(6,6,7,7,8,8,8-heptafluoro-2,2-dimethyl-3,5-octanedionate)lanthanum(III), tris(2,2,6,6-tetramethyl-3,5-heptanedionate)lanthanum(III), among other lanthanum-containing reactants.

[0033]

[0035] In yet additional embodiments, the barrier layer 215 may include an oxide of one or more additional metals, such as aluminum, chromium, magnesium, nickel, titanium, zirconium, and the like.

[0034]

[0036] In more embodiments, the barrier layer 215 may include tungsten. The tungsten in the barrier layer 215 may be about 50% by weight or more, about 60% by weight or more, about 70% by weight or more, about 80% by weight or more, about 90% by weight or more, about 95% by weight or more, or more, of the total weight of the barrier layer 215. In yet another embodiment, the tungsten-containing barrier layer 215 may be deposited by a vapor deposition process such as ALD, PE-ALD, CVD, and PE-CVD, among other vapor deposition processes. In further embodiments, the deposition process may include an ALD process that provides a tungsten-containing reactant and a hydrogen-containing co-reactant to a deposition processing area exposed to at least a portion of the main layer 210 formed on the component 200. The hydrogen-containing co-reactant may only play a sacrificial role of releasing material from the tungsten without being incorporated into the film. In additional embodiments, the tungsten-containing reactant may include one or more of tungsten disulfide, tungsten hexafluoride, tungsten pentafluoride, among other tungsten-containing reactants. In additional embodiments, the hydrogen-containing co-reactant may include one or more of silane, disilane, trisilane, or other hydrogen-containing reactants.

[0035]

[0037] In yet additional embodiments, the barrier layer 215 may include one or more additional metals, such as aluminum, chromium, magnesium, nickel, titanium, zirconium, and the like.

[0036]

[0038] In yet another embodiment, the barrier layer 215 can include tungsten nitride. The tungsten nitride (e.g., W2N, WN, WN2) in the barrier layer 215 can be about 50% by weight or more, about 60% by weight or more, about 70% by weight or more, about 80% by weight or more, about 90% by weight or more, about 95% by weight or more, or more, of the total weight of the barrier layer 215. In yet another embodiment, the tungsten nitride-containing barrier layer 215 can be deposited by a vapor deposition process such as ALD, PE-ALD, CVD, and PE-CVD, among other vapor deposition processes. In a further embodiment, the deposition process can include an ALD process that provides a tungsten-containing reactant and a nitrogen-containing reactant to a deposition processing area exposed to at least a portion of the main layer 210 formed on the component 200. In an additional embodiment, the tungsten-containing reactant can include one or more of tungsten disulfide, tungsten hexafluoride, tungsten pentafluoride, among other tungsten-containing reactants. In additional embodiments, the nitrogen-containing reactant may include one or more of diatomic nitrogen, a combination of diatomic nitrogen and diatomic hydrogen, ammonia, a plasma thereof, or other nitrogen-containing reactants.

[0037]

[0039] In yet another embodiment, the barrier layer 215 can include titanium nitride. The titanium nitride (e.g., TiN) in the barrier layer 215 can be about 50% by weight or more, about 60% by weight or more, about 70% by weight or more, about 80% by weight or more, about 90% by weight or more, about 95% by weight or more, or more, of the total weight of the barrier layer 215. In yet another embodiment, the titanium nitride-containing barrier layer 215 can be deposited by a vapor deposition process such as ALD, PE-ALD, CVD, and PE-CVD, among other vapor deposition processes. In a further embodiment, the deposition process can include an ALD process that provides a titanium-containing reactant and a nitrogen-containing reactant to a deposition processing area exposed to at least a portion of the main layer 210 formed on the component 200. In additional embodiments, the titanium-containing reactant may include one or more of titanium tetrachloride (TiCl4), tetrakis(dimethylamino)titanium(IV), tetrakis(diethylamino)titanium(IV), tetrakis(ethylmethylamino)titanium(IV), titanium(IV) i-propoxide, bis(t-butylcyclopentadienyl)titanium dichloride, bis(cyclopentadienyl)titanium dichloride, among other titanium-containing reactants. In additional embodiments, the nitrogen-containing reactant may include one or more of diatomic nitrogen, a combination of diatomic nitrogen and diatomic hydrogen, ammonia, plasmas thereof, or other nitrogen-containing reactants.

[0038]

[0040] In yet additional embodiments, the barrier layer 215 may include nitrides of one or more additional metals, such as aluminum, chromium, magnesium, nickel, titanium, zirconium, and the like.

[0039]

[0041] The temperature during formation of the main layer 210 and / or the barrier layer 215 may be maintained at or below 450° C. Because the layers may be deposited by ALD, higher temperatures may affect the deposition by decomposing precursors used to form the layers before they are deposited on the surface of the substrate 205 and / or the main layer 210. Thus, the temperature may be maintained at or below about 400° C., about 350° C., about 300° C., about 250° C., about 200° C., about 150° C., about 100° C., or lower.

[0040]

[0042] The method 100 may further include repeatedly forming portions of the main layer 210 and the barrier layer 215 in optional operation 120. As shown in the embodiment of FIG. 2, the component 200 includes three barrier layers 215 disposed between four portions of the main layer 210. While the main layer 210 is shown in contact with the substrate 205, it is contemplated that the barrier layer 215 may also be in contact with the substrate 205. Similarly, while the main layer 210 is shown as the top layer on the component 200, it is contemplated that the barrier layer 215 may also be the top layer. In an embodiment, the component may include any number of alternating layers of the main layer 210 and the barrier layer 215. For example, component 200 may include more than 3 layers of barrier material, more than 4 layers of barrier material, more than 5 layers of barrier material, more than 10 layers of barrier material, more than 15 layers of barrier material, more than 20 layers of barrier material, more than 25 layers of barrier material, more than 30 layers of barrier material, more than 35 layers of barrier material, or more layers of barrier material.

[0041]

[0043] The method 100 may further include forming an additional primary layer 210, such as a second portion of the primary layer 210 or a second oxygen-containing material, on the barrier layer 215 in operation 125. In an embodiment, the second portion of the primary layer 210 formed in operation 125 may be the same material as that formed in operation 110. For example, if silicon oxide is formed in operation 110, additional silicon oxide may be formed on the barrier layer 215 in operation 125. However, it is contemplated that the primary layer 210 may include a different material on the opposite side of the barrier layer 215.

[0042]

[0044] In embodiments, the corrosion resistance of the coated component 200 can be increased by increasing the thickness of the main layer 210 and / or the barrier layer 215. The more material that the corrosive substance must penetrate or remove before reaching the surface of the substrate 205, the longer the coated component can withstand the corrosive effects of the corrosive substance. In further embodiments, the multi-layer coating including the main layer 210 and the barrier layer 215 can be characterized by a thickness of 50 nm or more, 75 nm or more, 100 nm or more, 125 nm or more, 150 nm or more, 175 nm or more, 200 nm or more, 225 nm or more, 250 nm or more, 275 nm or more, 300 nm or more, 350 nm or more, 400 nm or more, 450 nm or more, 500 nm or more, or more. Because many embodiments include ALD depositions that may require significant processing times, the multi-layer coating may be characterized by a thickness of about 750 nm or less, about 700 nm or less, about 650 nm or less, about 600 nm or less, about 550 nm or less, about 500 nm or less, about 450 nm or less, about 400 nm or less, about 350 nm or less, about 300 nm or less, about 250 nm or less, about 200 nm or less, about 150 nm or less, about 100 nm or less, or less. In embodiments, the combined thickness of the main layer 210, such as an oxygen-containing material, and the one or more barrier layers 215 may be between about 100 nm and about 500 nm.

[0043]

[0045] In additional embodiments, the barrier layer 215 may be characterized by a thickness of about 25 nm or less, about 20 nm or less, about 17.5 nm or less, about 15 nm or less, about 12.5 nm or less, about 10 nm or less, about 7.5 nm or less, about 5 nm or less, or less. In further embodiments, the thickness of the barrier layer 215 may be related to the thickness of any portion of the main layer 210 (e.g., oxygen-containing material) and the multi-layer coating that may include the barrier layer 215. For example, the thickness of the barrier layer 215 may be about 20% or less, e.g., about 17.5% or less, about 15% or less, about 12.5% ​​or less, about 10% or less, about 7.5% or less, about 5% or less, or less, of the combined thickness of the multi-layer coating. In embodiments having multiple barrier layers 215, the total thickness of the one or more barrier layers 215 may be about 50% or less, e.g., about 45% or less, about 40% or less, about 35% or less, about 30% or less, about 25% or less, about 20% or less, about 15% or less, about 10% or less, about 5% or less, or less, of the combined thickness of the multi-layer coating.

[0044]

[0046] The method 100 may include, in optional operation 130, exposing the component 200 having the multi-layer coating to one or more corrosive substances. The one or more corrosive substances may include halogen-containing substances, such as fluorine, chlorine, bromine, etc. In embodiments, the halogen-containing species may be included in halogen-containing compounds, radicals, or ions, incorporated into halogen-containing liquids, solutions, precursors, gases, or plasmas, or other halogen-containing media. For example, the chlorine-containing corrosive substances may include one or more of hydrogen chloride or hydrochloric acid (HCl), molecular chlorine (Cl2), chlorine radicals (Cl), oxygen- and chlorine-containing compounds, nitrogen- and chlorine-containing compounds, carbon- and chlorine-containing compounds, and other chlorine-containing substances. For example, the fluorine-containing corrosive substances may include one or more of nitrogen fluoride (NF3), sulfur hexafluoride (SF6), carbon tetrafluoride (CF4), hexafluoroethane, and other carbon- and fluorine-containing compounds, among other fluorine-containing substances.

[0045]

[0047] The primary layer 210 and / or the barrier layer 215 may be characterized by an increased corrosion resistance to one or more corrosive substances compared to the substrate 205 of the component 200. In embodiments, the halogen etch rate ratio of the substrate surface to the primary layer 210 and / or the barrier layer 215 may be characterized as 10:1 or more, 50:1 or more, 100:1 or more, 200:1 or more, 300:1 or more, 400:1 or more, 500:1 or more, 600:1 or more, 700:1 or more, 800:1 or more, 900:1 or more, 1000:1 or more, or more. In additional embodiments, the primary layer 210 and / or the barrier layer 215 may reduce the corrosion rate of the coated component by a chlorine-containing corrosive substance compared to the corrosion rate of the substrate 205 of the uncoated component. In still additional embodiments, the barrier layer 215 can reduce the corrosion rate of the coated component to about 90% or less, about 80% or less, about 70% or less, about 60% or less, about 50% or less, about 40% or less, about 30% or less, about 20% or less, about 10% or less, about 5% or less, about 1% or less, or less than the corrosion rate of the uncoated component.

[0046]

[0048] In an embodiment, the barrier layer 215 can reduce the ability of contaminants from the substrate 205 to pass through the multi-layer coating of the component 200. If halogen-containing species reach the substrate 205 and cause corrosion, the barrier layer 215 can reduce or prevent the formed contaminants from passing through the multi-layer coating. If contaminants are able to pass through the multi-layer coating, these contaminants can interact with structures, such as wafers, being processed near the component 200. Such contamination of nearby structures can degrade the performance of the processed structure and / or the final device.

[0047]

[0049] FIG. 3 shows a cross-sectional view of a portion of a component 300 coated with a multi-layer corrosion resistant coating according to an additional embodiment of the present invention. The substrate 305 of the component 300 includes a process that exhibits conformality of the main layer 310 and the barrier layer 315 to steps, grooves, apertures, channels, fluid paths, tubes, and openings, among other features of the substrate of the component. In an embodiment, the present technique includes the formation of a conformal coating that can extend across all features and aspects of the component. In an embodiment, the conformality of the coating may be characterized by low variation in thickness of the multi-layer coating on orthogonal faces of the steps of the substrate 305. In an embodiment, the variation in thickness of the multi-layer coating between orthogonal faces may be characterized as about 10% or less, about 7.5% or less, about 5% or less, about 2.5% or less, about 1% or less, or less.

[0048]

[0050] In additional embodiments, component 300 can include one or more apertures (not shown) characterized by an aspect ratio (i.e., height to width ratio) of 1:1 or greater, 2:1 or greater, 3:1 or greater, 4:1 or greater, 5:1 or greater, 6:1 or greater, 7:1 or greater, 8:1 or greater, 10:1 or greater, or greater. In yet additional embodiments, the multi-layer coating can be characterized by a high degree of uniformity of the inner walls of the apertures compared to other portions of the coating. In embodiments, the uniformity of the multi-layer coating between the inner walls of the apertures and other portions of the coating can be characterized as having thicknesses within 90% of each other, within 92% of each other, within 94% of each other, within 96% of each other, within 98% of each other, within 99% of each other, or essentially equivalent thicknesses of each other within the error range of the measurement device or technique being used.

[0049]

[0051] The present technology includes components, such as metal-containing chamber components, coated with a multi-layer coating that provides the components with increased corrosion resistance. In embodiments, the multi-layer coating includes one or more barrier layers that reduce the likelihood of contamination of structures or devices processed in the chamber. The main layer of the multi-layer coating reduces the corrosive effect of corrosive species, such as halogen-containing species, on the coated components. The barrier layer reduces the likelihood of contaminants from the components reaching the chamber in the event of corrosion. In the absence of a barrier layer that prevents contaminants from migrating out of the multi-layer coating from the coated components, these contaminants can contaminate structures or devices being processed and adversely affect operations in the chamber. In embodiments, components coated with the multi-layer coating of the present invention have an extended operational life compared to uncoated components, and also prevent contaminants from the components from passing through the multi-layer coating.

[0050]

[0052] In the foregoing description, for purposes of explanation, numerous details are set forth in order to facilitate an understanding of various embodiments of the present technology. However, it will be apparent to one skilled in the art that certain embodiments may be practiced without some of these details or with additional details.

[0051]

[0053] Although several embodiments have been disclosed, those skilled in the art will recognize that various modifications, alternative configurations, and equivalents can be used without departing from the spirit of the embodiments. Moreover, in order to avoid unnecessarily obscuring the technology of the present invention, a number of well-known processes and elements have not been described. Thus, the above description should not be construed as limiting the scope of the technology.

[0052]

[0054] Where a range of values ​​is presented, unless the context clearly dictates otherwise, each intervening value between the upper and lower limits of that range is also understood to be specifically disclosed to the smallest fraction of the unit of the lower limit. Narrower ranges between a specified value or unspecified intervening value in a specified range and any other specified or intervening value in that specified range are also covered. The upper and lower limits of these smaller ranges may be independently included or excluded in the range, and each range in which neither limit is included, either limit, or both limits are not included in the smaller range is also included in the technology, subject to the limits expressly excluded in the specified range. When one or both limits are included in the stated range, ranges excluding either or both of the included limits are also included.

[0053]

[0055] As used in this specification and the appended claims, the singular forms "a," "an," and "the" include the plural forms unless the context clearly dictates otherwise. Thus, for example, reference to a "layer" includes a plurality of such layers, reference to a "precursor" includes a reference to one or more precursors and equivalents thereof known to those skilled in the art, and so forth.

[0054]

[0056] Additionally, the words "comprise(s)", "comprising", "contain(s)", "containing", "include(s)", and "including" as used in this specification and the following claims are intended to specify the presence of stated features, integers, components, or operations, but do not exclude the presence or addition of one or more other features, integers, components, operations, acts, or groups.

Claims

1. forming a first oxygen-containing material on a substrate, the first oxygen-containing material comprising silicon oxide, yttrium oxide, or aluminum oxide; forming a barrier layer on the first oxygen-containing material; forming a second oxygen-containing material over the barrier layer, the second oxygen-containing material comprising silicon oxide, yttrium oxide, or aluminum oxide; A semiconductor processing method comprising:

2. 2. The semiconductor processing method of claim 1, wherein the first oxygen-containing material and the second oxygen-containing material comprise the same material.

3. The semiconductor processing method of claim 1 , wherein the substrate comprises a metal component of a semiconductor processing chamber.

4. The semiconductor processing method of claim 1 , wherein the barrier layer is characterized by a thickness of about 25 nm or less.

5. 2. The semiconductor processing method of claim 1, wherein the thickness of said barrier layer is about 20% or less of the combined thickness of said first oxygen-containing material, said barrier layer, and said second oxygen-containing material.

6. 10. The semiconductor processing method of claim 1, wherein the barrier layer comprises hafnium oxide, lanthanum oxide, aluminum oxide, tungsten, tungsten nitride, or titanium nitride.

7. The semiconductor processing method of claim 1 , wherein the barrier layer is deposited by atomic layer deposition.

8. 10. The semiconductor processing method of claim 1, further comprising exposing the substrate to a halogen-containing species subsequent to forming the second oxygen-containing material, wherein the barrier layer reduces an amount of corrosive components that interact with the substrate.

9. i) forming an oxygen-containing material comprising silicon oxide, yttrium oxide, or aluminum oxide on a metal substrate; ii) forming a barrier material, the barrier material overlying the oxygen-containing material; and iii) repeating operations i and ii to form an alternating stack of oxygen-containing material and barrier material on said metal substrate; A semiconductor processing method comprising:

10. 10. The semiconductor processing method of claim 9, wherein a temperature is maintained at or below about 450°C during forming the oxygen-containing material and the barrier material.

11. 10. The semiconductor processing method of claim 9, wherein the metal substrate comprises a stainless steel or aluminum semiconductor processing chamber component.

12. The semiconductor processing method of claim 9 , wherein the alternating stack comprises more than three layers of barrier material.

13. 10. The semiconductor processing method of claim 9, wherein each barrier material is characterized by a thickness that is no greater than about 10% of a total thickness of said alternating stack of oxygen-containing materials and barrier materials.

14. 10. The semiconductor processing method of claim 9, further comprising: iv) exposing said substrate to a halogen-containing species.

15. the halogen-containing species comprises fluorine; the oxygen-containing material comprises yttrium oxide; and The barrier material comprises lanthanum oxide.

15. The semiconductor processing method of claim 14.

16. A substrate; an oxygen-containing material on the substrate, the oxygen-containing material comprising silicon oxide, yttrium oxide, or aluminum oxide; one or more barrier layers interposed within the oxygen-containing material, each of the one or more barrier layers being characterized by a thickness of about 25 nm or less, and a total thickness of the one or more barrier layers being about 50% or less of a combined thickness of the oxygen-containing material and the one or more barrier layers; 1. A semiconductor structure comprising:

17. 17. The semiconductor structure of claim 16, wherein the oxygen-containing material and the one or more barrier layers have a combined thickness between about 100 nm and about 500 nm.

18. 20. The semiconductor structure of claim 16, wherein the substrate comprises a metal substrate.

19. 17. The semiconductor structure of claim 16, wherein each of the one or more barrier layers is conformally formed over the oxygen-containing material.

20. 17. The semiconductor structure of claim 16, wherein the one or more barrier layers comprise hafnium oxide, lanthanum oxide, aluminum oxide, tungsten, tungsten nitride, or titanium nitride.

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