Multilayer ceramic capacitor

Abstract

Each of a plurality of first internal electrode layers (120) is composed of a plurality of first internal electrode parts (121, 122) separated from each other within the same layer. Each of a plurality of second internal electrode layers (130) is integrally formed within the same layer. Each of the plurality of first internal electrode parts (121, 122) is electrically connected to a corresponding plurality of first via conductors (140) among a plurality of first via conductors (140). Each of a plurality of first external electrodes (20) is electrically connected to the plurality of first via conductors (140) that are electrically connected to the corresponding first internal electrode parts (121, 122) among the plurality of first internal electrode parts (121, 122). At least one second external electrode (30) is electrically connected to a corresponding plurality of second via conductors (150) among a plurality of second via conductors (150).

Description

Multilayer ceramic capacitors

[0001] The present invention relates to a multilayer ceramic capacitor.

[0002] Japanese Patent Laid-Open Publication No. 2009-295687 (Patent Document 1) is a prior art document disclosing the configuration of an electronic component for incorporation into a wiring board. The electronic component for incorporation into a wiring board described in Patent Document 1 includes a ceramic sintered body and external electrodes. The ceramic sintered body has a main surface and a back surface. The external electrodes are disposed on at least one of the main surface and the back surface of the ceramic sintered body, and are formed by forming a copper plating layer on the surface of a metallized metal layer. The ceramic sintered body has a plurality of internal electrodes stacked with ceramic dielectric layers interposed therebetween, and a plurality of intra-capacitor via conductors connected to the plurality of internal electrodes are provided. An external electrode is connected to ends of at least one of the main surface side and the back surface side of the plurality of intra-capacitor via conductors. The plurality of intra-capacitor via conductors are generally arranged in an array.

[0003] JP 2009-295687 A

[0004] There is a demand for a multilayer ceramic capacitor with high capacitance density in which a plurality of capacitor function sections that can be connected to power supplies with different potentials are densely arranged in parallel.

[0005] The present invention has been made in view of the above-mentioned problems, and has an object to provide a multilayer ceramic capacitor having a high capacitance density in which a plurality of capacitor function sections connectable to power supplies with different potentials are arranged in parallel at high density.

[0006] A multilayer ceramic capacitor according to the present invention comprises a capacitor body, a plurality of first via conductors, a plurality of second via conductors, a plurality of first external electrodes, and at least one second external electrode. The capacitor body includes a plurality of first internal electrode layers and a plurality of second internal electrode layers alternately stacked in a stacking direction with a dielectric layer sandwiched therebetween, and has a first main surface and a second main surface located on the opposite side of the stacking direction from the first main surface. The plurality of first via conductors are provided inside the capacitor body and electrically connected to the plurality of first internal electrode layers. The plurality of second via conductors are provided inside the capacitor body and electrically connected to the plurality of second internal electrode layers. The plurality of first external electrodes and at least one second external electrode are provided at intervals from each other on the first main surface. Each of the plurality of first internal electrode layers is composed of a plurality of first internal electrode portions spaced apart from each other within the same layer. Each of the plurality of second internal electrode layers is integrally formed within the same layer. Each of the plurality of first internal electrode portions is electrically connected to a corresponding one of the plurality of first via conductors. Each of the plurality of first external electrodes is electrically connected to a plurality of first via conductors that are electrically connected to a corresponding one of the plurality of first internal electrode portions, and at least one second external electrode is electrically connected to a corresponding one of the plurality of second via conductors.

[0007] According to the present invention, it is possible to realize a multilayer ceramic capacitor having a high capacitance density in which a plurality of capacitor function sections connectable to power supplies with different potentials are arranged in parallel at high density.

[0008] 1 is a perspective view of a multilayer ceramic capacitor according to a first preferred embodiment of the present invention, as seen from the first main surface side. It is a plan view of the multilayer ceramic capacitor of FIG. 1, as seen from the direction of the arrows III-III. It is a plan view of a capacitor body. It is a cross-sectional view of the multilayer ceramic capacitor of FIG. 3, as seen from the direction of the arrows V-V. It is a cross-sectional view of the multilayer ceramic capacitor of FIG. 3, as seen from the direction of the arrows VI-VI. It is a plan view of a multilayer ceramic capacitor according to a first modified example of the first preferred embodiment of the present invention. It is a side view of the multilayer ceramic capacitor of FIG. 7, as seen from the direction of the arrow VIII. It is a side view of the multilayer ceramic capacitor of FIG. 7, as seen from the direction of the arrow IX. It is a perspective view of a multilayer ceramic capacitor according to a second modified example of the first preferred embodiment of the present invention, as seen from the second main surface side. It is a cross-sectional view of the multilayer ceramic capacitor of FIG. 10, as seen from the direction of the arrows XI-XI. It is a perspective view of a multilayer ceramic capacitor according to a third modified example of the first preferred embodiment of the present invention, as seen from the second main surface side. It is a cross-sectional view of the multilayer ceramic capacitor of FIG. 12, as seen from the direction of the arrows XIII-XIII. It is a cross-sectional view of the multilayer ceramic capacitor of FIG. 12, as seen from the direction of the arrows XIV-XIV. 16 is a perspective view of the multilayer ceramic capacitor according to embodiment 2 of the present invention, as seen from the first main surface side. FIG. 17 is an exploded perspective view showing the configuration of the multilayer ceramic capacitor according to embodiment 2 of the present invention. FIG. 18 is a perspective view of the multilayer ceramic capacitor of FIG. 16, as seen from direction XVII. FIG. 19 is a cross-sectional view of the multilayer ceramic capacitor of FIG. 17, as seen from the direction of the arrows along line XVIII-XVIII. FIG. 19 is a cross-sectional view of the multilayer ceramic capacitor of FIG. 17, as seen from the direction of the arrows along line XIX-XIX. FIG. 20 is a cross-sectional view of the multilayer ceramic capacitor of FIG. 17, as seen from the direction of the arrows along line XX-XX.

[0009] Hereinafter, multilayer ceramic capacitors according to embodiments of the present invention will be described with reference to the drawings. In the following description of the embodiments, the same or corresponding parts in the drawings will be denoted by the same reference numerals, and description thereof will not be repeated.

[0010] (Embodiment 1) Fig. 1 is a perspective view of a multilayer ceramic capacitor according to embodiment 1 of the present invention, viewed from the first main surface side. Fig. 2 is a plan view of the multilayer ceramic capacitor of Fig. 1, viewed from direction II. Fig. 3 is a cross-sectional view of the multilayer ceramic capacitor of Fig. 2, viewed from the direction of the arrows III-III. Fig. 4 is a plan view of a capacitor body. Fig. 5 is a cross-sectional view of the multilayer ceramic capacitor of Fig. 3, viewed from the direction of the arrows V-V. Fig. 6 is a cross-sectional view of the multilayer ceramic capacitor of Fig. 3, viewed from the direction of the arrows VI-VI.

[0011] As shown in Figures 1 to 6, the multilayer ceramic capacitor 1 according to embodiment 1 of the present invention comprises a capacitor body 100, a plurality of first via conductors 140, a plurality of second via conductors 150, a plurality of first external electrodes 20, and at least one second external electrode 30.

[0012] As shown in Figure 3, the capacitor body 100 includes a plurality of first internal electrode layers 120 and a plurality of second internal electrode layers 130 stacked alternately in the stacking direction, with dielectric layers 110 sandwiched between them, and has a first main surface 101 and a second main surface 102 located on the opposite side of the first main surface 101 in the stacking direction.

[0013] The dielectric layer 110 may be made of any material, such as a ceramic material containing BaTiO, CaTiO, SrTiO, SrZrO, or CaZrO as a main component. A minor component selected from the group consisting of a Mn compound, an Fe compound, a Cr compound, a Co compound, and a Ni compound may be added to the main component in a smaller amount than the main component.

[0014] The capacitor body 100 may have any shape. In this embodiment, the capacitor body 100 has a rectangular parallelepiped shape as a whole. A rectangular parallelepiped shape as a whole refers to a shape that is not a perfect rectangular parallelepiped shape, such as a shape in which the corners and ridges of the rectangular parallelepiped are rounded, but has six surfaces and can be regarded as a rectangular parallelepiped as a whole. Therefore, the capacitor body 100 has a first main surface 101, a second main surface 102, a first side surface 103, a second side surface 104, a third side surface 105, and a fourth side surface 106.

[0015] The first side surface 103 to the fourth side surface 106 of the capacitor body 100 constitute four side surfaces of the surface of the capacitor body 100 other than the first main surface 101 and the second main surface 102. That is, the capacitor body 100 further has the first side surface 103 to the fourth side surface 106, which are four side surfaces connecting the first main surface 101 and the second main surface 102. The first side surface 103 faces the second side surface 104, and the third side surface 105 faces the fourth side surface 106. In this embodiment, the first side surface 103 to the fourth side surface 106 of the capacitor body 100 are orthogonal to the first main surface 101 and the second main surface 102, respectively, but they do not have to be orthogonal to each other.

[0016] The dimensions of the capacitor body 100 are arbitrary, but for example, when viewed from the first main surface 101 side, the vertical dimension of the rectangle can be 0.3 mm to 3.0 mm, the horizontal dimension can be 0.3 mm to 3.0 mm, and the dimension in the stacking direction of the dielectric layers 110, the first internal electrode layers 120, and the second internal electrode layers 130 can be 50 μm to 200 μm. The dimension of the capacitor body 100 in the stacking direction refers to the thickness of the capacitor body 100.

[0017] As shown in FIGS. 3 and 5 , each of the multiple first internal electrode layers 120 is composed of multiple first internal electrode portions that are spaced apart from one another within the same layer. In this embodiment, each of the multiple first internal electrode layers 120 is composed of first internal electrode portions 121 and first internal electrode portions 122 that are spaced apart from one another within the same layer. The first internal electrode portions 121 and 122 have line-symmetric shapes. However, the shapes of the first internal electrode portions 121 and 122 are not limited to line-symmetric shapes and may be asymmetric shapes. Furthermore, the number of first internal electrode portions arranged within the same layer is not limited to two and may be three or more. Each of the multiple first internal electrode layers 120 has multiple first through holes 120h formed therein for inserting multiple second via conductors 150 (described later) therethrough.

[0018] 3 and 6, each of the plurality of second internal electrode layers 130 is integrally formed within the same layer. The second internal electrode layer 130 has substantially the same rectangular outer shape as the first internal electrode layer 120. A plurality of second through holes 130h are formed in each of the plurality of second internal electrode layers 130 to allow a plurality of first via conductors 140, which will be described later, to pass therethrough.

[0019] The material of the first internal electrode layer 120 and the second internal electrode layer 130 is arbitrary, and for example, contains a metal such as Ni, Cu, Ag, Pd, Pt, Fe, Ti, Cr, Sn, or Au, or an alloy containing these metals, as a main component. The first internal electrode layer 120 and the second internal electrode layer 130 may contain, as a common material, the same ceramic material as the dielectric ceramic contained in the dielectric layer 110. In that case, the ratio of the common material contained in the first internal electrode layer 120 and the second internal electrode layer 130 is, for example, 20 vol % or less.

[0020] The thickness of each of the first internal electrode layers 120 and the second internal electrode layers 130 is arbitrary, but can be, for example, about 0.3 μm or more and 1.0 μm or less. The number of layers of the first internal electrode layers 120 and the second internal electrode layers 130 is arbitrary, but can be, for example, about 10 layers or more and 150 layers or less in total.

[0021] In the multilayer ceramic capacitor 1, capacitance is formed by the first internal electrode layer 120 and the second internal electrode layer 130 facing each other via the dielectric layer 110. A plurality of first internal electrode portions are arranged at intervals from each other while facing the same second internal electrode layer 130, thereby realizing a multilayer ceramic capacitor with high capacitance density in which a plurality of capacitor function portions are arranged side by side at high density.

[0022] 3 to 6, the plurality of first via conductors 140 are provided inside the capacitor body 100 and are electrically connected to the plurality of first internal electrode layers 120. The plurality of first via conductors 140 are inserted through second through holes 130h formed in each of the plurality of second internal electrode layers 130, and are insulated from the plurality of second internal electrode layers 130. In this embodiment, the plurality of first via conductors 140 are arranged in a plurality of rows.

[0023] 3 and 5 , each of the plurality of first internal electrode portions is electrically connected to a corresponding one of the plurality of first via conductors 140. In this embodiment, the first internal electrode portion 121 is electrically connected to three corresponding first via conductors 140 arranged in a row. The first internal electrode portion 122 is electrically connected to the other three corresponding first via conductors 140 arranged in a row.

[0024] Each of the plurality of first via conductors 140 is provided inside the capacitor body 100 in a manner extending in the stacking direction from the first main surface 101 to the second main surface 102 of the capacitor body 100. That is, each of the plurality of first via conductors 140 is exposed on the first main surface 101 of the capacitor body 100, but is not exposed on the second main surface 102. This makes it possible to prevent a short circuit from occurring between the multilayer ceramic capacitor 1 and an electronic component arranged on the second main surface 102 side.

[0025] As shown in Figures 3 to 6, the multiple second via conductors 150 are provided inside the capacitor body 100 and are electrically connected to the multiple second internal electrode layers 130. The multiple second via conductors 150 pass through first through holes 120h formed in each of the multiple first internal electrode layers 120 and are insulated from the multiple first internal electrode layers 120. In this embodiment, the multiple second via conductors 150 are arranged in rows between the rows of the multiple first via conductors 140. The first via conductors 140 and the second via conductors 150 are arranged in a matrix. The second internal electrode layer 130 is electrically connected to three second via conductors 150 arranged in a row.

[0026] Each of the plurality of second via conductors 150 is provided inside the capacitor body 100 in a manner extending in the stacking direction from the first main surface 101 to the second main surface 102 of the capacitor body 100. In other words, each of the plurality of second via conductors 150 is exposed to the first main surface 101 of the capacitor body 100, but is not exposed to the second main surface 102.

[0027] By arranging the multiple first via conductors 140 and the multiple second via conductors 150 in alternating rows as described above, the magnetic fields induced by the currents flowing through the first via conductors 140 and the second via conductors 150 cancel each other out, thereby reducing the equivalent series inductance (ESL) of the multilayer ceramic capacitor 1.

[0028] The first via conductor 140 and the second via conductor 150 may have any shape, for example, a cylindrical shape. In this case, the diameter of the first via conductor 140 and the second via conductor 150 is, for example, about 30 μm or more and 150 μm or less. The distance between adjacent first via conductors 140 and second via conductors 150, more specifically, the distance between the centers of the first via conductors 140 and second via conductors 150, is, for example, about 50 μm or more and 500 μm or less.

[0029] The material of the first via conductor 140 and the second via conductor 150 is arbitrary, and for example, metals such as Ni, Cu, Ag, Pd, Pt, Fe, Ti, Cr, Sn, or Au, or alloys containing these metals, can be used.

[0030] 1 to 3 , the plurality of first external electrodes 20 and at least one second external electrode 30 are provided at intervals from one another on the first main surface 101. In this embodiment, the first external electrode 20 is composed of a first external electrode 21 and a first external electrode 22. However, the number of first external electrodes 20 is not limited to two and may be three or more. In this embodiment, the number of second external electrodes 30 is one, but may be two or more.

[0031] Each of the plurality of first external electrodes 20 extends in a rectangular shape. However, the shape of each of the plurality of first external electrodes 20 is not limited to a rectangular shape, and may be a trapezoid, an L-shape, a U-shape, an X-shape, a T-shape, or the like.

[0032] Each of the multiple first external electrodes 20 is electrically connected to multiple first via conductors 140 that are electrically connected to a corresponding first internal electrode portion among the multiple first internal electrode portions. In this embodiment, the first external electrode 21 is electrically connected to three first via conductors 140 that are electrically connected to the corresponding first internal electrode portion 121. The first external electrode 22 is electrically connected to three first via conductors 140 that are electrically connected to the corresponding first internal electrode portion 122. However, the connection relationship between the first external electrodes 20 and the first via conductors 140 is not limited to the above, and it is sufficient that multiple first via conductors 140 that are electrically connected to the corresponding first internal electrode portion are connected to each first external electrode 20.

[0033] At least one second external electrode 30 extends in a rectangular shape. However, the shape of the second external electrode 30 is not limited to a rectangular shape, and may be a trapezoid, an L-shape, a U-shape, an X-shape, a T-shape, or the like.

[0034] At least one second external electrode 30 is electrically connected to a corresponding plurality of second via conductors 150 among the plurality of second via conductors 150. In the present embodiment, one second external electrode 30 is electrically connected to all three second via conductors 150. However, the connection relationship between the second external electrodes 30 and the second via conductors 150 is not limited to the above, and it is sufficient that a corresponding plurality of second via conductors 150 are connected to each second external electrode 30.

[0035] The first external electrode 20 and the second external electrode 30 may be made of any material. In this embodiment, the first external electrode 20 and the second external electrode 30 are plated electrodes formed by a plating process using a rotary plating method. Examples of materials that can be used to form the plated electrodes include Cu, Ni, and Sn. The plated electrodes may be formed of a single layer or multiple layers.

[0036] In the multilayer ceramic capacitor 1 according to the first embodiment of the present invention, each of the plurality of first internal electrode layers 120 is composed of a first internal electrode portion 121 and a first internal electrode portion 122 that are spaced apart from each other within the same layer. Each of the plurality of second internal electrode layers 130 is integrally formed within the same layer. Each of the first internal electrode portion 121 and the first internal electrode portion 122 is electrically connected to a corresponding one of the plurality of first via conductors 140. Each of the first external electrodes 21 and the first external electrodes 22 is electrically connected to a corresponding one of the plurality of first internal electrode portions 140 that are electrically connected to a corresponding one of the first internal electrode portion 121 and the first internal electrode portion 122. At least one second external electrode 30 is electrically connected to a corresponding one of the plurality of second via conductors 150.

[0037] As a result, by grounding the second external electrode 30 and connecting each of the first external electrode 21 and the first external electrode 22 to power sources of different potentials, it is possible to densely arrange a capacitor functional section consisting of a first internal electrode section 121 and a second internal electrode layer 130 facing each other across the dielectric layer 110, and another capacitor functional section consisting of a first internal electrode section 122 and a second internal electrode layer 130 facing each other across the dielectric layer 110, and it is possible to realize a multilayer ceramic capacitor 1 with a high capacitance density.

[0038] Furthermore, since each first external electrode 20 is electrically connected to a plurality of first via conductors 140 and each second external electrode 30 is electrically connected to a plurality of second via conductors 150, it is possible to easily connect each of the first external electrodes 20 and second external electrodes 30 to a connection terminal of an IC or the like and to connect them over the shortest distance, compared to a case where each of the first via conductors 140 and second via conductors 150 is connected to a connection terminal of an IC or the like on a one-to-one basis. The present invention is particularly effective when the pitch between connection terminals of ICs or the like is short.

[0039] In the multilayer ceramic capacitor 1 according to the first embodiment of the present invention, the plurality of first via conductors 140 are arranged in a plurality of rows. The plurality of second via conductors 150 are arranged in rows between the rows of the plurality of first via conductors 140. This allows the ESL of the multilayer ceramic capacitor 1 to be reduced.

[0040] In the multilayer ceramic capacitor 1 according to the first embodiment of the present invention, the second external electrodes 30 are disposed between the first external electrodes 20, and therefore the first external electrodes 20 and the second external electrodes 30 can be easily visually distinguished from each other regardless of the orientation of the multilayer ceramic capacitor 1. Here, the orientation of the multilayer ceramic capacitor 1 refers to, for example, the vertical orientation in the state shown in Fig. 2 and the horizontal orientation in the state where the multilayer ceramic capacitor 1 in Fig. 2 is rotated 90°.

[0041] Modified examples of the multilayer ceramic capacitor according to the first embodiment of the present invention will be described below. In the following description of the modified examples, the same components as those in the multilayer ceramic capacitor according to the first embodiment of the present invention will be denoted by the same reference numerals, and the description thereof will not be repeated.

[0042] Fig. 7 is a plan view of a multilayer ceramic capacitor according to a first modified example of the first preferred embodiment of the present invention. Fig. 8 is a side view of the multilayer ceramic capacitor of Fig. 7 as viewed from the direction of arrow VIII. Fig. 9 is a side view of the multilayer ceramic capacitor of Fig. 7 as viewed from the direction of arrow IX.

[0043] 7 to 9, the multilayer ceramic capacitor 1A according to the first modified example of the first preferred embodiment of the present invention includes a plurality of first external electrodes 20A and at least one second external electrode 30A. The first external electrode 20A is composed of a first external electrode 21A and a first external electrode 22A. Each of the plurality of first external electrodes 20A extends from the first main surface 101 onto at least one of the four side surfaces. At least one second external electrode 30A extends from the first main surface 101 onto at least one of the four side surfaces.

[0044] In this modified example, the first external electrode 21A is formed from above the first main surface 101 to the first side surface 103, the third side surface 105, and the fourth side surface 106. The first external electrode 21A covers the ridge portion between the first main surface 101 and the first side surface 103. The first external electrode 22A is formed from above the first main surface 101 to the second side surface 104, the third side surface 105, and the fourth side surface 106. The first external electrode 22A covers the ridge portion between the first main surface 101 and the second side surface 104. The second external electrode 30A is formed from above the first main surface 101 to the third side surface 105 and the fourth side surface 106.

[0045] In this modification, the corners or ridges of the capacitor body 100 can be covered with the first external electrode 20A and the second external electrode 30A, thereby preventing cracks or chips from occurring in the corners or ridges of the capacitor body 100. Furthermore, by contacting probes with each of the first external electrode 20A and the second external electrode 30A formed on the side surfaces of the capacitor body 100, it becomes possible to measure the electrical characteristics of the multilayer ceramic capacitor 1A.

[0046] In this modification, the first external electrode 20A and the second external electrode 30A may be formed by, for example, sputtering, vapor deposition, or a method of baking metal powder or metal powder paste.

[0047] Fig. 10 is a perspective view of a multilayer ceramic capacitor according to a second modification of Preferred Embodiment 1 of the present invention, viewed from the second main surface side, and Fig. 11 is a cross-sectional view of the multilayer ceramic capacitor of Fig. 10, viewed from the direction of the arrows along line XI-XI.

[0048] 10 and 11 , a multilayer ceramic capacitor 1B according to a second modification of the first preferred embodiment of the present invention includes a plurality of first via conductors 140B and a plurality of second via conductors 150B provided inside a capacitor body 100B. The first via conductors 140B and the second via conductors 150B are arranged in a matrix.

[0049] Each of the multiple first via conductors 140B is exposed on the first main surface 101 and also on the second main surface 102 of the capacitor body 100B. Specifically, each of the multiple first via conductors 140B is arranged to penetrate the capacitor body 100B in the stacking direction. One end of each of the multiple first via conductors 140B in the stacking direction is connected to the first external electrode 20, and the other end protrudes from the second main surface 102. Note that the other end of each of the multiple first via conductors 140B does not necessarily have to protrude from the second main surface 102, and may be located flush with the second main surface 102.

[0050] Each of the plurality of second via conductors 150B is exposed on the first main surface 101 and also on the second main surface 102 of the capacitor body 100B. Specifically, each of the plurality of second via conductors 150B is provided so as to penetrate the capacitor body 100B in the stacking direction. One end of each of the plurality of second via conductors 150B in the stacking direction is connected to the second external electrode 30, and the other end protrudes from the second main surface 102. Note that the other end of each of the plurality of second via conductors 150B does not necessarily have to protrude from the second main surface 102, and may be located flush with the second main surface 102.

[0051] As described above, in this modification, each of the plurality of first via conductors 140B and the plurality of second via conductors 150B is exposed on the second main surface 102. This allows an electronic component connected to the first main surface 101 side and an electronic component connected to the second main surface 102 side to be electrically connected via the multilayer ceramic capacitor 1B.

[0052] Fig. 12 is a perspective view of a multilayer ceramic capacitor according to a third modified example of Preferred Embodiment 1 of the present invention, viewed from the second main surface side. Fig. 13 is a cross-sectional view of the multilayer ceramic capacitor of Fig. 12, viewed from the direction of the arrows along line XIII-XIII. Fig. 14 is a cross-sectional view of the multilayer ceramic capacitor of Fig. 12, viewed from the direction of the arrows along line XIV-XIV.

[0053] 12 to 14 , a multilayer ceramic capacitor 1C according to a third modification of the first preferred embodiment of the present invention includes a plurality of first via conductors 140C and a plurality of second via conductors 150C provided inside a capacitor body 100C. The first via conductors 140C and the second via conductors 150C are arranged at different positions in the column direction. In this modification, as in the second modification, each of the plurality of first via conductors 140C and the plurality of second via conductors 150C is exposed on the second main surface 102 side. This allows an electronic component connected to the first main surface 101 side and an electronic component connected to the second main surface 102 side to be electrically connected via the multilayer ceramic capacitor 1C.

[0054] (Embodiment 2) A multilayer ceramic capacitor according to embodiment 2 of the present invention will be described below with reference to the drawings. The multilayer ceramic capacitor according to embodiment 2 of the present invention differs from the multilayer ceramic capacitor according to embodiment 1 of the present invention mainly in the arrangement of the first external electrodes, second external electrodes, first via conductors, and second via conductors, and in the inclusion of an insulating layer. Therefore, the same components as those in the multilayer ceramic capacitor according to embodiment 1 of the present invention will be assigned the same reference numerals and will not be described repeatedly.

[0055] Fig. 15 is a perspective view of the multilayer ceramic capacitor according to Preferred Embodiment 2 of the present invention, as seen from the first main surface side. Fig. 16 is an exploded perspective view showing the configuration of the multilayer ceramic capacitor according to Preferred Embodiment 2 of the present invention. Fig. 17 is a perspective view of the multilayer ceramic capacitor of Fig. 16, as seen from direction XVII. Fig. 18 is a cross-sectional view of the multilayer ceramic capacitor of Fig. 17, as seen from the direction of the arrows along line XVIII-XVIII. Fig. 19 is a cross-sectional view of the multilayer ceramic capacitor of Fig. 17, as seen from the direction of the arrows along line XIX-XIX. Fig. 20 is a cross-sectional view of the multilayer ceramic capacitor of Fig. 17, as seen from the direction of the arrows along line XX-XX.

[0056] As shown in Figures 15 to 20, the multilayer ceramic capacitor 2 according to embodiment 2 of the present invention comprises a capacitor body 200, a plurality of first via conductors 240, a plurality of second via conductors 250, a plurality of first external electrodes 20 and a plurality of second external electrodes 30, and an insulating layer 40.

[0057] 16 to 20 , the multilayer ceramic capacitor 2 according to the second embodiment of the present invention includes a plurality of first via conductors 240 and a plurality of second via conductors 250 provided inside a capacitor body 200. The plurality of first via conductors 240 and the plurality of second via conductors 250 are arranged alternately in both the row and column directions.

[0058] Each of the plurality of first via conductors 240 is exposed on the first main surface 101 of the capacitor body 200 and also on the second main surface 102. Specifically, each of the plurality of first via conductors 240 is provided so as to penetrate the capacitor body 200 in the stacking direction. One end of each of the plurality of first via conductors 240 in the stacking direction is located flush with the first main surface 101, and the other end protrudes from the second main surface 102. Note that the other end of each of the plurality of first via conductors 240 does not necessarily have to protrude from the second main surface 102, and may be located flush with the second main surface 102.

[0059] Each of the plurality of second via conductors 250 is exposed on the first main surface 101 and also on the second main surface 102 of the capacitor body 200. Specifically, each of the plurality of second via conductors 250 is provided so as to penetrate the capacitor body 200 in the stacking direction. One end of each of the plurality of second via conductors 250 in the stacking direction is located flush with the first main surface 101, and the other end protrudes from the second main surface 102. Note that the other end of each of the plurality of second via conductors 250 does not necessarily have to protrude from the second main surface 102, and may be located flush with the second main surface 102.

[0060] The insulating layer 40 is provided on the first main surface 101. The insulating layer 40 entirely covers the first main surface 101. The insulating layer 40 has a plurality of first openings 41 h and a plurality of second openings 42 h formed in the first main surface 101.

[0061] The insulating layer 40 can be made of ceramic. When the insulating layer 40 is made of ceramic, at least one material selected from the group consisting of Al2O3, PZT, SiC, SiO2, and MgO is used as the material for the insulating layer 40. When the insulating layer 40 is made of ceramic, the mechanical strength of the multilayer ceramic capacitor 2 against stress can be improved. Furthermore, when the insulating layer 40 is made of ceramic, it is preferable that the grain size of the ceramic contained in the dielectric layer 110 is smaller than that of the ceramic contained in the insulating layer 40.

[0062] When the insulating layer 40 is made of ceramic, the insulating layer 40 may be formed by a thermal spraying method such as an aerosol deposition method (AD method) or a cold spray method, or by CVD (chemical vapor deposition).

[0063] Furthermore, when insulating layer 40 is formed of a resin, the material constituting insulating layer 40 may include at least one selected from the group consisting of epoxy resin, silicone resin, fluororesin, phenolic resin, urea resin, melamine resin, unsaturated polyester resin, barium titanate, alumina, silica, yttria, and zirconia. In this case, the material constituting insulating layer 40 is preferably a thermosetting epoxy resin using a metal oxide used as a solder resist, silicone resin, fluororesin, phenolic resin, melamine resin, barium titanate, alumina, silica, or the like.

[0064] When insulating layer 40 is made of resin, it can be formed by using a spraying device, a dipping device, or the like. Alternatively, insulating layer 40 may be formed by attaching it to first main surface 101 of capacitor body 200, or insulating layer 40 may be formed by screen printing.

[0065] Depending on the physical properties of the insulating material, the insulating layer 40 is thermally cured or dried, whereby the insulating layer 40 is fixed to the first main surface 101 of the multilayer ceramic capacitor 2 .

[0066] As shown in FIGS. 15 and 16 , the multiple first external electrodes 20 and the multiple second external electrodes 30 are provided on the insulating layer 40 at intervals. In this embodiment, the first external electrode 20 is composed of a first external electrode 21 and a first external electrode 22. However, the number of first external electrodes 20 is not limited to two and may be three or more. The first external electrodes 21 and the first external electrodes 22 have a rectangular shape and are respectively located above corners located on diagonals of the rectangular first main surface 101. In this embodiment, the second external electrode 30 is composed of a second external electrode 31 and a second external electrode 32. However, the number of second external electrodes 30 is not limited to two and may be one or more. The second external electrode 31 and the second external electrode 32 have a rectangular shape and are respectively located above corners located on other diagonals of the rectangular first main surface 101.

[0067] In this embodiment, each of the first external electrodes 21 and 22 is provided to cover two corresponding first via conductors 240 out of the plurality of first via conductors 240 and two corresponding second via conductors 250 out of the plurality of second via conductors 250. However, the number of corresponding first via conductors 240 covered by each of the first external electrodes 21 and 22 is not limited to two and may be three or more. The number of second via conductors 250 covered by each of the first external electrodes 21 and 22 is not limited to two and may be one or more.

[0068] In this embodiment, each of the second external electrodes 31 and 32 is provided to cover two of the plurality of first via conductors 240 and two corresponding second via conductors 250 of the plurality of second via conductors 250. However, the number of first via conductors 240 covered by each of the second external electrodes 31 and 32 is not limited to two, as long as it is one or more. The number of corresponding second via conductors 250 covered by each of the second external electrodes 31 and 32 is not limited to two, but may be three or more.

[0069] Each of the first external electrodes 21 and 22 is electrically connected to two corresponding first via conductors 240 through two corresponding first openings 41 h among the plurality of openings. Specifically, a portion of each of the first external electrodes 21 and 22 is provided within the first opening 41 h and connected to one end of the first via conductor 240 in the stacking direction.

[0070] 19 and 20 , the first external electrode 21 is electrically connected to two first via conductors 240 that are electrically connected to the corresponding first internal electrode portion 121. Similarly, the first external electrode 22 is electrically connected to two first via conductors 240 that are electrically connected to the corresponding first internal electrode portion 122. However, the connection relationship between the first external electrode 20 and the first via conductors 240 is not limited to the above, and it is sufficient that a plurality of first via conductors 240 that are electrically connected to the corresponding first internal electrode portion are connected to each first external electrode 20.

[0071] 15 , 16 , 19 , and 20 , each of the second external electrodes 31 and 32 is electrically connected to two corresponding second via conductors 250 through two corresponding second openings 42 h among the plurality of openings. Specifically, a portion of each of the second external electrodes 31 and 32 is provided within the second opening 42 h and connected to one end of the second via conductor 250 in the stacking direction. However, the connection relationship between the second external electrodes 30 and the second via conductors 250 is not limited to the above, and it is sufficient that a corresponding plurality of second via conductors 250 are connected to each second external electrode 30.

[0072] In the multilayer ceramic capacitor 2 according to the second preferred embodiment of the present invention, the first via conductors 240 and the second via conductors 250 are alternately arranged in both the row and column directions, thereby enabling the ESL of the multilayer ceramic capacitor 2 to be further reduced compared to the multilayer ceramic capacitor 1 according to the first preferred embodiment.

[0073] In the multilayer ceramic capacitor 2 according to the second embodiment of the present invention, the first external electrodes 20 are electrically connected to the corresponding first via conductors 240 through corresponding first openings 41 h among the plurality of openings. At least one second external electrode 30 is electrically connected to the corresponding second via conductors 250 through corresponding second openings 42 h among the plurality of openings. This makes it possible to suppress the influence of the arrangement of the first via conductors 240 and the second via conductors 250 and ensure the degree of freedom in the arrangement of the first external electrodes 20 and the second external electrodes 30. That is, while maintaining the arrangement of the first via conductors 240 and the second via conductors 250, the first external electrodes 20 and the second external electrodes 30 can be arranged in any positions, and the first external electrodes 20 and the first via conductors 240 corresponding to the first external electrodes 20 can be electrically connected, and the second external electrodes 30 and the second via conductors 250 corresponding to the second external electrodes 30 can be electrically connected. Furthermore, it is possible to ensure a degree of freedom in the arrangement of the first external electrode 20 and the second external electrode 30 while using a general-purpose capacitor body 200 .

[0074] (Note) It will be understood by those skilled in the art that the exemplary embodiments described above are specific examples of the following aspects.

[0075] <1> A capacitor body including a plurality of first internal electrode layers and a plurality of second internal electrode layers alternately stacked one layer at a time in a stacking direction with a dielectric layer sandwiched therebetween, the capacitor body having a first main surface and a second main surface located on the opposite side of the first main surface in the stacking direction; a plurality of first via conductors provided inside the capacitor body and electrically connected to the plurality of first internal electrode layers; a plurality of second via conductors provided inside the capacitor body and electrically connected to the plurality of second internal electrode layers; and a plurality of first external electrodes and at least one second external electrode provided at intervals from each other on the first main surface, wherein each of the plurality of first internal electrode layers is composed of a plurality of first internal electrode portions spaced apart from each other within the same layer, and each of the plurality of second internal electrode layers is integrally formed within the same layer, and each of the plurality of first internal electrode portions is electrically connected to a corresponding one of the plurality of first via conductors, a multilayer ceramic capacitor, wherein each of the plurality of first external electrodes is electrically connected to a plurality of first via conductors that are electrically connected to corresponding first internal electrode portions among the plurality of first internal electrode portions, and the at least one second external electrode is electrically connected to corresponding second via conductors among the plurality of second via conductors.

[0076] <2> The multilayer ceramic capacitor according to <1>, wherein the capacitor body further has four side surfaces connecting the first main surface and the second main surface, each of the plurality of first external electrodes extending from the first main surface onto at least one of the four side surfaces, and the at least one second external electrode extending from the first main surface onto at least one of the four side surfaces.

[0077] <3> The multilayer ceramic capacitor according to <1> or <2>, wherein each of the plurality of first via conductors and the plurality of second via conductors is exposed on the second main surface side.

[0078] <4> The multilayer ceramic capacitor according to any one of <1> to <3>, wherein the plurality of first via conductors are arranged in a plurality of rows, and the plurality of second via conductors are arranged in rows between the rows of the plurality of first via conductors.

[0079] <5> The multilayer ceramic capacitor according to any one of <1> to <3>, wherein the plurality of first via conductors and the plurality of second via conductors are alternately arranged in both the row direction and the column direction.

[0080] In the above-described embodiments, configurations that can be combined may be combined with each other.

[0081] The embodiments disclosed herein should be considered to be illustrative in all respects and not restrictive. The scope of the present invention is defined by the claims, not by the above description, and is intended to include all modifications within the meaning and scope of the claims.

[0082] 1, 1A, 1B, 1C, 2 Multilayer ceramic capacitor, 20, 20A, 21, 21A, 22, 22A First external electrode, 30, 30A, 31, 32 Second external electrode, 40 Insulating layer, 41h First opening, 42h Second opening, 100, 100B, 100C, 200 Capacitor body, 101 First main surface, 102 Second main surface, 103 First side surface, 104 Second side surface, 105 Third side surface, 106 Fourth side surface, 110 Dielectric layer, 120 First internal electrode layer, 120h First through hole, 121, 122 First internal electrode portion, 130 Second internal electrode layer, 130h Second through hole, 140, 140B, 140C, 240 First via conductor, 150, 150B, 150C, 250 Second via conductor.

Claims

1. a capacitor body including a plurality of first internal electrode layers and a plurality of second internal electrode layers alternately stacked one layer at a time in a stacking direction with a dielectric layer sandwiched therebetween, the capacitor body having a first main surface and a second main surface located on the opposite side of the first main surface in the stacking direction; a plurality of first via conductors provided inside the capacitor body and electrically connected to the plurality of first internal electrode layers; a plurality of second via conductors provided inside the capacitor body and electrically connected to the plurality of second internal electrode layers; a plurality of first external electrodes and at least one second external electrode provided on the first main surface at intervals from each other; each of the plurality of first internal electrode layers is composed of a plurality of first internal electrode portions that are spaced apart from one another within the same layer; Each of the plurality of second internal electrode layers is integrally formed within the same layer, each of the plurality of first internal electrode portions is electrically connected to a corresponding one of the plurality of first via conductors; each of the plurality of first external electrodes is electrically connected to a plurality of first via conductors electrically connected to a corresponding one of the plurality of first internal electrode portions; The at least one second external electrode is electrically connected to a corresponding one of the second via conductors.

2. the capacitor body further has four side surfaces connecting the first main surface and the second main surface, each of the plurality of first external electrodes extends from the first main surface onto at least one of the four side surfaces; 2. The multilayer ceramic capacitor according to claim 1, wherein the at least one second external electrode extends from the first main surface onto at least one of the four side surfaces.

3. The multilayer ceramic capacitor according to claim 1 , wherein each of the plurality of first via conductors and the plurality of second via conductors is exposed on a second main surface side.

4. A multilayer ceramic capacitor as described in Claim 2, wherein each of the plurality of first via conductors and the plurality of second via conductors is exposed on the second main surface side.

5. the plurality of first via conductors are arranged in a plurality of rows, 5. The multilayer ceramic capacitor according to claim 1, wherein the plurality of second via conductors are arranged in rows between the rows of the plurality of first via conductors.

6. 5. The multilayer ceramic capacitor according to claim 1, wherein the plurality of first via conductors and the plurality of second via conductors are alternately arranged in both the row direction and the column direction.